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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * MFD core driver for Intel Cherrytrail Whiskey Cove PMIC
0004  *
0005  * Copyright (C) 2017 Hans de Goede <hdegoede@redhat.com>
0006  *
0007  * Based on various non upstream patches to support the CHT Whiskey Cove PMIC:
0008  * Copyright (C) 2013-2015 Intel Corporation. All rights reserved.
0009  */
0010 
0011 #include <linux/acpi.h>
0012 #include <linux/delay.h>
0013 #include <linux/dmi.h>
0014 #include <linux/err.h>
0015 #include <linux/i2c.h>
0016 #include <linux/interrupt.h>
0017 #include <linux/kernel.h>
0018 #include <linux/mfd/core.h>
0019 #include <linux/mfd/intel_soc_pmic.h>
0020 #include <linux/regmap.h>
0021 
0022 /* PMIC device registers */
0023 #define REG_OFFSET_MASK     GENMASK(7, 0)
0024 #define REG_ADDR_MASK       GENMASK(15, 8)
0025 #define REG_ADDR_SHIFT      8
0026 
0027 #define CHT_WC_IRQLVL1      0x6e02
0028 #define CHT_WC_IRQLVL1_MASK 0x6e0e
0029 
0030 /* Whiskey Cove PMIC share same ACPI ID between different platforms */
0031 #define CHT_WC_HRV      3
0032 
0033 /* Level 1 IRQs (level 2 IRQs are handled in the child device drivers) */
0034 enum {
0035     CHT_WC_PWRSRC_IRQ = 0,
0036     CHT_WC_THRM_IRQ,
0037     CHT_WC_BCU_IRQ,
0038     CHT_WC_ADC_IRQ,
0039     CHT_WC_EXT_CHGR_IRQ,
0040     CHT_WC_GPIO_IRQ,
0041     /* There is no irq 6 */
0042     CHT_WC_CRIT_IRQ = 7,
0043 };
0044 
0045 static const struct resource cht_wc_pwrsrc_resources[] = {
0046     DEFINE_RES_IRQ(CHT_WC_PWRSRC_IRQ),
0047 };
0048 
0049 static const struct resource cht_wc_ext_charger_resources[] = {
0050     DEFINE_RES_IRQ(CHT_WC_EXT_CHGR_IRQ),
0051 };
0052 
0053 static struct mfd_cell cht_wc_dev[] = {
0054     {
0055         .name = "cht_wcove_pwrsrc",
0056         .num_resources = ARRAY_SIZE(cht_wc_pwrsrc_resources),
0057         .resources = cht_wc_pwrsrc_resources,
0058     }, {
0059         .name = "cht_wcove_ext_chgr",
0060         .num_resources = ARRAY_SIZE(cht_wc_ext_charger_resources),
0061         .resources = cht_wc_ext_charger_resources,
0062     },
0063     {   .name = "cht_wcove_region", },
0064     {   .name = "cht_wcove_leds", },
0065 };
0066 
0067 /*
0068  * The CHT Whiskey Cove covers multiple I2C addresses, with a 1 Byte
0069  * register address space per I2C address, so we use 16 bit register
0070  * addresses where the high 8 bits contain the I2C client address.
0071  */
0072 static int cht_wc_byte_reg_read(void *context, unsigned int reg,
0073                 unsigned int *val)
0074 {
0075     struct i2c_client *client = context;
0076     int ret, orig_addr = client->addr;
0077 
0078     if (!(reg & REG_ADDR_MASK)) {
0079         dev_err(&client->dev, "Error I2C address not specified\n");
0080         return -EINVAL;
0081     }
0082 
0083     client->addr = (reg & REG_ADDR_MASK) >> REG_ADDR_SHIFT;
0084     ret = i2c_smbus_read_byte_data(client, reg & REG_OFFSET_MASK);
0085     client->addr = orig_addr;
0086 
0087     if (ret < 0)
0088         return ret;
0089 
0090     *val = ret;
0091     return 0;
0092 }
0093 
0094 static int cht_wc_byte_reg_write(void *context, unsigned int reg,
0095                  unsigned int val)
0096 {
0097     struct i2c_client *client = context;
0098     int ret, orig_addr = client->addr;
0099 
0100     if (!(reg & REG_ADDR_MASK)) {
0101         dev_err(&client->dev, "Error I2C address not specified\n");
0102         return -EINVAL;
0103     }
0104 
0105     client->addr = (reg & REG_ADDR_MASK) >> REG_ADDR_SHIFT;
0106     ret = i2c_smbus_write_byte_data(client, reg & REG_OFFSET_MASK, val);
0107     client->addr = orig_addr;
0108 
0109     return ret;
0110 }
0111 
0112 static const struct regmap_config cht_wc_regmap_cfg = {
0113     .reg_bits = 16,
0114     .val_bits = 8,
0115     .reg_write = cht_wc_byte_reg_write,
0116     .reg_read = cht_wc_byte_reg_read,
0117 };
0118 
0119 static const struct regmap_irq cht_wc_regmap_irqs[] = {
0120     REGMAP_IRQ_REG(CHT_WC_PWRSRC_IRQ, 0, BIT(CHT_WC_PWRSRC_IRQ)),
0121     REGMAP_IRQ_REG(CHT_WC_THRM_IRQ, 0, BIT(CHT_WC_THRM_IRQ)),
0122     REGMAP_IRQ_REG(CHT_WC_BCU_IRQ, 0, BIT(CHT_WC_BCU_IRQ)),
0123     REGMAP_IRQ_REG(CHT_WC_ADC_IRQ, 0, BIT(CHT_WC_ADC_IRQ)),
0124     REGMAP_IRQ_REG(CHT_WC_EXT_CHGR_IRQ, 0, BIT(CHT_WC_EXT_CHGR_IRQ)),
0125     REGMAP_IRQ_REG(CHT_WC_GPIO_IRQ, 0, BIT(CHT_WC_GPIO_IRQ)),
0126     REGMAP_IRQ_REG(CHT_WC_CRIT_IRQ, 0, BIT(CHT_WC_CRIT_IRQ)),
0127 };
0128 
0129 static const struct regmap_irq_chip cht_wc_regmap_irq_chip = {
0130     .name = "cht_wc_irq_chip",
0131     .status_base = CHT_WC_IRQLVL1,
0132     .mask_base = CHT_WC_IRQLVL1_MASK,
0133     .irqs = cht_wc_regmap_irqs,
0134     .num_irqs = ARRAY_SIZE(cht_wc_regmap_irqs),
0135     .num_regs = 1,
0136 };
0137 
0138 static const struct dmi_system_id cht_wc_model_dmi_ids[] = {
0139     {
0140         /* GPD win / GPD pocket mini laptops */
0141         .driver_data = (void *)(long)INTEL_CHT_WC_GPD_WIN_POCKET,
0142         /*
0143          * This DMI match may not seem unique, but it is. In the 67000+
0144          * DMI decode dumps from linux-hardware.org only 116 have
0145          * board_vendor set to "AMI Corporation" and of those 116 only
0146          * the GPD win's and pocket's board_name is "Default string".
0147          */
0148         .matches = {
0149             DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
0150             DMI_EXACT_MATCH(DMI_BOARD_NAME, "Default string"),
0151             DMI_EXACT_MATCH(DMI_BOARD_SERIAL, "Default string"),
0152             DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Default string"),
0153         },
0154     }, {
0155         /* Xiaomi Mi Pad 2 */
0156         .driver_data = (void *)(long)INTEL_CHT_WC_XIAOMI_MIPAD2,
0157         .matches = {
0158             DMI_MATCH(DMI_SYS_VENDOR, "Xiaomi Inc"),
0159             DMI_MATCH(DMI_PRODUCT_NAME, "Mipad2"),
0160         },
0161     }, {
0162         /* Lenovo Yoga Book X90F / X91F / X91L */
0163         .driver_data = (void *)(long)INTEL_CHT_WC_LENOVO_YOGABOOK1,
0164         .matches = {
0165             /* Non exact match to match all versions */
0166             DMI_MATCH(DMI_PRODUCT_NAME, "Lenovo YB1-X9"),
0167         },
0168     },
0169     { }
0170 };
0171 
0172 static int cht_wc_probe(struct i2c_client *client)
0173 {
0174     struct device *dev = &client->dev;
0175     const struct dmi_system_id *id;
0176     struct intel_soc_pmic *pmic;
0177     acpi_status status;
0178     unsigned long long hrv;
0179     int ret;
0180 
0181     status = acpi_evaluate_integer(ACPI_HANDLE(dev), "_HRV", NULL, &hrv);
0182     if (ACPI_FAILURE(status))
0183         return dev_err_probe(dev, -ENODEV, "Failed to get PMIC hardware revision\n");
0184     if (hrv != CHT_WC_HRV)
0185         return dev_err_probe(dev, -ENODEV, "Invalid PMIC hardware revision: %llu\n", hrv);
0186 
0187     if (client->irq < 0)
0188         return dev_err_probe(dev, -EINVAL, "Invalid IRQ\n");
0189 
0190     pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL);
0191     if (!pmic)
0192         return -ENOMEM;
0193 
0194     id = dmi_first_match(cht_wc_model_dmi_ids);
0195     if (id)
0196         pmic->cht_wc_model = (long)id->driver_data;
0197 
0198     pmic->irq = client->irq;
0199     pmic->dev = dev;
0200     i2c_set_clientdata(client, pmic);
0201 
0202     pmic->regmap = devm_regmap_init(dev, NULL, client, &cht_wc_regmap_cfg);
0203     if (IS_ERR(pmic->regmap))
0204         return PTR_ERR(pmic->regmap);
0205 
0206     ret = devm_regmap_add_irq_chip(dev, pmic->regmap, pmic->irq,
0207                        IRQF_ONESHOT | IRQF_SHARED, 0,
0208                        &cht_wc_regmap_irq_chip,
0209                        &pmic->irq_chip_data);
0210     if (ret)
0211         return ret;
0212 
0213     return devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE,
0214                 cht_wc_dev, ARRAY_SIZE(cht_wc_dev), NULL, 0,
0215                 regmap_irq_get_domain(pmic->irq_chip_data));
0216 }
0217 
0218 static void cht_wc_shutdown(struct i2c_client *client)
0219 {
0220     struct intel_soc_pmic *pmic = i2c_get_clientdata(client);
0221 
0222     disable_irq(pmic->irq);
0223 }
0224 
0225 static int cht_wc_suspend(struct device *dev)
0226 {
0227     struct intel_soc_pmic *pmic = dev_get_drvdata(dev);
0228 
0229     disable_irq(pmic->irq);
0230 
0231     return 0;
0232 }
0233 
0234 static int cht_wc_resume(struct device *dev)
0235 {
0236     struct intel_soc_pmic *pmic = dev_get_drvdata(dev);
0237 
0238     enable_irq(pmic->irq);
0239 
0240     return 0;
0241 }
0242 static DEFINE_SIMPLE_DEV_PM_OPS(cht_wc_pm_ops, cht_wc_suspend, cht_wc_resume);
0243 
0244 static const struct i2c_device_id cht_wc_i2c_id[] = {
0245     { }
0246 };
0247 
0248 static const struct acpi_device_id cht_wc_acpi_ids[] = {
0249     { "INT34D3", },
0250     { }
0251 };
0252 
0253 static struct i2c_driver cht_wc_driver = {
0254     .driver = {
0255         .name   = "CHT Whiskey Cove PMIC",
0256         .pm     = pm_sleep_ptr(&cht_wc_pm_ops),
0257         .acpi_match_table = cht_wc_acpi_ids,
0258     },
0259     .probe_new = cht_wc_probe,
0260     .shutdown = cht_wc_shutdown,
0261     .id_table = cht_wc_i2c_id,
0262 };
0263 builtin_i2c_driver(cht_wc_driver);