drivers/mfd/intel-m10-bmc.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Intel MAX 10 Board Management Controller chip
0004  *
0005  * Copyright (C) 2018-2020 Intel Corporation. All rights reserved.
0006  */
0007 #include <linux/bitfield.h>
0008 #include <linux/init.h>
0009 #include <linux/mfd/core.h>
0010 #include <linux/mfd/intel-m10-bmc.h>
0011 #include <linux/module.h>
0012 #include <linux/mutex.h>
0013 #include <linux/regmap.h>
0014 #include <linux/spi/spi.h>
0015
0016 enum m10bmc_type {
0017     M10_N3000,
0018     M10_D5005,
0019     M10_N5010,
0020 };
0021
0022 static struct mfd_cell m10bmc_d5005_subdevs[] = {
0023     { .name = "d5005bmc-hwmon" },
0024 };
0025
0026 static struct mfd_cell m10bmc_pacn3000_subdevs[] = {
0027     { .name = "n3000bmc-hwmon" },
0028     { .name = "n3000bmc-retimer" },
0029     { .name = "n3000bmc-sec-update" },
0030 };
0031
0032 static struct mfd_cell m10bmc_n5010_subdevs[] = {
0033     { .name = "n5010bmc-hwmon" },
0034 };
0035
0036 static const struct regmap_range m10bmc_regmap_range[] = {
0037     regmap_reg_range(M10BMC_LEGACY_BUILD_VER, M10BMC_LEGACY_BUILD_VER),
0038     regmap_reg_range(M10BMC_SYS_BASE, M10BMC_SYS_END),
0039     regmap_reg_range(M10BMC_FLASH_BASE, M10BMC_FLASH_END),
0040 };
0041
0042 static const struct regmap_access_table m10bmc_access_table = {
0043     .yes_ranges = m10bmc_regmap_range,
0044     .n_yes_ranges   = ARRAY_SIZE(m10bmc_regmap_range),
0045 };
0046
0047 static struct regmap_config intel_m10bmc_regmap_config = {
0048     .reg_bits = 32,
0049     .val_bits = 32,
0050     .reg_stride = 4,
0051     .wr_table = &m10bmc_access_table,
0052     .rd_table = &m10bmc_access_table,
0053     .max_register = M10BMC_MEM_END,
0054 };
0055
0056 static ssize_t bmc_version_show(struct device *dev,
0057                 struct device_attribute *attr, char *buf)
0058 {
0059     struct intel_m10bmc *ddata = dev_get_drvdata(dev);
0060     unsigned int val;
0061     int ret;
0062
0063     ret = m10bmc_sys_read(ddata, M10BMC_BUILD_VER, &val);
0064     if (ret)
0065         return ret;
0066
0067     return sprintf(buf, "0x%x\n", val);
0068 }
0069 static DEVICE_ATTR_RO(bmc_version);
0070
0071 static ssize_t bmcfw_version_show(struct device *dev,
0072                   struct device_attribute *attr, char *buf)
0073 {
0074     struct intel_m10bmc *ddata = dev_get_drvdata(dev);
0075     unsigned int val;
0076     int ret;
0077
0078     ret = m10bmc_sys_read(ddata, NIOS2_FW_VERSION, &val);
0079     if (ret)
0080         return ret;
0081
0082     return sprintf(buf, "0x%x\n", val);
0083 }
0084 static DEVICE_ATTR_RO(bmcfw_version);
0085
0086 static ssize_t mac_address_show(struct device *dev,
0087                 struct device_attribute *attr, char *buf)
0088 {
0089     struct intel_m10bmc *max10 = dev_get_drvdata(dev);
0090     unsigned int macaddr_low, macaddr_high;
0091     int ret;
0092
0093     ret = m10bmc_sys_read(max10, M10BMC_MAC_LOW, &macaddr_low);
0094     if (ret)
0095         return ret;
0096
0097     ret = m10bmc_sys_read(max10, M10BMC_MAC_HIGH, &macaddr_high);
0098     if (ret)
0099         return ret;
0100
0101     return sysfs_emit(buf, "%02x:%02x:%02x:%02x:%02x:%02x\n",
0102               (u8)FIELD_GET(M10BMC_MAC_BYTE1, macaddr_low),
0103               (u8)FIELD_GET(M10BMC_MAC_BYTE2, macaddr_low),
0104               (u8)FIELD_GET(M10BMC_MAC_BYTE3, macaddr_low),
0105               (u8)FIELD_GET(M10BMC_MAC_BYTE4, macaddr_low),
0106               (u8)FIELD_GET(M10BMC_MAC_BYTE5, macaddr_high),
0107               (u8)FIELD_GET(M10BMC_MAC_BYTE6, macaddr_high));
0108 }
0109 static DEVICE_ATTR_RO(mac_address);
0110
0111 static ssize_t mac_count_show(struct device *dev,
0112                   struct device_attribute *attr, char *buf)
0113 {
0114     struct intel_m10bmc *max10 = dev_get_drvdata(dev);
0115     unsigned int macaddr_high;
0116     int ret;
0117
0118     ret = m10bmc_sys_read(max10, M10BMC_MAC_HIGH, &macaddr_high);
0119     if (ret)
0120         return ret;
0121
0122     return sysfs_emit(buf, "%u\n",
0123               (u8)FIELD_GET(M10BMC_MAC_COUNT, macaddr_high));
0124 }
0125 static DEVICE_ATTR_RO(mac_count);
0126
0127 static struct attribute *m10bmc_attrs[] = {
0128     &dev_attr_bmc_version.attr,
0129     &dev_attr_bmcfw_version.attr,
0130     &dev_attr_mac_address.attr,
0131     &dev_attr_mac_count.attr,
0132     NULL,
0133 };
0134 ATTRIBUTE_GROUPS(m10bmc);
0135
0136 static int check_m10bmc_version(struct intel_m10bmc *ddata)
0137 {
0138     unsigned int v;
0139     int ret;
0140
0141     /*
0142      * This check is to filter out the very old legacy BMC versions. In the
0143      * old BMC chips, the BMC version info is stored in the old version
0144      * register (M10BMC_LEGACY_BUILD_VER), so its read out value would have
0145      * not been M10BMC_VER_LEGACY_INVALID (0xffffffff). But in new BMC
0146      * chips that the driver supports, the value of this register should be
0147      * M10BMC_VER_LEGACY_INVALID.
0148      */
0149     ret = m10bmc_raw_read(ddata, M10BMC_LEGACY_BUILD_VER, &v);
0150     if (ret)
0151         return -ENODEV;
0152
0153     if (v != M10BMC_VER_LEGACY_INVALID) {
0154         dev_err(ddata->dev, "bad version M10BMC detected\n");
0155         return -ENODEV;
0156     }
0157
0158     return 0;
0159 }
0160
0161 static int intel_m10_bmc_spi_probe(struct spi_device *spi)
0162 {
0163     const struct spi_device_id *id = spi_get_device_id(spi);
0164     struct device *dev = &spi->dev;
0165     struct mfd_cell *cells;
0166     struct intel_m10bmc *ddata;
0167     int ret, n_cell;
0168
0169     ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL);
0170     if (!ddata)
0171         return -ENOMEM;
0172
0173     ddata->dev = dev;
0174
0175     ddata->regmap =
0176         devm_regmap_init_spi_avmm(spi, &intel_m10bmc_regmap_config);
0177     if (IS_ERR(ddata->regmap)) {
0178         ret = PTR_ERR(ddata->regmap);
0179         dev_err(dev, "Failed to allocate regmap: %d\n", ret);
0180         return ret;
0181     }
0182
0183     spi_set_drvdata(spi, ddata);
0184
0185     ret = check_m10bmc_version(ddata);
0186     if (ret) {
0187         dev_err(dev, "Failed to identify m10bmc hardware\n");
0188         return ret;
0189     }
0190
0191     switch (id->driver_data) {
0192     case M10_N3000:
0193         cells = m10bmc_pacn3000_subdevs;
0194         n_cell = ARRAY_SIZE(m10bmc_pacn3000_subdevs);
0195         break;
0196     case M10_D5005:
0197         cells = m10bmc_d5005_subdevs;
0198         n_cell = ARRAY_SIZE(m10bmc_d5005_subdevs);
0199         break;
0200     case M10_N5010:
0201         cells = m10bmc_n5010_subdevs;
0202         n_cell = ARRAY_SIZE(m10bmc_n5010_subdevs);
0203         break;
0204     default:
0205         return -ENODEV;
0206     }
0207
0208     ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, cells, n_cell,
0209                    NULL, 0, NULL);
0210     if (ret)
0211         dev_err(dev, "Failed to register sub-devices: %d\n", ret);
0212
0213     return ret;
0214 }
0215
0216 static const struct spi_device_id m10bmc_spi_id[] = {
0217     { "m10-n3000", M10_N3000 },
0218     { "m10-d5005", M10_D5005 },
0219     { "m10-n5010", M10_N5010 },
0220     { }
0221 };
0222 MODULE_DEVICE_TABLE(spi, m10bmc_spi_id);
0223
0224 static struct spi_driver intel_m10bmc_spi_driver = {
0225     .driver = {
0226         .name = "intel-m10-bmc",
0227         .dev_groups = m10bmc_groups,
0228     },
0229     .probe = intel_m10_bmc_spi_probe,
0230     .id_table = m10bmc_spi_id,
0231 };
0232 module_spi_driver(intel_m10bmc_spi_driver);
0233
0234 MODULE_DESCRIPTION("Intel MAX 10 BMC Device Driver");
0235 MODULE_AUTHOR("Intel Corporation");
0236 MODULE_LICENSE("GPL v2");
0237 MODULE_ALIAS("spi:intel-m10-bmc");