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0009 #include <linux/clk.h>
0010 #include <linux/iopoll.h>
0011 #include <linux/mfd/atmel-hlcdc.h>
0012 #include <linux/mfd/core.h>
0013 #include <linux/module.h>
0014 #include <linux/mod_devicetable.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/regmap.h>
0017
0018 #define ATMEL_HLCDC_REG_MAX (0x4000 - 0x4)
0019
0020 struct atmel_hlcdc_regmap {
0021 void __iomem *regs;
0022 struct device *dev;
0023 };
0024
0025 static const struct mfd_cell atmel_hlcdc_cells[] = {
0026 {
0027 .name = "atmel-hlcdc-pwm",
0028 .of_compatible = "atmel,hlcdc-pwm",
0029 },
0030 {
0031 .name = "atmel-hlcdc-dc",
0032 .of_compatible = "atmel,hlcdc-display-controller",
0033 },
0034 };
0035
0036 static int regmap_atmel_hlcdc_reg_write(void *context, unsigned int reg,
0037 unsigned int val)
0038 {
0039 struct atmel_hlcdc_regmap *hregmap = context;
0040
0041 if (reg <= ATMEL_HLCDC_DIS) {
0042 u32 status;
0043 int ret;
0044
0045 ret = readl_poll_timeout_atomic(hregmap->regs + ATMEL_HLCDC_SR,
0046 status,
0047 !(status & ATMEL_HLCDC_SIP),
0048 1, 100);
0049 if (ret) {
0050 dev_err(hregmap->dev,
0051 "Timeout! Clock domain synchronization is in progress!\n");
0052 return ret;
0053 }
0054 }
0055
0056 writel(val, hregmap->regs + reg);
0057
0058 return 0;
0059 }
0060
0061 static int regmap_atmel_hlcdc_reg_read(void *context, unsigned int reg,
0062 unsigned int *val)
0063 {
0064 struct atmel_hlcdc_regmap *hregmap = context;
0065
0066 *val = readl(hregmap->regs + reg);
0067
0068 return 0;
0069 }
0070
0071 static const struct regmap_config atmel_hlcdc_regmap_config = {
0072 .reg_bits = 32,
0073 .val_bits = 32,
0074 .reg_stride = 4,
0075 .max_register = ATMEL_HLCDC_REG_MAX,
0076 .reg_write = regmap_atmel_hlcdc_reg_write,
0077 .reg_read = regmap_atmel_hlcdc_reg_read,
0078 .fast_io = true,
0079 };
0080
0081 static int atmel_hlcdc_probe(struct platform_device *pdev)
0082 {
0083 struct atmel_hlcdc_regmap *hregmap;
0084 struct device *dev = &pdev->dev;
0085 struct atmel_hlcdc *hlcdc;
0086 struct resource *res;
0087
0088 hregmap = devm_kzalloc(dev, sizeof(*hregmap), GFP_KERNEL);
0089 if (!hregmap)
0090 return -ENOMEM;
0091
0092 hlcdc = devm_kzalloc(dev, sizeof(*hlcdc), GFP_KERNEL);
0093 if (!hlcdc)
0094 return -ENOMEM;
0095
0096 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
0097 hregmap->regs = devm_ioremap_resource(dev, res);
0098 if (IS_ERR(hregmap->regs))
0099 return PTR_ERR(hregmap->regs);
0100
0101 hregmap->dev = &pdev->dev;
0102
0103 hlcdc->irq = platform_get_irq(pdev, 0);
0104 if (hlcdc->irq < 0)
0105 return hlcdc->irq;
0106
0107 hlcdc->periph_clk = devm_clk_get(dev, "periph_clk");
0108 if (IS_ERR(hlcdc->periph_clk)) {
0109 dev_err(dev, "failed to get peripheral clock\n");
0110 return PTR_ERR(hlcdc->periph_clk);
0111 }
0112
0113 hlcdc->sys_clk = devm_clk_get(dev, "sys_clk");
0114 if (IS_ERR(hlcdc->sys_clk)) {
0115 dev_err(dev, "failed to get system clock\n");
0116 return PTR_ERR(hlcdc->sys_clk);
0117 }
0118
0119 hlcdc->slow_clk = devm_clk_get(dev, "slow_clk");
0120 if (IS_ERR(hlcdc->slow_clk)) {
0121 dev_err(dev, "failed to get slow clock\n");
0122 return PTR_ERR(hlcdc->slow_clk);
0123 }
0124
0125 hlcdc->regmap = devm_regmap_init(dev, NULL, hregmap,
0126 &atmel_hlcdc_regmap_config);
0127 if (IS_ERR(hlcdc->regmap))
0128 return PTR_ERR(hlcdc->regmap);
0129
0130 dev_set_drvdata(dev, hlcdc);
0131
0132 return devm_mfd_add_devices(dev, -1, atmel_hlcdc_cells,
0133 ARRAY_SIZE(atmel_hlcdc_cells),
0134 NULL, 0, NULL);
0135 }
0136
0137 static const struct of_device_id atmel_hlcdc_match[] = {
0138 { .compatible = "atmel,at91sam9n12-hlcdc" },
0139 { .compatible = "atmel,at91sam9x5-hlcdc" },
0140 { .compatible = "atmel,sama5d2-hlcdc" },
0141 { .compatible = "atmel,sama5d3-hlcdc" },
0142 { .compatible = "atmel,sama5d4-hlcdc" },
0143 { .compatible = "microchip,sam9x60-hlcdc" },
0144 { },
0145 };
0146 MODULE_DEVICE_TABLE(of, atmel_hlcdc_match);
0147
0148 static struct platform_driver atmel_hlcdc_driver = {
0149 .probe = atmel_hlcdc_probe,
0150 .driver = {
0151 .name = "atmel-hlcdc",
0152 .of_match_table = atmel_hlcdc_match,
0153 },
0154 };
0155 module_platform_driver(atmel_hlcdc_driver);
0156
0157 MODULE_ALIAS("platform:atmel-hlcdc");
0158 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");
0159 MODULE_DESCRIPTION("Atmel HLCDC driver");
0160 MODULE_LICENSE("GPL v2");