drivers/mfd/as3722.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Core driver for ams AS3722 PMICs
0004  *
0005  * Copyright (C) 2013 AMS AG
0006  * Copyright (c) 2013, NVIDIA Corporation. All rights reserved.
0007  *
0008  * Author: Florian Lobmaier <florian.lobmaier@ams.com>
0009  * Author: Laxman Dewangan <ldewangan@nvidia.com>
0010  */
0011
0012 #include <linux/err.h>
0013 #include <linux/i2c.h>
0014 #include <linux/interrupt.h>
0015 #include <linux/irq.h>
0016 #include <linux/kernel.h>
0017 #include <linux/module.h>
0018 #include <linux/mfd/core.h>
0019 #include <linux/mfd/as3722.h>
0020 #include <linux/of.h>
0021 #include <linux/regmap.h>
0022 #include <linux/slab.h>
0023
0024 #define AS3722_DEVICE_ID    0x0C
0025
0026 static const struct resource as3722_rtc_resource[] = {
0027     DEFINE_RES_IRQ_NAMED(AS3722_IRQ_RTC_ALARM, "as3722-rtc-alarm"),
0028 };
0029
0030 static const struct resource as3722_adc_resource[] = {
0031     DEFINE_RES_IRQ_NAMED(AS3722_IRQ_ADC, "as3722-adc"),
0032 };
0033
0034 static const struct mfd_cell as3722_devs[] = {
0035     {
0036         .name = "as3722-pinctrl",
0037     },
0038     {
0039         .name = "as3722-regulator",
0040     },
0041     {
0042         .name = "as3722-rtc",
0043         .num_resources = ARRAY_SIZE(as3722_rtc_resource),
0044         .resources = as3722_rtc_resource,
0045     },
0046     {
0047         .name = "as3722-adc",
0048         .num_resources = ARRAY_SIZE(as3722_adc_resource),
0049         .resources = as3722_adc_resource,
0050     },
0051     {
0052         .name = "as3722-power-off",
0053     },
0054     {
0055         .name = "as3722-wdt",
0056     },
0057 };
0058
0059 static const struct regmap_irq as3722_irqs[] = {
0060     /* INT1 IRQs */
0061     [AS3722_IRQ_LID] = {
0062         .mask = AS3722_INTERRUPT_MASK1_LID,
0063     },
0064     [AS3722_IRQ_ACOK] = {
0065         .mask = AS3722_INTERRUPT_MASK1_ACOK,
0066     },
0067     [AS3722_IRQ_ENABLE1] = {
0068         .mask = AS3722_INTERRUPT_MASK1_ENABLE1,
0069     },
0070     [AS3722_IRQ_OCCUR_ALARM_SD0] = {
0071         .mask = AS3722_INTERRUPT_MASK1_OCURR_ALARM_SD0,
0072     },
0073     [AS3722_IRQ_ONKEY_LONG_PRESS] = {
0074         .mask = AS3722_INTERRUPT_MASK1_ONKEY_LONG,
0075     },
0076     [AS3722_IRQ_ONKEY] = {
0077         .mask = AS3722_INTERRUPT_MASK1_ONKEY,
0078     },
0079     [AS3722_IRQ_OVTMP] = {
0080         .mask = AS3722_INTERRUPT_MASK1_OVTMP,
0081     },
0082     [AS3722_IRQ_LOWBAT] = {
0083         .mask = AS3722_INTERRUPT_MASK1_LOWBAT,
0084     },
0085
0086     /* INT2 IRQs */
0087     [AS3722_IRQ_SD0_LV] = {
0088         .mask = AS3722_INTERRUPT_MASK2_SD0_LV,
0089         .reg_offset = 1,
0090     },
0091     [AS3722_IRQ_SD1_LV] = {
0092         .mask = AS3722_INTERRUPT_MASK2_SD1_LV,
0093         .reg_offset = 1,
0094     },
0095     [AS3722_IRQ_SD2_LV] = {
0096         .mask = AS3722_INTERRUPT_MASK2_SD2345_LV,
0097         .reg_offset = 1,
0098     },
0099     [AS3722_IRQ_PWM1_OV_PROT] = {
0100         .mask = AS3722_INTERRUPT_MASK2_PWM1_OV_PROT,
0101         .reg_offset = 1,
0102     },
0103     [AS3722_IRQ_PWM2_OV_PROT] = {
0104         .mask = AS3722_INTERRUPT_MASK2_PWM2_OV_PROT,
0105         .reg_offset = 1,
0106     },
0107     [AS3722_IRQ_ENABLE2] = {
0108         .mask = AS3722_INTERRUPT_MASK2_ENABLE2,
0109         .reg_offset = 1,
0110     },
0111     [AS3722_IRQ_SD6_LV] = {
0112         .mask = AS3722_INTERRUPT_MASK2_SD6_LV,
0113         .reg_offset = 1,
0114     },
0115     [AS3722_IRQ_RTC_REP] = {
0116         .mask = AS3722_INTERRUPT_MASK2_RTC_REP,
0117         .reg_offset = 1,
0118     },
0119
0120     /* INT3 IRQs */
0121     [AS3722_IRQ_RTC_ALARM] = {
0122         .mask = AS3722_INTERRUPT_MASK3_RTC_ALARM,
0123         .reg_offset = 2,
0124     },
0125     [AS3722_IRQ_GPIO1] = {
0126         .mask = AS3722_INTERRUPT_MASK3_GPIO1,
0127         .reg_offset = 2,
0128     },
0129     [AS3722_IRQ_GPIO2] = {
0130         .mask = AS3722_INTERRUPT_MASK3_GPIO2,
0131         .reg_offset = 2,
0132     },
0133     [AS3722_IRQ_GPIO3] = {
0134         .mask = AS3722_INTERRUPT_MASK3_GPIO3,
0135         .reg_offset = 2,
0136     },
0137     [AS3722_IRQ_GPIO4] = {
0138         .mask = AS3722_INTERRUPT_MASK3_GPIO4,
0139         .reg_offset = 2,
0140     },
0141     [AS3722_IRQ_GPIO5] = {
0142         .mask = AS3722_INTERRUPT_MASK3_GPIO5,
0143         .reg_offset = 2,
0144     },
0145     [AS3722_IRQ_WATCHDOG] = {
0146         .mask = AS3722_INTERRUPT_MASK3_WATCHDOG,
0147         .reg_offset = 2,
0148     },
0149     [AS3722_IRQ_ENABLE3] = {
0150         .mask = AS3722_INTERRUPT_MASK3_ENABLE3,
0151         .reg_offset = 2,
0152     },
0153
0154     /* INT4 IRQs */
0155     [AS3722_IRQ_TEMP_SD0_SHUTDOWN] = {
0156         .mask = AS3722_INTERRUPT_MASK4_TEMP_SD0_SHUTDOWN,
0157         .reg_offset = 3,
0158     },
0159     [AS3722_IRQ_TEMP_SD1_SHUTDOWN] = {
0160         .mask = AS3722_INTERRUPT_MASK4_TEMP_SD1_SHUTDOWN,
0161         .reg_offset = 3,
0162     },
0163     [AS3722_IRQ_TEMP_SD2_SHUTDOWN] = {
0164         .mask = AS3722_INTERRUPT_MASK4_TEMP_SD6_SHUTDOWN,
0165         .reg_offset = 3,
0166     },
0167     [AS3722_IRQ_TEMP_SD0_ALARM] = {
0168         .mask = AS3722_INTERRUPT_MASK4_TEMP_SD0_ALARM,
0169         .reg_offset = 3,
0170     },
0171     [AS3722_IRQ_TEMP_SD1_ALARM] = {
0172         .mask = AS3722_INTERRUPT_MASK4_TEMP_SD1_ALARM,
0173         .reg_offset = 3,
0174     },
0175     [AS3722_IRQ_TEMP_SD6_ALARM] = {
0176         .mask = AS3722_INTERRUPT_MASK4_TEMP_SD6_ALARM,
0177         .reg_offset = 3,
0178     },
0179     [AS3722_IRQ_OCCUR_ALARM_SD6] = {
0180         .mask = AS3722_INTERRUPT_MASK4_OCCUR_ALARM_SD6,
0181         .reg_offset = 3,
0182     },
0183     [AS3722_IRQ_ADC] = {
0184         .mask = AS3722_INTERRUPT_MASK4_ADC,
0185         .reg_offset = 3,
0186     },
0187 };
0188
0189 static const struct regmap_irq_chip as3722_irq_chip = {
0190     .name = "as3722",
0191     .irqs = as3722_irqs,
0192     .num_irqs = ARRAY_SIZE(as3722_irqs),
0193     .num_regs = 4,
0194     .status_base = AS3722_INTERRUPT_STATUS1_REG,
0195     .mask_base = AS3722_INTERRUPT_MASK1_REG,
0196 };
0197
0198 static int as3722_check_device_id(struct as3722 *as3722)
0199 {
0200     u32 val;
0201     int ret;
0202
0203     /* Check that this is actually a AS3722 */
0204     ret = as3722_read(as3722, AS3722_ASIC_ID1_REG, &val);
0205     if (ret < 0) {
0206         dev_err(as3722->dev, "ASIC_ID1 read failed: %d\n", ret);
0207         return ret;
0208     }
0209
0210     if (val != AS3722_DEVICE_ID) {
0211         dev_err(as3722->dev, "Device is not AS3722, ID is 0x%x\n", val);
0212         return -ENODEV;
0213     }
0214
0215     ret = as3722_read(as3722, AS3722_ASIC_ID2_REG, &val);
0216     if (ret < 0) {
0217         dev_err(as3722->dev, "ASIC_ID2 read failed: %d\n", ret);
0218         return ret;
0219     }
0220
0221     dev_info(as3722->dev, "AS3722 with revision 0x%x found\n", val);
0222     return 0;
0223 }
0224
0225 static int as3722_configure_pullups(struct as3722 *as3722)
0226 {
0227     int ret;
0228     u32 val = 0;
0229
0230     if (as3722->en_intern_int_pullup)
0231         val |= AS3722_INT_PULL_UP;
0232     if (as3722->en_intern_i2c_pullup)
0233         val |= AS3722_I2C_PULL_UP;
0234
0235     ret = as3722_update_bits(as3722, AS3722_IOVOLTAGE_REG,
0236             AS3722_INT_PULL_UP | AS3722_I2C_PULL_UP, val);
0237     if (ret < 0)
0238         dev_err(as3722->dev, "IOVOLTAGE_REG update failed: %d\n", ret);
0239     return ret;
0240 }
0241
0242 static const struct regmap_range as3722_readable_ranges[] = {
0243     regmap_reg_range(AS3722_SD0_VOLTAGE_REG, AS3722_SD6_VOLTAGE_REG),
0244     regmap_reg_range(AS3722_GPIO0_CONTROL_REG, AS3722_LDO7_VOLTAGE_REG),
0245     regmap_reg_range(AS3722_LDO9_VOLTAGE_REG, AS3722_REG_SEQU_MOD3_REG),
0246     regmap_reg_range(AS3722_SD_PHSW_CTRL_REG, AS3722_PWM_CONTROL_H_REG),
0247     regmap_reg_range(AS3722_WATCHDOG_TIMER_REG, AS3722_WATCHDOG_TIMER_REG),
0248     regmap_reg_range(AS3722_WATCHDOG_SOFTWARE_SIGNAL_REG,
0249                     AS3722_BATTERY_VOLTAGE_MONITOR2_REG),
0250     regmap_reg_range(AS3722_SD_CONTROL_REG, AS3722_PWM_VCONTROL4_REG),
0251     regmap_reg_range(AS3722_BB_CHARGER_REG, AS3722_SRAM_REG),
0252     regmap_reg_range(AS3722_RTC_ACCESS_REG, AS3722_RTC_ACCESS_REG),
0253     regmap_reg_range(AS3722_RTC_STATUS_REG, AS3722_TEMP_STATUS_REG),
0254     regmap_reg_range(AS3722_ADC0_CONTROL_REG, AS3722_ADC_CONFIGURATION_REG),
0255     regmap_reg_range(AS3722_ASIC_ID1_REG, AS3722_ASIC_ID2_REG),
0256     regmap_reg_range(AS3722_LOCK_REG, AS3722_LOCK_REG),
0257     regmap_reg_range(AS3722_FUSE7_REG, AS3722_FUSE7_REG),
0258 };
0259
0260 static const struct regmap_access_table as3722_readable_table = {
0261     .yes_ranges = as3722_readable_ranges,
0262     .n_yes_ranges = ARRAY_SIZE(as3722_readable_ranges),
0263 };
0264
0265 static const struct regmap_range as3722_writable_ranges[] = {
0266     regmap_reg_range(AS3722_SD0_VOLTAGE_REG, AS3722_SD6_VOLTAGE_REG),
0267     regmap_reg_range(AS3722_GPIO0_CONTROL_REG, AS3722_LDO7_VOLTAGE_REG),
0268     regmap_reg_range(AS3722_LDO9_VOLTAGE_REG, AS3722_GPIO_SIGNAL_OUT_REG),
0269     regmap_reg_range(AS3722_REG_SEQU_MOD1_REG, AS3722_REG_SEQU_MOD3_REG),
0270     regmap_reg_range(AS3722_SD_PHSW_CTRL_REG, AS3722_PWM_CONTROL_H_REG),
0271     regmap_reg_range(AS3722_WATCHDOG_TIMER_REG, AS3722_WATCHDOG_TIMER_REG),
0272     regmap_reg_range(AS3722_WATCHDOG_SOFTWARE_SIGNAL_REG,
0273                     AS3722_BATTERY_VOLTAGE_MONITOR2_REG),
0274     regmap_reg_range(AS3722_SD_CONTROL_REG, AS3722_PWM_VCONTROL4_REG),
0275     regmap_reg_range(AS3722_BB_CHARGER_REG, AS3722_SRAM_REG),
0276     regmap_reg_range(AS3722_INTERRUPT_MASK1_REG, AS3722_TEMP_STATUS_REG),
0277     regmap_reg_range(AS3722_ADC0_CONTROL_REG, AS3722_ADC1_CONTROL_REG),
0278     regmap_reg_range(AS3722_ADC1_THRESHOLD_HI_MSB_REG,
0279                     AS3722_ADC_CONFIGURATION_REG),
0280     regmap_reg_range(AS3722_LOCK_REG, AS3722_LOCK_REG),
0281 };
0282
0283 static const struct regmap_access_table as3722_writable_table = {
0284     .yes_ranges = as3722_writable_ranges,
0285     .n_yes_ranges = ARRAY_SIZE(as3722_writable_ranges),
0286 };
0287
0288 static const struct regmap_range as3722_cacheable_ranges[] = {
0289     regmap_reg_range(AS3722_SD0_VOLTAGE_REG, AS3722_LDO11_VOLTAGE_REG),
0290     regmap_reg_range(AS3722_SD_CONTROL_REG, AS3722_LDOCONTROL1_REG),
0291 };
0292
0293 static const struct regmap_access_table as3722_volatile_table = {
0294     .no_ranges = as3722_cacheable_ranges,
0295     .n_no_ranges = ARRAY_SIZE(as3722_cacheable_ranges),
0296 };
0297
0298 static const struct regmap_config as3722_regmap_config = {
0299     .reg_bits = 8,
0300     .val_bits = 8,
0301     .max_register = AS3722_MAX_REGISTER,
0302     .cache_type = REGCACHE_RBTREE,
0303     .rd_table = &as3722_readable_table,
0304     .wr_table = &as3722_writable_table,
0305     .volatile_table = &as3722_volatile_table,
0306 };
0307
0308 static int as3722_i2c_of_probe(struct i2c_client *i2c,
0309             struct as3722 *as3722)
0310 {
0311     struct device_node *np = i2c->dev.of_node;
0312     struct irq_data *irq_data;
0313
0314     if (!np) {
0315         dev_err(&i2c->dev, "Device Tree not found\n");
0316         return -EINVAL;
0317     }
0318
0319     irq_data = irq_get_irq_data(i2c->irq);
0320     if (!irq_data) {
0321         dev_err(&i2c->dev, "Invalid IRQ: %d\n", i2c->irq);
0322         return -EINVAL;
0323     }
0324
0325     as3722->en_intern_int_pullup = of_property_read_bool(np,
0326                     "ams,enable-internal-int-pullup");
0327     as3722->en_intern_i2c_pullup = of_property_read_bool(np,
0328                     "ams,enable-internal-i2c-pullup");
0329     as3722->en_ac_ok_pwr_on = of_property_read_bool(np,
0330                     "ams,enable-ac-ok-power-on");
0331     as3722->irq_flags = irqd_get_trigger_type(irq_data);
0332     dev_dbg(&i2c->dev, "IRQ flags are 0x%08lx\n", as3722->irq_flags);
0333     return 0;
0334 }
0335
0336 static int as3722_i2c_probe(struct i2c_client *i2c,
0337             const struct i2c_device_id *id)
0338 {
0339     struct as3722 *as3722;
0340     unsigned long irq_flags;
0341     int ret;
0342     u8 val = 0;
0343
0344     as3722 = devm_kzalloc(&i2c->dev, sizeof(struct as3722), GFP_KERNEL);
0345     if (!as3722)
0346         return -ENOMEM;
0347
0348     as3722->dev = &i2c->dev;
0349     as3722->chip_irq = i2c->irq;
0350     i2c_set_clientdata(i2c, as3722);
0351
0352     ret = as3722_i2c_of_probe(i2c, as3722);
0353     if (ret < 0)
0354         return ret;
0355
0356     as3722->regmap = devm_regmap_init_i2c(i2c, &as3722_regmap_config);
0357     if (IS_ERR(as3722->regmap)) {
0358         ret = PTR_ERR(as3722->regmap);
0359         dev_err(&i2c->dev, "regmap init failed: %d\n", ret);
0360         return ret;
0361     }
0362
0363     ret = as3722_check_device_id(as3722);
0364     if (ret < 0)
0365         return ret;
0366
0367     irq_flags = as3722->irq_flags | IRQF_ONESHOT;
0368     ret = devm_regmap_add_irq_chip(as3722->dev, as3722->regmap,
0369                        as3722->chip_irq,
0370                        irq_flags, -1, &as3722_irq_chip,
0371                        &as3722->irq_data);
0372     if (ret < 0) {
0373         dev_err(as3722->dev, "Failed to add regmap irq: %d\n", ret);
0374         return ret;
0375     }
0376
0377     ret = as3722_configure_pullups(as3722);
0378     if (ret < 0)
0379         return ret;
0380
0381     if (as3722->en_ac_ok_pwr_on)
0382         val = AS3722_CTRL_SEQU1_AC_OK_PWR_ON;
0383     ret = as3722_update_bits(as3722, AS3722_CTRL_SEQU1_REG,
0384             AS3722_CTRL_SEQU1_AC_OK_PWR_ON, val);
0385     if (ret < 0) {
0386         dev_err(as3722->dev, "CTRLsequ1 update failed: %d\n", ret);
0387         return ret;
0388     }
0389
0390     ret = devm_mfd_add_devices(&i2c->dev, -1, as3722_devs,
0391                    ARRAY_SIZE(as3722_devs), NULL, 0,
0392                    regmap_irq_get_domain(as3722->irq_data));
0393     if (ret) {
0394         dev_err(as3722->dev, "Failed to add MFD devices: %d\n", ret);
0395         return ret;
0396     }
0397
0398     device_init_wakeup(as3722->dev, true);
0399
0400     dev_dbg(as3722->dev, "AS3722 core driver initialized successfully\n");
0401     return 0;
0402 }
0403
0404 static int __maybe_unused as3722_i2c_suspend(struct device *dev)
0405 {
0406     struct as3722 *as3722 = dev_get_drvdata(dev);
0407
0408     if (device_may_wakeup(dev))
0409         enable_irq_wake(as3722->chip_irq);
0410     disable_irq(as3722->chip_irq);
0411
0412     return 0;
0413 }
0414
0415 static int __maybe_unused as3722_i2c_resume(struct device *dev)
0416 {
0417     struct as3722 *as3722 = dev_get_drvdata(dev);
0418
0419     enable_irq(as3722->chip_irq);
0420
0421     if (device_may_wakeup(dev))
0422         disable_irq_wake(as3722->chip_irq);
0423
0424     return 0;
0425 }
0426
0427 static const struct of_device_id as3722_of_match[] = {
0428     { .compatible = "ams,as3722", },
0429     {},
0430 };
0431 MODULE_DEVICE_TABLE(of, as3722_of_match);
0432
0433 static const struct i2c_device_id as3722_i2c_id[] = {
0434     { "as3722", 0 },
0435     {},
0436 };
0437 MODULE_DEVICE_TABLE(i2c, as3722_i2c_id);
0438
0439 static const struct dev_pm_ops as3722_pm_ops = {
0440     SET_SYSTEM_SLEEP_PM_OPS(as3722_i2c_suspend, as3722_i2c_resume)
0441 };
0442
0443 static struct i2c_driver as3722_i2c_driver = {
0444     .driver = {
0445         .name = "as3722",
0446         .of_match_table = as3722_of_match,
0447         .pm = &as3722_pm_ops,
0448     },
0449     .probe = as3722_i2c_probe,
0450     .id_table = as3722_i2c_id,
0451 };
0452
0453 module_i2c_driver(as3722_i2c_driver);
0454
0455 MODULE_DESCRIPTION("I2C support for AS3722 PMICs");
0456 MODULE_AUTHOR("Florian Lobmaier <florian.lobmaier@ams.com>");
0457 MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
0458 MODULE_LICENSE("GPL");