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0001 /*
0002  * Base driver for Marvell 88PM800
0003  *
0004  * Copyright (C) 2012 Marvell International Ltd.
0005  * Haojian Zhuang <haojian.zhuang@marvell.com>
0006  * Joseph(Yossi) Hanin <yhanin@marvell.com>
0007  * Qiao Zhou <zhouqiao@marvell.com>
0008  *
0009  * This file is subject to the terms and conditions of the GNU General
0010  * Public License. See the file "COPYING" in the main directory of this
0011  * archive for more details.
0012  *
0013  * This program is distributed in the hope that it will be useful,
0014  * but WITHOUT ANY WARRANTY; without even the implied warranty of
0015  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
0016  * GNU General Public License for more details.
0017  *
0018  * You should have received a copy of the GNU General Public License
0019  * along with this program; if not, write to the Free Software
0020  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
0021  */
0022 
0023 #include <linux/kernel.h>
0024 #include <linux/module.h>
0025 #include <linux/err.h>
0026 #include <linux/i2c.h>
0027 #include <linux/mfd/core.h>
0028 #include <linux/mfd/88pm80x.h>
0029 #include <linux/slab.h>
0030 
0031 /* Interrupt Registers */
0032 #define PM800_INT_STATUS1       (0x05)
0033 #define PM800_ONKEY_INT_STS1        (1 << 0)
0034 #define PM800_EXTON_INT_STS1        (1 << 1)
0035 #define PM800_CHG_INT_STS1          (1 << 2)
0036 #define PM800_BAT_INT_STS1          (1 << 3)
0037 #define PM800_RTC_INT_STS1          (1 << 4)
0038 #define PM800_CLASSD_OC_INT_STS1    (1 << 5)
0039 
0040 #define PM800_INT_STATUS2       (0x06)
0041 #define PM800_VBAT_INT_STS2     (1 << 0)
0042 #define PM800_VSYS_INT_STS2     (1 << 1)
0043 #define PM800_VCHG_INT_STS2     (1 << 2)
0044 #define PM800_TINT_INT_STS2     (1 << 3)
0045 #define PM800_GPADC0_INT_STS2   (1 << 4)
0046 #define PM800_TBAT_INT_STS2     (1 << 5)
0047 #define PM800_GPADC2_INT_STS2   (1 << 6)
0048 #define PM800_GPADC3_INT_STS2   (1 << 7)
0049 
0050 #define PM800_INT_STATUS3       (0x07)
0051 
0052 #define PM800_INT_STATUS4       (0x08)
0053 #define PM800_GPIO0_INT_STS4        (1 << 0)
0054 #define PM800_GPIO1_INT_STS4        (1 << 1)
0055 #define PM800_GPIO2_INT_STS4        (1 << 2)
0056 #define PM800_GPIO3_INT_STS4        (1 << 3)
0057 #define PM800_GPIO4_INT_STS4        (1 << 4)
0058 
0059 #define PM800_INT_ENA_1     (0x09)
0060 #define PM800_ONKEY_INT_ENA1        (1 << 0)
0061 #define PM800_EXTON_INT_ENA1        (1 << 1)
0062 #define PM800_CHG_INT_ENA1          (1 << 2)
0063 #define PM800_BAT_INT_ENA1          (1 << 3)
0064 #define PM800_RTC_INT_ENA1          (1 << 4)
0065 #define PM800_CLASSD_OC_INT_ENA1    (1 << 5)
0066 
0067 #define PM800_INT_ENA_2     (0x0A)
0068 #define PM800_VBAT_INT_ENA2     (1 << 0)
0069 #define PM800_VSYS_INT_ENA2     (1 << 1)
0070 #define PM800_VCHG_INT_ENA2     (1 << 2)
0071 #define PM800_TINT_INT_ENA2     (1 << 3)
0072 
0073 #define PM800_INT_ENA_3     (0x0B)
0074 #define PM800_GPADC0_INT_ENA3       (1 << 0)
0075 #define PM800_GPADC1_INT_ENA3       (1 << 1)
0076 #define PM800_GPADC2_INT_ENA3       (1 << 2)
0077 #define PM800_GPADC3_INT_ENA3       (1 << 3)
0078 #define PM800_GPADC4_INT_ENA3       (1 << 4)
0079 
0080 #define PM800_INT_ENA_4     (0x0C)
0081 #define PM800_GPIO0_INT_ENA4        (1 << 0)
0082 #define PM800_GPIO1_INT_ENA4        (1 << 1)
0083 #define PM800_GPIO2_INT_ENA4        (1 << 2)
0084 #define PM800_GPIO3_INT_ENA4        (1 << 3)
0085 #define PM800_GPIO4_INT_ENA4        (1 << 4)
0086 
0087 /* number of INT_ENA & INT_STATUS regs */
0088 #define PM800_INT_REG_NUM           (4)
0089 
0090 /* Interrupt Number in 88PM800 */
0091 enum {
0092     PM800_IRQ_ONKEY,    /*EN1b0 *//*0 */
0093     PM800_IRQ_EXTON,    /*EN1b1 */
0094     PM800_IRQ_CHG,      /*EN1b2 */
0095     PM800_IRQ_BAT,      /*EN1b3 */
0096     PM800_IRQ_RTC,      /*EN1b4 */
0097     PM800_IRQ_CLASSD,   /*EN1b5 *//*5 */
0098     PM800_IRQ_VBAT,     /*EN2b0 */
0099     PM800_IRQ_VSYS,     /*EN2b1 */
0100     PM800_IRQ_VCHG,     /*EN2b2 */
0101     PM800_IRQ_TINT,     /*EN2b3 */
0102     PM800_IRQ_GPADC0,   /*EN3b0 *//*10 */
0103     PM800_IRQ_GPADC1,   /*EN3b1 */
0104     PM800_IRQ_GPADC2,   /*EN3b2 */
0105     PM800_IRQ_GPADC3,   /*EN3b3 */
0106     PM800_IRQ_GPADC4,   /*EN3b4 */
0107     PM800_IRQ_GPIO0,    /*EN4b0 *//*15 */
0108     PM800_IRQ_GPIO1,    /*EN4b1 */
0109     PM800_IRQ_GPIO2,    /*EN4b2 */
0110     PM800_IRQ_GPIO3,    /*EN4b3 */
0111     PM800_IRQ_GPIO4,    /*EN4b4 *//*19 */
0112     PM800_MAX_IRQ,
0113 };
0114 
0115 /* PM800: generation identification number */
0116 #define PM800_CHIP_GEN_ID_NUM   0x3
0117 
0118 static const struct i2c_device_id pm80x_id_table[] = {
0119     {"88PM800", 0},
0120     {} /* NULL terminated */
0121 };
0122 MODULE_DEVICE_TABLE(i2c, pm80x_id_table);
0123 
0124 static const struct resource rtc_resources[] = {
0125     DEFINE_RES_IRQ_NAMED(PM800_IRQ_RTC, "88pm80x-rtc"),
0126 };
0127 
0128 static struct mfd_cell rtc_devs[] = {
0129     {
0130      .name = "88pm80x-rtc",
0131      .num_resources = ARRAY_SIZE(rtc_resources),
0132      .resources = &rtc_resources[0],
0133      .id = -1,
0134      },
0135 };
0136 
0137 static struct resource onkey_resources[] = {
0138     DEFINE_RES_IRQ_NAMED(PM800_IRQ_ONKEY, "88pm80x-onkey"),
0139 };
0140 
0141 static const struct mfd_cell onkey_devs[] = {
0142     {
0143      .name = "88pm80x-onkey",
0144      .num_resources = 1,
0145      .resources = &onkey_resources[0],
0146      .id = -1,
0147      },
0148 };
0149 
0150 static const struct mfd_cell regulator_devs[] = {
0151     {
0152      .name = "88pm80x-regulator",
0153      .id = -1,
0154     },
0155 };
0156 
0157 static const struct regmap_irq pm800_irqs[] = {
0158     /* INT0 */
0159     [PM800_IRQ_ONKEY] = {
0160         .mask = PM800_ONKEY_INT_ENA1,
0161     },
0162     [PM800_IRQ_EXTON] = {
0163         .mask = PM800_EXTON_INT_ENA1,
0164     },
0165     [PM800_IRQ_CHG] = {
0166         .mask = PM800_CHG_INT_ENA1,
0167     },
0168     [PM800_IRQ_BAT] = {
0169         .mask = PM800_BAT_INT_ENA1,
0170     },
0171     [PM800_IRQ_RTC] = {
0172         .mask = PM800_RTC_INT_ENA1,
0173     },
0174     [PM800_IRQ_CLASSD] = {
0175         .mask = PM800_CLASSD_OC_INT_ENA1,
0176     },
0177     /* INT1 */
0178     [PM800_IRQ_VBAT] = {
0179         .reg_offset = 1,
0180         .mask = PM800_VBAT_INT_ENA2,
0181     },
0182     [PM800_IRQ_VSYS] = {
0183         .reg_offset = 1,
0184         .mask = PM800_VSYS_INT_ENA2,
0185     },
0186     [PM800_IRQ_VCHG] = {
0187         .reg_offset = 1,
0188         .mask = PM800_VCHG_INT_ENA2,
0189     },
0190     [PM800_IRQ_TINT] = {
0191         .reg_offset = 1,
0192         .mask = PM800_TINT_INT_ENA2,
0193     },
0194     /* INT2 */
0195     [PM800_IRQ_GPADC0] = {
0196         .reg_offset = 2,
0197         .mask = PM800_GPADC0_INT_ENA3,
0198     },
0199     [PM800_IRQ_GPADC1] = {
0200         .reg_offset = 2,
0201         .mask = PM800_GPADC1_INT_ENA3,
0202     },
0203     [PM800_IRQ_GPADC2] = {
0204         .reg_offset = 2,
0205         .mask = PM800_GPADC2_INT_ENA3,
0206     },
0207     [PM800_IRQ_GPADC3] = {
0208         .reg_offset = 2,
0209         .mask = PM800_GPADC3_INT_ENA3,
0210     },
0211     [PM800_IRQ_GPADC4] = {
0212         .reg_offset = 2,
0213         .mask = PM800_GPADC4_INT_ENA3,
0214     },
0215     /* INT3 */
0216     [PM800_IRQ_GPIO0] = {
0217         .reg_offset = 3,
0218         .mask = PM800_GPIO0_INT_ENA4,
0219     },
0220     [PM800_IRQ_GPIO1] = {
0221         .reg_offset = 3,
0222         .mask = PM800_GPIO1_INT_ENA4,
0223     },
0224     [PM800_IRQ_GPIO2] = {
0225         .reg_offset = 3,
0226         .mask = PM800_GPIO2_INT_ENA4,
0227     },
0228     [PM800_IRQ_GPIO3] = {
0229         .reg_offset = 3,
0230         .mask = PM800_GPIO3_INT_ENA4,
0231     },
0232     [PM800_IRQ_GPIO4] = {
0233         .reg_offset = 3,
0234         .mask = PM800_GPIO4_INT_ENA4,
0235     },
0236 };
0237 
0238 static int device_gpadc_init(struct pm80x_chip *chip,
0239                        struct pm80x_platform_data *pdata)
0240 {
0241     struct pm80x_subchip *subchip = chip->subchip;
0242     struct regmap *map = subchip->regmap_gpadc;
0243     int data = 0, mask = 0, ret = 0;
0244 
0245     if (!map) {
0246         dev_warn(chip->dev,
0247              "Warning: gpadc regmap is not available!\n");
0248         return -EINVAL;
0249     }
0250     /*
0251      * initialize GPADC without activating it turn on GPADC
0252      * measurments
0253      */
0254     ret = regmap_update_bits(map,
0255                  PM800_GPADC_MISC_CONFIG2,
0256                  PM800_GPADC_MISC_GPFSM_EN,
0257                  PM800_GPADC_MISC_GPFSM_EN);
0258     if (ret < 0)
0259         goto out;
0260     /*
0261      * This function configures the ADC as requires for
0262      * CP implementation.CP does not "own" the ADC configuration
0263      * registers and relies on AP.
0264      * Reason: enable automatic ADC measurements needed
0265      * for CP to get VBAT and RF temperature readings.
0266      */
0267     ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN1,
0268                  PM800_MEAS_EN1_VBAT, PM800_MEAS_EN1_VBAT);
0269     if (ret < 0)
0270         goto out;
0271     ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN2,
0272                  (PM800_MEAS_EN2_RFTMP | PM800_MEAS_GP0_EN),
0273                  (PM800_MEAS_EN2_RFTMP | PM800_MEAS_GP0_EN));
0274     if (ret < 0)
0275         goto out;
0276 
0277     /*
0278      * the defult of PM800 is GPADC operates at 100Ks/s rate
0279      * and Number of GPADC slots with active current bias prior
0280      * to GPADC sampling = 1 slot for all GPADCs set for
0281      * Temprature mesurmants
0282      */
0283     mask = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN1 |
0284         PM800_GPADC_GP_BIAS_EN2 | PM800_GPADC_GP_BIAS_EN3);
0285 
0286     if (pdata && (pdata->batt_det == 0))
0287         data = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN1 |
0288             PM800_GPADC_GP_BIAS_EN2 | PM800_GPADC_GP_BIAS_EN3);
0289     else
0290         data = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN2 |
0291             PM800_GPADC_GP_BIAS_EN3);
0292 
0293     ret = regmap_update_bits(map, PM800_GP_BIAS_ENA1, mask, data);
0294     if (ret < 0)
0295         goto out;
0296 
0297     dev_info(chip->dev, "pm800 device_gpadc_init: Done\n");
0298     return 0;
0299 
0300 out:
0301     dev_info(chip->dev, "pm800 device_gpadc_init: Failed!\n");
0302     return ret;
0303 }
0304 
0305 static int device_onkey_init(struct pm80x_chip *chip,
0306                 struct pm80x_platform_data *pdata)
0307 {
0308     int ret;
0309 
0310     ret = mfd_add_devices(chip->dev, 0, &onkey_devs[0],
0311                   ARRAY_SIZE(onkey_devs), &onkey_resources[0], 0,
0312                   NULL);
0313     if (ret) {
0314         dev_err(chip->dev, "Failed to add onkey subdev\n");
0315         return ret;
0316     }
0317 
0318     return 0;
0319 }
0320 
0321 static int device_rtc_init(struct pm80x_chip *chip,
0322                 struct pm80x_platform_data *pdata)
0323 {
0324     int ret;
0325 
0326     if (pdata) {
0327         rtc_devs[0].platform_data = pdata->rtc;
0328         rtc_devs[0].pdata_size =
0329                 pdata->rtc ? sizeof(struct pm80x_rtc_pdata) : 0;
0330     }
0331     ret = mfd_add_devices(chip->dev, 0, &rtc_devs[0],
0332                   ARRAY_SIZE(rtc_devs), NULL, 0, NULL);
0333     if (ret) {
0334         dev_err(chip->dev, "Failed to add rtc subdev\n");
0335         return ret;
0336     }
0337 
0338     return 0;
0339 }
0340 
0341 static int device_regulator_init(struct pm80x_chip *chip,
0342                        struct pm80x_platform_data *pdata)
0343 {
0344     int ret;
0345 
0346     ret = mfd_add_devices(chip->dev, 0, &regulator_devs[0],
0347                   ARRAY_SIZE(regulator_devs), NULL, 0, NULL);
0348     if (ret) {
0349         dev_err(chip->dev, "Failed to add regulator subdev\n");
0350         return ret;
0351     }
0352 
0353     return 0;
0354 }
0355 
0356 static int device_irq_init_800(struct pm80x_chip *chip)
0357 {
0358     struct regmap *map = chip->regmap;
0359     unsigned long flags = IRQF_ONESHOT;
0360     int data, mask, ret = -EINVAL;
0361 
0362     if (!map || !chip->irq) {
0363         dev_err(chip->dev, "incorrect parameters\n");
0364         return -EINVAL;
0365     }
0366 
0367     /*
0368      * irq_mode defines the way of clearing interrupt. it's read-clear by
0369      * default.
0370      */
0371     mask =
0372         PM800_WAKEUP2_INV_INT | PM800_WAKEUP2_INT_CLEAR |
0373         PM800_WAKEUP2_INT_MASK;
0374 
0375     data = PM800_WAKEUP2_INT_CLEAR;
0376     ret = regmap_update_bits(map, PM800_WAKEUP2, mask, data);
0377 
0378     if (ret < 0)
0379         goto out;
0380 
0381     ret =
0382         regmap_add_irq_chip(chip->regmap, chip->irq, flags, -1,
0383                 chip->regmap_irq_chip, &chip->irq_data);
0384 
0385 out:
0386     return ret;
0387 }
0388 
0389 static void device_irq_exit_800(struct pm80x_chip *chip)
0390 {
0391     regmap_del_irq_chip(chip->irq, chip->irq_data);
0392 }
0393 
0394 static struct regmap_irq_chip pm800_irq_chip = {
0395     .name = "88pm800",
0396     .irqs = pm800_irqs,
0397     .num_irqs = ARRAY_SIZE(pm800_irqs),
0398 
0399     .num_regs = 4,
0400     .status_base = PM800_INT_STATUS1,
0401     .mask_base = PM800_INT_ENA_1,
0402     .ack_base = PM800_INT_STATUS1,
0403     .mask_invert = 1,
0404 };
0405 
0406 static int pm800_pages_init(struct pm80x_chip *chip)
0407 {
0408     struct pm80x_subchip *subchip;
0409     struct i2c_client *client = chip->client;
0410 
0411     int ret = 0;
0412 
0413     subchip = chip->subchip;
0414     if (!subchip || !subchip->power_page_addr || !subchip->gpadc_page_addr)
0415         return -ENODEV;
0416 
0417     /* PM800 block power page */
0418     subchip->power_page = i2c_new_dummy_device(client->adapter,
0419                         subchip->power_page_addr);
0420     if (IS_ERR(subchip->power_page)) {
0421         ret = PTR_ERR(subchip->power_page);
0422         goto out;
0423     }
0424 
0425     subchip->regmap_power = devm_regmap_init_i2c(subchip->power_page,
0426                              &pm80x_regmap_config);
0427     if (IS_ERR(subchip->regmap_power)) {
0428         ret = PTR_ERR(subchip->regmap_power);
0429         dev_err(chip->dev,
0430             "Failed to allocate regmap_power: %d\n", ret);
0431         goto out;
0432     }
0433 
0434     i2c_set_clientdata(subchip->power_page, chip);
0435 
0436     /* PM800 block GPADC */
0437     subchip->gpadc_page = i2c_new_dummy_device(client->adapter,
0438                         subchip->gpadc_page_addr);
0439     if (IS_ERR(subchip->gpadc_page)) {
0440         ret = PTR_ERR(subchip->gpadc_page);
0441         goto out;
0442     }
0443 
0444     subchip->regmap_gpadc = devm_regmap_init_i2c(subchip->gpadc_page,
0445                              &pm80x_regmap_config);
0446     if (IS_ERR(subchip->regmap_gpadc)) {
0447         ret = PTR_ERR(subchip->regmap_gpadc);
0448         dev_err(chip->dev,
0449             "Failed to allocate regmap_gpadc: %d\n", ret);
0450         goto out;
0451     }
0452     i2c_set_clientdata(subchip->gpadc_page, chip);
0453 
0454 out:
0455     return ret;
0456 }
0457 
0458 static void pm800_pages_exit(struct pm80x_chip *chip)
0459 {
0460     struct pm80x_subchip *subchip;
0461 
0462     subchip = chip->subchip;
0463 
0464     if (subchip && subchip->power_page)
0465         i2c_unregister_device(subchip->power_page);
0466 
0467     if (subchip && subchip->gpadc_page)
0468         i2c_unregister_device(subchip->gpadc_page);
0469 }
0470 
0471 static int device_800_init(struct pm80x_chip *chip,
0472                      struct pm80x_platform_data *pdata)
0473 {
0474     int ret;
0475     unsigned int val;
0476 
0477     /*
0478      * alarm wake up bit will be clear in device_irq_init(),
0479      * read before that
0480      */
0481     ret = regmap_read(chip->regmap, PM800_RTC_CONTROL, &val);
0482     if (ret < 0) {
0483         dev_err(chip->dev, "Failed to read RTC register: %d\n", ret);
0484         goto out;
0485     }
0486     if (val & PM800_ALARM_WAKEUP) {
0487         if (pdata && pdata->rtc)
0488             pdata->rtc->rtc_wakeup = 1;
0489     }
0490 
0491     ret = device_gpadc_init(chip, pdata);
0492     if (ret < 0) {
0493         dev_err(chip->dev, "[%s]Failed to init gpadc\n", __func__);
0494         goto out;
0495     }
0496 
0497     chip->regmap_irq_chip = &pm800_irq_chip;
0498 
0499     ret = device_irq_init_800(chip);
0500     if (ret < 0) {
0501         dev_err(chip->dev, "[%s]Failed to init pm800 irq\n", __func__);
0502         goto out;
0503     }
0504 
0505     ret = device_onkey_init(chip, pdata);
0506     if (ret) {
0507         dev_err(chip->dev, "Failed to add onkey subdev\n");
0508         goto out_dev;
0509     }
0510 
0511     ret = device_rtc_init(chip, pdata);
0512     if (ret) {
0513         dev_err(chip->dev, "Failed to add rtc subdev\n");
0514         goto out;
0515     }
0516 
0517     ret = device_regulator_init(chip, pdata);
0518     if (ret) {
0519         dev_err(chip->dev, "Failed to add regulators subdev\n");
0520         goto out;
0521     }
0522 
0523     return 0;
0524 out_dev:
0525     mfd_remove_devices(chip->dev);
0526     device_irq_exit_800(chip);
0527 out:
0528     return ret;
0529 }
0530 
0531 static int pm800_probe(struct i2c_client *client,
0532                  const struct i2c_device_id *id)
0533 {
0534     int ret = 0;
0535     struct pm80x_chip *chip;
0536     struct pm80x_platform_data *pdata = dev_get_platdata(&client->dev);
0537     struct pm80x_subchip *subchip;
0538 
0539     ret = pm80x_init(client);
0540     if (ret) {
0541         dev_err(&client->dev, "pm800_init fail\n");
0542         goto out_init;
0543     }
0544 
0545     chip = i2c_get_clientdata(client);
0546 
0547     /* init subchip for PM800 */
0548     subchip =
0549         devm_kzalloc(&client->dev, sizeof(struct pm80x_subchip),
0550              GFP_KERNEL);
0551     if (!subchip) {
0552         ret = -ENOMEM;
0553         goto err_subchip_alloc;
0554     }
0555 
0556     /* pm800 has 2 addtional pages to support power and gpadc. */
0557     subchip->power_page_addr = client->addr + 1;
0558     subchip->gpadc_page_addr = client->addr + 2;
0559     chip->subchip = subchip;
0560 
0561     ret = pm800_pages_init(chip);
0562     if (ret) {
0563         dev_err(&client->dev, "pm800_pages_init failed!\n");
0564         goto err_device_init;
0565     }
0566 
0567     ret = device_800_init(chip, pdata);
0568     if (ret) {
0569         dev_err(chip->dev, "Failed to initialize 88pm800 devices\n");
0570         goto err_device_init;
0571     }
0572 
0573     if (pdata && pdata->plat_config)
0574         pdata->plat_config(chip, pdata);
0575 
0576     return 0;
0577 
0578 err_device_init:
0579     pm800_pages_exit(chip);
0580 err_subchip_alloc:
0581     pm80x_deinit();
0582 out_init:
0583     return ret;
0584 }
0585 
0586 static int pm800_remove(struct i2c_client *client)
0587 {
0588     struct pm80x_chip *chip = i2c_get_clientdata(client);
0589 
0590     mfd_remove_devices(chip->dev);
0591     device_irq_exit_800(chip);
0592 
0593     pm800_pages_exit(chip);
0594     pm80x_deinit();
0595 
0596     return 0;
0597 }
0598 
0599 static struct i2c_driver pm800_driver = {
0600     .driver = {
0601         .name = "88PM800",
0602         .pm = &pm80x_pm_ops,
0603         },
0604     .probe = pm800_probe,
0605     .remove = pm800_remove,
0606     .id_table = pm80x_id_table,
0607 };
0608 
0609 static int __init pm800_i2c_init(void)
0610 {
0611     return i2c_add_driver(&pm800_driver);
0612 }
0613 subsys_initcall(pm800_i2c_init);
0614 
0615 static void __exit pm800_i2c_exit(void)
0616 {
0617     i2c_del_driver(&pm800_driver);
0618 }
0619 module_exit(pm800_i2c_exit);
0620 
0621 MODULE_DESCRIPTION("PMIC Driver for Marvell 88PM800");
0622 MODULE_AUTHOR("Qiao Zhou <zhouqiao@marvell.com>");
0623 MODULE_LICENSE("GPL");
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