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0048 #ifndef MPTCTL_H_INCLUDED
0049 #define MPTCTL_H_INCLUDED
0050
0051
0052
0053
0054
0055
0056
0057
0058 #define MPT_MISCDEV_BASENAME "mptctl"
0059 #define MPT_MISCDEV_PATHNAME "/dev/" MPT_MISCDEV_BASENAME
0060
0061 #define MPT_PRODUCT_LENGTH 12
0062
0063
0064
0065
0066 #define MPT_MAGIC_NUMBER 'm'
0067
0068 #define MPTRWPERF _IOWR(MPT_MAGIC_NUMBER,0,struct mpt_raw_r_w)
0069
0070 #define MPTFWDOWNLOAD _IOWR(MPT_MAGIC_NUMBER,15,struct mpt_fw_xfer)
0071 #define MPTCOMMAND _IOWR(MPT_MAGIC_NUMBER,20,struct mpt_ioctl_command)
0072
0073 #if defined(__KERNEL__) && defined(CONFIG_COMPAT)
0074 #define MPTFWDOWNLOAD32 _IOWR(MPT_MAGIC_NUMBER,15,struct mpt_fw_xfer32)
0075 #define MPTCOMMAND32 _IOWR(MPT_MAGIC_NUMBER,20,struct mpt_ioctl_command32)
0076 #endif
0077
0078 #define MPTIOCINFO _IOWR(MPT_MAGIC_NUMBER,17,struct mpt_ioctl_iocinfo)
0079 #define MPTIOCINFO1 _IOWR(MPT_MAGIC_NUMBER,17,struct mpt_ioctl_iocinfo_rev0)
0080 #define MPTIOCINFO2 _IOWR(MPT_MAGIC_NUMBER,17,struct mpt_ioctl_iocinfo_rev1)
0081 #define MPTTARGETINFO _IOWR(MPT_MAGIC_NUMBER,18,struct mpt_ioctl_targetinfo)
0082 #define MPTTEST _IOWR(MPT_MAGIC_NUMBER,19,struct mpt_ioctl_test)
0083 #define MPTEVENTQUERY _IOWR(MPT_MAGIC_NUMBER,21,struct mpt_ioctl_eventquery)
0084 #define MPTEVENTENABLE _IOWR(MPT_MAGIC_NUMBER,22,struct mpt_ioctl_eventenable)
0085 #define MPTEVENTREPORT _IOWR(MPT_MAGIC_NUMBER,23,struct mpt_ioctl_eventreport)
0086 #define MPTHARDRESET _IOWR(MPT_MAGIC_NUMBER,24,struct mpt_ioctl_diag_reset)
0087 #define MPTFWREPLACE _IOWR(MPT_MAGIC_NUMBER,25,struct mpt_ioctl_replace_fw)
0088
0089
0090
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0100
0101 struct mpt_fw_xfer {
0102 unsigned int iocnum;
0103 unsigned int fwlen;
0104 void __user *bufp;
0105 };
0106
0107 #if defined(__KERNEL__) && defined(CONFIG_COMPAT)
0108 struct mpt_fw_xfer32 {
0109 unsigned int iocnum;
0110 unsigned int fwlen;
0111 u32 bufp;
0112 };
0113 #endif
0114
0115
0116
0117
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0125
0126
0127 typedef struct _mpt_ioctl_header {
0128 unsigned int iocnum;
0129 unsigned int port;
0130 int maxDataSize;
0131 } mpt_ioctl_header;
0132
0133
0134
0135
0136 struct mpt_ioctl_diag_reset {
0137 mpt_ioctl_header hdr;
0138 };
0139
0140
0141
0142
0143
0144 struct mpt_ioctl_pci_info {
0145 union {
0146 struct {
0147 unsigned int deviceNumber : 5;
0148 unsigned int functionNumber : 3;
0149 unsigned int busNumber : 24;
0150 } bits;
0151 unsigned int asUlong;
0152 } u;
0153 };
0154
0155 struct mpt_ioctl_pci_info2 {
0156 union {
0157 struct {
0158 unsigned int deviceNumber : 5;
0159 unsigned int functionNumber : 3;
0160 unsigned int busNumber : 24;
0161 } bits;
0162 unsigned int asUlong;
0163 } u;
0164 int segmentID;
0165 };
0166
0167
0168
0169
0170
0171
0172 #define MPT_IOCTL_INTERFACE_SCSI (0x00)
0173 #define MPT_IOCTL_INTERFACE_FC (0x01)
0174 #define MPT_IOCTL_INTERFACE_FC_IP (0x02)
0175 #define MPT_IOCTL_INTERFACE_SAS (0x03)
0176 #define MPT_IOCTL_VERSION_LENGTH (32)
0177
0178 struct mpt_ioctl_iocinfo {
0179 mpt_ioctl_header hdr;
0180 int adapterType;
0181 int port;
0182 int pciId;
0183 int hwRev;
0184 int subSystemDevice;
0185 int subSystemVendor;
0186 int numDevices;
0187 int FWVersion;
0188 int BIOSVersion;
0189 char driverVersion[MPT_IOCTL_VERSION_LENGTH];
0190 char busChangeEvent;
0191 char hostId;
0192 char rsvd[2];
0193 struct mpt_ioctl_pci_info2 pciInfo;
0194 };
0195
0196 struct mpt_ioctl_iocinfo_rev1 {
0197 mpt_ioctl_header hdr;
0198 int adapterType;
0199 int port;
0200 int pciId;
0201 int hwRev;
0202 int subSystemDevice;
0203 int subSystemVendor;
0204 int numDevices;
0205 int FWVersion;
0206 int BIOSVersion;
0207 char driverVersion[MPT_IOCTL_VERSION_LENGTH];
0208 char busChangeEvent;
0209 char hostId;
0210 char rsvd[2];
0211 struct mpt_ioctl_pci_info pciInfo;
0212 };
0213
0214
0215
0216
0217
0218 struct mpt_ioctl_iocinfo_rev0 {
0219 mpt_ioctl_header hdr;
0220 int adapterType;
0221 int port;
0222 int pciId;
0223 int hwRev;
0224 int subSystemDevice;
0225 int subSystemVendor;
0226 int numDevices;
0227 int FWVersion;
0228 int BIOSVersion;
0229 char driverVersion[MPT_IOCTL_VERSION_LENGTH];
0230 char busChangeEvent;
0231 char hostId;
0232 char rsvd[2];
0233 };
0234
0235
0236
0237
0238
0239
0240
0241
0242
0243
0244
0245 struct mpt_ioctl_targetinfo {
0246 mpt_ioctl_header hdr;
0247 int numDevices;
0248 int targetInfo[1];
0249 };
0250
0251
0252
0253
0254
0255
0256 struct mpt_ioctl_eventquery {
0257 mpt_ioctl_header hdr;
0258 unsigned short eventEntries;
0259 unsigned short reserved;
0260 unsigned int eventTypes;
0261 };
0262
0263 struct mpt_ioctl_eventenable {
0264 mpt_ioctl_header hdr;
0265 unsigned int eventTypes;
0266 };
0267
0268 #ifndef __KERNEL__
0269 typedef struct {
0270 uint event;
0271 uint eventContext;
0272 uint data[2];
0273 } MPT_IOCTL_EVENTS;
0274 #endif
0275
0276 struct mpt_ioctl_eventreport {
0277 mpt_ioctl_header hdr;
0278 MPT_IOCTL_EVENTS eventData[1];
0279 };
0280
0281 #define MPT_MAX_NAME 32
0282 struct mpt_ioctl_test {
0283 mpt_ioctl_header hdr;
0284 u8 name[MPT_MAX_NAME];
0285 int chip_type;
0286 u8 product [MPT_PRODUCT_LENGTH];
0287 };
0288
0289
0290
0291
0292
0293 typedef struct mpt_ioctl_replace_fw {
0294 mpt_ioctl_header hdr;
0295 int newImageSize;
0296 u8 newImage[1];
0297 } mpt_ioctl_replace_fw_t;
0298
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0319
0320 struct mpt_ioctl_command {
0321 mpt_ioctl_header hdr;
0322 int timeout;
0323 char __user *replyFrameBufPtr;
0324 char __user *dataInBufPtr;
0325 char __user *dataOutBufPtr;
0326 char __user *senseDataPtr;
0327 int maxReplyBytes;
0328 int dataInSize;
0329 int dataOutSize;
0330 int maxSenseBytes;
0331 int dataSgeOffset;
0332 char MF[1];
0333 };
0334
0335
0336
0337
0338 #if defined(__KERNEL__) && defined(CONFIG_COMPAT)
0339 struct mpt_ioctl_command32 {
0340 mpt_ioctl_header hdr;
0341 int timeout;
0342 u32 replyFrameBufPtr;
0343 u32 dataInBufPtr;
0344 u32 dataOutBufPtr;
0345 u32 senseDataPtr;
0346 int maxReplyBytes;
0347 int dataInSize;
0348 int dataOutSize;
0349 int maxSenseBytes;
0350 int dataSgeOffset;
0351 char MF[1];
0352 };
0353 #endif
0354
0355
0356
0357
0358 #define CPQFCTS_IOC_MAGIC 'Z'
0359 #define HP_IOC_MAGIC 'Z'
0360 #define HP_GETHOSTINFO _IOR(HP_IOC_MAGIC, 20, hp_host_info_t)
0361 #define HP_GETHOSTINFO1 _IOR(HP_IOC_MAGIC, 20, hp_host_info_rev0_t)
0362 #define HP_GETTARGETINFO _IOR(HP_IOC_MAGIC, 21, hp_target_info_t)
0363
0364 typedef struct _hp_header {
0365 unsigned int iocnum;
0366 unsigned int host;
0367 unsigned int channel;
0368 unsigned int id;
0369 unsigned int lun;
0370 } hp_header_t;
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0380 typedef struct _hp_host_info {
0381 hp_header_t hdr;
0382 u16 vendor;
0383 u16 device;
0384 u16 subsystem_vendor;
0385 u16 subsystem_id;
0386 u8 devfn;
0387 u8 bus;
0388 ushort host_no;
0389 u8 fw_version[16];
0390 u8 serial_number[24];
0391 u32 ioc_status;
0392 u32 bus_phys_width;
0393 u32 base_io_addr;
0394 u32 rsvd;
0395 unsigned int hard_resets;
0396 unsigned int soft_resets;
0397 unsigned int timeouts;
0398 } hp_host_info_t;
0399
0400
0401
0402
0403 typedef struct _hp_host_info_rev0 {
0404 hp_header_t hdr;
0405 u16 vendor;
0406 u16 device;
0407 u16 subsystem_vendor;
0408 u16 subsystem_id;
0409 u8 devfn;
0410 u8 bus;
0411 ushort host_no;
0412 u8 fw_version[16];
0413 u8 serial_number[24];
0414 u32 ioc_status;
0415 u32 bus_phys_width;
0416 u32 base_io_addr;
0417 u32 rsvd;
0418 unsigned long hard_resets;
0419 unsigned long soft_resets;
0420 unsigned long timeouts;
0421 } hp_host_info_rev0_t;
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0433 typedef struct _hp_target_info {
0434 hp_header_t hdr;
0435 u32 parity_errors;
0436 u32 phase_errors;
0437 u32 select_timeouts;
0438 u32 message_rejects;
0439 u32 negotiated_speed;
0440 u8 negotiated_width;
0441 u8 rsvd[7];
0442 } hp_target_info_t;
0443
0444 #define HP_STATUS_OTHER 1
0445 #define HP_STATUS_OK 2
0446 #define HP_STATUS_FAILED 3
0447
0448 #define HP_BUS_WIDTH_UNK 1
0449 #define HP_BUS_WIDTH_8 2
0450 #define HP_BUS_WIDTH_16 3
0451 #define HP_BUS_WIDTH_32 4
0452
0453 #define HP_DEV_SPEED_ASYNC 2
0454 #define HP_DEV_SPEED_FAST 3
0455 #define HP_DEV_SPEED_ULTRA 4
0456 #define HP_DEV_SPEED_ULTRA2 5
0457 #define HP_DEV_SPEED_ULTRA160 6
0458 #define HP_DEV_SPEED_SCSI1 7
0459 #define HP_DEV_SPEED_ULTRA320 8
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0465
0466 #endif
0467