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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  *  Copyright (c) 2000-2008 LSI Corporation.
0004  *
0005  *
0006  *           Name:  mpi_ioc.h
0007  *          Title:  MPI IOC, Port, Event, FW Download, and FW Upload messages
0008  *  Creation Date:  August 11, 2000
0009  *
0010  *    mpi_ioc.h Version:  01.05.16
0011  *
0012  *  Version History
0013  *  ---------------
0014  *
0015  *  Date      Version   Description
0016  *  --------  --------  ------------------------------------------------------
0017  *  05-08-00  00.10.01  Original release for 0.10 spec dated 4/26/2000.
0018  *  05-24-00  00.10.02  Added _MSG_IOC_INIT_REPLY structure.
0019  *  06-06-00  01.00.01  Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY.
0020  *  06-12-00  01.00.02  Added _MSG_PORT_ENABLE_REPLY structure.
0021  *                      Added _MSG_EVENT_ACK_REPLY structure.
0022  *                      Added _MSG_FW_DOWNLOAD_REPLY structure.
0023  *                      Added _MSG_TOOLBOX_REPLY structure.
0024  *  06-30-00  01.00.03  Added MaxLanBuckets to _PORT_FACT_REPLY structure.
0025  *  07-27-00  01.00.04  Added _EVENT_DATA structure definitions for _SCSI,
0026  *                      _LINK_STATUS, _LOOP_STATE and _LOGOUT.
0027  *  08-11-00  01.00.05  Switched positions of MsgLength and Function fields in
0028  *                      _MSG_EVENT_ACK_REPLY structure to match specification.
0029  *  11-02-00  01.01.01  Original release for post 1.0 work.
0030  *                      Added a value for Manufacturer to WhoInit.
0031  *  12-04-00  01.01.02  Modified IOCFacts reply, added FWUpload messages, and
0032  *                      removed toolbox message.
0033  *  01-09-01  01.01.03  Added event enabled and disabled defines.
0034  *                      Added structures for FwHeader and DataHeader.
0035  *                      Added ImageType to FwUpload reply.
0036  *  02-20-01  01.01.04  Started using MPI_POINTER.
0037  *  02-27-01  01.01.05  Added event for RAID status change and its event data.
0038  *                      Added IocNumber field to MSG_IOC_FACTS_REPLY.
0039  *  03-27-01  01.01.06  Added defines for ProductId field of MPI_FW_HEADER.
0040  *                      Added structure offset comments.
0041  *  04-09-01  01.01.07  Added structure EVENT_DATA_EVENT_CHANGE.
0042  *  08-08-01  01.02.01  Original release for v1.2 work.
0043  *                      New format for FWVersion and ProductId in
0044  *                      MSG_IOC_FACTS_REPLY and MPI_FW_HEADER.
0045  *  08-31-01  01.02.02  Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
0046  *                      related structure and defines.
0047  *                      Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED.
0048  *                      Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE.
0049  *                      Replaced a reserved field in MSG_IOC_FACTS_REPLY with
0050  *                      IOCExceptions and changed DataImageSize to reserved.
0051  *                      Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and
0052  *                      MPI_FW_UPLOAD_ITYPE_NVDATA.
0053  *  09-28-01  01.02.03  Modified Event Data for Integrated RAID.
0054  *  11-01-01  01.02.04  Added defines for MPI_EXT_IMAGE_HEADER ImageType field.
0055  *  03-14-02  01.02.05  Added HeaderVersion field to MSG_IOC_FACTS_REPLY.
0056  *  05-31-02  01.02.06  Added define for
0057  *                      MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID.
0058  *                      Added AliasIndex to EVENT_DATA_LOGOUT structure.
0059  *  04-01-03  01.02.07  Added defines for MPI_FW_HEADER_SIGNATURE_.
0060  *  06-26-03  01.02.08  Added new values to the product family defines.
0061  *  04-29-04  01.02.09  Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and
0062  *                      added related defines.
0063  *  05-11-04  01.03.01  Original release for MPI v1.3.
0064  *  08-19-04  01.05.01  Added four new fields to MSG_IOC_INIT.
0065  *                      Added three new fields to MSG_IOC_FACTS_REPLY.
0066  *                      Defined four new bits for the IOCCapabilities field of
0067  *                      the IOCFacts reply.
0068  *                      Added two new PortTypes for the PortFacts reply.
0069  *                      Added six new events along with their EventData
0070  *                      structures.
0071  *                      Added a new MsgFlag to the FwDownload request to
0072  *                      indicate last segment.
0073  *                      Defined a new image type of boot loader.
0074  *                      Added FW family codes for SAS product families.
0075  *  10-05-04  01.05.02  Added ReplyFifoHostSignalingAddr field to
0076  *                      MSG_IOC_FACTS_REPLY.
0077  *  12-07-04  01.05.03  Added more defines for SAS Discovery Error event.
0078  *  12-09-04  01.05.04  Added Unsupported device to SAS Device event.
0079  *  01-15-05  01.05.05  Added event data for SAS SES Event.
0080  *  02-09-05  01.05.06  Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define.
0081  *  02-22-05  01.05.07  Added Host Page Buffer Persistent flag to IOC Facts
0082  *                      Reply and IOC Init Request.
0083  *  03-11-05  01.05.08  Added family code for 1068E family.
0084  *                      Removed IOCFacts Reply EEDP Capability bit.
0085  *  06-24-05  01.05.09  Added 5 new IOCFacts Reply IOCCapabilities bits.
0086  *                      Added Max SATA Targets to SAS Discovery Error event.
0087  *  08-30-05  01.05.10  Added 4 new events and their event data structures.
0088  *                      Added new ReasonCode value for SAS Device Status Change
0089  *                      event.
0090  *                      Added new family code for FC949E.
0091  *  03-27-06  01.05.11  Added MPI_IOCFACTS_CAPABILITY_TLR.
0092  *                      Added additional Reason Codes and more event data fields
0093  *                      to EVENT_DATA_SAS_DEVICE_STATUS_CHANGE.
0094  *                      Added EVENT_DATA_SAS_BROADCAST_PRIMITIVE structure and
0095  *                      new event.
0096  *                      Added MPI_EVENT_SAS_SMP_ERROR and event data structure.
0097  *                      Added MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE and event
0098  *                      data structure.
0099  *                      Added MPI_EVENT_SAS_INIT_TABLE_OVERFLOW and event
0100  *                      data structure.
0101  *                      Added MPI_EXT_IMAGE_TYPE_INITIALIZATION.
0102  *  10-11-06  01.05.12  Added MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED.
0103  *                      Added MaxInitiators field to PortFacts reply.
0104  *                      Added SAS Device Status Change ReasonCode for
0105  *                      asynchronous notificaiton.
0106  *                      Added MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE and event
0107  *                      data structure.
0108  *                      Added new ImageType values for FWDownload and FWUpload
0109  *                      requests.
0110  *  02-28-07  01.05.13  Added MPI_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT for SAS
0111  *                      Broadcast Event Data (replacing _RESERVED2).
0112  *                      For Discovery Error Event Data DiscoveryStatus field,
0113  *                      replaced _MULTPL_PATHS with _UNSUPPORTED_DEVICE and
0114  *                      added _MULTI_PORT_DOMAIN.
0115  *  05-24-07  01.05.14  Added Common Boot Block type to FWDownload Request.
0116  *                      Added Common Boot Block type to FWUpload Request.
0117  *  08-07-07  01.05.15  Added MPI_EVENT_SAS_INIT_RC_REMOVED define.
0118  *                      Added MPI_EVENT_IR2_RC_DUAL_PORT_ADDED and
0119  *                      MPI_EVENT_IR2_RC_DUAL_PORT_REMOVED for IR2 event data.
0120  *                      Added SASAddress field to SAS Initiator Device Table
0121  *                      Overflow event data structure.
0122  *  03-28-08  01.05.16  Added two new ReasonCode values to SAS Device Status
0123  *                      Change Event data to indicate completion of internally
0124  *                      generated task management.
0125  *                      Added MPI_EVENT_DSCVRY_ERR_DS_SATA_INIT_FAILURE define.
0126  *                      Added MPI_EVENT_SAS_INIT_RC_INACCESSIBLE define.
0127  *  --------------------------------------------------------------------------
0128  */
0129 
0130 #ifndef MPI_IOC_H
0131 #define MPI_IOC_H
0132 
0133 
0134 /*****************************************************************************
0135 *
0136 *               I O C    M e s s a g e s
0137 *
0138 *****************************************************************************/
0139 
0140 /****************************************************************************/
0141 /*  IOCInit message                                                         */
0142 /****************************************************************************/
0143 
0144 typedef struct _MSG_IOC_INIT
0145 {
0146     U8                      WhoInit;                    /* 00h */
0147     U8                      Reserved;                   /* 01h */
0148     U8                      ChainOffset;                /* 02h */
0149     U8                      Function;                   /* 03h */
0150     U8                      Flags;                      /* 04h */
0151     U8                      MaxDevices;                 /* 05h */
0152     U8                      MaxBuses;                   /* 06h */
0153     U8                      MsgFlags;                   /* 07h */
0154     U32                     MsgContext;                 /* 08h */
0155     U16                     ReplyFrameSize;             /* 0Ch */
0156     U8                      Reserved1[2];               /* 0Eh */
0157     U32                     HostMfaHighAddr;            /* 10h */
0158     U32                     SenseBufferHighAddr;        /* 14h */
0159     U32                     ReplyFifoHostSignalingAddr; /* 18h */
0160     SGE_SIMPLE_UNION        HostPageBufferSGE;          /* 1Ch */
0161     U16                     MsgVersion;                 /* 28h */
0162     U16                     HeaderVersion;              /* 2Ah */
0163 } MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
0164   IOCInit_t, MPI_POINTER pIOCInit_t;
0165 
0166 /* WhoInit values */
0167 #define MPI_WHOINIT_NO_ONE                              (0x00)
0168 #define MPI_WHOINIT_SYSTEM_BIOS                         (0x01)
0169 #define MPI_WHOINIT_ROM_BIOS                            (0x02)
0170 #define MPI_WHOINIT_PCI_PEER                            (0x03)
0171 #define MPI_WHOINIT_HOST_DRIVER                         (0x04)
0172 #define MPI_WHOINIT_MANUFACTURER                        (0x05)
0173 
0174 /* Flags values */
0175 #define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT   (0x04)
0176 #define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL        (0x02)
0177 #define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE              (0x01)
0178 
0179 /* MsgVersion */
0180 #define MPI_IOCINIT_MSGVERSION_MAJOR_MASK               (0xFF00)
0181 #define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT              (8)
0182 #define MPI_IOCINIT_MSGVERSION_MINOR_MASK               (0x00FF)
0183 #define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT              (0)
0184 
0185 /* HeaderVersion */
0186 #define MPI_IOCINIT_HEADERVERSION_UNIT_MASK             (0xFF00)
0187 #define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT            (8)
0188 #define MPI_IOCINIT_HEADERVERSION_DEV_MASK              (0x00FF)
0189 #define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT             (0)
0190 
0191 
0192 typedef struct _MSG_IOC_INIT_REPLY
0193 {
0194     U8                      WhoInit;                    /* 00h */
0195     U8                      Reserved;                   /* 01h */
0196     U8                      MsgLength;                  /* 02h */
0197     U8                      Function;                   /* 03h */
0198     U8                      Flags;                      /* 04h */
0199     U8                      MaxDevices;                 /* 05h */
0200     U8                      MaxBuses;                   /* 06h */
0201     U8                      MsgFlags;                   /* 07h */
0202     U32                     MsgContext;                 /* 08h */
0203     U16                     Reserved2;                  /* 0Ch */
0204     U16                     IOCStatus;                  /* 0Eh */
0205     U32                     IOCLogInfo;                 /* 10h */
0206 } MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY,
0207   IOCInitReply_t, MPI_POINTER pIOCInitReply_t;
0208 
0209 
0210 
0211 /****************************************************************************/
0212 /*  IOC Facts message                                                       */
0213 /****************************************************************************/
0214 
0215 typedef struct _MSG_IOC_FACTS
0216 {
0217     U8                      Reserved[2];                /* 00h */
0218     U8                      ChainOffset;                /* 01h */
0219     U8                      Function;                   /* 02h */
0220     U8                      Reserved1[3];               /* 03h */
0221     U8                      MsgFlags;                   /* 04h */
0222     U32                     MsgContext;                 /* 08h */
0223 } MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS,
0224   IOCFacts_t, MPI_POINTER pIOCFacts_t;
0225 
0226 typedef struct _MPI_FW_VERSION_STRUCT
0227 {
0228     U8                      Dev;                        /* 00h */
0229     U8                      Unit;                       /* 01h */
0230     U8                      Minor;                      /* 02h */
0231     U8                      Major;                      /* 03h */
0232 } MPI_FW_VERSION_STRUCT;
0233 
0234 typedef union _MPI_FW_VERSION
0235 {
0236     MPI_FW_VERSION_STRUCT   Struct;
0237     U32                     Word;
0238 } MPI_FW_VERSION;
0239 
0240 /* IOC Facts Reply */
0241 typedef struct _MSG_IOC_FACTS_REPLY
0242 {
0243     U16                     MsgVersion;                 /* 00h */
0244     U8                      MsgLength;                  /* 02h */
0245     U8                      Function;                   /* 03h */
0246     U16                     HeaderVersion;              /* 04h */
0247     U8                      IOCNumber;                  /* 06h */
0248     U8                      MsgFlags;                   /* 07h */
0249     U32                     MsgContext;                 /* 08h */
0250     U16                     IOCExceptions;              /* 0Ch */
0251     U16                     IOCStatus;                  /* 0Eh */
0252     U32                     IOCLogInfo;                 /* 10h */
0253     U8                      MaxChainDepth;              /* 14h */
0254     U8                      WhoInit;                    /* 15h */
0255     U8                      BlockSize;                  /* 16h */
0256     U8                      Flags;                      /* 17h */
0257     U16                     ReplyQueueDepth;            /* 18h */
0258     U16                     RequestFrameSize;           /* 1Ah */
0259     U16                     Reserved_0101_FWVersion;    /* 1Ch */ /* obsolete 16-bit FWVersion */
0260     U16                     ProductID;                  /* 1Eh */
0261     U32                     CurrentHostMfaHighAddr;     /* 20h */
0262     U16                     GlobalCredits;              /* 24h */
0263     U8                      NumberOfPorts;              /* 26h */
0264     U8                      EventState;                 /* 27h */
0265     U32                     CurrentSenseBufferHighAddr; /* 28h */
0266     U16                     CurReplyFrameSize;          /* 2Ch */
0267     U8                      MaxDevices;                 /* 2Eh */
0268     U8                      MaxBuses;                   /* 2Fh */
0269     U32                     FWImageSize;                /* 30h */
0270     U32                     IOCCapabilities;            /* 34h */
0271     MPI_FW_VERSION          FWVersion;                  /* 38h */
0272     U16                     HighPriorityQueueDepth;     /* 3Ch */
0273     U16                     Reserved2;                  /* 3Eh */
0274     SGE_SIMPLE_UNION        HostPageBufferSGE;          /* 40h */
0275     U32                     ReplyFifoHostSignalingAddr; /* 4Ch */
0276 } MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
0277   IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
0278 
0279 #define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK              (0xFF00)
0280 #define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT             (8)
0281 #define MPI_IOCFACTS_MSGVERSION_MINOR_MASK              (0x00FF)
0282 #define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT             (0)
0283 
0284 #define MPI_IOCFACTS_HDRVERSION_UNIT_MASK               (0xFF00)
0285 #define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT              (8)
0286 #define MPI_IOCFACTS_HDRVERSION_DEV_MASK                (0x00FF)
0287 #define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT               (0)
0288 
0289 #define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL        (0x0001)
0290 #define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID         (0x0002)
0291 #define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL            (0x0004)
0292 #define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL       (0x0008)
0293 #define MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED        (0x0010)
0294 
0295 #define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT             (0x01)
0296 #define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL       (0x02)
0297 #define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT  (0x04)
0298 
0299 #define MPI_IOCFACTS_EVENTSTATE_DISABLED                (0x00)
0300 #define MPI_IOCFACTS_EVENTSTATE_ENABLED                 (0x01)
0301 
0302 #define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q              (0x00000001)
0303 #define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL       (0x00000002)
0304 #define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING     (0x00000004)
0305 #define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER       (0x00000008)
0306 #define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER         (0x00000010)
0307 #define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER         (0x00000020)
0308 #define MPI_IOCFACTS_CAPABILITY_EEDP                    (0x00000040)
0309 #define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL           (0x00000080)
0310 #define MPI_IOCFACTS_CAPABILITY_MULTICAST               (0x00000100)
0311 #define MPI_IOCFACTS_CAPABILITY_SCSIIO32                (0x00000200)
0312 #define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16             (0x00000400)
0313 #define MPI_IOCFACTS_CAPABILITY_TLR                     (0x00000800)
0314 
0315 
0316 /*****************************************************************************
0317 *
0318 *               P o r t    M e s s a g e s
0319 *
0320 *****************************************************************************/
0321 
0322 /****************************************************************************/
0323 /*  Port Facts message and Reply                                            */
0324 /****************************************************************************/
0325 
0326 typedef struct _MSG_PORT_FACTS
0327 {
0328      U8                     Reserved[2];                /* 00h */
0329      U8                     ChainOffset;                /* 02h */
0330      U8                     Function;                   /* 03h */
0331      U8                     Reserved1[2];               /* 04h */
0332      U8                     PortNumber;                 /* 06h */
0333      U8                     MsgFlags;                   /* 07h */
0334      U32                    MsgContext;                 /* 08h */
0335 } MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS,
0336   PortFacts_t, MPI_POINTER pPortFacts_t;
0337 
0338 typedef struct _MSG_PORT_FACTS_REPLY
0339 {
0340      U16                    Reserved;                   /* 00h */
0341      U8                     MsgLength;                  /* 02h */
0342      U8                     Function;                   /* 03h */
0343      U16                    Reserved1;                  /* 04h */
0344      U8                     PortNumber;                 /* 06h */
0345      U8                     MsgFlags;                   /* 07h */
0346      U32                    MsgContext;                 /* 08h */
0347      U16                    Reserved2;                  /* 0Ch */
0348      U16                    IOCStatus;                  /* 0Eh */
0349      U32                    IOCLogInfo;                 /* 10h */
0350      U8                     Reserved3;                  /* 14h */
0351      U8                     PortType;                   /* 15h */
0352      U16                    MaxDevices;                 /* 16h */
0353      U16                    PortSCSIID;                 /* 18h */
0354      U16                    ProtocolFlags;              /* 1Ah */
0355      U16                    MaxPostedCmdBuffers;        /* 1Ch */
0356      U16                    MaxPersistentIDs;           /* 1Eh */
0357      U16                    MaxLanBuckets;              /* 20h */
0358      U8                     MaxInitiators;              /* 22h */
0359      U8                     Reserved4;                  /* 23h */
0360      U32                    Reserved5;                  /* 24h */
0361 } MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
0362   PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
0363 
0364 
0365 /* PortTypes values */
0366 
0367 #define MPI_PORTFACTS_PORTTYPE_INACTIVE         (0x00)
0368 #define MPI_PORTFACTS_PORTTYPE_SCSI             (0x01)
0369 #define MPI_PORTFACTS_PORTTYPE_FC               (0x10)
0370 #define MPI_PORTFACTS_PORTTYPE_ISCSI            (0x20)
0371 #define MPI_PORTFACTS_PORTTYPE_SAS              (0x30)
0372 
0373 /* ProtocolFlags values */
0374 
0375 #define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR       (0x01)
0376 #define MPI_PORTFACTS_PROTOCOL_LAN              (0x02)
0377 #define MPI_PORTFACTS_PROTOCOL_TARGET           (0x04)
0378 #define MPI_PORTFACTS_PROTOCOL_INITIATOR        (0x08)
0379 
0380 
0381 /****************************************************************************/
0382 /*  Port Enable Message                                                     */
0383 /****************************************************************************/
0384 
0385 typedef struct _MSG_PORT_ENABLE
0386 {
0387     U8                      Reserved[2];                /* 00h */
0388     U8                      ChainOffset;                /* 02h */
0389     U8                      Function;                   /* 03h */
0390     U8                      Reserved1[2];               /* 04h */
0391     U8                      PortNumber;                 /* 06h */
0392     U8                      MsgFlags;                   /* 07h */
0393     U32                     MsgContext;                 /* 08h */
0394 } MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE,
0395   PortEnable_t, MPI_POINTER pPortEnable_t;
0396 
0397 typedef struct _MSG_PORT_ENABLE_REPLY
0398 {
0399     U8                      Reserved[2];                /* 00h */
0400     U8                      MsgLength;                  /* 02h */
0401     U8                      Function;                   /* 03h */
0402     U8                      Reserved1[2];               /* 04h */
0403     U8                      PortNumber;                 /* 05h */
0404     U8                      MsgFlags;                   /* 07h */
0405     U32                     MsgContext;                 /* 08h */
0406     U16                     Reserved2;                  /* 0Ch */
0407     U16                     IOCStatus;                  /* 0Eh */
0408     U32                     IOCLogInfo;                 /* 10h */
0409 } MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY,
0410   PortEnableReply_t, MPI_POINTER pPortEnableReply_t;
0411 
0412 
0413 /*****************************************************************************
0414 *
0415 *               E v e n t    M e s s a g e s
0416 *
0417 *****************************************************************************/
0418 
0419 /****************************************************************************/
0420 /*  Event Notification messages                                             */
0421 /****************************************************************************/
0422 
0423 typedef struct _MSG_EVENT_NOTIFY
0424 {
0425     U8                      Switch;                     /* 00h */
0426     U8                      Reserved;                   /* 01h */
0427     U8                      ChainOffset;                /* 02h */
0428     U8                      Function;                   /* 03h */
0429     U8                      Reserved1[3];               /* 04h */
0430     U8                      MsgFlags;                   /* 07h */
0431     U32                     MsgContext;                 /* 08h */
0432 } MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY,
0433   EventNotification_t, MPI_POINTER pEventNotification_t;
0434 
0435 /* Event Notification Reply */
0436 
0437 typedef struct _MSG_EVENT_NOTIFY_REPLY
0438 {
0439      U16                    EventDataLength;            /* 00h */
0440      U8                     MsgLength;                  /* 02h */
0441      U8                     Function;                   /* 03h */
0442      U8                     Reserved1[2];               /* 04h */
0443      U8                     AckRequired;                /* 06h */
0444      U8                     MsgFlags;                   /* 07h */
0445      U32                    MsgContext;                 /* 08h */
0446      U8                     Reserved2[2];               /* 0Ch */
0447      U16                    IOCStatus;                  /* 0Eh */
0448      U32                    IOCLogInfo;                 /* 10h */
0449      U32                    Event;                      /* 14h */
0450      U32                    EventContext;               /* 18h */
0451      U32                    Data[];         /* 1Ch */
0452 } MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY,
0453   EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t;
0454 
0455 /* Event Acknowledge */
0456 
0457 typedef struct _MSG_EVENT_ACK
0458 {
0459     U8                      Reserved[2];                /* 00h */
0460     U8                      ChainOffset;                /* 02h */
0461     U8                      Function;                   /* 03h */
0462     U8                      Reserved1[3];               /* 04h */
0463     U8                      MsgFlags;                   /* 07h */
0464     U32                     MsgContext;                 /* 08h */
0465     U32                     Event;                      /* 0Ch */
0466     U32                     EventContext;               /* 10h */
0467 } MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK,
0468   EventAck_t, MPI_POINTER pEventAck_t;
0469 
0470 typedef struct _MSG_EVENT_ACK_REPLY
0471 {
0472     U8                      Reserved[2];                /* 00h */
0473     U8                      MsgLength;                  /* 02h */
0474     U8                      Function;                   /* 03h */
0475     U8                      Reserved1[3];               /* 04h */
0476     U8                      MsgFlags;                   /* 07h */
0477     U32                     MsgContext;                 /* 08h */
0478     U16                     Reserved2;                  /* 0Ch */
0479     U16                     IOCStatus;                  /* 0Eh */
0480     U32                     IOCLogInfo;                 /* 10h */
0481 } MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY,
0482   EventAckReply_t, MPI_POINTER pEventAckReply_t;
0483 
0484 /* Switch */
0485 
0486 #define MPI_EVENT_NOTIFICATION_SWITCH_OFF   (0x00)
0487 #define MPI_EVENT_NOTIFICATION_SWITCH_ON    (0x01)
0488 
0489 /* Event */
0490 
0491 #define MPI_EVENT_NONE                          (0x00000000)
0492 #define MPI_EVENT_LOG_DATA                      (0x00000001)
0493 #define MPI_EVENT_STATE_CHANGE                  (0x00000002)
0494 #define MPI_EVENT_UNIT_ATTENTION                (0x00000003)
0495 #define MPI_EVENT_IOC_BUS_RESET                 (0x00000004)
0496 #define MPI_EVENT_EXT_BUS_RESET                 (0x00000005)
0497 #define MPI_EVENT_RESCAN                        (0x00000006)
0498 #define MPI_EVENT_LINK_STATUS_CHANGE            (0x00000007)
0499 #define MPI_EVENT_LOOP_STATE_CHANGE             (0x00000008)
0500 #define MPI_EVENT_LOGOUT                        (0x00000009)
0501 #define MPI_EVENT_EVENT_CHANGE                  (0x0000000A)
0502 #define MPI_EVENT_INTEGRATED_RAID               (0x0000000B)
0503 #define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE     (0x0000000C)
0504 #define MPI_EVENT_ON_BUS_TIMER_EXPIRED          (0x0000000D)
0505 #define MPI_EVENT_QUEUE_FULL                    (0x0000000E)
0506 #define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE      (0x0000000F)
0507 #define MPI_EVENT_SAS_SES                       (0x00000010)
0508 #define MPI_EVENT_PERSISTENT_TABLE_FULL         (0x00000011)
0509 #define MPI_EVENT_SAS_PHY_LINK_STATUS           (0x00000012)
0510 #define MPI_EVENT_SAS_DISCOVERY_ERROR           (0x00000013)
0511 #define MPI_EVENT_IR_RESYNC_UPDATE              (0x00000014)
0512 #define MPI_EVENT_IR2                           (0x00000015)
0513 #define MPI_EVENT_SAS_DISCOVERY                 (0x00000016)
0514 #define MPI_EVENT_SAS_BROADCAST_PRIMITIVE       (0x00000017)
0515 #define MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x00000018)
0516 #define MPI_EVENT_SAS_INIT_TABLE_OVERFLOW       (0x00000019)
0517 #define MPI_EVENT_SAS_SMP_ERROR                 (0x0000001A)
0518 #define MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE    (0x0000001B)
0519 #define MPI_EVENT_LOG_ENTRY_ADDED               (0x00000021)
0520 
0521 /* AckRequired field values */
0522 
0523 #define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
0524 #define MPI_EVENT_NOTIFICATION_ACK_REQUIRED     (0x01)
0525 
0526 /* EventChange Event data */
0527 
0528 typedef struct _EVENT_DATA_EVENT_CHANGE
0529 {
0530     U8                      EventState;                 /* 00h */
0531     U8                      Reserved;                   /* 01h */
0532     U16                     Reserved1;                  /* 02h */
0533 } EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
0534   EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
0535 
0536 /* LogEntryAdded Event data */
0537 
0538 /* this structure matches MPI_LOG_0_ENTRY in mpi_cnfg.h */
0539 #define MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH    (0x1C)
0540 typedef struct _EVENT_DATA_LOG_ENTRY
0541 {
0542     U32         TimeStamp;                          /* 00h */
0543     U32         Reserved1;                          /* 04h */
0544     U16         LogSequence;                        /* 08h */
0545     U16         LogEntryQualifier;                  /* 0Ah */
0546     U8          LogData[MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH]; /* 0Ch */
0547 } EVENT_DATA_LOG_ENTRY, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY,
0548   MpiEventDataLogEntry_t, MPI_POINTER pMpiEventDataLogEntry_t;
0549 
0550 typedef struct _EVENT_DATA_LOG_ENTRY_ADDED
0551 {
0552     U16                     LogSequence;            /* 00h */
0553     U16                     Reserved1;              /* 02h */
0554     U32                     Reserved2;              /* 04h */
0555     EVENT_DATA_LOG_ENTRY    LogEntry;               /* 08h */
0556 } EVENT_DATA_LOG_ENTRY_ADDED, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY_ADDED,
0557   MpiEventDataLogEntryAdded_t, MPI_POINTER pMpiEventDataLogEntryAdded_t;
0558 
0559 /* SCSI Event data for Port, Bus and Device forms */
0560 
0561 typedef struct _EVENT_DATA_SCSI
0562 {
0563     U8                      TargetID;                   /* 00h */
0564     U8                      BusPort;                    /* 01h */
0565     U16                     Reserved;                   /* 02h */
0566 } EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI,
0567   EventDataScsi_t, MPI_POINTER pEventDataScsi_t;
0568 
0569 /* SCSI Device Status Change Event data */
0570 
0571 typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
0572 {
0573     U8                      TargetID;                   /* 00h */
0574     U8                      Bus;                        /* 01h */
0575     U8                      ReasonCode;                 /* 02h */
0576     U8                      LUN;                        /* 03h */
0577     U8                      ASC;                        /* 04h */
0578     U8                      ASCQ;                       /* 05h */
0579     U16                     Reserved;                   /* 06h */
0580 } EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
0581   MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
0582   MpiEventDataScsiDeviceStatusChange_t,
0583   MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t;
0584 
0585 /* MPI SCSI Device Status Change Event data ReasonCode values */
0586 #define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED                (0x03)
0587 #define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING       (0x04)
0588 #define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA           (0x05)
0589 
0590 /* SAS Device Status Change Event data */
0591 
0592 typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
0593 {
0594     U8                      TargetID;                   /* 00h */
0595     U8                      Bus;                        /* 01h */
0596     U8                      ReasonCode;                 /* 02h */
0597     U8                      Reserved;                   /* 03h */
0598     U8                      ASC;                        /* 04h */
0599     U8                      ASCQ;                       /* 05h */
0600     U16                     DevHandle;                  /* 06h */
0601     U32                     DeviceInfo;                 /* 08h */
0602     U16                     ParentDevHandle;            /* 0Ch */
0603     U8                      PhyNum;                     /* 0Eh */
0604     U8                      Reserved1;                  /* 0Fh */
0605     U64                     SASAddress;                 /* 10h */
0606     U8                      LUN[8];                     /* 18h */
0607     U16                     TaskTag;                    /* 20h */
0608     U16                     Reserved2;                  /* 22h */
0609 } EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
0610   MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
0611   MpiEventDataSasDeviceStatusChange_t,
0612   MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
0613 
0614 /* MPI SAS Device Status Change Event data ReasonCode values */
0615 #define MPI_EVENT_SAS_DEV_STAT_RC_ADDED                     (0x03)
0616 #define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING            (0x04)
0617 #define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA                (0x05)
0618 #define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED          (0x06)
0619 #define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED               (0x07)
0620 #define MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET     (0x08)
0621 #define MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL       (0x09)
0622 #define MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL   (0x0A)
0623 #define MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL   (0x0B)
0624 #define MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL       (0x0C)
0625 #define MPI_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION        (0x0D)
0626 #define MPI_EVENT_SAS_DEV_STAT_RC_CMPL_INTERNAL_DEV_RESET   (0x0E)
0627 #define MPI_EVENT_SAS_DEV_STAT_RC_CMPL_TASK_ABORT_INTERNAL  (0x0F)
0628 
0629 
0630 /* SCSI Event data for Queue Full event */
0631 
0632 typedef struct _EVENT_DATA_QUEUE_FULL
0633 {
0634     U8                      TargetID;                   /* 00h */
0635     U8                      Bus;                        /* 01h */
0636     U16                     CurrentDepth;               /* 02h */
0637 } EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
0638   EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
0639 
0640 /* MPI Integrated RAID Event data */
0641 
0642 typedef struct _EVENT_DATA_RAID
0643 {
0644     U8                      VolumeID;                   /* 00h */
0645     U8                      VolumeBus;                  /* 01h */
0646     U8                      ReasonCode;                 /* 02h */
0647     U8                      PhysDiskNum;                /* 03h */
0648     U8                      ASC;                        /* 04h */
0649     U8                      ASCQ;                       /* 05h */
0650     U16                     Reserved;                   /* 06h */
0651     U32                     SettingsStatus;             /* 08h */
0652 } EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
0653   MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
0654 
0655 /* MPI Integrated RAID Event data ReasonCode values */
0656 #define MPI_EVENT_RAID_RC_VOLUME_CREATED                (0x00)
0657 #define MPI_EVENT_RAID_RC_VOLUME_DELETED                (0x01)
0658 #define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED       (0x02)
0659 #define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED         (0x03)
0660 #define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED       (0x04)
0661 #define MPI_EVENT_RAID_RC_PHYSDISK_CREATED              (0x05)
0662 #define MPI_EVENT_RAID_RC_PHYSDISK_DELETED              (0x06)
0663 #define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED     (0x07)
0664 #define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED       (0x08)
0665 #define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED             (0x09)
0666 #define MPI_EVENT_RAID_RC_SMART_DATA                    (0x0A)
0667 #define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED        (0x0B)
0668 
0669 
0670 /* MPI Integrated RAID Resync Update Event data */
0671 
0672 typedef struct _MPI_EVENT_DATA_IR_RESYNC_UPDATE
0673 {
0674     U8                      VolumeID;                   /* 00h */
0675     U8                      VolumeBus;                  /* 01h */
0676     U8                      ResyncComplete;             /* 02h */
0677     U8                      Reserved1;                  /* 03h */
0678     U32                     Reserved2;                  /* 04h */
0679 } MPI_EVENT_DATA_IR_RESYNC_UPDATE,
0680   MPI_POINTER PTR_MPI_EVENT_DATA_IR_RESYNC_UPDATE,
0681   MpiEventDataIrResyncUpdate_t, MPI_POINTER pMpiEventDataIrResyncUpdate_t;
0682 
0683 /* MPI IR2 Event data */
0684 
0685 /* MPI_LD_STATE or MPI_PD_STATE */
0686 typedef struct _IR2_STATE_CHANGED
0687 {
0688     U16                 PreviousState;  /* 00h */
0689     U16                 NewState;       /* 02h */
0690 } IR2_STATE_CHANGED, MPI_POINTER PTR_IR2_STATE_CHANGED;
0691 
0692 typedef struct _IR2_PD_INFO
0693 {
0694     U16                 DeviceHandle;           /* 00h */
0695     U8                  TruncEnclosureHandle;   /* 02h */
0696     U8                  TruncatedSlot;          /* 03h */
0697 } IR2_PD_INFO, MPI_POINTER PTR_IR2_PD_INFO;
0698 
0699 typedef union _MPI_IR2_RC_EVENT_DATA
0700 {
0701     IR2_STATE_CHANGED   StateChanged;
0702     U32                 Lba;
0703     IR2_PD_INFO         PdInfo;
0704 } MPI_IR2_RC_EVENT_DATA, MPI_POINTER PTR_MPI_IR2_RC_EVENT_DATA;
0705 
0706 typedef struct _MPI_EVENT_DATA_IR2
0707 {
0708     U8                      TargetID;             /* 00h */
0709     U8                      Bus;                  /* 01h */
0710     U8                      ReasonCode;           /* 02h */
0711     U8                      PhysDiskNum;          /* 03h */
0712     MPI_IR2_RC_EVENT_DATA   IR2EventData;         /* 04h */
0713 } MPI_EVENT_DATA_IR2, MPI_POINTER PTR_MPI_EVENT_DATA_IR2,
0714   MpiEventDataIR2_t, MPI_POINTER pMpiEventDataIR2_t;
0715 
0716 /* MPI IR2 Event data ReasonCode values */
0717 #define MPI_EVENT_IR2_RC_LD_STATE_CHANGED           (0x01)
0718 #define MPI_EVENT_IR2_RC_PD_STATE_CHANGED           (0x02)
0719 #define MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL       (0x03)
0720 #define MPI_EVENT_IR2_RC_PD_INSERTED                (0x04)
0721 #define MPI_EVENT_IR2_RC_PD_REMOVED                 (0x05)
0722 #define MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED       (0x06)
0723 #define MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR       (0x07)
0724 #define MPI_EVENT_IR2_RC_DUAL_PORT_ADDED            (0x08)
0725 #define MPI_EVENT_IR2_RC_DUAL_PORT_REMOVED          (0x09)
0726 
0727 /* defines for logical disk states */
0728 #define MPI_LD_STATE_OPTIMAL                        (0x00)
0729 #define MPI_LD_STATE_DEGRADED                       (0x01)
0730 #define MPI_LD_STATE_FAILED                         (0x02)
0731 #define MPI_LD_STATE_MISSING                        (0x03)
0732 #define MPI_LD_STATE_OFFLINE                        (0x04)
0733 
0734 /* defines for physical disk states */
0735 #define MPI_PD_STATE_ONLINE                         (0x00)
0736 #define MPI_PD_STATE_MISSING                        (0x01)
0737 #define MPI_PD_STATE_NOT_COMPATIBLE                 (0x02)
0738 #define MPI_PD_STATE_FAILED                         (0x03)
0739 #define MPI_PD_STATE_INITIALIZING                   (0x04)
0740 #define MPI_PD_STATE_OFFLINE_AT_HOST_REQUEST        (0x05)
0741 #define MPI_PD_STATE_FAILED_AT_HOST_REQUEST         (0x06)
0742 #define MPI_PD_STATE_OFFLINE_FOR_ANOTHER_REASON     (0xFF)
0743 
0744 /* MPI Link Status Change Event data */
0745 
0746 typedef struct _EVENT_DATA_LINK_STATUS
0747 {
0748     U8                      State;                      /* 00h */
0749     U8                      Reserved;                   /* 01h */
0750     U16                     Reserved1;                  /* 02h */
0751     U8                      Reserved2;                  /* 04h */
0752     U8                      Port;                       /* 05h */
0753     U16                     Reserved3;                  /* 06h */
0754 } EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS,
0755   EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t;
0756 
0757 #define MPI_EVENT_LINK_STATUS_FAILURE       (0x00000000)
0758 #define MPI_EVENT_LINK_STATUS_ACTIVE        (0x00000001)
0759 
0760 /* MPI Loop State Change Event data */
0761 
0762 typedef struct _EVENT_DATA_LOOP_STATE
0763 {
0764     U8                      Character4;                 /* 00h */
0765     U8                      Character3;                 /* 01h */
0766     U8                      Type;                       /* 02h */
0767     U8                      Reserved;                   /* 03h */
0768     U8                      Reserved1;                  /* 04h */
0769     U8                      Port;                       /* 05h */
0770     U16                     Reserved2;                  /* 06h */
0771 } EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE,
0772   EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t;
0773 
0774 #define MPI_EVENT_LOOP_STATE_CHANGE_LIP     (0x0001)
0775 #define MPI_EVENT_LOOP_STATE_CHANGE_LPE     (0x0002)
0776 #define MPI_EVENT_LOOP_STATE_CHANGE_LPB     (0x0003)
0777 
0778 /* MPI LOGOUT Event data */
0779 
0780 typedef struct _EVENT_DATA_LOGOUT
0781 {
0782     U32                     NPortID;                    /* 00h */
0783     U8                      AliasIndex;                 /* 04h */
0784     U8                      Port;                       /* 05h */
0785     U16                     Reserved1;                  /* 06h */
0786 } EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT,
0787   EventDataLogout_t, MPI_POINTER pEventDataLogout_t;
0788 
0789 #define MPI_EVENT_LOGOUT_ALL_ALIASES        (0xFF)
0790 
0791 /* SAS SES Event data */
0792 
0793 typedef struct _EVENT_DATA_SAS_SES
0794 {
0795     U8                      PhyNum;                     /* 00h */
0796     U8                      Port;                       /* 01h */
0797     U8                      PortWidth;                  /* 02h */
0798     U8                      Reserved1;                  /* 04h */
0799 } EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
0800   MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
0801 
0802 /* SAS Broadcast Primitive Event data */
0803 
0804 typedef struct _EVENT_DATA_SAS_BROADCAST_PRIMITIVE
0805 {
0806     U8                      PhyNum;                     /* 00h */
0807     U8                      Port;                       /* 01h */
0808     U8                      PortWidth;                  /* 02h */
0809     U8                      Primitive;                  /* 04h */
0810 } EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
0811   MPI_POINTER PTR_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
0812   MpiEventDataSasBroadcastPrimitive_t,
0813   MPI_POINTER pMpiEventDataSasBroadcastPrimitive_t;
0814 
0815 #define MPI_EVENT_PRIMITIVE_CHANGE              (0x01)
0816 #define MPI_EVENT_PRIMITIVE_EXPANDER            (0x03)
0817 #define MPI_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT  (0x04)
0818 #define MPI_EVENT_PRIMITIVE_RESERVED3           (0x05)
0819 #define MPI_EVENT_PRIMITIVE_RESERVED4           (0x06)
0820 #define MPI_EVENT_PRIMITIVE_CHANGE0_RESERVED    (0x07)
0821 #define MPI_EVENT_PRIMITIVE_CHANGE1_RESERVED    (0x08)
0822 
0823 /* SAS Phy Link Status Event data */
0824 
0825 typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
0826 {
0827     U8                      PhyNum;                     /* 00h */
0828     U8                      LinkRates;                  /* 01h */
0829     U16                     DevHandle;                  /* 02h */
0830     U64                     SASAddress;                 /* 04h */
0831 } EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
0832   MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t;
0833 
0834 /* defines for the LinkRates field of the SAS PHY Link Status event */
0835 #define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK                   (0xF0)
0836 #define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT                  (4)
0837 #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK                  (0x0F)
0838 #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT                 (0)
0839 #define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN                   (0x00)
0840 #define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED              (0x01)
0841 #define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION  (0x02)
0842 #define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE         (0x03)
0843 #define MPI_EVENT_SAS_PLS_LR_RATE_1_5                       (0x08)
0844 #define MPI_EVENT_SAS_PLS_LR_RATE_3_0                       (0x09)
0845 #define MPI_EVENT_SAS_PLS_LR_RATE_6_0                       (0x0A)
0846 
0847 /* SAS Discovery Event data */
0848 
0849 typedef struct _EVENT_DATA_SAS_DISCOVERY
0850 {
0851     U32                     DiscoveryStatus;            /* 00h */
0852     U32                     Reserved1;                  /* 04h */
0853 } EVENT_DATA_SAS_DISCOVERY, MPI_POINTER PTR_EVENT_DATA_SAS_DISCOVERY,
0854   EventDataSasDiscovery_t, MPI_POINTER pEventDataSasDiscovery_t;
0855 
0856 #define MPI_EVENT_SAS_DSCVRY_COMPLETE                       (0x00000000)
0857 #define MPI_EVENT_SAS_DSCVRY_IN_PROGRESS                    (0x00000001)
0858 #define MPI_EVENT_SAS_DSCVRY_PHY_BITS_MASK                  (0xFFFF0000)
0859 #define MPI_EVENT_SAS_DSCVRY_PHY_BITS_SHIFT                 (16)
0860 
0861 /* SAS Discovery Error Event data */
0862 
0863 typedef struct _EVENT_DATA_DISCOVERY_ERROR
0864 {
0865     U32                     DiscoveryStatus;            /* 00h */
0866     U8                      Port;                       /* 04h */
0867     U8                      Reserved1;                  /* 05h */
0868     U16                     Reserved2;                  /* 06h */
0869 } EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR,
0870   EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t;
0871 
0872 #define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED               (0x00000001)
0873 #define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE        (0x00000002)
0874 #define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS              (0x00000004)
0875 #define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR                (0x00000008)
0876 #define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT                 (0x00000010)
0877 #define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES           (0x00000020)
0878 #define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST             (0x00000040)
0879 #define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED         (0x00000080)
0880 #define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR               (0x00000100)
0881 #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE          (0x00000200)
0882 #define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE              (0x00000400)
0883 #define MPI_EVENT_DSCVRY_ERR_DS_UNSUPPORTED_DEVICE          (0x00000800)
0884 #define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS            (0x00001000)
0885 #define MPI_EVENT_DSCVRY_ERR_DS_MULTI_PORT_DOMAIN           (0x00002000)
0886 #define MPI_EVENT_DSCVRY_ERR_DS_SATA_INIT_FAILURE           (0x00004000)
0887 
0888 /* SAS SMP Error Event data */
0889 
0890 typedef struct _EVENT_DATA_SAS_SMP_ERROR
0891 {
0892     U8                      Status;                     /* 00h */
0893     U8                      Port;                       /* 01h */
0894     U8                      SMPFunctionResult;          /* 02h */
0895     U8                      Reserved1;                  /* 03h */
0896     U64                     SASAddress;                 /* 04h */
0897 } EVENT_DATA_SAS_SMP_ERROR, MPI_POINTER PTR_EVENT_DATA_SAS_SMP_ERROR,
0898   MpiEventDataSasSmpError_t, MPI_POINTER pMpiEventDataSasSmpError_t;
0899 
0900 /* defines for the Status field of the SAS SMP Error event */
0901 #define MPI_EVENT_SAS_SMP_FUNCTION_RESULT_VALID         (0x00)
0902 #define MPI_EVENT_SAS_SMP_CRC_ERROR                     (0x01)
0903 #define MPI_EVENT_SAS_SMP_TIMEOUT                       (0x02)
0904 #define MPI_EVENT_SAS_SMP_NO_DESTINATION                (0x03)
0905 #define MPI_EVENT_SAS_SMP_BAD_DESTINATION               (0x04)
0906 
0907 /* SAS Initiator Device Status Change Event data */
0908 
0909 typedef struct _EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
0910 {
0911     U8                      ReasonCode;                 /* 00h */
0912     U8                      Port;                       /* 01h */
0913     U16                     DevHandle;                  /* 02h */
0914     U64                     SASAddress;                 /* 04h */
0915 } EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
0916   MPI_POINTER PTR_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
0917   MpiEventDataSasInitDevStatusChange_t,
0918   MPI_POINTER pMpiEventDataSasInitDevStatusChange_t;
0919 
0920 /* defines for the ReasonCode field of the SAS Initiator Device Status Change event */
0921 #define MPI_EVENT_SAS_INIT_RC_ADDED                 (0x01)
0922 #define MPI_EVENT_SAS_INIT_RC_REMOVED               (0x02)
0923 #define MPI_EVENT_SAS_INIT_RC_INACCESSIBLE          (0x03)
0924 
0925 /* SAS Initiator Device Table Overflow Event data */
0926 
0927 typedef struct _EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
0928 {
0929     U8                      MaxInit;                    /* 00h */
0930     U8                      CurrentInit;                /* 01h */
0931     U16                     Reserved1;                  /* 02h */
0932     U64                     SASAddress;                 /* 04h */
0933 } EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
0934   MPI_POINTER PTR_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
0935   MpiEventDataSasInitTableOverflow_t,
0936   MPI_POINTER pMpiEventDataSasInitTableOverflow_t;
0937 
0938 /* SAS Expander Status Change Event data */
0939 
0940 typedef struct _EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE
0941 {
0942     U8                      ReasonCode;             /* 00h */
0943     U8                      Reserved1;              /* 01h */
0944     U16                     Reserved2;              /* 02h */
0945     U8                      PhysicalPort;           /* 04h */
0946     U8                      Reserved3;              /* 05h */
0947     U16                     EnclosureHandle;        /* 06h */
0948     U64                     SASAddress;             /* 08h */
0949     U32                     DiscoveryStatus;        /* 10h */
0950     U16                     DevHandle;              /* 14h */
0951     U16                     ParentDevHandle;        /* 16h */
0952     U16                     ExpanderChangeCount;    /* 18h */
0953     U16                     ExpanderRouteIndexes;   /* 1Ah */
0954     U8                      NumPhys;                /* 1Ch */
0955     U8                      SASLevel;               /* 1Dh */
0956     U8                      Flags;                  /* 1Eh */
0957     U8                      Reserved4;              /* 1Fh */
0958 } EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE,
0959   MPI_POINTER PTR_EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE,
0960   MpiEventDataSasExpanderStatusChange_t,
0961   MPI_POINTER pMpiEventDataSasExpanderStatusChange_t;
0962 
0963 /* values for ReasonCode field of SAS Expander Status Change Event data */
0964 #define MPI_EVENT_SAS_EXP_RC_ADDED                      (0x00)
0965 #define MPI_EVENT_SAS_EXP_RC_NOT_RESPONDING             (0x01)
0966 
0967 /* values for DiscoveryStatus field of SAS Expander Status Change Event data */
0968 #define MPI_EVENT_SAS_EXP_DS_LOOP_DETECTED              (0x00000001)
0969 #define MPI_EVENT_SAS_EXP_DS_UNADDRESSABLE_DEVICE       (0x00000002)
0970 #define MPI_EVENT_SAS_EXP_DS_MULTIPLE_PORTS             (0x00000004)
0971 #define MPI_EVENT_SAS_EXP_DS_EXPANDER_ERR               (0x00000008)
0972 #define MPI_EVENT_SAS_EXP_DS_SMP_TIMEOUT                (0x00000010)
0973 #define MPI_EVENT_SAS_EXP_DS_OUT_ROUTE_ENTRIES          (0x00000020)
0974 #define MPI_EVENT_SAS_EXP_DS_INDEX_NOT_EXIST            (0x00000040)
0975 #define MPI_EVENT_SAS_EXP_DS_SMP_FUNCTION_FAILED        (0x00000080)
0976 #define MPI_EVENT_SAS_EXP_DS_SMP_CRC_ERROR              (0x00000100)
0977 #define MPI_EVENT_SAS_EXP_DS_SUBTRACTIVE_LINK           (0x00000200)
0978 #define MPI_EVENT_SAS_EXP_DS_TABLE_LINK                 (0x00000400)
0979 #define MPI_EVENT_SAS_EXP_DS_UNSUPPORTED_DEVICE         (0x00000800)
0980 
0981 /* values for Flags field of SAS Expander Status Change Event data */
0982 #define MPI_EVENT_SAS_EXP_FLAGS_ROUTE_TABLE_CONFIG      (0x02)
0983 #define MPI_EVENT_SAS_EXP_FLAGS_CONFIG_IN_PROGRESS      (0x01)
0984 
0985 
0986 
0987 /*****************************************************************************
0988 *
0989 *               F i r m w a r e    L o a d    M e s s a g e s
0990 *
0991 *****************************************************************************/
0992 
0993 /****************************************************************************/
0994 /*  Firmware Download message and associated structures                     */
0995 /****************************************************************************/
0996 
0997 typedef struct _MSG_FW_DOWNLOAD
0998 {
0999     U8                      ImageType;                  /* 00h */
1000     U8                      Reserved;                   /* 01h */
1001     U8                      ChainOffset;                /* 02h */
1002     U8                      Function;                   /* 03h */
1003     U8                      Reserved1[3];               /* 04h */
1004     U8                      MsgFlags;                   /* 07h */
1005     U32                     MsgContext;                 /* 08h */
1006     SGE_MPI_UNION           SGL;                        /* 0Ch */
1007 } MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
1008   FWDownload_t, MPI_POINTER pFWDownload_t;
1009 
1010 #define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT    (0x01)
1011 
1012 #define MPI_FW_DOWNLOAD_ITYPE_RESERVED          (0x00)
1013 #define MPI_FW_DOWNLOAD_ITYPE_FW                (0x01)
1014 #define MPI_FW_DOWNLOAD_ITYPE_BIOS              (0x02)
1015 #define MPI_FW_DOWNLOAD_ITYPE_NVDATA            (0x03)
1016 #define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER        (0x04)
1017 #define MPI_FW_DOWNLOAD_ITYPE_MANUFACTURING     (0x06)
1018 #define MPI_FW_DOWNLOAD_ITYPE_CONFIG_1          (0x07)
1019 #define MPI_FW_DOWNLOAD_ITYPE_CONFIG_2          (0x08)
1020 #define MPI_FW_DOWNLOAD_ITYPE_MEGARAID          (0x09)
1021 #define MPI_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
1022 
1023 
1024 typedef struct _FWDownloadTCSGE
1025 {
1026     U8                      Reserved;                   /* 00h */
1027     U8                      ContextSize;                /* 01h */
1028     U8                      DetailsLength;              /* 02h */
1029     U8                      Flags;                      /* 03h */
1030     U32                     Reserved_0100_Checksum;     /* 04h */ /* obsolete Checksum */
1031     U32                     ImageOffset;                /* 08h */
1032     U32                     ImageSize;                  /* 0Ch */
1033 } FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE,
1034   FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t;
1035 
1036 /* Firmware Download reply */
1037 typedef struct _MSG_FW_DOWNLOAD_REPLY
1038 {
1039     U8                      ImageType;                  /* 00h */
1040     U8                      Reserved;                   /* 01h */
1041     U8                      MsgLength;                  /* 02h */
1042     U8                      Function;                   /* 03h */
1043     U8                      Reserved1[3];               /* 04h */
1044     U8                      MsgFlags;                   /* 07h */
1045     U32                     MsgContext;                 /* 08h */
1046     U16                     Reserved2;                  /* 0Ch */
1047     U16                     IOCStatus;                  /* 0Eh */
1048     U32                     IOCLogInfo;                 /* 10h */
1049 } MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY,
1050   FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t;
1051 
1052 
1053 /****************************************************************************/
1054 /*  Firmware Upload message and associated structures                       */
1055 /****************************************************************************/
1056 
1057 typedef struct _MSG_FW_UPLOAD
1058 {
1059     U8                      ImageType;                  /* 00h */
1060     U8                      Reserved;                   /* 01h */
1061     U8                      ChainOffset;                /* 02h */
1062     U8                      Function;                   /* 03h */
1063     U8                      Reserved1[3];               /* 04h */
1064     U8                      MsgFlags;                   /* 07h */
1065     U32                     MsgContext;                 /* 08h */
1066     SGE_MPI_UNION           SGL;                        /* 0Ch */
1067 } MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
1068   FWUpload_t, MPI_POINTER pFWUpload_t;
1069 
1070 #define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM          (0x00)
1071 #define MPI_FW_UPLOAD_ITYPE_FW_FLASH            (0x01)
1072 #define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH          (0x02)
1073 #define MPI_FW_UPLOAD_ITYPE_NVDATA              (0x03)
1074 #define MPI_FW_UPLOAD_ITYPE_BOOTLOADER          (0x04)
1075 #define MPI_FW_UPLOAD_ITYPE_FW_BACKUP           (0x05)
1076 #define MPI_FW_UPLOAD_ITYPE_MANUFACTURING       (0x06)
1077 #define MPI_FW_UPLOAD_ITYPE_CONFIG_1            (0x07)
1078 #define MPI_FW_UPLOAD_ITYPE_CONFIG_2            (0x08)
1079 #define MPI_FW_UPLOAD_ITYPE_MEGARAID            (0x09)
1080 #define MPI_FW_UPLOAD_ITYPE_COMPLETE            (0x0A)
1081 #define MPI_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK   (0x0B)
1082 
1083 typedef struct _FWUploadTCSGE
1084 {
1085     U8                      Reserved;                   /* 00h */
1086     U8                      ContextSize;                /* 01h */
1087     U8                      DetailsLength;              /* 02h */
1088     U8                      Flags;                      /* 03h */
1089     U32                     Reserved1;                  /* 04h */
1090     U32                     ImageOffset;                /* 08h */
1091     U32                     ImageSize;                  /* 0Ch */
1092 } FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE,
1093   FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t;
1094 
1095 /* Firmware Upload reply */
1096 typedef struct _MSG_FW_UPLOAD_REPLY
1097 {
1098     U8                      ImageType;                  /* 00h */
1099     U8                      Reserved;                   /* 01h */
1100     U8                      MsgLength;                  /* 02h */
1101     U8                      Function;                   /* 03h */
1102     U8                      Reserved1[3];               /* 04h */
1103     U8                      MsgFlags;                   /* 07h */
1104     U32                     MsgContext;                 /* 08h */
1105     U16                     Reserved2;                  /* 0Ch */
1106     U16                     IOCStatus;                  /* 0Eh */
1107     U32                     IOCLogInfo;                 /* 10h */
1108     U32                     ActualImageSize;            /* 14h */
1109 } MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY,
1110   FWUploadReply_t, MPI_POINTER pFWUploadReply_t;
1111 
1112 
1113 typedef struct _MPI_FW_HEADER
1114 {
1115     U32                     ArmBranchInstruction0;      /* 00h */
1116     U32                     Signature0;                 /* 04h */
1117     U32                     Signature1;                 /* 08h */
1118     U32                     Signature2;                 /* 0Ch */
1119     U32                     ArmBranchInstruction1;      /* 10h */
1120     U32                     ArmBranchInstruction2;      /* 14h */
1121     U32                     Reserved;                   /* 18h */
1122     U32                     Checksum;                   /* 1Ch */
1123     U16                     VendorId;                   /* 20h */
1124     U16                     ProductId;                  /* 22h */
1125     MPI_FW_VERSION          FWVersion;                  /* 24h */
1126     U32                     SeqCodeVersion;             /* 28h */
1127     U32                     ImageSize;                  /* 2Ch */
1128     U32                     NextImageHeaderOffset;      /* 30h */
1129     U32                     LoadStartAddress;           /* 34h */
1130     U32                     IopResetVectorValue;        /* 38h */
1131     U32                     IopResetRegAddr;            /* 3Ch */
1132     U32                     VersionNameWhat;            /* 40h */
1133     U8                      VersionName[32];            /* 44h */
1134     U32                     VendorNameWhat;             /* 64h */
1135     U8                      VendorName[32];             /* 68h */
1136 } MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER,
1137   MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t;
1138 
1139 #define MPI_FW_HEADER_WHAT_SIGNATURE        (0x29232840)
1140 
1141 /* defines for using the ProductId field */
1142 #define MPI_FW_HEADER_PID_TYPE_MASK             (0xF000)
1143 #define MPI_FW_HEADER_PID_TYPE_SCSI             (0x0000)
1144 #define MPI_FW_HEADER_PID_TYPE_FC               (0x1000)
1145 #define MPI_FW_HEADER_PID_TYPE_SAS              (0x2000)
1146 
1147 #define MPI_FW_HEADER_SIGNATURE_0               (0x5AEAA55A)
1148 #define MPI_FW_HEADER_SIGNATURE_1               (0xA55AEAA5)
1149 #define MPI_FW_HEADER_SIGNATURE_2               (0x5AA55AEA)
1150 
1151 #define MPI_FW_HEADER_PID_PROD_MASK                     (0x0F00)
1152 #define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI           (0x0100)
1153 #define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI    (0x0200)
1154 #define MPI_FW_HEADER_PID_PROD_TARGET_SCSI              (0x0300)
1155 #define MPI_FW_HEADER_PID_PROD_IM_SCSI                  (0x0400)
1156 #define MPI_FW_HEADER_PID_PROD_IS_SCSI                  (0x0500)
1157 #define MPI_FW_HEADER_PID_PROD_CTX_SCSI                 (0x0600)
1158 #define MPI_FW_HEADER_PID_PROD_IR_SCSI                  (0x0700)
1159 
1160 #define MPI_FW_HEADER_PID_FAMILY_MASK           (0x00FF)
1161 /* SCSI */
1162 #define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI    (0x0001)
1163 #define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI    (0x0002)
1164 #define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI    (0x0003)
1165 #define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI    (0x0004)
1166 #define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI    (0x0005)
1167 #define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI    (0x0006)
1168 #define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI    (0x0007)
1169 #define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI    (0x0008)
1170 #define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI    (0x0009)
1171 #define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI    (0x000A)
1172 #define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI   (0x000B)
1173 #define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI   (0x000C)
1174 /* Fibre Channel */
1175 #define MPI_FW_HEADER_PID_FAMILY_909_FC         (0x0000)
1176 #define MPI_FW_HEADER_PID_FAMILY_919_FC         (0x0001) /* 919 and 929     */
1177 #define MPI_FW_HEADER_PID_FAMILY_919X_FC        (0x0002) /* 919X and 929X   */
1178 #define MPI_FW_HEADER_PID_FAMILY_919XL_FC       (0x0003) /* 919XL and 929XL */
1179 #define MPI_FW_HEADER_PID_FAMILY_939X_FC        (0x0004) /* 939X and 949X   */
1180 #define MPI_FW_HEADER_PID_FAMILY_959_FC         (0x0005)
1181 #define MPI_FW_HEADER_PID_FAMILY_949E_FC        (0x0006)
1182 /* SAS */
1183 #define MPI_FW_HEADER_PID_FAMILY_1064_SAS       (0x0001)
1184 #define MPI_FW_HEADER_PID_FAMILY_1068_SAS       (0x0002)
1185 #define MPI_FW_HEADER_PID_FAMILY_1078_SAS       (0x0003)
1186 #define MPI_FW_HEADER_PID_FAMILY_106xE_SAS      (0x0004) /* 1068E, 1066E, and 1064E */
1187 
1188 typedef struct _MPI_EXT_IMAGE_HEADER
1189 {
1190     U8                      ImageType;                  /* 00h */
1191     U8                      Reserved;                   /* 01h */
1192     U16                     Reserved1;                  /* 02h */
1193     U32                     Checksum;                   /* 04h */
1194     U32                     ImageSize;                  /* 08h */
1195     U32                     NextImageHeaderOffset;      /* 0Ch */
1196     U32                     LoadStartAddress;           /* 10h */
1197     U32                     Reserved2;                  /* 14h */
1198 } MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
1199   MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
1200 
1201 /* defines for the ImageType field */
1202 #define MPI_EXT_IMAGE_TYPE_UNSPECIFIED          (0x00)
1203 #define MPI_EXT_IMAGE_TYPE_FW                   (0x01)
1204 #define MPI_EXT_IMAGE_TYPE_NVDATA               (0x03)
1205 #define MPI_EXT_IMAGE_TYPE_BOOTLOADER           (0x04)
1206 #define MPI_EXT_IMAGE_TYPE_INITIALIZATION       (0x05)
1207 
1208 #endif
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