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0063 #ifndef MPI_INIT_H
0064 #define MPI_INIT_H
0065
0066
0067
0068
0069
0070
0071
0072
0073
0074
0075
0076
0077 typedef struct _MSG_SCSI_IO_REQUEST
0078 {
0079 U8 TargetID;
0080 U8 Bus;
0081 U8 ChainOffset;
0082 U8 Function;
0083 U8 CDBLength;
0084 U8 SenseBufferLength;
0085 U8 Reserved;
0086 U8 MsgFlags;
0087 U32 MsgContext;
0088 U8 LUN[8];
0089 U32 Control;
0090 U8 CDB[16];
0091 U32 DataLength;
0092 U32 SenseBufferLowAddr;
0093 SGE_IO_UNION SGL;
0094 } MSG_SCSI_IO_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_REQUEST,
0095 SCSIIORequest_t, MPI_POINTER pSCSIIORequest_t;
0096
0097
0098
0099
0100 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH (0x01)
0101 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32 (0x00)
0102 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 (0x01)
0103
0104 #define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION (0x02)
0105 #define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST (0x00)
0106 #define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC (0x02)
0107
0108 #define MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04)
0109
0110
0111
0112 #define MPI_SCSIIO_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
0113 #define MPI_SCSIIO_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
0114 #define MPI_SCSIIO_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
0115 #define MPI_SCSIIO_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
0116 #define MPI_SCSIIO_LUN_LEVEL_1_WORD (0xFF00)
0117 #define MPI_SCSIIO_LUN_LEVEL_1_DWORD (0x0000FF00)
0118
0119
0120
0121 #define MPI_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000)
0122 #define MPI_SCSIIO_CONTROL_NODATATRANSFER (0x00000000)
0123 #define MPI_SCSIIO_CONTROL_WRITE (0x01000000)
0124 #define MPI_SCSIIO_CONTROL_READ (0x02000000)
0125
0126 #define MPI_SCSIIO_CONTROL_ADDCDBLEN_MASK (0x3C000000)
0127 #define MPI_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26)
0128
0129 #define MPI_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
0130 #define MPI_SCSIIO_CONTROL_SIMPLEQ (0x00000000)
0131 #define MPI_SCSIIO_CONTROL_HEADOFQ (0x00000100)
0132 #define MPI_SCSIIO_CONTROL_ORDEREDQ (0x00000200)
0133 #define MPI_SCSIIO_CONTROL_ACAQ (0x00000400)
0134 #define MPI_SCSIIO_CONTROL_UNTAGGED (0x00000500)
0135 #define MPI_SCSIIO_CONTROL_NO_DISCONNECT (0x00000700)
0136
0137 #define MPI_SCSIIO_CONTROL_TASKMANAGE_MASK (0x00FF0000)
0138 #define MPI_SCSIIO_CONTROL_OBSOLETE (0x00800000)
0139 #define MPI_SCSIIO_CONTROL_CLEAR_ACA_RSV (0x00400000)
0140 #define MPI_SCSIIO_CONTROL_TARGET_RESET (0x00200000)
0141 #define MPI_SCSIIO_CONTROL_LUN_RESET_RSV (0x00100000)
0142 #define MPI_SCSIIO_CONTROL_RESERVED (0x00080000)
0143 #define MPI_SCSIIO_CONTROL_CLR_TASK_SET_RSV (0x00040000)
0144 #define MPI_SCSIIO_CONTROL_ABORT_TASK_SET (0x00020000)
0145 #define MPI_SCSIIO_CONTROL_RESERVED2 (0x00010000)
0146
0147
0148
0149 typedef struct _MSG_SCSI_IO_REPLY
0150 {
0151 U8 TargetID;
0152 U8 Bus;
0153 U8 MsgLength;
0154 U8 Function;
0155 U8 CDBLength;
0156 U8 SenseBufferLength;
0157 U8 Reserved;
0158 U8 MsgFlags;
0159 U32 MsgContext;
0160 U8 SCSIStatus;
0161 U8 SCSIState;
0162 U16 IOCStatus;
0163 U32 IOCLogInfo;
0164 U32 TransferCount;
0165 U32 SenseCount;
0166 U32 ResponseInfo;
0167 U16 TaskTag;
0168 U16 Reserved1;
0169 } MSG_SCSI_IO_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_REPLY,
0170 SCSIIOReply_t, MPI_POINTER pSCSIIOReply_t;
0171
0172
0173
0174
0175 #define MPI_SCSI_STATUS_SUCCESS (0x00)
0176 #define MPI_SCSI_STATUS_CHECK_CONDITION (0x02)
0177 #define MPI_SCSI_STATUS_CONDITION_MET (0x04)
0178 #define MPI_SCSI_STATUS_BUSY (0x08)
0179 #define MPI_SCSI_STATUS_INTERMEDIATE (0x10)
0180 #define MPI_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14)
0181 #define MPI_SCSI_STATUS_RESERVATION_CONFLICT (0x18)
0182 #define MPI_SCSI_STATUS_COMMAND_TERMINATED (0x22)
0183 #define MPI_SCSI_STATUS_TASK_SET_FULL (0x28)
0184 #define MPI_SCSI_STATUS_ACA_ACTIVE (0x30)
0185
0186 #define MPI_SCSI_STATUS_FCPEXT_DEVICE_LOGGED_OUT (0x80)
0187 #define MPI_SCSI_STATUS_FCPEXT_NO_LINK (0x81)
0188 #define MPI_SCSI_STATUS_FCPEXT_UNASSIGNED (0x82)
0189
0190
0191
0192
0193 #define MPI_SCSI_STATE_AUTOSENSE_VALID (0x01)
0194 #define MPI_SCSI_STATE_AUTOSENSE_FAILED (0x02)
0195 #define MPI_SCSI_STATE_NO_SCSI_STATUS (0x04)
0196 #define MPI_SCSI_STATE_TERMINATED (0x08)
0197 #define MPI_SCSI_STATE_RESPONSE_INFO_VALID (0x10)
0198 #define MPI_SCSI_STATE_QUEUE_TAG_REJECTED (0x20)
0199
0200
0201
0202
0203 #define MPI_SCSI_RSP_INFO_FUNCTION_COMPLETE (0x00000000)
0204 #define MPI_SCSI_RSP_INFO_FCP_BURST_LEN_ERROR (0x01000000)
0205 #define MPI_SCSI_RSP_INFO_CMND_FIELDS_INVALID (0x02000000)
0206 #define MPI_SCSI_RSP_INFO_FCP_DATA_RO_ERROR (0x03000000)
0207 #define MPI_SCSI_RSP_INFO_TASK_MGMT_UNSUPPORTED (0x04000000)
0208 #define MPI_SCSI_RSP_INFO_TASK_MGMT_FAILED (0x05000000)
0209 #define MPI_SCSI_RSP_INFO_SPI_LQ_INVALID_TYPE (0x06000000)
0210
0211 #define MPI_SCSI_TASKTAG_UNKNOWN (0xFFFF)
0212
0213
0214
0215
0216
0217
0218 typedef struct
0219 {
0220 U8 CDB[20];
0221 U32 PrimaryReferenceTag;
0222 U16 PrimaryApplicationTag;
0223 U16 PrimaryApplicationTagMask;
0224 U32 TransferLength;
0225 } MPI_SCSI_IO32_CDB_EEDP32, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP32,
0226 MpiScsiIo32CdbEedp32_t, MPI_POINTER pMpiScsiIo32CdbEedp32_t;
0227
0228 typedef struct
0229 {
0230 U8 CDB[16];
0231 U32 DataLength;
0232 U32 PrimaryReferenceTag;
0233 U16 PrimaryApplicationTag;
0234 U16 PrimaryApplicationTagMask;
0235 U32 TransferLength;
0236 } MPI_SCSI_IO32_CDB_EEDP16, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP16,
0237 MpiScsiIo32CdbEedp16_t, MPI_POINTER pMpiScsiIo32CdbEedp16_t;
0238
0239 typedef union
0240 {
0241 U8 CDB32[32];
0242 MPI_SCSI_IO32_CDB_EEDP32 EEDP32;
0243 MPI_SCSI_IO32_CDB_EEDP16 EEDP16;
0244 SGE_SIMPLE_UNION SGE;
0245 } MPI_SCSI_IO32_CDB_UNION, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_UNION,
0246 MpiScsiIo32Cdb_t, MPI_POINTER pMpiScsiIo32Cdb_t;
0247
0248 typedef struct
0249 {
0250 U8 TargetID;
0251 U8 Bus;
0252 U16 Reserved1;
0253 U32 Reserved2;
0254 } MPI_SCSI_IO32_BUS_TARGET_ID_FORM, MPI_POINTER PTR_MPI_SCSI_IO32_BUS_TARGET_ID_FORM,
0255 MpiScsiIo32BusTargetIdForm_t, MPI_POINTER pMpiScsiIo32BusTargetIdForm_t;
0256
0257 typedef union
0258 {
0259 MPI_SCSI_IO32_BUS_TARGET_ID_FORM SCSIID;
0260 U64 WWID;
0261 } MPI_SCSI_IO32_ADDRESS, MPI_POINTER PTR_MPI_SCSI_IO32_ADDRESS,
0262 MpiScsiIo32Address_t, MPI_POINTER pMpiScsiIo32Address_t;
0263
0264 typedef struct _MSG_SCSI_IO32_REQUEST
0265 {
0266 U8 Port;
0267 U8 Reserved1;
0268 U8 ChainOffset;
0269 U8 Function;
0270 U8 CDBLength;
0271 U8 SenseBufferLength;
0272 U8 Flags;
0273 U8 MsgFlags;
0274 U32 MsgContext;
0275 U8 LUN[8];
0276 U32 Control;
0277 MPI_SCSI_IO32_CDB_UNION CDB;
0278 U32 DataLength;
0279 U32 BidirectionalDataLength;
0280 U32 SecondaryReferenceTag;
0281 U16 SecondaryApplicationTag;
0282 U16 Reserved2;
0283 U16 EEDPFlags;
0284 U16 ApplicationTagTranslationMask;
0285 U32 EEDPBlockSize;
0286 MPI_SCSI_IO32_ADDRESS DeviceAddress;
0287 U8 SGLOffset0;
0288 U8 SGLOffset1;
0289 U8 SGLOffset2;
0290 U8 SGLOffset3;
0291 U32 Reserved3;
0292 U32 Reserved4;
0293 U32 SenseBufferLowAddr;
0294 SGE_IO_UNION SGL;
0295 } MSG_SCSI_IO32_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO32_REQUEST,
0296 SCSIIO32Request_t, MPI_POINTER pSCSIIO32Request_t;
0297
0298
0299 #define MPI_SCSIIO32_MSGFLGS_SENSE_WIDTH (0x01)
0300 #define MPI_SCSIIO32_MSGFLGS_32_SENSE_WIDTH (0x00)
0301 #define MPI_SCSIIO32_MSGFLGS_64_SENSE_WIDTH (0x01)
0302
0303 #define MPI_SCSIIO32_MSGFLGS_SENSE_LOCATION (0x02)
0304 #define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_HOST (0x00)
0305 #define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_IOC (0x02)
0306
0307 #define MPI_SCSIIO32_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04)
0308 #define MPI_SCSIIO32_MSGFLGS_SGL_OFFSETS_CHAINS (0x08)
0309 #define MPI_SCSIIO32_MSGFLGS_MULTICAST (0x10)
0310 #define MPI_SCSIIO32_MSGFLGS_BIDIRECTIONAL (0x20)
0311 #define MPI_SCSIIO32_MSGFLGS_LARGE_CDB (0x40)
0312
0313
0314 #define MPI_SCSIIO32_FLAGS_FORM_MASK (0x03)
0315 #define MPI_SCSIIO32_FLAGS_FORM_SCSIID (0x00)
0316 #define MPI_SCSIIO32_FLAGS_FORM_WWID (0x01)
0317
0318
0319 #define MPI_SCSIIO32_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
0320 #define MPI_SCSIIO32_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
0321 #define MPI_SCSIIO32_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
0322 #define MPI_SCSIIO32_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
0323 #define MPI_SCSIIO32_LUN_LEVEL_1_WORD (0xFF00)
0324 #define MPI_SCSIIO32_LUN_LEVEL_1_DWORD (0x0000FF00)
0325
0326
0327 #define MPI_SCSIIO32_CONTROL_DATADIRECTION_MASK (0x03000000)
0328 #define MPI_SCSIIO32_CONTROL_NODATATRANSFER (0x00000000)
0329 #define MPI_SCSIIO32_CONTROL_WRITE (0x01000000)
0330 #define MPI_SCSIIO32_CONTROL_READ (0x02000000)
0331 #define MPI_SCSIIO32_CONTROL_BIDIRECTIONAL (0x03000000)
0332
0333 #define MPI_SCSIIO32_CONTROL_ADDCDBLEN_MASK (0xFC000000)
0334 #define MPI_SCSIIO32_CONTROL_ADDCDBLEN_SHIFT (26)
0335
0336 #define MPI_SCSIIO32_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
0337 #define MPI_SCSIIO32_CONTROL_SIMPLEQ (0x00000000)
0338 #define MPI_SCSIIO32_CONTROL_HEADOFQ (0x00000100)
0339 #define MPI_SCSIIO32_CONTROL_ORDEREDQ (0x00000200)
0340 #define MPI_SCSIIO32_CONTROL_ACAQ (0x00000400)
0341 #define MPI_SCSIIO32_CONTROL_UNTAGGED (0x00000500)
0342 #define MPI_SCSIIO32_CONTROL_NO_DISCONNECT (0x00000700)
0343
0344 #define MPI_SCSIIO32_CONTROL_TASKMANAGE_MASK (0x00FF0000)
0345 #define MPI_SCSIIO32_CONTROL_OBSOLETE (0x00800000)
0346 #define MPI_SCSIIO32_CONTROL_CLEAR_ACA_RSV (0x00400000)
0347 #define MPI_SCSIIO32_CONTROL_TARGET_RESET (0x00200000)
0348 #define MPI_SCSIIO32_CONTROL_LUN_RESET_RSV (0x00100000)
0349 #define MPI_SCSIIO32_CONTROL_RESERVED (0x00080000)
0350 #define MPI_SCSIIO32_CONTROL_CLR_TASK_SET_RSV (0x00040000)
0351 #define MPI_SCSIIO32_CONTROL_ABORT_TASK_SET (0x00020000)
0352 #define MPI_SCSIIO32_CONTROL_RESERVED2 (0x00010000)
0353
0354
0355 #define MPI_SCSIIO32_EEDPFLAGS_MASK_OP (0x0007)
0356 #define MPI_SCSIIO32_EEDPFLAGS_NOOP_OP (0x0000)
0357 #define MPI_SCSIIO32_EEDPFLAGS_CHK_OP (0x0001)
0358 #define MPI_SCSIIO32_EEDPFLAGS_STRIP_OP (0x0002)
0359 #define MPI_SCSIIO32_EEDPFLAGS_CHKRM_OP (0x0003)
0360 #define MPI_SCSIIO32_EEDPFLAGS_INSERT_OP (0x0004)
0361 #define MPI_SCSIIO32_EEDPFLAGS_REPLACE_OP (0x0006)
0362 #define MPI_SCSIIO32_EEDPFLAGS_CHKREGEN_OP (0x0007)
0363
0364 #define MPI_SCSIIO32_EEDPFLAGS_PASS_REF_TAG (0x0008)
0365 #define MPI_SCSIIO32_EEDPFLAGS_8_9THS_MODE (0x0010)
0366
0367 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_MASK (0x0700)
0368 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_GUARD (0x0100)
0369 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_REFTAG (0x0200)
0370 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_LBATAG (0x0400)
0371 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_SHIFT (8)
0372
0373 #define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
0374 #define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
0375 #define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
0376 #define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
0377
0378
0379
0380 typedef struct _MSG_SCSIIO32_IO_REPLY
0381 {
0382 U8 Port;
0383 U8 Reserved1;
0384 U8 MsgLength;
0385 U8 Function;
0386 U8 CDBLength;
0387 U8 SenseBufferLength;
0388 U8 Flags;
0389 U8 MsgFlags;
0390 U32 MsgContext;
0391 U8 SCSIStatus;
0392 U8 SCSIState;
0393 U16 IOCStatus;
0394 U32 IOCLogInfo;
0395 U32 TransferCount;
0396 U32 SenseCount;
0397 U32 ResponseInfo;
0398 U16 TaskTag;
0399 U16 Reserved2;
0400 U32 BidirectionalTransferCount;
0401 } MSG_SCSIIO32_IO_REPLY, MPI_POINTER PTR_MSG_SCSIIO32_IO_REPLY,
0402 SCSIIO32Reply_t, MPI_POINTER pSCSIIO32Reply_t;
0403
0404
0405
0406
0407
0408
0409 typedef struct _MSG_SCSI_TASK_MGMT
0410 {
0411 U8 TargetID;
0412 U8 Bus;
0413 U8 ChainOffset;
0414 U8 Function;
0415 U8 Reserved;
0416 U8 TaskType;
0417 U8 Reserved1;
0418 U8 MsgFlags;
0419 U32 MsgContext;
0420 U8 LUN[8];
0421 U32 Reserved2[7];
0422 U32 TaskMsgContext;
0423 } MSG_SCSI_TASK_MGMT, MPI_POINTER PTR_SCSI_TASK_MGMT,
0424 SCSITaskMgmt_t, MPI_POINTER pSCSITaskMgmt_t;
0425
0426
0427
0428 #define MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
0429 #define MPI_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02)
0430 #define MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
0431 #define MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS (0x04)
0432 #define MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
0433 #define MPI_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
0434 #define MPI_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
0435 #define MPI_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08)
0436
0437
0438 #define MPI_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01)
0439
0440 #define MPI_SCSITASKMGMT_MSGFLAGS_TARGET_RESET_OPTION (0x00)
0441 #define MPI_SCSITASKMGMT_MSGFLAGS_LIP_RESET_OPTION (0x02)
0442 #define MPI_SCSITASKMGMT_MSGFLAGS_LIPRESET_RESET_OPTION (0x04)
0443
0444 #define MPI_SCSITASKMGMT_MSGFLAGS_SOFT_RESET_OPTION (0x08)
0445
0446
0447 typedef struct _MSG_SCSI_TASK_MGMT_REPLY
0448 {
0449 U8 TargetID;
0450 U8 Bus;
0451 U8 MsgLength;
0452 U8 Function;
0453 U8 ResponseCode;
0454 U8 TaskType;
0455 U8 Reserved1;
0456 U8 MsgFlags;
0457 U32 MsgContext;
0458 U8 Reserved2[2];
0459 U16 IOCStatus;
0460 U32 IOCLogInfo;
0461 U32 TerminationCount;
0462 } MSG_SCSI_TASK_MGMT_REPLY, MPI_POINTER PTR_MSG_SCSI_TASK_MGMT_REPLY,
0463 SCSITaskMgmtReply_t, MPI_POINTER pSCSITaskMgmtReply_t;
0464
0465
0466 #define MPI_SCSITASKMGMT_RSP_TM_COMPLETE (0x00)
0467 #define MPI_SCSITASKMGMT_RSP_INVALID_FRAME (0x02)
0468 #define MPI_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04)
0469 #define MPI_SCSITASKMGMT_RSP_TM_FAILED (0x05)
0470 #define MPI_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08)
0471 #define MPI_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09)
0472 #define MPI_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80)
0473
0474
0475
0476
0477
0478
0479 typedef struct _MSG_SEP_REQUEST
0480 {
0481 U8 TargetID;
0482 U8 Bus;
0483 U8 ChainOffset;
0484 U8 Function;
0485 U8 Action;
0486 U8 Flags;
0487 U8 Reserved1;
0488 U8 MsgFlags;
0489 U32 MsgContext;
0490 U32 SlotStatus;
0491 U32 Reserved2;
0492 U32 Reserved3;
0493 U32 Reserved4;
0494 U16 Slot;
0495 U16 EnclosureHandle;
0496 } MSG_SEP_REQUEST, MPI_POINTER PTR_MSG_SEP_REQUEST,
0497 SEPRequest_t, MPI_POINTER pSEPRequest_t;
0498
0499
0500 #define MPI_SEP_REQ_ACTION_WRITE_STATUS (0x00)
0501 #define MPI_SEP_REQ_ACTION_READ_STATUS (0x01)
0502
0503
0504 #define MPI_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
0505 #define MPI_SEP_REQ_FLAGS_BUS_TARGETID_ADDRESS (0x00)
0506
0507
0508 #define MPI_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
0509 #define MPI_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
0510 #define MPI_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004)
0511 #define MPI_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
0512 #define MPI_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
0513 #define MPI_SEP_REQ_SLOTSTATUS_PARITY_CHECK (0x00000020)
0514 #define MPI_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
0515 #define MPI_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
0516 #define MPI_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
0517 #define MPI_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
0518 #define MPI_SEP_REQ_SLOTSTATUS_REQ_CONSISTENCY_CHECK (0x00001000)
0519 #define MPI_SEP_REQ_SLOTSTATUS_DISABLE (0x00002000)
0520 #define MPI_SEP_REQ_SLOTSTATUS_REQ_RESERVED_DEVICE (0x00004000)
0521 #define MPI_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
0522 #define MPI_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
0523 #define MPI_SEP_REQ_SLOTSTATUS_REQUEST_INSERT (0x00080000)
0524 #define MPI_SEP_REQ_SLOTSTATUS_DO_NOT_MOVE (0x00400000)
0525 #define MPI_SEP_REQ_SLOTSTATUS_ACTIVE (0x00800000)
0526 #define MPI_SEP_REQ_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000)
0527 #define MPI_SEP_REQ_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000)
0528 #define MPI_SEP_REQ_SLOTSTATUS_DEV_OFF (0x10000000)
0529 #define MPI_SEP_REQ_SLOTSTATUS_SWAP_RESET (0x80000000)
0530
0531
0532 typedef struct _MSG_SEP_REPLY
0533 {
0534 U8 TargetID;
0535 U8 Bus;
0536 U8 MsgLength;
0537 U8 Function;
0538 U8 Action;
0539 U8 Reserved1;
0540 U8 Reserved2;
0541 U8 MsgFlags;
0542 U32 MsgContext;
0543 U16 Reserved3;
0544 U16 IOCStatus;
0545 U32 IOCLogInfo;
0546 U32 SlotStatus;
0547 U32 Reserved4;
0548 U16 Slot;
0549 U16 EnclosureHandle;
0550 } MSG_SEP_REPLY, MPI_POINTER PTR_MSG_SEP_REPLY,
0551 SEPReply_t, MPI_POINTER pSEPReply_t;
0552
0553
0554 #define MPI_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001)
0555 #define MPI_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002)
0556 #define MPI_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004)
0557 #define MPI_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
0558 #define MPI_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
0559 #define MPI_SEP_REPLY_SLOTSTATUS_PARITY_CHECK (0x00000020)
0560 #define MPI_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
0561 #define MPI_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
0562 #define MPI_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
0563 #define MPI_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
0564 #define MPI_SEP_REPLY_SLOTSTATUS_CONSISTENCY_CHECK (0x00001000)
0565 #define MPI_SEP_REPLY_SLOTSTATUS_DISABLE (0x00002000)
0566 #define MPI_SEP_REPLY_SLOTSTATUS_RESERVED_DEVICE (0x00004000)
0567 #define MPI_SEP_REPLY_SLOTSTATUS_REPORT (0x00010000)
0568 #define MPI_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
0569 #define MPI_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
0570 #define MPI_SEP_REPLY_SLOTSTATUS_INSERT_READY (0x00080000)
0571 #define MPI_SEP_REPLY_SLOTSTATUS_DO_NOT_REMOVE (0x00400000)
0572 #define MPI_SEP_REPLY_SLOTSTATUS_ACTIVE (0x00800000)
0573 #define MPI_SEP_REPLY_SLOTSTATUS_B_BYPASS_ENABLED (0x01000000)
0574 #define MPI_SEP_REPLY_SLOTSTATUS_A_BYPASS_ENABLED (0x02000000)
0575 #define MPI_SEP_REPLY_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000)
0576 #define MPI_SEP_REPLY_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000)
0577 #define MPI_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x10000000)
0578 #define MPI_SEP_REPLY_SLOTSTATUS_FAULT_SENSED (0x40000000)
0579 #define MPI_SEP_REPLY_SLOTSTATUS_SWAPPED (0x80000000)
0580
0581 #endif