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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /* Realtek PCI-Express Memstick Card Interface driver
0003  *
0004  * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
0005  *
0006  * Author:
0007  *   Wei WANG <wei_wang@realsil.com.cn>
0008  */
0009 
0010 #include <linux/module.h>
0011 #include <linux/highmem.h>
0012 #include <linux/delay.h>
0013 #include <linux/platform_device.h>
0014 #include <linux/memstick.h>
0015 #include <linux/rtsx_pci.h>
0016 #include <asm/unaligned.h>
0017 
0018 struct realtek_pci_ms {
0019     struct platform_device  *pdev;
0020     struct rtsx_pcr     *pcr;
0021     struct memstick_host    *msh;
0022     struct memstick_request *req;
0023 
0024     struct mutex        host_mutex;
0025     struct work_struct  handle_req;
0026 
0027     u8          ssc_depth;
0028     unsigned int        clock;
0029     unsigned char           ifmode;
0030     bool            eject;
0031 };
0032 
0033 static inline struct device *ms_dev(struct realtek_pci_ms *host)
0034 {
0035     return &(host->pdev->dev);
0036 }
0037 
0038 static inline void ms_clear_error(struct realtek_pci_ms *host)
0039 {
0040     rtsx_pci_write_register(host->pcr, CARD_STOP,
0041             MS_STOP | MS_CLR_ERR, MS_STOP | MS_CLR_ERR);
0042 }
0043 
0044 #ifdef DEBUG
0045 
0046 static void ms_print_debug_regs(struct realtek_pci_ms *host)
0047 {
0048     struct rtsx_pcr *pcr = host->pcr;
0049     u16 i;
0050     u8 *ptr;
0051 
0052     /* Print MS host internal registers */
0053     rtsx_pci_init_cmd(pcr);
0054     for (i = 0xFD40; i <= 0xFD44; i++)
0055         rtsx_pci_add_cmd(pcr, READ_REG_CMD, i, 0, 0);
0056     for (i = 0xFD52; i <= 0xFD69; i++)
0057         rtsx_pci_add_cmd(pcr, READ_REG_CMD, i, 0, 0);
0058     rtsx_pci_send_cmd(pcr, 100);
0059 
0060     ptr = rtsx_pci_get_cmd_data(pcr);
0061     for (i = 0xFD40; i <= 0xFD44; i++)
0062         dev_dbg(ms_dev(host), "0x%04X: 0x%02x\n", i, *(ptr++));
0063     for (i = 0xFD52; i <= 0xFD69; i++)
0064         dev_dbg(ms_dev(host), "0x%04X: 0x%02x\n", i, *(ptr++));
0065 }
0066 
0067 #else
0068 
0069 #define ms_print_debug_regs(host)
0070 
0071 #endif
0072 
0073 static int ms_power_on(struct realtek_pci_ms *host)
0074 {
0075     struct rtsx_pcr *pcr = host->pcr;
0076     int err;
0077 
0078     rtsx_pci_init_cmd(pcr);
0079     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_SELECT, 0x07, MS_MOD_SEL);
0080     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_SHARE_MODE,
0081             CARD_SHARE_MASK, CARD_SHARE_48_MS);
0082     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN,
0083             MS_CLK_EN, MS_CLK_EN);
0084     err = rtsx_pci_send_cmd(pcr, 100);
0085     if (err < 0)
0086         return err;
0087 
0088     err = rtsx_pci_card_pull_ctl_enable(pcr, RTSX_MS_CARD);
0089     if (err < 0)
0090         return err;
0091 
0092     err = rtsx_pci_card_power_on(pcr, RTSX_MS_CARD);
0093     if (err < 0)
0094         return err;
0095 
0096     /* Wait ms power stable */
0097     msleep(150);
0098 
0099     err = rtsx_pci_write_register(pcr, CARD_OE,
0100             MS_OUTPUT_EN, MS_OUTPUT_EN);
0101     if (err < 0)
0102         return err;
0103 
0104     return 0;
0105 }
0106 
0107 static int ms_power_off(struct realtek_pci_ms *host)
0108 {
0109     struct rtsx_pcr *pcr = host->pcr;
0110     int err;
0111 
0112     rtsx_pci_init_cmd(pcr);
0113 
0114     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, MS_CLK_EN, 0);
0115     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_OE, MS_OUTPUT_EN, 0);
0116 
0117     err = rtsx_pci_send_cmd(pcr, 100);
0118     if (err < 0)
0119         return err;
0120 
0121     err = rtsx_pci_card_power_off(pcr, RTSX_MS_CARD);
0122     if (err < 0)
0123         return err;
0124 
0125     return rtsx_pci_card_pull_ctl_disable(pcr, RTSX_MS_CARD);
0126 }
0127 
0128 static int ms_transfer_data(struct realtek_pci_ms *host, unsigned char data_dir,
0129         u8 tpc, u8 cfg, struct scatterlist *sg)
0130 {
0131     struct rtsx_pcr *pcr = host->pcr;
0132     int err;
0133     unsigned int length = sg->length;
0134     u16 sec_cnt = (u16)(length / 512);
0135     u8 val, trans_mode, dma_dir;
0136     struct memstick_dev *card = host->msh->card;
0137     bool pro_card = card->id.type == MEMSTICK_TYPE_PRO;
0138 
0139     dev_dbg(ms_dev(host), "%s: tpc = 0x%02x, data_dir = %s, length = %d\n",
0140             __func__, tpc, (data_dir == READ) ? "READ" : "WRITE",
0141             length);
0142 
0143     if (data_dir == READ) {
0144         dma_dir = DMA_DIR_FROM_CARD;
0145         trans_mode = pro_card ? MS_TM_AUTO_READ : MS_TM_NORMAL_READ;
0146     } else {
0147         dma_dir = DMA_DIR_TO_CARD;
0148         trans_mode = pro_card ? MS_TM_AUTO_WRITE : MS_TM_NORMAL_WRITE;
0149     }
0150 
0151     rtsx_pci_init_cmd(pcr);
0152 
0153     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
0154     if (pro_card) {
0155         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_SECTOR_CNT_H,
0156                 0xFF, (u8)(sec_cnt >> 8));
0157         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_SECTOR_CNT_L,
0158                 0xFF, (u8)sec_cnt);
0159     }
0160     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
0161 
0162     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0,
0163             DMA_DONE_INT, DMA_DONE_INT);
0164     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC3, 0xFF, (u8)(length >> 24));
0165     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC2, 0xFF, (u8)(length >> 16));
0166     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC1, 0xFF, (u8)(length >> 8));
0167     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC0, 0xFF, (u8)length);
0168     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMACTL,
0169             0x03 | DMA_PACK_SIZE_MASK, dma_dir | DMA_EN | DMA_512);
0170     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE,
0171             0x01, RING_BUFFER);
0172 
0173     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TRANSFER,
0174             0xFF, MS_TRANSFER_START | trans_mode);
0175     rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, MS_TRANSFER,
0176             MS_TRANSFER_END, MS_TRANSFER_END);
0177 
0178     rtsx_pci_send_cmd_no_wait(pcr);
0179 
0180     err = rtsx_pci_transfer_data(pcr, sg, 1, data_dir == READ, 10000);
0181     if (err < 0) {
0182         ms_clear_error(host);
0183         return err;
0184     }
0185 
0186     rtsx_pci_read_register(pcr, MS_TRANS_CFG, &val);
0187     if (pro_card) {
0188         if (val & (MS_INT_CMDNK | MS_INT_ERR |
0189                 MS_CRC16_ERR | MS_RDY_TIMEOUT))
0190             return -EIO;
0191     } else {
0192         if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT))
0193             return -EIO;
0194     }
0195 
0196     return 0;
0197 }
0198 
0199 static int ms_write_bytes(struct realtek_pci_ms *host, u8 tpc,
0200         u8 cfg, u8 cnt, u8 *data, u8 *int_reg)
0201 {
0202     struct rtsx_pcr *pcr = host->pcr;
0203     int err, i;
0204 
0205     dev_dbg(ms_dev(host), "%s: tpc = 0x%02x\n", __func__, tpc);
0206 
0207     if (!data)
0208         return -EINVAL;
0209 
0210     rtsx_pci_init_cmd(pcr);
0211 
0212     for (i = 0; i < cnt; i++)
0213         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,
0214                 PPBUF_BASE2 + i, 0xFF, data[i]);
0215     if (cnt % 2)
0216         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,
0217                 PPBUF_BASE2 + i, 0xFF, 0xFF);
0218 
0219     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
0220     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
0221     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
0222     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE,
0223             0x01, PINGPONG_BUFFER);
0224 
0225     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TRANSFER,
0226             0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES);
0227     rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, MS_TRANSFER,
0228             MS_TRANSFER_END, MS_TRANSFER_END);
0229     if (int_reg)
0230         rtsx_pci_add_cmd(pcr, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
0231 
0232     err = rtsx_pci_send_cmd(pcr, 5000);
0233     if (err < 0) {
0234         u8 val;
0235 
0236         rtsx_pci_read_register(pcr, MS_TRANS_CFG, &val);
0237         dev_dbg(ms_dev(host), "MS_TRANS_CFG: 0x%02x\n", val);
0238 
0239         if (int_reg)
0240             *int_reg = val & 0x0F;
0241 
0242         ms_print_debug_regs(host);
0243 
0244         ms_clear_error(host);
0245 
0246         if (!(tpc & 0x08)) {
0247             if (val & MS_CRC16_ERR)
0248                 return -EIO;
0249         } else {
0250             if (!(val & 0x80)) {
0251                 if (val & (MS_INT_ERR | MS_INT_CMDNK))
0252                     return -EIO;
0253             }
0254         }
0255 
0256         return -ETIMEDOUT;
0257     }
0258 
0259     if (int_reg) {
0260         u8 *ptr = rtsx_pci_get_cmd_data(pcr) + 1;
0261         *int_reg = *ptr & 0x0F;
0262     }
0263 
0264     return 0;
0265 }
0266 
0267 static int ms_read_bytes(struct realtek_pci_ms *host, u8 tpc,
0268         u8 cfg, u8 cnt, u8 *data, u8 *int_reg)
0269 {
0270     struct rtsx_pcr *pcr = host->pcr;
0271     int err, i;
0272     u8 *ptr;
0273 
0274     dev_dbg(ms_dev(host), "%s: tpc = 0x%02x\n", __func__, tpc);
0275 
0276     if (!data)
0277         return -EINVAL;
0278 
0279     rtsx_pci_init_cmd(pcr);
0280 
0281     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
0282     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
0283     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
0284     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE,
0285             0x01, PINGPONG_BUFFER);
0286 
0287     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TRANSFER,
0288             0xFF, MS_TRANSFER_START | MS_TM_READ_BYTES);
0289     rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, MS_TRANSFER,
0290             MS_TRANSFER_END, MS_TRANSFER_END);
0291     for (i = 0; i < cnt - 1; i++)
0292         rtsx_pci_add_cmd(pcr, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0);
0293     if (cnt % 2)
0294         rtsx_pci_add_cmd(pcr, READ_REG_CMD, PPBUF_BASE2 + cnt, 0, 0);
0295     else
0296         rtsx_pci_add_cmd(pcr, READ_REG_CMD,
0297                 PPBUF_BASE2 + cnt - 1, 0, 0);
0298     if (int_reg)
0299         rtsx_pci_add_cmd(pcr, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
0300 
0301     err = rtsx_pci_send_cmd(pcr, 5000);
0302     if (err < 0) {
0303         u8 val;
0304 
0305         rtsx_pci_read_register(pcr, MS_TRANS_CFG, &val);
0306         dev_dbg(ms_dev(host), "MS_TRANS_CFG: 0x%02x\n", val);
0307 
0308         if (int_reg)
0309             *int_reg = val & 0x0F;
0310 
0311         ms_print_debug_regs(host);
0312 
0313         ms_clear_error(host);
0314 
0315         if (!(tpc & 0x08)) {
0316             if (val & MS_CRC16_ERR)
0317                 return -EIO;
0318         } else {
0319             if (!(val & 0x80)) {
0320                 if (val & (MS_INT_ERR | MS_INT_CMDNK))
0321                     return -EIO;
0322             }
0323         }
0324 
0325         return -ETIMEDOUT;
0326     }
0327 
0328     ptr = rtsx_pci_get_cmd_data(pcr) + 1;
0329     for (i = 0; i < cnt; i++)
0330         data[i] = *ptr++;
0331 
0332     if (int_reg)
0333         *int_reg = *ptr & 0x0F;
0334 
0335     return 0;
0336 }
0337 
0338 static int rtsx_pci_ms_issue_cmd(struct realtek_pci_ms *host)
0339 {
0340     struct memstick_request *req = host->req;
0341     int err = 0;
0342     u8 cfg = 0, int_reg;
0343 
0344     dev_dbg(ms_dev(host), "%s\n", __func__);
0345 
0346     if (req->need_card_int) {
0347         if (host->ifmode != MEMSTICK_SERIAL)
0348             cfg = WAIT_INT;
0349     }
0350 
0351     if (req->long_data) {
0352         err = ms_transfer_data(host, req->data_dir,
0353                 req->tpc, cfg, &(req->sg));
0354     } else {
0355         if (req->data_dir == READ) {
0356             err = ms_read_bytes(host, req->tpc, cfg,
0357                     req->data_len, req->data, &int_reg);
0358         } else {
0359             err = ms_write_bytes(host, req->tpc, cfg,
0360                     req->data_len, req->data, &int_reg);
0361         }
0362     }
0363     if (err < 0)
0364         return err;
0365 
0366     if (req->need_card_int && (host->ifmode == MEMSTICK_SERIAL)) {
0367         err = ms_read_bytes(host, MS_TPC_GET_INT,
0368                 NO_WAIT_INT, 1, &int_reg, NULL);
0369         if (err < 0)
0370             return err;
0371     }
0372 
0373     if (req->need_card_int) {
0374         dev_dbg(ms_dev(host), "int_reg: 0x%02x\n", int_reg);
0375 
0376         if (int_reg & MS_INT_CMDNK)
0377             req->int_reg |= MEMSTICK_INT_CMDNAK;
0378         if (int_reg & MS_INT_BREQ)
0379             req->int_reg |= MEMSTICK_INT_BREQ;
0380         if (int_reg & MS_INT_ERR)
0381             req->int_reg |= MEMSTICK_INT_ERR;
0382         if (int_reg & MS_INT_CED)
0383             req->int_reg |= MEMSTICK_INT_CED;
0384     }
0385 
0386     return 0;
0387 }
0388 
0389 static void rtsx_pci_ms_handle_req(struct work_struct *work)
0390 {
0391     struct realtek_pci_ms *host = container_of(work,
0392             struct realtek_pci_ms, handle_req);
0393     struct rtsx_pcr *pcr = host->pcr;
0394     struct memstick_host *msh = host->msh;
0395     int rc;
0396 
0397     mutex_lock(&pcr->pcr_mutex);
0398 
0399     rtsx_pci_start_run(pcr);
0400 
0401     rtsx_pci_switch_clock(host->pcr, host->clock, host->ssc_depth,
0402             false, true, false);
0403     rtsx_pci_write_register(pcr, CARD_SELECT, 0x07, MS_MOD_SEL);
0404     rtsx_pci_write_register(pcr, CARD_SHARE_MODE,
0405             CARD_SHARE_MASK, CARD_SHARE_48_MS);
0406 
0407     if (!host->req) {
0408         do {
0409             rc = memstick_next_req(msh, &host->req);
0410             dev_dbg(ms_dev(host), "next req %d\n", rc);
0411 
0412             if (!rc)
0413                 host->req->error = rtsx_pci_ms_issue_cmd(host);
0414         } while (!rc);
0415     }
0416 
0417     mutex_unlock(&pcr->pcr_mutex);
0418 }
0419 
0420 static void rtsx_pci_ms_request(struct memstick_host *msh)
0421 {
0422     struct realtek_pci_ms *host = memstick_priv(msh);
0423 
0424     dev_dbg(ms_dev(host), "--> %s\n", __func__);
0425 
0426     if (rtsx_pci_card_exclusive_check(host->pcr, RTSX_MS_CARD))
0427         return;
0428 
0429     schedule_work(&host->handle_req);
0430 }
0431 
0432 static int rtsx_pci_ms_set_param(struct memstick_host *msh,
0433         enum memstick_param param, int value)
0434 {
0435     struct realtek_pci_ms *host = memstick_priv(msh);
0436     struct rtsx_pcr *pcr = host->pcr;
0437     unsigned int clock = 0;
0438     u8 ssc_depth = 0;
0439     int err;
0440 
0441     dev_dbg(ms_dev(host), "%s: param = %d, value = %d\n",
0442             __func__, param, value);
0443 
0444     err = rtsx_pci_card_exclusive_check(host->pcr, RTSX_MS_CARD);
0445     if (err)
0446         return err;
0447 
0448     switch (param) {
0449     case MEMSTICK_POWER:
0450         if (value == MEMSTICK_POWER_ON)
0451             err = ms_power_on(host);
0452         else if (value == MEMSTICK_POWER_OFF)
0453             err = ms_power_off(host);
0454         else
0455             return -EINVAL;
0456         break;
0457 
0458     case MEMSTICK_INTERFACE:
0459         if (value == MEMSTICK_SERIAL) {
0460             clock = 19000000;
0461             ssc_depth = RTSX_SSC_DEPTH_500K;
0462 
0463             err = rtsx_pci_write_register(pcr, MS_CFG, 0x58,
0464                     MS_BUS_WIDTH_1 | PUSH_TIME_DEFAULT);
0465             if (err < 0)
0466                 return err;
0467         } else if (value == MEMSTICK_PAR4) {
0468             clock = 39000000;
0469             ssc_depth = RTSX_SSC_DEPTH_1M;
0470 
0471             err = rtsx_pci_write_register(pcr, MS_CFG,
0472                     0x58, MS_BUS_WIDTH_4 | PUSH_TIME_ODD);
0473             if (err < 0)
0474                 return err;
0475         } else {
0476             return -EINVAL;
0477         }
0478 
0479         err = rtsx_pci_switch_clock(pcr, clock,
0480                 ssc_depth, false, true, false);
0481         if (err < 0)
0482             return err;
0483 
0484         host->ssc_depth = ssc_depth;
0485         host->clock = clock;
0486         host->ifmode = value;
0487         break;
0488     }
0489 
0490     return 0;
0491 }
0492 
0493 #ifdef CONFIG_PM
0494 
0495 static int rtsx_pci_ms_suspend(struct platform_device *pdev, pm_message_t state)
0496 {
0497     struct realtek_pci_ms *host = platform_get_drvdata(pdev);
0498     struct memstick_host *msh = host->msh;
0499 
0500     dev_dbg(ms_dev(host), "--> %s\n", __func__);
0501 
0502     memstick_suspend_host(msh);
0503     return 0;
0504 }
0505 
0506 static int rtsx_pci_ms_resume(struct platform_device *pdev)
0507 {
0508     struct realtek_pci_ms *host = platform_get_drvdata(pdev);
0509     struct memstick_host *msh = host->msh;
0510 
0511     dev_dbg(ms_dev(host), "--> %s\n", __func__);
0512 
0513     memstick_resume_host(msh);
0514     return 0;
0515 }
0516 
0517 #else /* CONFIG_PM */
0518 
0519 #define rtsx_pci_ms_suspend NULL
0520 #define rtsx_pci_ms_resume NULL
0521 
0522 #endif /* CONFIG_PM */
0523 
0524 static void rtsx_pci_ms_card_event(struct platform_device *pdev)
0525 {
0526     struct realtek_pci_ms *host = platform_get_drvdata(pdev);
0527 
0528     memstick_detect_change(host->msh);
0529 }
0530 
0531 static int rtsx_pci_ms_drv_probe(struct platform_device *pdev)
0532 {
0533     struct memstick_host *msh;
0534     struct realtek_pci_ms *host;
0535     struct rtsx_pcr *pcr;
0536     struct pcr_handle *handle = pdev->dev.platform_data;
0537     int rc;
0538 
0539     if (!handle)
0540         return -ENXIO;
0541 
0542     pcr = handle->pcr;
0543     if (!pcr)
0544         return -ENXIO;
0545 
0546     dev_dbg(&(pdev->dev),
0547             ": Realtek PCI-E Memstick controller found\n");
0548 
0549     msh = memstick_alloc_host(sizeof(*host), &pdev->dev);
0550     if (!msh)
0551         return -ENOMEM;
0552 
0553     host = memstick_priv(msh);
0554     host->pcr = pcr;
0555     host->msh = msh;
0556     host->pdev = pdev;
0557     platform_set_drvdata(pdev, host);
0558     pcr->slots[RTSX_MS_CARD].p_dev = pdev;
0559     pcr->slots[RTSX_MS_CARD].card_event = rtsx_pci_ms_card_event;
0560 
0561     mutex_init(&host->host_mutex);
0562 
0563     INIT_WORK(&host->handle_req, rtsx_pci_ms_handle_req);
0564     msh->request = rtsx_pci_ms_request;
0565     msh->set_param = rtsx_pci_ms_set_param;
0566     msh->caps = MEMSTICK_CAP_PAR4;
0567 
0568     rc = memstick_add_host(msh);
0569     if (rc) {
0570         memstick_free_host(msh);
0571         return rc;
0572     }
0573 
0574     return 0;
0575 }
0576 
0577 static int rtsx_pci_ms_drv_remove(struct platform_device *pdev)
0578 {
0579     struct realtek_pci_ms *host = platform_get_drvdata(pdev);
0580     struct rtsx_pcr *pcr;
0581     struct memstick_host *msh;
0582     int rc;
0583 
0584     if (!host)
0585         return 0;
0586 
0587     pcr = host->pcr;
0588     pcr->slots[RTSX_MS_CARD].p_dev = NULL;
0589     pcr->slots[RTSX_MS_CARD].card_event = NULL;
0590     msh = host->msh;
0591     host->eject = true;
0592     cancel_work_sync(&host->handle_req);
0593 
0594     mutex_lock(&host->host_mutex);
0595     if (host->req) {
0596         dev_dbg(&(pdev->dev),
0597             "%s: Controller removed during transfer\n",
0598             dev_name(&msh->dev));
0599 
0600         rtsx_pci_complete_unfinished_transfer(pcr);
0601 
0602         host->req->error = -ENOMEDIUM;
0603         do {
0604             rc = memstick_next_req(msh, &host->req);
0605             if (!rc)
0606                 host->req->error = -ENOMEDIUM;
0607         } while (!rc);
0608     }
0609     mutex_unlock(&host->host_mutex);
0610 
0611     memstick_remove_host(msh);
0612     memstick_free_host(msh);
0613 
0614     dev_dbg(&(pdev->dev),
0615         ": Realtek PCI-E Memstick controller has been removed\n");
0616 
0617     return 0;
0618 }
0619 
0620 static struct platform_device_id rtsx_pci_ms_ids[] = {
0621     {
0622         .name = DRV_NAME_RTSX_PCI_MS,
0623     }, {
0624         /* sentinel */
0625     }
0626 };
0627 MODULE_DEVICE_TABLE(platform, rtsx_pci_ms_ids);
0628 
0629 static struct platform_driver rtsx_pci_ms_driver = {
0630     .probe      = rtsx_pci_ms_drv_probe,
0631     .remove     = rtsx_pci_ms_drv_remove,
0632     .id_table       = rtsx_pci_ms_ids,
0633     .suspend    = rtsx_pci_ms_suspend,
0634     .resume     = rtsx_pci_ms_resume,
0635     .driver     = {
0636         .name   = DRV_NAME_RTSX_PCI_MS,
0637     },
0638 };
0639 module_platform_driver(rtsx_pci_ms_driver);
0640 
0641 MODULE_LICENSE("GPL");
0642 MODULE_AUTHOR("Wei WANG <wei_wang@realsil.com.cn>");
0643 MODULE_DESCRIPTION("Realtek PCI-E Memstick Card Host Driver");
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