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0006 #include <soc/tegra/mc.h>
0007
0008 #include <dt-bindings/memory/tegra234-mc.h>
0009
0010 #include "mc.h"
0011
0012 static const struct tegra_mc_client tegra234_mc_clients[] = {
0013 {
0014 .id = TEGRA234_MEMORY_CLIENT_MGBEARD,
0015 .name = "mgbeard",
0016 .sid = TEGRA234_SID_MGBE,
0017 .regs = {
0018 .sid = {
0019 .override = 0x2c0,
0020 .security = 0x2c4,
0021 },
0022 },
0023 }, {
0024 .id = TEGRA234_MEMORY_CLIENT_MGBEBRD,
0025 .name = "mgbebrd",
0026 .sid = TEGRA234_SID_MGBE_VF1,
0027 .regs = {
0028 .sid = {
0029 .override = 0x2c8,
0030 .security = 0x2cc,
0031 },
0032 },
0033 }, {
0034 .id = TEGRA234_MEMORY_CLIENT_MGBECRD,
0035 .name = "mgbecrd",
0036 .sid = TEGRA234_SID_MGBE_VF2,
0037 .regs = {
0038 .sid = {
0039 .override = 0x2d0,
0040 .security = 0x2d4,
0041 },
0042 },
0043 }, {
0044 .id = TEGRA234_MEMORY_CLIENT_MGBEDRD,
0045 .name = "mgbedrd",
0046 .sid = TEGRA234_SID_MGBE_VF3,
0047 .regs = {
0048 .sid = {
0049 .override = 0x2d8,
0050 .security = 0x2dc,
0051 },
0052 },
0053 }, {
0054 .id = TEGRA234_MEMORY_CLIENT_MGBEAWR,
0055 .name = "mgbeawr",
0056 .sid = TEGRA234_SID_MGBE,
0057 .regs = {
0058 .sid = {
0059 .override = 0x2e0,
0060 .security = 0x2e4,
0061 },
0062 },
0063 }, {
0064 .id = TEGRA234_MEMORY_CLIENT_MGBEBWR,
0065 .name = "mgbebwr",
0066 .sid = TEGRA234_SID_MGBE_VF1,
0067 .regs = {
0068 .sid = {
0069 .override = 0x2f8,
0070 .security = 0x2fc,
0071 },
0072 },
0073 }, {
0074 .id = TEGRA234_MEMORY_CLIENT_MGBECWR,
0075 .name = "mgbecwr",
0076 .sid = TEGRA234_SID_MGBE_VF2,
0077 .regs = {
0078 .sid = {
0079 .override = 0x308,
0080 .security = 0x30c,
0081 },
0082 },
0083 }, {
0084 .id = TEGRA234_MEMORY_CLIENT_SDMMCRAB,
0085 .name = "sdmmcrab",
0086 .sid = TEGRA234_SID_SDMMC4,
0087 .regs = {
0088 .sid = {
0089 .override = 0x318,
0090 .security = 0x31c,
0091 },
0092 },
0093 }, {
0094 .id = TEGRA234_MEMORY_CLIENT_MGBEDWR,
0095 .name = "mgbedwr",
0096 .sid = TEGRA234_SID_MGBE_VF3,
0097 .regs = {
0098 .sid = {
0099 .override = 0x328,
0100 .security = 0x32c,
0101 },
0102 },
0103 }, {
0104 .id = TEGRA234_MEMORY_CLIENT_SDMMCWAB,
0105 .name = "sdmmcwab",
0106 .sid = TEGRA234_SID_SDMMC4,
0107 .regs = {
0108 .sid = {
0109 .override = 0x338,
0110 .security = 0x33c,
0111 },
0112 },
0113 }, {
0114 .id = TEGRA234_MEMORY_CLIENT_BPMPR,
0115 .name = "bpmpr",
0116 .sid = TEGRA234_SID_BPMP,
0117 .regs = {
0118 .sid = {
0119 .override = 0x498,
0120 .security = 0x49c,
0121 },
0122 },
0123 }, {
0124 .id = TEGRA234_MEMORY_CLIENT_BPMPW,
0125 .name = "bpmpw",
0126 .sid = TEGRA234_SID_BPMP,
0127 .regs = {
0128 .sid = {
0129 .override = 0x4a0,
0130 .security = 0x4a4,
0131 },
0132 },
0133 }, {
0134 .id = TEGRA234_MEMORY_CLIENT_BPMPDMAR,
0135 .name = "bpmpdmar",
0136 .sid = TEGRA234_SID_BPMP,
0137 .regs = {
0138 .sid = {
0139 .override = 0x4a8,
0140 .security = 0x4ac,
0141 },
0142 },
0143 }, {
0144 .id = TEGRA234_MEMORY_CLIENT_BPMPDMAW,
0145 .name = "bpmpdmaw",
0146 .sid = TEGRA234_SID_BPMP,
0147 .regs = {
0148 .sid = {
0149 .override = 0x4b0,
0150 .security = 0x4b4,
0151 },
0152 },
0153 }, {
0154 .id = TEGRA234_MEMORY_CLIENT_APEDMAR,
0155 .name = "apedmar",
0156 .sid = TEGRA234_SID_APE,
0157 .regs = {
0158 .sid = {
0159 .override = 0x4f8,
0160 .security = 0x4fc,
0161 },
0162 },
0163 }, {
0164 .id = TEGRA234_MEMORY_CLIENT_APEDMAW,
0165 .name = "apedmaw",
0166 .sid = TEGRA234_SID_APE,
0167 .regs = {
0168 .sid = {
0169 .override = 0x500,
0170 .security = 0x504,
0171 },
0172 },
0173 },
0174 };
0175
0176 const struct tegra_mc_soc tegra234_mc_soc = {
0177 .num_clients = ARRAY_SIZE(tegra234_mc_clients),
0178 .clients = tegra234_mc_clients,
0179 .num_address_bits = 40,
0180 .num_channels = 16,
0181 .client_id_mask = 0x1ff,
0182 .intmask = MC_INT_DECERR_ROUTE_SANITY |
0183 MC_INT_DECERR_GENERALIZED_CARVEOUT | MC_INT_DECERR_MTS |
0184 MC_INT_SECERR_SEC | MC_INT_DECERR_VPR |
0185 MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM,
0186 .has_addr_hi_reg = true,
0187 .ops = &tegra186_mc_ops,
0188 .ch_intmask = 0x0000ff00,
0189 .global_intstatus_channel_shift = 8,
0190 };