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0010 #include <linux/device.h>
0011 #include <linux/of.h>
0012 #include <linux/gfp.h>
0013 #include <linux/export.h>
0014
0015 #include "jedec_ddr.h"
0016 #include "of_memory.h"
0017
0018
0019
0020
0021
0022
0023
0024
0025
0026
0027
0028 const struct lpddr2_min_tck *of_get_min_tck(struct device_node *np,
0029 struct device *dev)
0030 {
0031 int ret = 0;
0032 struct lpddr2_min_tck *min;
0033
0034 min = devm_kzalloc(dev, sizeof(*min), GFP_KERNEL);
0035 if (!min)
0036 goto default_min_tck;
0037
0038 ret |= of_property_read_u32(np, "tRPab-min-tck", &min->tRPab);
0039 ret |= of_property_read_u32(np, "tRCD-min-tck", &min->tRCD);
0040 ret |= of_property_read_u32(np, "tWR-min-tck", &min->tWR);
0041 ret |= of_property_read_u32(np, "tRASmin-min-tck", &min->tRASmin);
0042 ret |= of_property_read_u32(np, "tRRD-min-tck", &min->tRRD);
0043 ret |= of_property_read_u32(np, "tWTR-min-tck", &min->tWTR);
0044 ret |= of_property_read_u32(np, "tXP-min-tck", &min->tXP);
0045 ret |= of_property_read_u32(np, "tRTP-min-tck", &min->tRTP);
0046 ret |= of_property_read_u32(np, "tCKE-min-tck", &min->tCKE);
0047 ret |= of_property_read_u32(np, "tCKESR-min-tck", &min->tCKESR);
0048 ret |= of_property_read_u32(np, "tFAW-min-tck", &min->tFAW);
0049
0050 if (ret) {
0051 devm_kfree(dev, min);
0052 goto default_min_tck;
0053 }
0054
0055 return min;
0056
0057 default_min_tck:
0058 dev_warn(dev, "Using default min-tck values\n");
0059 return &lpddr2_jedec_min_tck;
0060 }
0061 EXPORT_SYMBOL(of_get_min_tck);
0062
0063 static int of_do_get_timings(struct device_node *np,
0064 struct lpddr2_timings *tim)
0065 {
0066 int ret;
0067
0068 ret = of_property_read_u32(np, "max-freq", &tim->max_freq);
0069 ret |= of_property_read_u32(np, "min-freq", &tim->min_freq);
0070 ret |= of_property_read_u32(np, "tRPab", &tim->tRPab);
0071 ret |= of_property_read_u32(np, "tRCD", &tim->tRCD);
0072 ret |= of_property_read_u32(np, "tWR", &tim->tWR);
0073 ret |= of_property_read_u32(np, "tRAS-min", &tim->tRAS_min);
0074 ret |= of_property_read_u32(np, "tRRD", &tim->tRRD);
0075 ret |= of_property_read_u32(np, "tWTR", &tim->tWTR);
0076 ret |= of_property_read_u32(np, "tXP", &tim->tXP);
0077 ret |= of_property_read_u32(np, "tRTP", &tim->tRTP);
0078 ret |= of_property_read_u32(np, "tCKESR", &tim->tCKESR);
0079 ret |= of_property_read_u32(np, "tDQSCK-max", &tim->tDQSCK_max);
0080 ret |= of_property_read_u32(np, "tFAW", &tim->tFAW);
0081 ret |= of_property_read_u32(np, "tZQCS", &tim->tZQCS);
0082 ret |= of_property_read_u32(np, "tZQCL", &tim->tZQCL);
0083 ret |= of_property_read_u32(np, "tZQinit", &tim->tZQinit);
0084 ret |= of_property_read_u32(np, "tRAS-max-ns", &tim->tRAS_max_ns);
0085 ret |= of_property_read_u32(np, "tDQSCK-max-derated",
0086 &tim->tDQSCK_max_derated);
0087
0088 return ret;
0089 }
0090
0091
0092
0093
0094
0095
0096
0097
0098
0099
0100
0101
0102
0103
0104 const struct lpddr2_timings *of_get_ddr_timings(struct device_node *np_ddr,
0105 struct device *dev,
0106 u32 device_type,
0107 u32 *nr_frequencies)
0108 {
0109 struct lpddr2_timings *timings = NULL;
0110 u32 arr_sz = 0, i = 0;
0111 struct device_node *np_tim;
0112 char *tim_compat = NULL;
0113
0114 switch (device_type) {
0115 case DDR_TYPE_LPDDR2_S2:
0116 case DDR_TYPE_LPDDR2_S4:
0117 tim_compat = "jedec,lpddr2-timings";
0118 break;
0119 default:
0120 dev_warn(dev, "Unsupported memory type\n");
0121 }
0122
0123 for_each_child_of_node(np_ddr, np_tim)
0124 if (of_device_is_compatible(np_tim, tim_compat))
0125 arr_sz++;
0126
0127 if (arr_sz)
0128 timings = devm_kcalloc(dev, arr_sz, sizeof(*timings),
0129 GFP_KERNEL);
0130
0131 if (!timings)
0132 goto default_timings;
0133
0134 for_each_child_of_node(np_ddr, np_tim) {
0135 if (of_device_is_compatible(np_tim, tim_compat)) {
0136 if (of_do_get_timings(np_tim, &timings[i])) {
0137 devm_kfree(dev, timings);
0138 goto default_timings;
0139 }
0140 i++;
0141 }
0142 }
0143
0144 *nr_frequencies = arr_sz;
0145
0146 return timings;
0147
0148 default_timings:
0149 dev_warn(dev, "Using default memory timings\n");
0150 *nr_frequencies = ARRAY_SIZE(lpddr2_jedec_timings);
0151 return lpddr2_jedec_timings;
0152 }
0153 EXPORT_SYMBOL(of_get_ddr_timings);
0154
0155
0156
0157
0158
0159
0160
0161
0162
0163
0164 const struct lpddr3_min_tck *of_lpddr3_get_min_tck(struct device_node *np,
0165 struct device *dev)
0166 {
0167 int ret = 0;
0168 struct lpddr3_min_tck *min;
0169
0170 min = devm_kzalloc(dev, sizeof(*min), GFP_KERNEL);
0171 if (!min)
0172 goto default_min_tck;
0173
0174 ret |= of_property_read_u32(np, "tRFC-min-tck", &min->tRFC);
0175 ret |= of_property_read_u32(np, "tRRD-min-tck", &min->tRRD);
0176 ret |= of_property_read_u32(np, "tRPab-min-tck", &min->tRPab);
0177 ret |= of_property_read_u32(np, "tRPpb-min-tck", &min->tRPpb);
0178 ret |= of_property_read_u32(np, "tRCD-min-tck", &min->tRCD);
0179 ret |= of_property_read_u32(np, "tRC-min-tck", &min->tRC);
0180 ret |= of_property_read_u32(np, "tRAS-min-tck", &min->tRAS);
0181 ret |= of_property_read_u32(np, "tWTR-min-tck", &min->tWTR);
0182 ret |= of_property_read_u32(np, "tWR-min-tck", &min->tWR);
0183 ret |= of_property_read_u32(np, "tRTP-min-tck", &min->tRTP);
0184 ret |= of_property_read_u32(np, "tW2W-C2C-min-tck", &min->tW2W_C2C);
0185 ret |= of_property_read_u32(np, "tR2R-C2C-min-tck", &min->tR2R_C2C);
0186 ret |= of_property_read_u32(np, "tWL-min-tck", &min->tWL);
0187 ret |= of_property_read_u32(np, "tDQSCK-min-tck", &min->tDQSCK);
0188 ret |= of_property_read_u32(np, "tRL-min-tck", &min->tRL);
0189 ret |= of_property_read_u32(np, "tFAW-min-tck", &min->tFAW);
0190 ret |= of_property_read_u32(np, "tXSR-min-tck", &min->tXSR);
0191 ret |= of_property_read_u32(np, "tXP-min-tck", &min->tXP);
0192 ret |= of_property_read_u32(np, "tCKE-min-tck", &min->tCKE);
0193 ret |= of_property_read_u32(np, "tCKESR-min-tck", &min->tCKESR);
0194 ret |= of_property_read_u32(np, "tMRD-min-tck", &min->tMRD);
0195
0196 if (ret) {
0197 dev_warn(dev, "Errors while parsing min-tck values\n");
0198 devm_kfree(dev, min);
0199 goto default_min_tck;
0200 }
0201
0202 return min;
0203
0204 default_min_tck:
0205 dev_warn(dev, "Using default min-tck values\n");
0206 return NULL;
0207 }
0208 EXPORT_SYMBOL(of_lpddr3_get_min_tck);
0209
0210 static int of_lpddr3_do_get_timings(struct device_node *np,
0211 struct lpddr3_timings *tim)
0212 {
0213 int ret;
0214
0215 ret = of_property_read_u32(np, "max-freq", &tim->max_freq);
0216 if (ret)
0217
0218 ret = of_property_read_u32(np, "reg", &tim->max_freq);
0219 ret |= of_property_read_u32(np, "min-freq", &tim->min_freq);
0220 ret |= of_property_read_u32(np, "tRFC", &tim->tRFC);
0221 ret |= of_property_read_u32(np, "tRRD", &tim->tRRD);
0222 ret |= of_property_read_u32(np, "tRPab", &tim->tRPab);
0223 ret |= of_property_read_u32(np, "tRPpb", &tim->tRPpb);
0224 ret |= of_property_read_u32(np, "tRCD", &tim->tRCD);
0225 ret |= of_property_read_u32(np, "tRC", &tim->tRC);
0226 ret |= of_property_read_u32(np, "tRAS", &tim->tRAS);
0227 ret |= of_property_read_u32(np, "tWTR", &tim->tWTR);
0228 ret |= of_property_read_u32(np, "tWR", &tim->tWR);
0229 ret |= of_property_read_u32(np, "tRTP", &tim->tRTP);
0230 ret |= of_property_read_u32(np, "tW2W-C2C", &tim->tW2W_C2C);
0231 ret |= of_property_read_u32(np, "tR2R-C2C", &tim->tR2R_C2C);
0232 ret |= of_property_read_u32(np, "tFAW", &tim->tFAW);
0233 ret |= of_property_read_u32(np, "tXSR", &tim->tXSR);
0234 ret |= of_property_read_u32(np, "tXP", &tim->tXP);
0235 ret |= of_property_read_u32(np, "tCKE", &tim->tCKE);
0236 ret |= of_property_read_u32(np, "tCKESR", &tim->tCKESR);
0237 ret |= of_property_read_u32(np, "tMRD", &tim->tMRD);
0238
0239 return ret;
0240 }
0241
0242
0243
0244
0245
0246
0247
0248
0249
0250
0251
0252
0253
0254
0255 const struct lpddr3_timings
0256 *of_lpddr3_get_ddr_timings(struct device_node *np_ddr, struct device *dev,
0257 u32 device_type, u32 *nr_frequencies)
0258 {
0259 struct lpddr3_timings *timings = NULL;
0260 u32 arr_sz = 0, i = 0;
0261 struct device_node *np_tim;
0262 char *tim_compat = NULL;
0263
0264 switch (device_type) {
0265 case DDR_TYPE_LPDDR3:
0266 tim_compat = "jedec,lpddr3-timings";
0267 break;
0268 default:
0269 dev_warn(dev, "Unsupported memory type\n");
0270 }
0271
0272 for_each_child_of_node(np_ddr, np_tim)
0273 if (of_device_is_compatible(np_tim, tim_compat))
0274 arr_sz++;
0275
0276 if (arr_sz)
0277 timings = devm_kcalloc(dev, arr_sz, sizeof(*timings),
0278 GFP_KERNEL);
0279
0280 if (!timings)
0281 goto default_timings;
0282
0283 for_each_child_of_node(np_ddr, np_tim) {
0284 if (of_device_is_compatible(np_tim, tim_compat)) {
0285 if (of_lpddr3_do_get_timings(np_tim, &timings[i])) {
0286 devm_kfree(dev, timings);
0287 goto default_timings;
0288 }
0289 i++;
0290 }
0291 }
0292
0293 *nr_frequencies = arr_sz;
0294
0295 return timings;
0296
0297 default_timings:
0298 dev_warn(dev, "Failed to get timings\n");
0299 *nr_frequencies = 0;
0300 return NULL;
0301 }
0302 EXPORT_SYMBOL(of_lpddr3_get_ddr_timings);
0303
0304
0305
0306
0307
0308
0309
0310
0311
0312
0313
0314 const struct lpddr2_info
0315 *of_lpddr2_get_info(struct device_node *np, struct device *dev)
0316 {
0317 struct lpddr2_info *ret_info, info = {};
0318 struct property *prop;
0319 const char *cp;
0320 int err;
0321 u32 revision_id[2];
0322
0323 err = of_property_read_u32_array(np, "revision-id", revision_id, 2);
0324 if (!err) {
0325 info.revision_id1 = revision_id[0];
0326 info.revision_id2 = revision_id[1];
0327 } else {
0328 err = of_property_read_u32(np, "revision-id1", &info.revision_id1);
0329 if (err)
0330 info.revision_id1 = -ENOENT;
0331
0332 err = of_property_read_u32(np, "revision-id2", &info.revision_id2);
0333 if (err)
0334 info.revision_id2 = -ENOENT;
0335 }
0336
0337 err = of_property_read_u32(np, "io-width", &info.io_width);
0338 if (err)
0339 return NULL;
0340
0341 info.io_width = 32 / info.io_width - 1;
0342
0343 err = of_property_read_u32(np, "density", &info.density);
0344 if (err)
0345 return NULL;
0346
0347 info.density = ffs(info.density) - 7;
0348
0349 if (of_device_is_compatible(np, "jedec,lpddr2-s4"))
0350 info.arch_type = LPDDR2_TYPE_S4;
0351 else if (of_device_is_compatible(np, "jedec,lpddr2-s2"))
0352 info.arch_type = LPDDR2_TYPE_S2;
0353 else if (of_device_is_compatible(np, "jedec,lpddr2-nvm"))
0354 info.arch_type = LPDDR2_TYPE_NVM;
0355 else
0356 return NULL;
0357
0358 prop = of_find_property(np, "compatible", NULL);
0359 for (cp = of_prop_next_string(prop, NULL); cp;
0360 cp = of_prop_next_string(prop, cp)) {
0361
0362 #define OF_LPDDR2_VENDOR_CMP(compat, ID) \
0363 if (!of_compat_cmp(cp, compat ",", strlen(compat ","))) { \
0364 info.manufacturer_id = LPDDR2_MANID_##ID; \
0365 break; \
0366 }
0367
0368 OF_LPDDR2_VENDOR_CMP("samsung", SAMSUNG)
0369 OF_LPDDR2_VENDOR_CMP("qimonda", QIMONDA)
0370 OF_LPDDR2_VENDOR_CMP("elpida", ELPIDA)
0371 OF_LPDDR2_VENDOR_CMP("etron", ETRON)
0372 OF_LPDDR2_VENDOR_CMP("nanya", NANYA)
0373 OF_LPDDR2_VENDOR_CMP("hynix", HYNIX)
0374 OF_LPDDR2_VENDOR_CMP("mosel", MOSEL)
0375 OF_LPDDR2_VENDOR_CMP("winbond", WINBOND)
0376 OF_LPDDR2_VENDOR_CMP("esmt", ESMT)
0377 OF_LPDDR2_VENDOR_CMP("spansion", SPANSION)
0378 OF_LPDDR2_VENDOR_CMP("sst", SST)
0379 OF_LPDDR2_VENDOR_CMP("zmos", ZMOS)
0380 OF_LPDDR2_VENDOR_CMP("intel", INTEL)
0381 OF_LPDDR2_VENDOR_CMP("numonyx", NUMONYX)
0382 OF_LPDDR2_VENDOR_CMP("micron", MICRON)
0383
0384 #undef OF_LPDDR2_VENDOR_CMP
0385 }
0386
0387 if (!info.manufacturer_id)
0388 info.manufacturer_id = -ENOENT;
0389
0390 ret_info = devm_kzalloc(dev, sizeof(*ret_info), GFP_KERNEL);
0391 if (ret_info)
0392 *ret_info = info;
0393
0394 return ret_info;
0395 }
0396 EXPORT_SYMBOL(of_lpddr2_get_info);