drivers/memory/mvebu-devbus.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Marvell EBU SoC Device Bus Controller
0004  * (memory controller for NOR/NAND/SRAM/FPGA devices)
0005  *
0006  * Copyright (C) 2013-2014 Marvell
0007  */
0008
0009 #include <linux/kernel.h>
0010 #include <linux/module.h>
0011 #include <linux/slab.h>
0012 #include <linux/err.h>
0013 #include <linux/io.h>
0014 #include <linux/clk.h>
0015 #include <linux/mbus.h>
0016 #include <linux/of_platform.h>
0017 #include <linux/of_address.h>
0018 #include <linux/platform_device.h>
0019
0020 /* Register definitions */
0021 #define ARMADA_DEV_WIDTH_SHIFT      30
0022 #define ARMADA_BADR_SKEW_SHIFT      28
0023 #define ARMADA_RD_HOLD_SHIFT        23
0024 #define ARMADA_ACC_NEXT_SHIFT       17
0025 #define ARMADA_RD_SETUP_SHIFT       12
0026 #define ARMADA_ACC_FIRST_SHIFT      6
0027
0028 #define ARMADA_SYNC_ENABLE_SHIFT    24
0029 #define ARMADA_WR_HIGH_SHIFT        16
0030 #define ARMADA_WR_LOW_SHIFT     8
0031
0032 #define ARMADA_READ_PARAM_OFFSET    0x0
0033 #define ARMADA_WRITE_PARAM_OFFSET   0x4
0034
0035 #define ORION_RESERVED          (0x2 << 30)
0036 #define ORION_BADR_SKEW_SHIFT       28
0037 #define ORION_WR_HIGH_EXT_BIT       BIT(27)
0038 #define ORION_WR_HIGH_EXT_MASK      0x8
0039 #define ORION_WR_LOW_EXT_BIT        BIT(26)
0040 #define ORION_WR_LOW_EXT_MASK       0x8
0041 #define ORION_ALE_WR_EXT_BIT        BIT(25)
0042 #define ORION_ALE_WR_EXT_MASK       0x8
0043 #define ORION_ACC_NEXT_EXT_BIT      BIT(24)
0044 #define ORION_ACC_NEXT_EXT_MASK     0x10
0045 #define ORION_ACC_FIRST_EXT_BIT     BIT(23)
0046 #define ORION_ACC_FIRST_EXT_MASK    0x10
0047 #define ORION_TURN_OFF_EXT_BIT      BIT(22)
0048 #define ORION_TURN_OFF_EXT_MASK     0x8
0049 #define ORION_DEV_WIDTH_SHIFT       20
0050 #define ORION_WR_HIGH_SHIFT     17
0051 #define ORION_WR_HIGH_MASK      0x7
0052 #define ORION_WR_LOW_SHIFT      14
0053 #define ORION_WR_LOW_MASK       0x7
0054 #define ORION_ALE_WR_SHIFT      11
0055 #define ORION_ALE_WR_MASK       0x7
0056 #define ORION_ACC_NEXT_SHIFT        7
0057 #define ORION_ACC_NEXT_MASK     0xF
0058 #define ORION_ACC_FIRST_SHIFT       3
0059 #define ORION_ACC_FIRST_MASK        0xF
0060 #define ORION_TURN_OFF_SHIFT        0
0061 #define ORION_TURN_OFF_MASK     0x7
0062
0063 struct devbus_read_params {
0064     u32 bus_width;
0065     u32 badr_skew;
0066     u32 turn_off;
0067     u32 acc_first;
0068     u32 acc_next;
0069     u32 rd_setup;
0070     u32 rd_hold;
0071 };
0072
0073 struct devbus_write_params {
0074     u32 sync_enable;
0075     u32 wr_high;
0076     u32 wr_low;
0077     u32 ale_wr;
0078 };
0079
0080 struct devbus {
0081     struct device *dev;
0082     void __iomem *base;
0083     unsigned long tick_ps;
0084 };
0085
0086 static int get_timing_param_ps(struct devbus *devbus,
0087                    struct device_node *node,
0088                    const char *name,
0089                    u32 *ticks)
0090 {
0091     u32 time_ps;
0092     int err;
0093
0094     err = of_property_read_u32(node, name, &time_ps);
0095     if (err < 0) {
0096         dev_err(devbus->dev, "%pOF has no '%s' property\n",
0097             node, name);
0098         return err;
0099     }
0100
0101     *ticks = (time_ps + devbus->tick_ps - 1) / devbus->tick_ps;
0102
0103     dev_dbg(devbus->dev, "%s: %u ps -> 0x%x\n",
0104         name, time_ps, *ticks);
0105     return 0;
0106 }
0107
0108 static int devbus_get_timing_params(struct devbus *devbus,
0109                     struct device_node *node,
0110                     struct devbus_read_params *r,
0111                     struct devbus_write_params *w)
0112 {
0113     int err;
0114
0115     err = of_property_read_u32(node, "devbus,bus-width", &r->bus_width);
0116     if (err < 0) {
0117         dev_err(devbus->dev,
0118             "%pOF has no 'devbus,bus-width' property\n",
0119             node);
0120         return err;
0121     }
0122
0123     /*
0124      * The bus width is encoded into the register as 0 for 8 bits,
0125      * and 1 for 16 bits, so we do the necessary conversion here.
0126      */
0127     if (r->bus_width == 8) {
0128         r->bus_width = 0;
0129     } else if (r->bus_width == 16) {
0130         r->bus_width = 1;
0131     } else {
0132         dev_err(devbus->dev, "invalid bus width %d\n", r->bus_width);
0133         return -EINVAL;
0134     }
0135
0136     err = get_timing_param_ps(devbus, node, "devbus,badr-skew-ps",
0137                   &r->badr_skew);
0138     if (err < 0)
0139         return err;
0140
0141     err = get_timing_param_ps(devbus, node, "devbus,turn-off-ps",
0142                   &r->turn_off);
0143     if (err < 0)
0144         return err;
0145
0146     err = get_timing_param_ps(devbus, node, "devbus,acc-first-ps",
0147                   &r->acc_first);
0148     if (err < 0)
0149         return err;
0150
0151     err = get_timing_param_ps(devbus, node, "devbus,acc-next-ps",
0152                   &r->acc_next);
0153     if (err < 0)
0154         return err;
0155
0156     if (of_device_is_compatible(devbus->dev->of_node, "marvell,mvebu-devbus")) {
0157         err = get_timing_param_ps(devbus, node, "devbus,rd-setup-ps",
0158                       &r->rd_setup);
0159         if (err < 0)
0160             return err;
0161
0162         err = get_timing_param_ps(devbus, node, "devbus,rd-hold-ps",
0163                       &r->rd_hold);
0164         if (err < 0)
0165             return err;
0166
0167         err = of_property_read_u32(node, "devbus,sync-enable",
0168                        &w->sync_enable);
0169         if (err < 0) {
0170             dev_err(devbus->dev,
0171                 "%pOF has no 'devbus,sync-enable' property\n",
0172                 node);
0173             return err;
0174         }
0175     }
0176
0177     err = get_timing_param_ps(devbus, node, "devbus,ale-wr-ps",
0178                   &w->ale_wr);
0179     if (err < 0)
0180         return err;
0181
0182     err = get_timing_param_ps(devbus, node, "devbus,wr-low-ps",
0183                   &w->wr_low);
0184     if (err < 0)
0185         return err;
0186
0187     err = get_timing_param_ps(devbus, node, "devbus,wr-high-ps",
0188                   &w->wr_high);
0189     if (err < 0)
0190         return err;
0191
0192     return 0;
0193 }
0194
0195 static void devbus_orion_set_timing_params(struct devbus *devbus,
0196                       struct device_node *node,
0197                       struct devbus_read_params *r,
0198                       struct devbus_write_params *w)
0199 {
0200     u32 value;
0201
0202     /*
0203      * The hardware designers found it would be a good idea to
0204      * split most of the values in the register into two fields:
0205      * one containing all the low-order bits, and another one
0206      * containing just the high-order bit. For all of those
0207      * fields, we have to split the value into these two parts.
0208      */
0209     value = (r->turn_off   & ORION_TURN_OFF_MASK)  << ORION_TURN_OFF_SHIFT  |
0210         (r->acc_first  & ORION_ACC_FIRST_MASK) << ORION_ACC_FIRST_SHIFT |
0211         (r->acc_next   & ORION_ACC_NEXT_MASK)  << ORION_ACC_NEXT_SHIFT  |
0212         (w->ale_wr     & ORION_ALE_WR_MASK)    << ORION_ALE_WR_SHIFT    |
0213         (w->wr_low     & ORION_WR_LOW_MASK)    << ORION_WR_LOW_SHIFT    |
0214         (w->wr_high    & ORION_WR_HIGH_MASK)   << ORION_WR_HIGH_SHIFT   |
0215         r->bus_width                           << ORION_DEV_WIDTH_SHIFT |
0216         ((r->turn_off  & ORION_TURN_OFF_EXT_MASK)  ? ORION_TURN_OFF_EXT_BIT  : 0) |
0217         ((r->acc_first & ORION_ACC_FIRST_EXT_MASK) ? ORION_ACC_FIRST_EXT_BIT : 0) |
0218         ((r->acc_next  & ORION_ACC_NEXT_EXT_MASK)  ? ORION_ACC_NEXT_EXT_BIT  : 0) |
0219         ((w->ale_wr    & ORION_ALE_WR_EXT_MASK)    ? ORION_ALE_WR_EXT_BIT    : 0) |
0220         ((w->wr_low    & ORION_WR_LOW_EXT_MASK)    ? ORION_WR_LOW_EXT_BIT    : 0) |
0221         ((w->wr_high   & ORION_WR_HIGH_EXT_MASK)   ? ORION_WR_HIGH_EXT_BIT   : 0) |
0222         (r->badr_skew << ORION_BADR_SKEW_SHIFT) |
0223         ORION_RESERVED;
0224
0225     writel(value, devbus->base);
0226 }
0227
0228 static void devbus_armada_set_timing_params(struct devbus *devbus,
0229                        struct device_node *node,
0230                        struct devbus_read_params *r,
0231                        struct devbus_write_params *w)
0232 {
0233     u32 value;
0234
0235     /* Set read timings */
0236     value = r->bus_width << ARMADA_DEV_WIDTH_SHIFT |
0237         r->badr_skew << ARMADA_BADR_SKEW_SHIFT |
0238         r->rd_hold   << ARMADA_RD_HOLD_SHIFT   |
0239         r->acc_next  << ARMADA_ACC_NEXT_SHIFT  |
0240         r->rd_setup  << ARMADA_RD_SETUP_SHIFT  |
0241         r->acc_first << ARMADA_ACC_FIRST_SHIFT |
0242         r->turn_off;
0243
0244     dev_dbg(devbus->dev, "read parameters register 0x%p = 0x%x\n",
0245         devbus->base + ARMADA_READ_PARAM_OFFSET,
0246         value);
0247
0248     writel(value, devbus->base + ARMADA_READ_PARAM_OFFSET);
0249
0250     /* Set write timings */
0251     value = w->sync_enable  << ARMADA_SYNC_ENABLE_SHIFT |
0252         w->wr_low       << ARMADA_WR_LOW_SHIFT      |
0253         w->wr_high      << ARMADA_WR_HIGH_SHIFT     |
0254         w->ale_wr;
0255
0256     dev_dbg(devbus->dev, "write parameters register: 0x%p = 0x%x\n",
0257         devbus->base + ARMADA_WRITE_PARAM_OFFSET,
0258         value);
0259
0260     writel(value, devbus->base + ARMADA_WRITE_PARAM_OFFSET);
0261 }
0262
0263 static int mvebu_devbus_probe(struct platform_device *pdev)
0264 {
0265     struct device *dev = &pdev->dev;
0266     struct device_node *node = pdev->dev.of_node;
0267     struct devbus_read_params r;
0268     struct devbus_write_params w;
0269     struct devbus *devbus;
0270     struct clk *clk;
0271     unsigned long rate;
0272     int err;
0273
0274     devbus = devm_kzalloc(&pdev->dev, sizeof(struct devbus), GFP_KERNEL);
0275     if (!devbus)
0276         return -ENOMEM;
0277
0278     devbus->dev = dev;
0279     devbus->base = devm_platform_ioremap_resource(pdev, 0);
0280     if (IS_ERR(devbus->base))
0281         return PTR_ERR(devbus->base);
0282
0283     clk = devm_clk_get(&pdev->dev, NULL);
0284     if (IS_ERR(clk))
0285         return PTR_ERR(clk);
0286     clk_prepare_enable(clk);
0287
0288     /*
0289      * Obtain clock period in picoseconds,
0290      * we need this in order to convert timing
0291      * parameters from cycles to picoseconds.
0292      */
0293     rate = clk_get_rate(clk) / 1000;
0294     devbus->tick_ps = 1000000000 / rate;
0295
0296     dev_dbg(devbus->dev, "Setting timing parameter, tick is %lu ps\n",
0297         devbus->tick_ps);
0298
0299     if (!of_property_read_bool(node, "devbus,keep-config")) {
0300         /* Read the Device Tree node */
0301         err = devbus_get_timing_params(devbus, node, &r, &w);
0302         if (err < 0)
0303             return err;
0304
0305         /* Set the new timing parameters */
0306         if (of_device_is_compatible(node, "marvell,orion-devbus"))
0307             devbus_orion_set_timing_params(devbus, node, &r, &w);
0308         else
0309             devbus_armada_set_timing_params(devbus, node, &r, &w);
0310     }
0311
0312     /*
0313      * We need to create a child device explicitly from here to
0314      * guarantee that the child will be probed after the timing
0315      * parameters for the bus are written.
0316      */
0317     err = of_platform_populate(node, NULL, NULL, dev);
0318     if (err < 0)
0319         return err;
0320
0321     return 0;
0322 }
0323
0324 static const struct of_device_id mvebu_devbus_of_match[] = {
0325     { .compatible = "marvell,mvebu-devbus" },
0326     { .compatible = "marvell,orion-devbus" },
0327     {},
0328 };
0329 MODULE_DEVICE_TABLE(of, mvebu_devbus_of_match);
0330
0331 static struct platform_driver mvebu_devbus_driver = {
0332     .probe      = mvebu_devbus_probe,
0333     .driver     = {
0334         .name   = "mvebu-devbus",
0335         .of_match_table = mvebu_devbus_of_match,
0336     },
0337 };
0338
0339 static int __init mvebu_devbus_init(void)
0340 {
0341     return platform_driver_register(&mvebu_devbus_driver);
0342 }
0343 module_init(mvebu_devbus_init);
0344
0345 MODULE_LICENSE("GPL v2");
0346 MODULE_AUTHOR("Ezequiel Garcia <ezequiel.garcia@free-electrons.com>");
0347 MODULE_DESCRIPTION("Marvell EBU SoC Device Bus controller");