drivers/memory/dfl-emif.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * DFL device driver for EMIF private feature
0004  *
0005  * Copyright (C) 2020 Intel Corporation, Inc.
0006  *
0007  */
0008 #include <linux/bitfield.h>
0009 #include <linux/dfl.h>
0010 #include <linux/errno.h>
0011 #include <linux/io.h>
0012 #include <linux/iopoll.h>
0013 #include <linux/io-64-nonatomic-lo-hi.h>
0014 #include <linux/kernel.h>
0015 #include <linux/module.h>
0016 #include <linux/spinlock.h>
0017 #include <linux/types.h>
0018
0019 #define FME_FEATURE_ID_EMIF     0x9
0020
0021 #define EMIF_STAT           0x8
0022 #define EMIF_STAT_INIT_DONE_SFT     0
0023 #define EMIF_STAT_CALC_FAIL_SFT     8
0024 #define EMIF_STAT_CLEAR_BUSY_SFT    16
0025 #define EMIF_CTRL           0x10
0026 #define EMIF_CTRL_CLEAR_EN_SFT      0
0027 #define EMIF_CTRL_CLEAR_EN_MSK      GENMASK_ULL(3, 0)
0028
0029 #define EMIF_POLL_INVL          10000 /* us */
0030 #define EMIF_POLL_TIMEOUT       5000000 /* us */
0031
0032 struct dfl_emif {
0033     struct device *dev;
0034     void __iomem *base;
0035     spinlock_t lock;    /* Serialises access to EMIF_CTRL reg */
0036 };
0037
0038 struct emif_attr {
0039     struct device_attribute attr;
0040     u32 shift;
0041     u32 index;
0042 };
0043
0044 #define to_emif_attr(dev_attr) \
0045     container_of(dev_attr, struct emif_attr, attr)
0046
0047 static ssize_t emif_state_show(struct device *dev,
0048                    struct device_attribute *attr, char *buf)
0049 {
0050     struct emif_attr *eattr = to_emif_attr(attr);
0051     struct dfl_emif *de = dev_get_drvdata(dev);
0052     u64 val;
0053
0054     val = readq(de->base + EMIF_STAT);
0055
0056     return sysfs_emit(buf, "%u\n",
0057               !!(val & BIT_ULL(eattr->shift + eattr->index)));
0058 }
0059
0060 static ssize_t emif_clear_store(struct device *dev,
0061                 struct device_attribute *attr,
0062                 const char *buf, size_t count)
0063 {
0064     struct emif_attr *eattr = to_emif_attr(attr);
0065     struct dfl_emif *de = dev_get_drvdata(dev);
0066     u64 clear_busy_msk, clear_en_msk, val;
0067     void __iomem *base = de->base;
0068
0069     if (!sysfs_streq(buf, "1"))
0070         return -EINVAL;
0071
0072     clear_busy_msk = BIT_ULL(EMIF_STAT_CLEAR_BUSY_SFT + eattr->index);
0073     clear_en_msk = BIT_ULL(EMIF_CTRL_CLEAR_EN_SFT + eattr->index);
0074
0075     spin_lock(&de->lock);
0076     /* The CLEAR_EN field is WO, but other fields are RW */
0077     val = readq(base + EMIF_CTRL);
0078     val &= ~EMIF_CTRL_CLEAR_EN_MSK;
0079     val |= clear_en_msk;
0080     writeq(val, base + EMIF_CTRL);
0081     spin_unlock(&de->lock);
0082
0083     if (readq_poll_timeout(base + EMIF_STAT, val,
0084                    !(val & clear_busy_msk),
0085                    EMIF_POLL_INVL, EMIF_POLL_TIMEOUT)) {
0086         dev_err(de->dev, "timeout, fail to clear\n");
0087         return -ETIMEDOUT;
0088     }
0089
0090     return count;
0091 }
0092
0093 #define emif_state_attr(_name, _shift, _index)              \
0094     static struct emif_attr emif_attr_##inf##_index##_##_name = \
0095         { .attr = __ATTR(inf##_index##_##_name, 0444,       \
0096                  emif_state_show, NULL),        \
0097           .shift = (_shift), .index = (_index) }
0098
0099 #define emif_clear_attr(_index)                     \
0100     static struct emif_attr emif_attr_##inf##_index##_clear =   \
0101         { .attr = __ATTR(inf##_index##_clear, 0200,     \
0102                  NULL, emif_clear_store),       \
0103           .index = (_index) }
0104
0105 emif_state_attr(init_done, EMIF_STAT_INIT_DONE_SFT, 0);
0106 emif_state_attr(init_done, EMIF_STAT_INIT_DONE_SFT, 1);
0107 emif_state_attr(init_done, EMIF_STAT_INIT_DONE_SFT, 2);
0108 emif_state_attr(init_done, EMIF_STAT_INIT_DONE_SFT, 3);
0109
0110 emif_state_attr(cal_fail, EMIF_STAT_CALC_FAIL_SFT, 0);
0111 emif_state_attr(cal_fail, EMIF_STAT_CALC_FAIL_SFT, 1);
0112 emif_state_attr(cal_fail, EMIF_STAT_CALC_FAIL_SFT, 2);
0113 emif_state_attr(cal_fail, EMIF_STAT_CALC_FAIL_SFT, 3);
0114
0115 emif_clear_attr(0);
0116 emif_clear_attr(1);
0117 emif_clear_attr(2);
0118 emif_clear_attr(3);
0119
0120 static struct attribute *dfl_emif_attrs[] = {
0121     &emif_attr_inf0_init_done.attr.attr,
0122     &emif_attr_inf0_cal_fail.attr.attr,
0123     &emif_attr_inf0_clear.attr.attr,
0124
0125     &emif_attr_inf1_init_done.attr.attr,
0126     &emif_attr_inf1_cal_fail.attr.attr,
0127     &emif_attr_inf1_clear.attr.attr,
0128
0129     &emif_attr_inf2_init_done.attr.attr,
0130     &emif_attr_inf2_cal_fail.attr.attr,
0131     &emif_attr_inf2_clear.attr.attr,
0132
0133     &emif_attr_inf3_init_done.attr.attr,
0134     &emif_attr_inf3_cal_fail.attr.attr,
0135     &emif_attr_inf3_clear.attr.attr,
0136
0137     NULL,
0138 };
0139
0140 static umode_t dfl_emif_visible(struct kobject *kobj,
0141                 struct attribute *attr, int n)
0142 {
0143     struct dfl_emif *de = dev_get_drvdata(kobj_to_dev(kobj));
0144     struct emif_attr *eattr = container_of(attr, struct emif_attr,
0145                            attr.attr);
0146     u64 val;
0147
0148     /*
0149      * This device supports upto 4 memory interfaces, but not all
0150      * interfaces are used on different platforms. The read out value of
0151      * CLEAN_EN field (which is a bitmap) could tell how many interfaces
0152      * are available.
0153      */
0154     val = FIELD_GET(EMIF_CTRL_CLEAR_EN_MSK, readq(de->base + EMIF_CTRL));
0155
0156     return (val & BIT_ULL(eattr->index)) ? attr->mode : 0;
0157 }
0158
0159 static const struct attribute_group dfl_emif_group = {
0160     .is_visible = dfl_emif_visible,
0161     .attrs = dfl_emif_attrs,
0162 };
0163
0164 static const struct attribute_group *dfl_emif_groups[] = {
0165     &dfl_emif_group,
0166     NULL,
0167 };
0168
0169 static int dfl_emif_probe(struct dfl_device *ddev)
0170 {
0171     struct device *dev = &ddev->dev;
0172     struct dfl_emif *de;
0173
0174     de = devm_kzalloc(dev, sizeof(*de), GFP_KERNEL);
0175     if (!de)
0176         return -ENOMEM;
0177
0178     de->base = devm_ioremap_resource(dev, &ddev->mmio_res);
0179     if (IS_ERR(de->base))
0180         return PTR_ERR(de->base);
0181
0182     de->dev = dev;
0183     spin_lock_init(&de->lock);
0184     dev_set_drvdata(dev, de);
0185
0186     return 0;
0187 }
0188
0189 static const struct dfl_device_id dfl_emif_ids[] = {
0190     { FME_ID, FME_FEATURE_ID_EMIF },
0191     { }
0192 };
0193 MODULE_DEVICE_TABLE(dfl, dfl_emif_ids);
0194
0195 static struct dfl_driver dfl_emif_driver = {
0196     .drv    = {
0197         .name       = "dfl-emif",
0198         .dev_groups = dfl_emif_groups,
0199     },
0200     .id_table = dfl_emif_ids,
0201     .probe   = dfl_emif_probe,
0202 };
0203 module_dfl_driver(dfl_emif_driver);
0204
0205 MODULE_DESCRIPTION("DFL EMIF driver");
0206 MODULE_AUTHOR("Intel Corporation");
0207 MODULE_LICENSE("GPL v2");