gspca/stv06xx/stv06xx_hdcs.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copyright (c) 2001 Jean-Fredric Clere, Nikolas Zimmermann, Georg Acher
0004  *            Mark Cave-Ayland, Carlo E Prelz, Dick Streefland
0005  * Copyright (c) 2002, 2003 Tuukka Toivonen
0006  * Copyright (c) 2008 Erik Andrén
0007  * Copyright (c) 2008 Chia-I Wu
0008  *
0009  * P/N 861037:      Sensor HDCS1000        ASIC STV0600
0010  * P/N 861050-0010: Sensor HDCS1000        ASIC STV0600
0011  * P/N 861050-0020: Sensor Photobit PB100  ASIC STV0600-1 - QuickCam Express
0012  * P/N 861055:      Sensor ST VV6410       ASIC STV0610   - LEGO cam
0013  * P/N 861075-0040: Sensor HDCS1000        ASIC
0014  * P/N 961179-0700: Sensor ST VV6410       ASIC STV0602   - Dexxa WebCam USB
0015  * P/N 861040-0000: Sensor ST VV6410       ASIC STV0610   - QuickCam Web
0016  */
0017
0018 #ifndef STV06XX_HDCS_H_
0019 #define STV06XX_HDCS_H_
0020
0021 #include "stv06xx_sensor.h"
0022
0023 #define HDCS_REG_CONFIG(sd) (IS_1020(sd) ? HDCS20_CONFIG : HDCS00_CONFIG)
0024 #define HDCS_REG_CONTROL(sd)    (IS_1020(sd) ? HDCS20_CONTROL : HDCS00_CONTROL)
0025
0026 #define HDCS_1X00_DEF_WIDTH 360
0027 #define HDCS_1X00_DEF_HEIGHT    296
0028
0029 #define HDCS_1020_DEF_WIDTH 352
0030 #define HDCS_1020_DEF_HEIGHT    292
0031
0032 #define HDCS_1020_BOTTOM_Y_SKIP 4
0033
0034 #define HDCS_CLK_FREQ_MHZ   25
0035
0036 #define HDCS_ADC_START_SIG_DUR  3
0037
0038 /* LSB bit of I2C or register address signifies write (0) or read (1) */
0039 /* I2C Registers common for both HDCS-1000/1100 and HDCS-1020 */
0040 /* Identifications Register */
0041 #define HDCS_IDENT      (0x00 << 1)
0042 /* Status Register */
0043 #define HDCS_STATUS     (0x01 << 1)
0044 /* Interrupt Mask Register */
0045 #define HDCS_IMASK      (0x02 << 1)
0046 /* Pad Control Register */
0047 #define HDCS_PCTRL      (0x03 << 1)
0048 /* Pad Drive Control Register */
0049 #define HDCS_PDRV       (0x04 << 1)
0050 /* Interface Control Register */
0051 #define HDCS_ICTRL      (0x05 << 1)
0052 /* Interface Timing Register */
0053 #define HDCS_ITMG       (0x06 << 1)
0054 /* Baud Fraction Register */
0055 #define HDCS_BFRAC      (0x07 << 1)
0056 /* Baud Rate Register */
0057 #define HDCS_BRATE      (0x08 << 1)
0058 /* ADC Control Register */
0059 #define HDCS_ADCCTRL        (0x09 << 1)
0060 /* First Window Row Register */
0061 #define HDCS_FWROW      (0x0a << 1)
0062 /* First Window Column Register */
0063 #define HDCS_FWCOL      (0x0b << 1)
0064 /* Last Window Row Register */
0065 #define HDCS_LWROW      (0x0c << 1)
0066 /* Last Window Column Register */
0067 #define HDCS_LWCOL      (0x0d << 1)
0068 /* Timing Control Register */
0069 #define HDCS_TCTRL      (0x0e << 1)
0070 /* PGA Gain Register: Even Row, Even Column */
0071 #define HDCS_ERECPGA        (0x0f << 1)
0072 /* PGA Gain Register: Even Row, Odd Column */
0073 #define HDCS_EROCPGA        (0x10 << 1)
0074 /* PGA Gain Register: Odd Row, Even Column */
0075 #define HDCS_ORECPGA        (0x11 << 1)
0076 /* PGA Gain Register: Odd Row, Odd Column */
0077 #define HDCS_OROCPGA        (0x12 << 1)
0078 /* Row Exposure Low Register */
0079 #define HDCS_ROWEXPL        (0x13 << 1)
0080 /* Row Exposure High Register */
0081 #define HDCS_ROWEXPH        (0x14 << 1)
0082
0083 /* I2C Registers only for HDCS-1000/1100 */
0084 /* Sub-Row Exposure Low Register */
0085 #define HDCS00_SROWEXPL     (0x15 << 1)
0086 /* Sub-Row Exposure High Register */
0087 #define HDCS00_SROWEXPH     (0x16 << 1)
0088 /* Configuration Register */
0089 #define HDCS00_CONFIG       (0x17 << 1)
0090 /* Control Register */
0091 #define HDCS00_CONTROL      (0x18 << 1)
0092
0093 /* I2C Registers only for HDCS-1020 */
0094 /* Sub-Row Exposure Register */
0095 #define HDCS20_SROWEXP      (0x15 << 1)
0096 /* Error Control Register */
0097 #define HDCS20_ERROR        (0x16 << 1)
0098 /* Interface Timing 2 Register */
0099 #define HDCS20_ITMG2        (0x17 << 1)
0100 /* Interface Control 2 Register */
0101 #define HDCS20_ICTRL2       (0x18 << 1)
0102 /* Horizontal Blank Register */
0103 #define HDCS20_HBLANK       (0x19 << 1)
0104 /* Vertical Blank Register */
0105 #define HDCS20_VBLANK       (0x1a << 1)
0106 /* Configuration Register */
0107 #define HDCS20_CONFIG       (0x1b << 1)
0108 /* Control Register */
0109 #define HDCS20_CONTROL      (0x1c << 1)
0110
0111 #define HDCS_RUN_ENABLE     (1 << 2)
0112 #define HDCS_SLEEP_MODE     (1 << 1)
0113
0114 #define HDCS_DEFAULT_EXPOSURE   48
0115 #define HDCS_DEFAULT_GAIN   50
0116
0117 static int hdcs_probe_1x00(struct sd *sd);
0118 static int hdcs_probe_1020(struct sd *sd);
0119 static int hdcs_start(struct sd *sd);
0120 static int hdcs_init(struct sd *sd);
0121 static int hdcs_init_controls(struct sd *sd);
0122 static int hdcs_stop(struct sd *sd);
0123 static int hdcs_dump(struct sd *sd);
0124
0125 static int hdcs_set_exposure(struct gspca_dev *gspca_dev, __s32 val);
0126 static int hdcs_set_gain(struct gspca_dev *gspca_dev, __s32 val);
0127
0128 const struct stv06xx_sensor stv06xx_sensor_hdcs1x00 = {
0129     .name = "HP HDCS-1000/1100",
0130     .i2c_flush = 0,
0131     .i2c_addr = (0x55 << 1),
0132     .i2c_len = 1,
0133
0134     /* FIXME (see if we can lower min_packet_size, needs testing, and also
0135        adjusting framerate when the bandwidth gets lower) */
0136     .min_packet_size = { 847 },
0137     .max_packet_size = { 847 },
0138
0139     .init = hdcs_init,
0140     .init_controls = hdcs_init_controls,
0141     .probe = hdcs_probe_1x00,
0142     .start = hdcs_start,
0143     .stop = hdcs_stop,
0144     .dump = hdcs_dump,
0145 };
0146
0147 const struct stv06xx_sensor stv06xx_sensor_hdcs1020 = {
0148     .name = "HDCS-1020",
0149     .i2c_flush = 0,
0150     .i2c_addr = (0x55 << 1),
0151     .i2c_len = 1,
0152
0153     /* FIXME (see if we can lower min_packet_size, needs testing, and also
0154        adjusting framerate when the bandwidthm gets lower) */
0155     .min_packet_size = { 847 },
0156     .max_packet_size = { 847 },
0157
0158     .init = hdcs_init,
0159     .init_controls = hdcs_init_controls,
0160     .probe = hdcs_probe_1020,
0161     .start = hdcs_start,
0162     .stop = hdcs_stop,
0163     .dump = hdcs_dump,
0164 };
0165
0166 static const u16 stv_bridge_init[][2] = {
0167     {STV_ISO_ENABLE, 0},
0168     {STV_REG23, 0},
0169     {STV_REG00, 0x1d},
0170     {STV_REG01, 0xb5},
0171     {STV_REG02, 0xa8},
0172     {STV_REG03, 0x95},
0173     {STV_REG04, 0x07},
0174
0175     {STV_SCAN_RATE, 0x20},
0176     {STV_Y_CTRL, 0x01},
0177     {STV_X_CTRL, 0x0a}
0178 };
0179
0180 static const u8 stv_sensor_init[][2] = {
0181     /* Clear status (writing 1 will clear the corresponding status bit) */
0182     {HDCS_STATUS, BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1)},
0183     /* Disable all interrupts */
0184     {HDCS_IMASK, 0x00},
0185     {HDCS_PCTRL, BIT(6) | BIT(5) | BIT(1) | BIT(0)},
0186     {HDCS_PDRV,  0x00},
0187     {HDCS_ICTRL, BIT(5)},
0188     {HDCS_ITMG,  BIT(4) | BIT(1)},
0189     /* ADC output resolution to 10 bits */
0190     {HDCS_ADCCTRL, 10}
0191 };
0192
0193 #endif