usb/dvb-usb/cinergyT2-fe.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * TerraTec Cinergy T2/qanu USB2 DVB-T adapter.
0004  *
0005  * Copyright (C) 2007 Tomi Orava (tomimo@ncircle.nullnet.fi)
0006  *
0007  * Based on the dvb-usb-framework code and the
0008  * original Terratec Cinergy T2 driver by:
0009  *
0010  * Copyright (C) 2004 Daniel Mack <daniel@qanu.de> and
0011  *                  Holger Waechtler <holger@qanu.de>
0012  *
0013  *  Protocol Spec published on http://qanu.de/specs/terratec_cinergyT2.pdf
0014  */
0015
0016 #include "cinergyT2.h"
0017
0018
0019 /*
0020  *  convert linux-dvb frontend parameter set into TPS.
0021  *  See ETSI ETS-300744, section 4.6.2, table 9 for details.
0022  *
0023  *  This function is probably reusable and may better get placed in a support
0024  *  library.
0025  *
0026  *  We replace erroneous fields by default TPS fields (the ones with value 0).
0027  */
0028
0029 static uint16_t compute_tps(struct dtv_frontend_properties *op)
0030 {
0031     uint16_t tps = 0;
0032
0033     switch (op->code_rate_HP) {
0034     case FEC_2_3:
0035         tps |= (1 << 7);
0036         break;
0037     case FEC_3_4:
0038         tps |= (2 << 7);
0039         break;
0040     case FEC_5_6:
0041         tps |= (3 << 7);
0042         break;
0043     case FEC_7_8:
0044         tps |= (4 << 7);
0045         break;
0046     case FEC_1_2:
0047     case FEC_AUTO:
0048     default:
0049         /* tps |= (0 << 7) */;
0050     }
0051
0052     switch (op->code_rate_LP) {
0053     case FEC_2_3:
0054         tps |= (1 << 4);
0055         break;
0056     case FEC_3_4:
0057         tps |= (2 << 4);
0058         break;
0059     case FEC_5_6:
0060         tps |= (3 << 4);
0061         break;
0062     case FEC_7_8:
0063         tps |= (4 << 4);
0064         break;
0065     case FEC_1_2:
0066     case FEC_AUTO:
0067     default:
0068         /* tps |= (0 << 4) */;
0069     }
0070
0071     switch (op->modulation) {
0072     case QAM_16:
0073         tps |= (1 << 13);
0074         break;
0075     case QAM_64:
0076         tps |= (2 << 13);
0077         break;
0078     case QPSK:
0079     default:
0080         /* tps |= (0 << 13) */;
0081     }
0082
0083     switch (op->transmission_mode) {
0084     case TRANSMISSION_MODE_8K:
0085         tps |= (1 << 0);
0086         break;
0087     case TRANSMISSION_MODE_2K:
0088     default:
0089         /* tps |= (0 << 0) */;
0090     }
0091
0092     switch (op->guard_interval) {
0093     case GUARD_INTERVAL_1_16:
0094         tps |= (1 << 2);
0095         break;
0096     case GUARD_INTERVAL_1_8:
0097         tps |= (2 << 2);
0098         break;
0099     case GUARD_INTERVAL_1_4:
0100         tps |= (3 << 2);
0101         break;
0102     case GUARD_INTERVAL_1_32:
0103     default:
0104         /* tps |= (0 << 2) */;
0105     }
0106
0107     switch (op->hierarchy) {
0108     case HIERARCHY_1:
0109         tps |= (1 << 10);
0110         break;
0111     case HIERARCHY_2:
0112         tps |= (2 << 10);
0113         break;
0114     case HIERARCHY_4:
0115         tps |= (3 << 10);
0116         break;
0117     case HIERARCHY_NONE:
0118     default:
0119         /* tps |= (0 << 10) */;
0120     }
0121
0122     return tps;
0123 }
0124
0125 struct cinergyt2_fe_state {
0126     struct dvb_frontend fe;
0127     struct dvb_usb_device *d;
0128
0129     unsigned char data[64];
0130     struct mutex data_mutex;
0131
0132     struct dvbt_get_status_msg status;
0133 };
0134
0135 static int cinergyt2_fe_read_status(struct dvb_frontend *fe,
0136                     enum fe_status *status)
0137 {
0138     struct cinergyt2_fe_state *state = fe->demodulator_priv;
0139     int ret;
0140
0141     mutex_lock(&state->data_mutex);
0142     state->data[0] = CINERGYT2_EP1_GET_TUNER_STATUS;
0143
0144     ret = dvb_usb_generic_rw(state->d, state->data, 1,
0145                  state->data, sizeof(state->status), 0);
0146     if (!ret)
0147         memcpy(&state->status, state->data, sizeof(state->status));
0148     mutex_unlock(&state->data_mutex);
0149
0150     if (ret < 0)
0151         return ret;
0152
0153     *status = 0;
0154
0155     if (0xffff - le16_to_cpu(state->status.gain) > 30)
0156         *status |= FE_HAS_SIGNAL;
0157     if (state->status.lock_bits & (1 << 6))
0158         *status |= FE_HAS_LOCK;
0159     if (state->status.lock_bits & (1 << 5))
0160         *status |= FE_HAS_SYNC;
0161     if (state->status.lock_bits & (1 << 4))
0162         *status |= FE_HAS_CARRIER;
0163     if (state->status.lock_bits & (1 << 1))
0164         *status |= FE_HAS_VITERBI;
0165
0166     if ((*status & (FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC)) !=
0167             (FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC))
0168         *status &= ~FE_HAS_LOCK;
0169
0170     return 0;
0171 }
0172
0173 static int cinergyt2_fe_read_ber(struct dvb_frontend *fe, u32 *ber)
0174 {
0175     struct cinergyt2_fe_state *state = fe->demodulator_priv;
0176
0177     *ber = le32_to_cpu(state->status.viterbi_error_rate);
0178     return 0;
0179 }
0180
0181 static int cinergyt2_fe_read_unc_blocks(struct dvb_frontend *fe, u32 *unc)
0182 {
0183     struct cinergyt2_fe_state *state = fe->demodulator_priv;
0184
0185     *unc = le32_to_cpu(state->status.uncorrected_block_count);
0186     return 0;
0187 }
0188
0189 static int cinergyt2_fe_read_signal_strength(struct dvb_frontend *fe,
0190                         u16 *strength)
0191 {
0192     struct cinergyt2_fe_state *state = fe->demodulator_priv;
0193
0194     *strength = (0xffff - le16_to_cpu(state->status.gain));
0195     return 0;
0196 }
0197
0198 static int cinergyt2_fe_read_snr(struct dvb_frontend *fe, u16 *snr)
0199 {
0200     struct cinergyt2_fe_state *state = fe->demodulator_priv;
0201
0202     *snr = (state->status.snr << 8) | state->status.snr;
0203     return 0;
0204 }
0205
0206 static int cinergyt2_fe_init(struct dvb_frontend *fe)
0207 {
0208     return 0;
0209 }
0210
0211 static int cinergyt2_fe_sleep(struct dvb_frontend *fe)
0212 {
0213     deb_info("cinergyt2_fe_sleep() Called\n");
0214     return 0;
0215 }
0216
0217 static int cinergyt2_fe_get_tune_settings(struct dvb_frontend *fe,
0218                 struct dvb_frontend_tune_settings *tune)
0219 {
0220     tune->min_delay_ms = 800;
0221     return 0;
0222 }
0223
0224 static int cinergyt2_fe_set_frontend(struct dvb_frontend *fe)
0225 {
0226     struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
0227     struct cinergyt2_fe_state *state = fe->demodulator_priv;
0228     struct dvbt_set_parameters_msg *param;
0229     int err;
0230
0231     mutex_lock(&state->data_mutex);
0232
0233     param = (void *)state->data;
0234     param->cmd = CINERGYT2_EP1_SET_TUNER_PARAMETERS;
0235     param->tps = cpu_to_le16(compute_tps(fep));
0236     param->freq = cpu_to_le32(fep->frequency / 1000);
0237     param->flags = 0;
0238
0239     switch (fep->bandwidth_hz) {
0240     default:
0241     case 8000000:
0242         param->bandwidth = 8;
0243         break;
0244     case 7000000:
0245         param->bandwidth = 7;
0246         break;
0247     case 6000000:
0248         param->bandwidth = 6;
0249         break;
0250     }
0251
0252     err = dvb_usb_generic_rw(state->d, state->data, sizeof(*param),
0253                  state->data, 2, 0);
0254     if (err < 0)
0255         err("cinergyt2_fe_set_frontend() Failed! err=%d\n", err);
0256
0257     mutex_unlock(&state->data_mutex);
0258     return (err < 0) ? err : 0;
0259 }
0260
0261 static void cinergyt2_fe_release(struct dvb_frontend *fe)
0262 {
0263     struct cinergyt2_fe_state *state = fe->demodulator_priv;
0264     kfree(state);
0265 }
0266
0267 static const struct dvb_frontend_ops cinergyt2_fe_ops;
0268
0269 struct dvb_frontend *cinergyt2_fe_attach(struct dvb_usb_device *d)
0270 {
0271     struct cinergyt2_fe_state *s = kzalloc(sizeof(
0272                     struct cinergyt2_fe_state), GFP_KERNEL);
0273     if (s == NULL)
0274         return NULL;
0275
0276     s->d = d;
0277     memcpy(&s->fe.ops, &cinergyt2_fe_ops, sizeof(struct dvb_frontend_ops));
0278     s->fe.demodulator_priv = s;
0279     mutex_init(&s->data_mutex);
0280     return &s->fe;
0281 }
0282
0283
0284 static const struct dvb_frontend_ops cinergyt2_fe_ops = {
0285     .delsys = { SYS_DVBT },
0286     .info = {
0287         .name           = DRIVER_NAME,
0288         .frequency_min_hz   = 174 * MHz,
0289         .frequency_max_hz   = 862 * MHz,
0290         .frequency_stepsize_hz  = 166667,
0291         .caps = FE_CAN_INVERSION_AUTO | FE_CAN_FEC_1_2
0292             | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4
0293             | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8
0294             | FE_CAN_FEC_AUTO | FE_CAN_QPSK
0295             | FE_CAN_QAM_16 | FE_CAN_QAM_64
0296             | FE_CAN_QAM_AUTO
0297             | FE_CAN_TRANSMISSION_MODE_AUTO
0298             | FE_CAN_GUARD_INTERVAL_AUTO
0299             | FE_CAN_HIERARCHY_AUTO
0300             | FE_CAN_RECOVER
0301             | FE_CAN_MUTE_TS
0302     },
0303
0304     .release        = cinergyt2_fe_release,
0305
0306     .init           = cinergyt2_fe_init,
0307     .sleep          = cinergyt2_fe_sleep,
0308
0309     .set_frontend       = cinergyt2_fe_set_frontend,
0310     .get_tune_settings  = cinergyt2_fe_get_tune_settings,
0311
0312     .read_status        = cinergyt2_fe_read_status,
0313     .read_ber       = cinergyt2_fe_read_ber,
0314     .read_signal_strength   = cinergyt2_fe_read_signal_strength,
0315     .read_snr       = cinergyt2_fe_read_snr,
0316     .read_ucblocks      = cinergyt2_fe_read_unc_blocks,
0317 };