usb/dvb-usb-v2/rtl28xxu.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Realtek RTL28xxU DVB USB driver
0004  *
0005  * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
0006  * Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
0007  */
0008
0009 #ifndef RTL28XXU_H
0010 #define RTL28XXU_H
0011
0012 #include <linux/platform_device.h>
0013
0014 #include "dvb_usb.h"
0015
0016 #include "rtl2830.h"
0017 #include "rtl2832.h"
0018 #include "rtl2832_sdr.h"
0019 #include "mn88472.h"
0020 #include "mn88473.h"
0021 #include "cxd2841er.h"
0022
0023 #include "qt1010.h"
0024 #include "mt2060.h"
0025 #include "mxl5005s.h"
0026 #include "fc0012.h"
0027 #include "fc0013.h"
0028 #include "e4000.h"
0029 #include "fc2580.h"
0030 #include "tua9001.h"
0031 #include "r820t.h"
0032 #include "si2168.h"
0033 #include "si2157.h"
0034
0035 /*
0036  * USB commands
0037  * (usb_control_msg() index parameter)
0038  */
0039
0040 #define DEMOD            0x0000
0041 #define USB              0x0100
0042 #define SYS              0x0200
0043 #define I2C              0x0300
0044 #define I2C_DA           0x0600
0045
0046 #define CMD_WR_FLAG      0x0010
0047 #define CMD_DEMOD_RD     0x0000
0048 #define CMD_DEMOD_WR     0x0010
0049 #define CMD_USB_RD       0x0100
0050 #define CMD_USB_WR       0x0110
0051 #define CMD_SYS_RD       0x0200
0052 #define CMD_IR_RD        0x0201
0053 #define CMD_IR_WR        0x0211
0054 #define CMD_SYS_WR       0x0210
0055 #define CMD_I2C_RD       0x0300
0056 #define CMD_I2C_WR       0x0310
0057 #define CMD_I2C_DA_RD    0x0600
0058 #define CMD_I2C_DA_WR    0x0610
0059
0060
0061 struct rtl28xxu_dev {
0062     u8 buf[128];
0063     u8 chip_id;
0064     u8 tuner;
0065     char *tuner_name;
0066     u8 page; /* integrated demod active register page */
0067     struct i2c_adapter *demod_i2c_adapter;
0068     bool rc_active;
0069     bool new_i2c_write;
0070     struct i2c_client *i2c_client_demod;
0071     struct i2c_client *i2c_client_tuner;
0072     struct i2c_client *i2c_client_slave_demod;
0073     struct platform_device *platform_device_sdr;
0074     #define SLAVE_DEMOD_NONE           0
0075     #define SLAVE_DEMOD_MN88472        1
0076     #define SLAVE_DEMOD_MN88473        2
0077     #define SLAVE_DEMOD_SI2168         3
0078     #define SLAVE_DEMOD_CXD2837ER      4
0079     unsigned int slave_demod:3;
0080     union {
0081         struct rtl2830_platform_data rtl2830_platform_data;
0082         struct rtl2832_platform_data rtl2832_platform_data;
0083     };
0084 };
0085
0086 enum rtl28xxu_chip_id {
0087     CHIP_ID_NONE,
0088     CHIP_ID_RTL2831U,
0089     CHIP_ID_RTL2832U,
0090 };
0091
0092 /* XXX: Hack. This must be keep sync with rtl2832 demod driver. */
0093 enum rtl28xxu_tuner {
0094     TUNER_NONE,
0095
0096     TUNER_RTL2830_QT1010          = 0x10,
0097     TUNER_RTL2830_MT2060,
0098     TUNER_RTL2830_MXL5005S,
0099
0100     TUNER_RTL2832_MT2266          = 0x20,
0101     TUNER_RTL2832_FC2580,
0102     TUNER_RTL2832_MT2063,
0103     TUNER_RTL2832_MAX3543,
0104     TUNER_RTL2832_TUA9001,
0105     TUNER_RTL2832_MXL5007T,
0106     TUNER_RTL2832_FC0012,
0107     TUNER_RTL2832_E4000,
0108     TUNER_RTL2832_TDA18272,
0109     TUNER_RTL2832_FC0013,
0110     TUNER_RTL2832_R820T,
0111     TUNER_RTL2832_R828D,
0112     TUNER_RTL2832_SI2157,
0113 };
0114
0115 struct rtl28xxu_req {
0116     u16 value;
0117     u16 index;
0118     u16 size;
0119     u8 *data;
0120 };
0121
0122 struct rtl28xxu_reg_val {
0123     u16 reg;
0124     u8 val;
0125 };
0126
0127 struct rtl28xxu_reg_val_mask {
0128     u16 reg;
0129     u8 val;
0130     u8 mask;
0131 };
0132
0133 /*
0134  * memory map
0135  *
0136  * 0x0000 DEMOD : demodulator
0137  * 0x2000 USB   : SIE, USB endpoint, debug, DMA
0138  * 0x3000 SYS   : system
0139  * 0xfc00 RC    : remote controller (not RTL2831U)
0140  */
0141
0142 /*
0143  * USB registers
0144  */
0145 /* SIE Control Registers */
0146 #define USB_SYSCTL         0x2000 /* USB system control */
0147 #define USB_SYSCTL_0       0x2000 /* USB system control */
0148 #define USB_SYSCTL_1       0x2001 /* USB system control */
0149 #define USB_SYSCTL_2       0x2002 /* USB system control */
0150 #define USB_SYSCTL_3       0x2003 /* USB system control */
0151 #define USB_IRQSTAT        0x2008 /* SIE interrupt status */
0152 #define USB_IRQEN          0x200C /* SIE interrupt enable */
0153 #define USB_CTRL           0x2010 /* USB control */
0154 #define USB_STAT           0x2014 /* USB status */
0155 #define USB_DEVADDR        0x2018 /* USB device address */
0156 #define USB_TEST           0x201C /* USB test mode */
0157 #define USB_FRAME_NUMBER   0x2020 /* frame number */
0158 #define USB_FIFO_ADDR      0x2028 /* address of SIE FIFO RAM */
0159 #define USB_FIFO_CMD       0x202A /* SIE FIFO RAM access command */
0160 #define USB_FIFO_DATA      0x2030 /* SIE FIFO RAM data */
0161 /* Endpoint Registers */
0162 #define EP0_SETUPA         0x20F8 /* EP 0 setup packet lower byte */
0163 #define EP0_SETUPB         0x20FC /* EP 0 setup packet higher byte */
0164 #define USB_EP0_CFG        0x2104 /* EP 0 configure */
0165 #define USB_EP0_CTL        0x2108 /* EP 0 control */
0166 #define USB_EP0_STAT       0x210C /* EP 0 status */
0167 #define USB_EP0_IRQSTAT    0x2110 /* EP 0 interrupt status */
0168 #define USB_EP0_IRQEN      0x2114 /* EP 0 interrupt enable */
0169 #define USB_EP0_MAXPKT     0x2118 /* EP 0 max packet size */
0170 #define USB_EP0_BC         0x2120 /* EP 0 FIFO byte counter */
0171 #define USB_EPA_CFG        0x2144 /* EP A configure */
0172 #define USB_EPA_CFG_0      0x2144 /* EP A configure */
0173 #define USB_EPA_CFG_1      0x2145 /* EP A configure */
0174 #define USB_EPA_CFG_2      0x2146 /* EP A configure */
0175 #define USB_EPA_CFG_3      0x2147 /* EP A configure */
0176 #define USB_EPA_CTL        0x2148 /* EP A control */
0177 #define USB_EPA_CTL_0      0x2148 /* EP A control */
0178 #define USB_EPA_CTL_1      0x2149 /* EP A control */
0179 #define USB_EPA_CTL_2      0x214A /* EP A control */
0180 #define USB_EPA_CTL_3      0x214B /* EP A control */
0181 #define USB_EPA_STAT       0x214C /* EP A status */
0182 #define USB_EPA_IRQSTAT    0x2150 /* EP A interrupt status */
0183 #define USB_EPA_IRQEN      0x2154 /* EP A interrupt enable */
0184 #define USB_EPA_MAXPKT     0x2158 /* EP A max packet size */
0185 #define USB_EPA_MAXPKT_0   0x2158 /* EP A max packet size */
0186 #define USB_EPA_MAXPKT_1   0x2159 /* EP A max packet size */
0187 #define USB_EPA_MAXPKT_2   0x215A /* EP A max packet size */
0188 #define USB_EPA_MAXPKT_3   0x215B /* EP A max packet size */
0189 #define USB_EPA_FIFO_CFG   0x2160 /* EP A FIFO configure */
0190 #define USB_EPA_FIFO_CFG_0 0x2160 /* EP A FIFO configure */
0191 #define USB_EPA_FIFO_CFG_1 0x2161 /* EP A FIFO configure */
0192 #define USB_EPA_FIFO_CFG_2 0x2162 /* EP A FIFO configure */
0193 #define USB_EPA_FIFO_CFG_3 0x2163 /* EP A FIFO configure */
0194 /* Debug Registers */
0195 #define USB_PHYTSTDIS      0x2F04 /* PHY test disable */
0196 #define USB_TOUT_VAL       0x2F08 /* USB time-out time */
0197 #define USB_VDRCTRL        0x2F10 /* UTMI vendor signal control */
0198 #define USB_VSTAIN         0x2F14 /* UTMI vendor signal status in */
0199 #define USB_VLOADM         0x2F18 /* UTMI load vendor signal status in */
0200 #define USB_VSTAOUT        0x2F1C /* UTMI vendor signal status out */
0201 #define USB_UTMI_TST       0x2F80 /* UTMI test */
0202 #define USB_UTMI_STATUS    0x2F84 /* UTMI status */
0203 #define USB_TSTCTL         0x2F88 /* test control */
0204 #define USB_TSTCTL2        0x2F8C /* test control 2 */
0205 #define USB_PID_FORCE      0x2F90 /* force PID */
0206 #define USB_PKTERR_CNT     0x2F94 /* packet error counter */
0207 #define USB_RXERR_CNT      0x2F98 /* RX error counter */
0208 #define USB_MEM_BIST       0x2F9C /* MEM BIST test */
0209 #define USB_SLBBIST        0x2FA0 /* self-loop-back BIST */
0210 #define USB_CNTTEST        0x2FA4 /* counter test */
0211 #define USB_PHYTST         0x2FC0 /* USB PHY test */
0212 #define USB_DBGIDX         0x2FF0 /* select individual block debug signal */
0213 #define USB_DBGMUX         0x2FF4 /* debug signal module mux */
0214
0215 /*
0216  * SYS registers
0217  */
0218 /* demod control registers */
0219 #define SYS_SYS0           0x3000 /* include DEMOD_CTL, GPO, GPI, GPOE */
0220 #define SYS_DEMOD_CTL      0x3000 /* control register for DVB-T demodulator */
0221 /* GPIO registers */
0222 #define SYS_GPIO_OUT_VAL   0x3001 /* output value of GPIO */
0223 #define SYS_GPIO_IN_VAL    0x3002 /* input value of GPIO */
0224 #define SYS_GPIO_OUT_EN    0x3003 /* output enable of GPIO */
0225 #define SYS_SYS1           0x3004 /* include GPD, SYSINTE, SYSINTS, GP_CFG0 */
0226 #define SYS_GPIO_DIR       0x3004 /* direction control for GPIO */
0227 #define SYS_SYSINTE        0x3005 /* system interrupt enable */
0228 #define SYS_SYSINTS        0x3006 /* system interrupt status */
0229 #define SYS_GPIO_CFG0      0x3007 /* PAD configuration for GPIO0-GPIO3 */
0230 #define SYS_SYS2           0x3008 /* include GP_CFG1 and 3 reserved bytes */
0231 #define SYS_GPIO_CFG1      0x3008 /* PAD configuration for GPIO4 */
0232 #define SYS_DEMOD_CTL1     0x300B
0233
0234 /* IrDA registers */
0235 #define SYS_IRRC_PSR       0x3020 /* IR protocol selection */
0236 #define SYS_IRRC_PER       0x3024 /* IR protocol extension */
0237 #define SYS_IRRC_SF        0x3028 /* IR sampling frequency */
0238 #define SYS_IRRC_DPIR      0x302C /* IR data package interval */
0239 #define SYS_IRRC_CR        0x3030 /* IR control */
0240 #define SYS_IRRC_RP        0x3034 /* IR read port */
0241 #define SYS_IRRC_SR        0x3038 /* IR status */
0242 /* I2C master registers */
0243 #define SYS_I2CCR          0x3040 /* I2C clock */
0244 #define SYS_I2CMCR         0x3044 /* I2C master control */
0245 #define SYS_I2CMSTR        0x3048 /* I2C master SCL timing */
0246 #define SYS_I2CMSR         0x304C /* I2C master status */
0247 #define SYS_I2CMFR         0x3050 /* I2C master FIFO */
0248
0249 /*
0250  * IR registers
0251  */
0252 #define IR_RX_BUF          0xFC00
0253 #define IR_RX_IE           0xFD00
0254 #define IR_RX_IF           0xFD01
0255 #define IR_RX_CTRL         0xFD02
0256 #define IR_RX_CFG          0xFD03
0257 #define IR_MAX_DURATION0   0xFD04
0258 #define IR_MAX_DURATION1   0xFD05
0259 #define IR_IDLE_LEN0       0xFD06
0260 #define IR_IDLE_LEN1       0xFD07
0261 #define IR_GLITCH_LEN      0xFD08
0262 #define IR_RX_BUF_CTRL     0xFD09
0263 #define IR_RX_BUF_DATA     0xFD0A
0264 #define IR_RX_BC           0xFD0B
0265 #define IR_RX_CLK          0xFD0C
0266 #define IR_RX_C_COUNT_L    0xFD0D
0267 #define IR_RX_C_COUNT_H    0xFD0E
0268 #define IR_SUSPEND_CTRL    0xFD10
0269 #define IR_ERR_TOL_CTRL    0xFD11
0270 #define IR_UNIT_LEN        0xFD12
0271 #define IR_ERR_TOL_LEN     0xFD13
0272 #define IR_MAX_H_TOL_LEN   0xFD14
0273 #define IR_MAX_L_TOL_LEN   0xFD15
0274 #define IR_MASK_CTRL       0xFD16
0275 #define IR_MASK_DATA       0xFD17
0276 #define IR_RES_MASK_ADDR   0xFD18
0277 #define IR_RES_MASK_T_LEN  0xFD19
0278
0279 #endif