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0008 #include "mxl111sf-i2c.h"
0009 #include "mxl111sf.h"
0010
0011
0012
0013 #define SW_I2C_ADDR 0x1a
0014 #define SW_I2C_EN 0x02
0015 #define SW_SCL_OUT 0x04
0016 #define SW_SDA_OUT 0x08
0017 #define SW_SDA_IN 0x04
0018
0019 #define SW_I2C_BUSY_ADDR 0x2f
0020 #define SW_I2C_BUSY 0x02
0021
0022 static int mxl111sf_i2c_bitbang_sendbyte(struct mxl111sf_state *state,
0023 u8 byte)
0024 {
0025 int i, ret;
0026 u8 data = 0;
0027
0028 mxl_i2c("(0x%02x)", byte);
0029
0030 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
0031 if (mxl_fail(ret))
0032 goto fail;
0033
0034 for (i = 0; i < 8; i++) {
0035
0036 data = (byte & (0x80 >> i)) ? SW_SDA_OUT : 0;
0037
0038 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0039 0x10 | SW_I2C_EN | data);
0040 if (mxl_fail(ret))
0041 goto fail;
0042
0043 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0044 0x10 | SW_I2C_EN | data | SW_SCL_OUT);
0045 if (mxl_fail(ret))
0046 goto fail;
0047
0048 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0049 0x10 | SW_I2C_EN | data);
0050 if (mxl_fail(ret))
0051 goto fail;
0052 }
0053
0054
0055 if (!(byte & 1)) {
0056 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0057 0x10 | SW_I2C_EN | SW_SDA_OUT);
0058 if (mxl_fail(ret))
0059 goto fail;
0060 }
0061
0062
0063 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0064 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
0065 if (mxl_fail(ret))
0066 goto fail;
0067
0068 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
0069 if (mxl_fail(ret))
0070 goto fail;
0071
0072
0073 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0074 0x10 | SW_I2C_EN | SW_SDA_OUT);
0075 if (mxl_fail(ret))
0076 goto fail;
0077
0078 if (data & SW_SDA_IN)
0079 ret = -EIO;
0080 fail:
0081 return ret;
0082 }
0083
0084 static int mxl111sf_i2c_bitbang_recvbyte(struct mxl111sf_state *state,
0085 u8 *pbyte)
0086 {
0087 int i, ret;
0088 u8 byte = 0;
0089 u8 data = 0;
0090
0091 mxl_i2c("()");
0092
0093 *pbyte = 0;
0094
0095 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0096 0x10 | SW_I2C_EN | SW_SDA_OUT);
0097 if (mxl_fail(ret))
0098 goto fail;
0099
0100 for (i = 0; i < 8; i++) {
0101 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0102 0x10 | SW_I2C_EN |
0103 SW_SCL_OUT | SW_SDA_OUT);
0104 if (mxl_fail(ret))
0105 goto fail;
0106
0107 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
0108 if (mxl_fail(ret))
0109 goto fail;
0110
0111 if (data & SW_SDA_IN)
0112 byte |= (0x80 >> i);
0113
0114 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0115 0x10 | SW_I2C_EN | SW_SDA_OUT);
0116 if (mxl_fail(ret))
0117 goto fail;
0118 }
0119 *pbyte = byte;
0120 fail:
0121 return ret;
0122 }
0123
0124 static int mxl111sf_i2c_start(struct mxl111sf_state *state)
0125 {
0126 int ret;
0127
0128 mxl_i2c("()");
0129
0130 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0131 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
0132 if (mxl_fail(ret))
0133 goto fail;
0134
0135 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0136 0x10 | SW_I2C_EN | SW_SCL_OUT);
0137 if (mxl_fail(ret))
0138 goto fail;
0139
0140 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0141 0x10 | SW_I2C_EN);
0142 mxl_fail(ret);
0143 fail:
0144 return ret;
0145 }
0146
0147 static int mxl111sf_i2c_stop(struct mxl111sf_state *state)
0148 {
0149 int ret;
0150
0151 mxl_i2c("()");
0152
0153 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0154 0x10 | SW_I2C_EN);
0155 if (mxl_fail(ret))
0156 goto fail;
0157
0158 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0159 0x10 | SW_I2C_EN | SW_SCL_OUT);
0160 if (mxl_fail(ret))
0161 goto fail;
0162
0163 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0164 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
0165 if (mxl_fail(ret))
0166 goto fail;
0167
0168 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0169 0x10 | SW_SCL_OUT | SW_SDA_OUT);
0170 mxl_fail(ret);
0171 fail:
0172 return ret;
0173 }
0174
0175 static int mxl111sf_i2c_ack(struct mxl111sf_state *state)
0176 {
0177 int ret;
0178 u8 b = 0;
0179
0180 mxl_i2c("()");
0181
0182 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &b);
0183 if (mxl_fail(ret))
0184 goto fail;
0185
0186 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0187 0x10 | SW_I2C_EN);
0188 if (mxl_fail(ret))
0189 goto fail;
0190
0191
0192 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0193 0x10 | SW_I2C_EN | SW_SCL_OUT);
0194 if (mxl_fail(ret))
0195 goto fail;
0196
0197 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0198 0x10 | SW_I2C_EN | SW_SDA_OUT);
0199 mxl_fail(ret);
0200 fail:
0201 return ret;
0202 }
0203
0204 static int mxl111sf_i2c_nack(struct mxl111sf_state *state)
0205 {
0206 int ret;
0207
0208 mxl_i2c("()");
0209
0210
0211 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0212 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
0213 if (mxl_fail(ret))
0214 goto fail;
0215
0216 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
0217 0x10 | SW_I2C_EN | SW_SDA_OUT);
0218 mxl_fail(ret);
0219 fail:
0220 return ret;
0221 }
0222
0223
0224
0225 static int mxl111sf_i2c_sw_xfer_msg(struct mxl111sf_state *state,
0226 struct i2c_msg *msg)
0227 {
0228 int i, ret;
0229
0230 mxl_i2c("()");
0231
0232 if (msg->flags & I2C_M_RD) {
0233
0234 ret = mxl111sf_i2c_start(state);
0235 if (mxl_fail(ret))
0236 goto fail;
0237
0238 ret = mxl111sf_i2c_bitbang_sendbyte(state,
0239 (msg->addr << 1) | 0x01);
0240 if (mxl_fail(ret)) {
0241 mxl111sf_i2c_stop(state);
0242 goto fail;
0243 }
0244
0245 for (i = 0; i < msg->len; i++) {
0246 ret = mxl111sf_i2c_bitbang_recvbyte(state,
0247 &msg->buf[i]);
0248 if (mxl_fail(ret)) {
0249 mxl111sf_i2c_stop(state);
0250 goto fail;
0251 }
0252
0253 if (i < msg->len - 1)
0254 mxl111sf_i2c_ack(state);
0255 }
0256
0257 mxl111sf_i2c_nack(state);
0258
0259 ret = mxl111sf_i2c_stop(state);
0260 if (mxl_fail(ret))
0261 goto fail;
0262
0263 } else {
0264
0265 ret = mxl111sf_i2c_start(state);
0266 if (mxl_fail(ret))
0267 goto fail;
0268
0269 ret = mxl111sf_i2c_bitbang_sendbyte(state,
0270 (msg->addr << 1) & 0xfe);
0271 if (mxl_fail(ret)) {
0272 mxl111sf_i2c_stop(state);
0273 goto fail;
0274 }
0275
0276 for (i = 0; i < msg->len; i++) {
0277 ret = mxl111sf_i2c_bitbang_sendbyte(state,
0278 msg->buf[i]);
0279 if (mxl_fail(ret)) {
0280 mxl111sf_i2c_stop(state);
0281 goto fail;
0282 }
0283 }
0284
0285
0286 mxl111sf_i2c_stop(state);
0287 }
0288 fail:
0289 return ret;
0290 }
0291
0292
0293
0294 #define USB_WRITE_I2C_CMD 0x99
0295 #define USB_READ_I2C_CMD 0xdd
0296 #define USB_END_I2C_CMD 0xfe
0297
0298 #define USB_WRITE_I2C_CMD_LEN 26
0299 #define USB_READ_I2C_CMD_LEN 24
0300
0301 #define I2C_MUX_REG 0x30
0302 #define I2C_CONTROL_REG 0x00
0303 #define I2C_SLAVE_ADDR_REG 0x08
0304 #define I2C_DATA_REG 0x0c
0305 #define I2C_INT_STATUS_REG 0x10
0306
0307 static int mxl111sf_i2c_send_data(struct mxl111sf_state *state,
0308 u8 index, u8 *wdata)
0309 {
0310 int ret = mxl111sf_ctrl_msg(state, wdata[0],
0311 &wdata[1], 25, NULL, 0);
0312 mxl_fail(ret);
0313
0314 return ret;
0315 }
0316
0317 static int mxl111sf_i2c_get_data(struct mxl111sf_state *state,
0318 u8 index, u8 *wdata, u8 *rdata)
0319 {
0320 int ret = mxl111sf_ctrl_msg(state, wdata[0],
0321 &wdata[1], 25, rdata, 24);
0322 mxl_fail(ret);
0323
0324 return ret;
0325 }
0326
0327 static u8 mxl111sf_i2c_check_status(struct mxl111sf_state *state)
0328 {
0329 u8 status = 0;
0330 u8 buf[26];
0331
0332 mxl_i2c_adv("()");
0333
0334 buf[0] = USB_READ_I2C_CMD;
0335 buf[1] = 0x00;
0336
0337 buf[2] = I2C_INT_STATUS_REG;
0338 buf[3] = 0x00;
0339 buf[4] = 0x00;
0340
0341 buf[5] = USB_END_I2C_CMD;
0342
0343 mxl111sf_i2c_get_data(state, 0, buf, buf);
0344
0345 if (buf[1] & 0x04)
0346 status = 1;
0347
0348 return status;
0349 }
0350
0351 static u8 mxl111sf_i2c_check_fifo(struct mxl111sf_state *state)
0352 {
0353 u8 status = 0;
0354 u8 buf[26];
0355
0356 mxl_i2c("()");
0357
0358 buf[0] = USB_READ_I2C_CMD;
0359 buf[1] = 0x00;
0360
0361 buf[2] = I2C_MUX_REG;
0362 buf[3] = 0x00;
0363 buf[4] = 0x00;
0364
0365 buf[5] = I2C_INT_STATUS_REG;
0366 buf[6] = 0x00;
0367 buf[7] = 0x00;
0368 buf[8] = USB_END_I2C_CMD;
0369
0370 mxl111sf_i2c_get_data(state, 0, buf, buf);
0371
0372 if (0x08 == (buf[1] & 0x08))
0373 status = 1;
0374
0375 if ((buf[5] & 0x02) == 0x02)
0376 mxl_i2c("(buf[5] & 0x02) == 0x02");
0377
0378 return status;
0379 }
0380
0381 static int mxl111sf_i2c_readagain(struct mxl111sf_state *state,
0382 u8 count, u8 *rbuf)
0383 {
0384 u8 i2c_w_data[26];
0385 u8 i2c_r_data[24];
0386 u8 i = 0;
0387 u8 fifo_status = 0;
0388 int status = 0;
0389
0390 mxl_i2c("read %d bytes", count);
0391
0392 while ((fifo_status == 0) && (i++ < 5))
0393 fifo_status = mxl111sf_i2c_check_fifo(state);
0394
0395 i2c_w_data[0] = 0xDD;
0396 i2c_w_data[1] = 0x00;
0397
0398 for (i = 2; i < 26; i++)
0399 i2c_w_data[i] = 0xFE;
0400
0401 for (i = 0; i < count; i++) {
0402 i2c_w_data[2+(i*3)] = 0x0C;
0403 i2c_w_data[3+(i*3)] = 0x00;
0404 i2c_w_data[4+(i*3)] = 0x00;
0405 }
0406
0407 mxl111sf_i2c_get_data(state, 0, i2c_w_data, i2c_r_data);
0408
0409
0410 if (mxl111sf_i2c_check_status(state) == 1) {
0411 mxl_i2c("error!");
0412 } else {
0413 for (i = 0; i < count; i++) {
0414 rbuf[i] = i2c_r_data[(i*3)+1];
0415 mxl_i2c("%02x\t %02x",
0416 i2c_r_data[(i*3)+1],
0417 i2c_r_data[(i*3)+2]);
0418 }
0419
0420 status = 1;
0421 }
0422
0423 return status;
0424 }
0425
0426 #define HWI2C400 1
0427 static int mxl111sf_i2c_hw_xfer_msg(struct mxl111sf_state *state,
0428 struct i2c_msg *msg)
0429 {
0430 int i, k, ret = 0;
0431 u16 index = 0;
0432 u8 buf[26];
0433 u8 i2c_r_data[24];
0434 u16 block_len;
0435 u16 left_over_len;
0436 u8 rd_status[8];
0437 u8 ret_status;
0438 u8 readbuff[26];
0439
0440 mxl_i2c("addr: 0x%02x, read buff len: %d, write buff len: %d",
0441 msg->addr, (msg->flags & I2C_M_RD) ? msg->len : 0,
0442 (!(msg->flags & I2C_M_RD)) ? msg->len : 0);
0443
0444 for (index = 0; index < 26; index++)
0445 buf[index] = USB_END_I2C_CMD;
0446
0447
0448 buf[0] = USB_WRITE_I2C_CMD;
0449 buf[1] = 0x00;
0450
0451
0452 buf[2] = I2C_MUX_REG;
0453 buf[3] = 0x80;
0454 buf[4] = 0x00;
0455
0456
0457 buf[5] = I2C_MUX_REG;
0458 buf[6] = 0x81;
0459 buf[7] = 0x00;
0460
0461
0462 buf[8] = 0x14;
0463 buf[9] = 0xff;
0464 buf[10] = 0x00;
0465 #if 0
0466
0467 buf[8] = 0x24;
0468 buf[9] = 0xF7;
0469 buf[10] = 0x00;
0470 #endif
0471 buf[11] = 0x24;
0472 buf[12] = 0xF7;
0473 buf[13] = 0x00;
0474
0475 ret = mxl111sf_i2c_send_data(state, 0, buf);
0476
0477
0478 if (!(msg->flags & I2C_M_RD) && (msg->len > 0)) {
0479 mxl_i2c("%d\t%02x", msg->len, msg->buf[0]);
0480
0481
0482 buf[2] = I2C_CONTROL_REG;
0483 buf[3] = 0x5E;
0484 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
0485
0486
0487 buf[5] = I2C_SLAVE_ADDR_REG;
0488 buf[6] = (msg->addr);
0489 buf[7] = 0x00;
0490 buf[8] = USB_END_I2C_CMD;
0491 ret = mxl111sf_i2c_send_data(state, 0, buf);
0492
0493
0494 if (mxl111sf_i2c_check_status(state) == 1) {
0495 mxl_i2c("NACK writing slave address %02x",
0496 msg->addr);
0497
0498 buf[2] = I2C_CONTROL_REG;
0499 buf[3] = 0x4E;
0500 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
0501 ret = -EIO;
0502 goto exit;
0503 }
0504
0505
0506
0507
0508 block_len = (msg->len / 8);
0509 left_over_len = (msg->len % 8);
0510
0511 mxl_i2c("block_len %d, left_over_len %d",
0512 block_len, left_over_len);
0513
0514 for (index = 0; index < block_len; index++) {
0515 for (i = 0; i < 8; i++) {
0516
0517 buf[2+(i*3)] = I2C_DATA_REG;
0518 buf[3+(i*3)] = msg->buf[(index*8)+i];
0519 buf[4+(i*3)] = 0x00;
0520 }
0521
0522 ret = mxl111sf_i2c_send_data(state, 0, buf);
0523
0524
0525 if (mxl111sf_i2c_check_status(state) == 1) {
0526 mxl_i2c("NACK writing slave address %02x",
0527 msg->addr);
0528
0529
0530 buf[2] = I2C_CONTROL_REG;
0531 buf[3] = 0x4E;
0532 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
0533 ret = -EIO;
0534 goto exit;
0535 }
0536
0537 }
0538
0539 if (left_over_len) {
0540 for (k = 0; k < 26; k++)
0541 buf[k] = USB_END_I2C_CMD;
0542
0543 buf[0] = 0x99;
0544 buf[1] = 0x00;
0545
0546 for (i = 0; i < left_over_len; i++) {
0547 buf[2+(i*3)] = I2C_DATA_REG;
0548 buf[3+(i*3)] = msg->buf[(index*8)+i];
0549 mxl_i2c("index = %d %d data %d",
0550 index, i, msg->buf[(index*8)+i]);
0551 buf[4+(i*3)] = 0x00;
0552 }
0553 ret = mxl111sf_i2c_send_data(state, 0, buf);
0554
0555
0556 if (mxl111sf_i2c_check_status(state) == 1) {
0557 mxl_i2c("NACK writing slave address %02x",
0558 msg->addr);
0559
0560
0561 buf[2] = I2C_CONTROL_REG;
0562 buf[3] = 0x4E;
0563 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
0564 ret = -EIO;
0565 goto exit;
0566 }
0567
0568 }
0569
0570
0571 buf[2] = I2C_CONTROL_REG;
0572 buf[3] = 0x4E;
0573 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
0574
0575 }
0576
0577
0578 if ((msg->flags & I2C_M_RD) && (msg->len > 0)) {
0579 mxl_i2c("read buf len %d", msg->len);
0580
0581
0582
0583 buf[2] = I2C_CONTROL_REG;
0584 buf[3] = 0xDF;
0585 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
0586
0587
0588 buf[5] = 0x14;
0589 buf[6] = (msg->len & 0xFF);
0590 buf[7] = 0;
0591
0592
0593 buf[8] = I2C_SLAVE_ADDR_REG;
0594 buf[9] = msg->addr;
0595 buf[10] = 0x00;
0596 buf[11] = USB_END_I2C_CMD;
0597 ret = mxl111sf_i2c_send_data(state, 0, buf);
0598
0599
0600 if (mxl111sf_i2c_check_status(state) == 1) {
0601 mxl_i2c("NACK reading slave address %02x",
0602 msg->addr);
0603
0604
0605 buf[2] = I2C_CONTROL_REG;
0606 buf[3] = 0xC7;
0607 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
0608 ret = -EIO;
0609 goto exit;
0610 }
0611
0612
0613
0614
0615 block_len = ((msg->len) / 8);
0616 left_over_len = ((msg->len) % 8);
0617 index = 0;
0618
0619 mxl_i2c("block_len %d, left_over_len %d",
0620 block_len, left_over_len);
0621
0622
0623 buf[0] = USB_READ_I2C_CMD;
0624 buf[1] = 0x00;
0625
0626 for (index = 0; index < block_len; index++) {
0627
0628 for (i = 0; i < 8; i++) {
0629 buf[2+(i*3)] = I2C_DATA_REG;
0630 buf[3+(i*3)] = 0x00;
0631 buf[4+(i*3)] = 0x00;
0632 }
0633
0634 ret = mxl111sf_i2c_get_data(state, 0, buf, i2c_r_data);
0635
0636
0637 if (mxl111sf_i2c_check_status(state) == 1) {
0638 mxl_i2c("NACK reading slave address %02x",
0639 msg->addr);
0640
0641
0642 buf[2] = I2C_CONTROL_REG;
0643 buf[3] = 0xC7;
0644 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
0645 ret = -EIO;
0646 goto exit;
0647 }
0648
0649
0650 for (i = 0; i < 8; i++) {
0651 rd_status[i] = i2c_r_data[(i*3)+2];
0652
0653 if (rd_status[i] == 0x04) {
0654 if (i < 7) {
0655 mxl_i2c("i2c fifo empty! @ %d",
0656 i);
0657 msg->buf[(index*8)+i] =
0658 i2c_r_data[(i*3)+1];
0659
0660 ret_status =
0661 mxl111sf_i2c_readagain(
0662 state, 8-(i+1),
0663 readbuff);
0664 if (ret_status == 1) {
0665 for (k = 0;
0666 k < 8-(i+1);
0667 k++) {
0668
0669 msg->buf[(index*8)+(k+i+1)] =
0670 readbuff[k];
0671 mxl_i2c("read data: %02x\t %02x",
0672 msg->buf[(index*8)+(k+i)],
0673 (index*8)+(k+i));
0674 mxl_i2c("read data: %02x\t %02x",
0675 msg->buf[(index*8)+(k+i+1)],
0676 readbuff[k]);
0677
0678 }
0679 goto stop_copy;
0680 } else {
0681 mxl_i2c("readagain ERROR!");
0682 }
0683 } else {
0684 msg->buf[(index*8)+i] =
0685 i2c_r_data[(i*3)+1];
0686 }
0687 } else {
0688 msg->buf[(index*8)+i] =
0689 i2c_r_data[(i*3)+1];
0690 }
0691 }
0692 stop_copy:
0693 ;
0694
0695 }
0696
0697 if (left_over_len) {
0698 for (k = 0; k < 26; k++)
0699 buf[k] = USB_END_I2C_CMD;
0700
0701 buf[0] = 0xDD;
0702 buf[1] = 0x00;
0703
0704 for (i = 0; i < left_over_len; i++) {
0705 buf[2+(i*3)] = I2C_DATA_REG;
0706 buf[3+(i*3)] = 0x00;
0707 buf[4+(i*3)] = 0x00;
0708 }
0709 ret = mxl111sf_i2c_get_data(state, 0, buf,
0710 i2c_r_data);
0711
0712
0713 if (mxl111sf_i2c_check_status(state) == 1) {
0714 mxl_i2c("NACK reading slave address %02x",
0715 msg->addr);
0716
0717
0718 buf[2] = I2C_CONTROL_REG;
0719 buf[3] = 0xC7;
0720 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
0721 ret = -EIO;
0722 goto exit;
0723 }
0724
0725 for (i = 0; i < left_over_len; i++) {
0726 msg->buf[(block_len*8)+i] =
0727 i2c_r_data[(i*3)+1];
0728 mxl_i2c("read data: %02x\t %02x",
0729 i2c_r_data[(i*3)+1],
0730 i2c_r_data[(i*3)+2]);
0731 }
0732 }
0733
0734
0735
0736 buf[0] = USB_WRITE_I2C_CMD;
0737 buf[1] = 0x00;
0738
0739
0740 buf[2] = I2C_CONTROL_REG;
0741 buf[3] = 0x17;
0742 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
0743
0744 buf[5] = USB_END_I2C_CMD;
0745 ret = mxl111sf_i2c_send_data(state, 0, buf);
0746
0747
0748 buf[2] = I2C_CONTROL_REG;
0749 buf[3] = 0xC7;
0750 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
0751
0752 }
0753 exit:
0754
0755 buf[0] = USB_WRITE_I2C_CMD;
0756 buf[1] = 0x00;
0757
0758
0759 buf[5] = USB_END_I2C_CMD;
0760 mxl111sf_i2c_send_data(state, 0, buf);
0761
0762
0763 buf[2] = I2C_CONTROL_REG;
0764 buf[3] = 0xDF;
0765 buf[4] = 0x03;
0766
0767
0768 buf[5] = I2C_MUX_REG;
0769 buf[6] = 0x00;
0770 buf[7] = 0x00;
0771
0772
0773 buf[8] = USB_END_I2C_CMD;
0774 mxl111sf_i2c_send_data(state, 0, buf);
0775
0776
0777 buf[2] = I2C_MUX_REG;
0778 buf[3] = 0x81;
0779 buf[4] = 0x00;
0780
0781
0782 buf[5] = I2C_MUX_REG;
0783 buf[6] = 0x00;
0784 buf[7] = 0x00;
0785
0786
0787 buf[8] = I2C_MUX_REG;
0788 buf[9] = 0x00;
0789 buf[10] = 0x00;
0790
0791 buf[11] = USB_END_I2C_CMD;
0792 mxl111sf_i2c_send_data(state, 0, buf);
0793
0794 return ret;
0795 }
0796
0797
0798
0799 int mxl111sf_i2c_xfer(struct i2c_adapter *adap,
0800 struct i2c_msg msg[], int num)
0801 {
0802 struct dvb_usb_device *d = i2c_get_adapdata(adap);
0803 struct mxl111sf_state *state = d->priv;
0804 int hwi2c = (state->chip_rev > MXL111SF_V6);
0805 int i, ret;
0806
0807 if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
0808 return -EAGAIN;
0809
0810 for (i = 0; i < num; i++) {
0811 ret = (hwi2c) ?
0812 mxl111sf_i2c_hw_xfer_msg(state, &msg[i]) :
0813 mxl111sf_i2c_sw_xfer_msg(state, &msg[i]);
0814 if (mxl_fail(ret)) {
0815 mxl_debug_adv("failed with error %d on i2c transaction %d of %d, %sing %d bytes to/from 0x%02x",
0816 ret, i+1, num,
0817 (msg[i].flags & I2C_M_RD) ?
0818 "read" : "writ",
0819 msg[i].len, msg[i].addr);
0820
0821 break;
0822 }
0823 }
0824
0825 mutex_unlock(&d->i2c_mutex);
0826
0827 return i == num ? num : -EREMOTEIO;
0828 }