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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Driver for Amlogic Meson IR remote receiver
0004  *
0005  * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
0006  */
0007 
0008 #include <linux/device.h>
0009 #include <linux/err.h>
0010 #include <linux/interrupt.h>
0011 #include <linux/io.h>
0012 #include <linux/module.h>
0013 #include <linux/of_platform.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/spinlock.h>
0016 #include <linux/bitfield.h>
0017 
0018 #include <media/rc-core.h>
0019 
0020 #define DRIVER_NAME     "meson-ir"
0021 
0022 /* valid on all Meson platforms */
0023 #define IR_DEC_LDR_ACTIVE   0x00
0024 #define IR_DEC_LDR_IDLE     0x04
0025 #define IR_DEC_LDR_REPEAT   0x08
0026 #define IR_DEC_BIT_0        0x0c
0027 #define IR_DEC_REG0     0x10
0028 #define IR_DEC_FRAME        0x14
0029 #define IR_DEC_STATUS       0x18
0030 #define IR_DEC_REG1     0x1c
0031 /* only available on Meson 8b and newer */
0032 #define IR_DEC_REG2     0x20
0033 
0034 #define REG0_RATE_MASK      GENMASK(11, 0)
0035 
0036 #define DECODE_MODE_NEC     0x0
0037 #define DECODE_MODE_RAW     0x2
0038 
0039 /* Meson 6b uses REG1 to configure the mode */
0040 #define REG1_MODE_MASK      GENMASK(8, 7)
0041 #define REG1_MODE_SHIFT     7
0042 
0043 /* Meson 8b / GXBB use REG2 to configure the mode */
0044 #define REG2_MODE_MASK      GENMASK(3, 0)
0045 #define REG2_MODE_SHIFT     0
0046 
0047 #define REG1_TIME_IV_MASK   GENMASK(28, 16)
0048 
0049 #define REG1_IRQSEL_MASK    GENMASK(3, 2)
0050 #define REG1_IRQSEL_NEC_MODE    0
0051 #define REG1_IRQSEL_RISE_FALL   1
0052 #define REG1_IRQSEL_FALL    2
0053 #define REG1_IRQSEL_RISE    3
0054 
0055 #define REG1_RESET      BIT(0)
0056 #define REG1_ENABLE     BIT(15)
0057 
0058 #define STATUS_IR_DEC_IN    BIT(8)
0059 
0060 #define MESON_TRATE     10  /* us */
0061 
0062 struct meson_ir {
0063     void __iomem    *reg;
0064     struct rc_dev   *rc;
0065     spinlock_t  lock;
0066 };
0067 
0068 static void meson_ir_set_mask(struct meson_ir *ir, unsigned int reg,
0069                   u32 mask, u32 value)
0070 {
0071     u32 data;
0072 
0073     data = readl(ir->reg + reg);
0074     data &= ~mask;
0075     data |= (value & mask);
0076     writel(data, ir->reg + reg);
0077 }
0078 
0079 static irqreturn_t meson_ir_irq(int irqno, void *dev_id)
0080 {
0081     struct meson_ir *ir = dev_id;
0082     u32 duration, status;
0083     struct ir_raw_event rawir = {};
0084 
0085     spin_lock(&ir->lock);
0086 
0087     duration = readl_relaxed(ir->reg + IR_DEC_REG1);
0088     duration = FIELD_GET(REG1_TIME_IV_MASK, duration);
0089     rawir.duration = duration * MESON_TRATE;
0090 
0091     status = readl_relaxed(ir->reg + IR_DEC_STATUS);
0092     rawir.pulse = !!(status & STATUS_IR_DEC_IN);
0093 
0094     ir_raw_event_store_with_timeout(ir->rc, &rawir);
0095 
0096     spin_unlock(&ir->lock);
0097 
0098     return IRQ_HANDLED;
0099 }
0100 
0101 static int meson_ir_probe(struct platform_device *pdev)
0102 {
0103     struct device *dev = &pdev->dev;
0104     struct device_node *node = dev->of_node;
0105     const char *map_name;
0106     struct meson_ir *ir;
0107     int irq, ret;
0108 
0109     ir = devm_kzalloc(dev, sizeof(struct meson_ir), GFP_KERNEL);
0110     if (!ir)
0111         return -ENOMEM;
0112 
0113     ir->reg = devm_platform_ioremap_resource(pdev, 0);
0114     if (IS_ERR(ir->reg))
0115         return PTR_ERR(ir->reg);
0116 
0117     irq = platform_get_irq(pdev, 0);
0118     if (irq < 0)
0119         return irq;
0120 
0121     ir->rc = devm_rc_allocate_device(dev, RC_DRIVER_IR_RAW);
0122     if (!ir->rc) {
0123         dev_err(dev, "failed to allocate rc device\n");
0124         return -ENOMEM;
0125     }
0126 
0127     ir->rc->priv = ir;
0128     ir->rc->device_name = DRIVER_NAME;
0129     ir->rc->input_phys = DRIVER_NAME "/input0";
0130     ir->rc->input_id.bustype = BUS_HOST;
0131     map_name = of_get_property(node, "linux,rc-map-name", NULL);
0132     ir->rc->map_name = map_name ? map_name : RC_MAP_EMPTY;
0133     ir->rc->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER;
0134     ir->rc->rx_resolution = MESON_TRATE;
0135     ir->rc->min_timeout = 1;
0136     ir->rc->timeout = IR_DEFAULT_TIMEOUT;
0137     ir->rc->max_timeout = 10 * IR_DEFAULT_TIMEOUT;
0138     ir->rc->driver_name = DRIVER_NAME;
0139 
0140     spin_lock_init(&ir->lock);
0141     platform_set_drvdata(pdev, ir);
0142 
0143     ret = devm_rc_register_device(dev, ir->rc);
0144     if (ret) {
0145         dev_err(dev, "failed to register rc device\n");
0146         return ret;
0147     }
0148 
0149     ret = devm_request_irq(dev, irq, meson_ir_irq, 0, NULL, ir);
0150     if (ret) {
0151         dev_err(dev, "failed to request irq\n");
0152         return ret;
0153     }
0154 
0155     /* Reset the decoder */
0156     meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, REG1_RESET);
0157     meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, 0);
0158 
0159     /* Set general operation mode (= raw/software decoding) */
0160     if (of_device_is_compatible(node, "amlogic,meson6-ir"))
0161         meson_ir_set_mask(ir, IR_DEC_REG1, REG1_MODE_MASK,
0162                   FIELD_PREP(REG1_MODE_MASK, DECODE_MODE_RAW));
0163     else
0164         meson_ir_set_mask(ir, IR_DEC_REG2, REG2_MODE_MASK,
0165                   FIELD_PREP(REG2_MODE_MASK, DECODE_MODE_RAW));
0166 
0167     /* Set rate */
0168     meson_ir_set_mask(ir, IR_DEC_REG0, REG0_RATE_MASK, MESON_TRATE - 1);
0169     /* IRQ on rising and falling edges */
0170     meson_ir_set_mask(ir, IR_DEC_REG1, REG1_IRQSEL_MASK,
0171               FIELD_PREP(REG1_IRQSEL_MASK, REG1_IRQSEL_RISE_FALL));
0172     /* Enable the decoder */
0173     meson_ir_set_mask(ir, IR_DEC_REG1, REG1_ENABLE, REG1_ENABLE);
0174 
0175     dev_info(dev, "receiver initialized\n");
0176 
0177     return 0;
0178 }
0179 
0180 static int meson_ir_remove(struct platform_device *pdev)
0181 {
0182     struct meson_ir *ir = platform_get_drvdata(pdev);
0183     unsigned long flags;
0184 
0185     /* Disable the decoder */
0186     spin_lock_irqsave(&ir->lock, flags);
0187     meson_ir_set_mask(ir, IR_DEC_REG1, REG1_ENABLE, 0);
0188     spin_unlock_irqrestore(&ir->lock, flags);
0189 
0190     return 0;
0191 }
0192 
0193 static void meson_ir_shutdown(struct platform_device *pdev)
0194 {
0195     struct device *dev = &pdev->dev;
0196     struct device_node *node = dev->of_node;
0197     struct meson_ir *ir = platform_get_drvdata(pdev);
0198     unsigned long flags;
0199 
0200     spin_lock_irqsave(&ir->lock, flags);
0201 
0202     /*
0203      * Set operation mode to NEC/hardware decoding to give
0204      * bootloader a chance to power the system back on
0205      */
0206     if (of_device_is_compatible(node, "amlogic,meson6-ir"))
0207         meson_ir_set_mask(ir, IR_DEC_REG1, REG1_MODE_MASK,
0208                   DECODE_MODE_NEC << REG1_MODE_SHIFT);
0209     else
0210         meson_ir_set_mask(ir, IR_DEC_REG2, REG2_MODE_MASK,
0211                   DECODE_MODE_NEC << REG2_MODE_SHIFT);
0212 
0213     /* Set rate to default value */
0214     meson_ir_set_mask(ir, IR_DEC_REG0, REG0_RATE_MASK, 0x13);
0215 
0216     spin_unlock_irqrestore(&ir->lock, flags);
0217 }
0218 
0219 static const struct of_device_id meson_ir_match[] = {
0220     { .compatible = "amlogic,meson6-ir" },
0221     { .compatible = "amlogic,meson8b-ir" },
0222     { .compatible = "amlogic,meson-gxbb-ir" },
0223     { },
0224 };
0225 MODULE_DEVICE_TABLE(of, meson_ir_match);
0226 
0227 static struct platform_driver meson_ir_driver = {
0228     .probe      = meson_ir_probe,
0229     .remove     = meson_ir_remove,
0230     .shutdown   = meson_ir_shutdown,
0231     .driver = {
0232         .name       = DRIVER_NAME,
0233         .of_match_table = meson_ir_match,
0234     },
0235 };
0236 
0237 module_platform_driver(meson_ir_driver);
0238 
0239 MODULE_DESCRIPTION("Amlogic Meson IR remote receiver driver");
0240 MODULE_AUTHOR("Beniamino Galvani <b.galvani@gmail.com>");
0241 MODULE_LICENSE("GPL v2");