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0001 /* SPDX-License-Identifier: GPL-2.0-or-later */ 0002 /* 0003 * ImgTec IR Hardware Decoder found in PowerDown Controller. 0004 * 0005 * Copyright 2010-2014 Imagination Technologies Ltd. 0006 */ 0007 0008 #ifndef _IMG_IR_HW_H_ 0009 #define _IMG_IR_HW_H_ 0010 0011 #include <linux/kernel.h> 0012 #include <media/rc-core.h> 0013 0014 /* constants */ 0015 0016 #define IMG_IR_CODETYPE_PULSELEN 0x0 /* Sony */ 0017 #define IMG_IR_CODETYPE_PULSEDIST 0x1 /* NEC, Toshiba, Micom, Sharp */ 0018 #define IMG_IR_CODETYPE_BIPHASE 0x2 /* RC-5/6 */ 0019 #define IMG_IR_CODETYPE_2BITPULSEPOS 0x3 /* RC-MM */ 0020 0021 0022 /* Timing information */ 0023 0024 /** 0025 * struct img_ir_control - Decoder control settings 0026 * @decoden: Primary decoder enable 0027 * @code_type: Decode type (see IMG_IR_CODETYPE_*) 0028 * @hdrtog: Detect header toggle symbol after leader symbol 0029 * @ldrdec: Don't discard leader if maximum width reached 0030 * @decodinpol: Decoder input polarity (1=active high) 0031 * @bitorien: Bit orientation (1=MSB first) 0032 * @d1validsel: Decoder 2 takes over if it detects valid data 0033 * @bitinv: Bit inversion switch (1=don't invert) 0034 * @decodend2: Secondary decoder enable (no leader symbol) 0035 * @bitoriend2: Bit orientation (1=MSB first) 0036 * @bitinvd2: Secondary decoder bit inversion switch (1=don't invert) 0037 */ 0038 struct img_ir_control { 0039 unsigned decoden:1; 0040 unsigned code_type:2; 0041 unsigned hdrtog:1; 0042 unsigned ldrdec:1; 0043 unsigned decodinpol:1; 0044 unsigned bitorien:1; 0045 unsigned d1validsel:1; 0046 unsigned bitinv:1; 0047 unsigned decodend2:1; 0048 unsigned bitoriend2:1; 0049 unsigned bitinvd2:1; 0050 }; 0051 0052 /** 0053 * struct img_ir_timing_range - range of timing values 0054 * @min: Minimum timing value 0055 * @max: Maximum timing value (if < @min, this will be set to @min during 0056 * preprocessing step, so it is normally not explicitly initialised 0057 * and is taken care of by the tolerance) 0058 */ 0059 struct img_ir_timing_range { 0060 u16 min; 0061 u16 max; 0062 }; 0063 0064 /** 0065 * struct img_ir_symbol_timing - timing data for a symbol 0066 * @pulse: Timing range for the length of the pulse in this symbol 0067 * @space: Timing range for the length of the space in this symbol 0068 */ 0069 struct img_ir_symbol_timing { 0070 struct img_ir_timing_range pulse; 0071 struct img_ir_timing_range space; 0072 }; 0073 0074 /** 0075 * struct img_ir_free_timing - timing data for free time symbol 0076 * @minlen: Minimum number of bits of data 0077 * @maxlen: Maximum number of bits of data 0078 * @ft_min: Minimum free time after message 0079 */ 0080 struct img_ir_free_timing { 0081 /* measured in bits */ 0082 u8 minlen; 0083 u8 maxlen; 0084 u16 ft_min; 0085 }; 0086 0087 /** 0088 * struct img_ir_timings - Timing values. 0089 * @ldr: Leader symbol timing data 0090 * @s00: Zero symbol timing data for primary decoder 0091 * @s01: One symbol timing data for primary decoder 0092 * @s10: Zero symbol timing data for secondary (no leader symbol) decoder 0093 * @s11: One symbol timing data for secondary (no leader symbol) decoder 0094 * @ft: Free time symbol timing data 0095 */ 0096 struct img_ir_timings { 0097 struct img_ir_symbol_timing ldr, s00, s01, s10, s11; 0098 struct img_ir_free_timing ft; 0099 }; 0100 0101 /** 0102 * struct img_ir_filter - Filter IR events. 0103 * @data: Data to match. 0104 * @mask: Mask of bits to compare. 0105 * @minlen: Additional minimum number of bits. 0106 * @maxlen: Additional maximum number of bits. 0107 */ 0108 struct img_ir_filter { 0109 u64 data; 0110 u64 mask; 0111 u8 minlen; 0112 u8 maxlen; 0113 }; 0114 0115 /** 0116 * struct img_ir_timing_regvals - Calculated timing register values. 0117 * @ldr: Leader symbol timing register value 0118 * @s00: Zero symbol timing register value for primary decoder 0119 * @s01: One symbol timing register value for primary decoder 0120 * @s10: Zero symbol timing register value for secondary decoder 0121 * @s11: One symbol timing register value for secondary decoder 0122 * @ft: Free time symbol timing register value 0123 */ 0124 struct img_ir_timing_regvals { 0125 u32 ldr, s00, s01, s10, s11, ft; 0126 }; 0127 0128 #define IMG_IR_SCANCODE 0 /* new scancode */ 0129 #define IMG_IR_REPEATCODE 1 /* repeat the previous code */ 0130 0131 /** 0132 * struct img_ir_scancode_req - Scancode request data. 0133 * @protocol: Protocol code of received message (defaults to 0134 * RC_PROTO_UNKNOWN). 0135 * @scancode: Scan code of received message (must be written by 0136 * handler if IMG_IR_SCANCODE is returned). 0137 * @toggle: Toggle bit (defaults to 0). 0138 */ 0139 struct img_ir_scancode_req { 0140 enum rc_proto protocol; 0141 u32 scancode; 0142 u8 toggle; 0143 }; 0144 0145 /** 0146 * struct img_ir_decoder - Decoder settings for an IR protocol. 0147 * @type: Protocol types bitmap. 0148 * @tolerance: Timing tolerance as a percentage (default 10%). 0149 * @unit: Unit of timings in nanoseconds (default 1 us). 0150 * @timings: Primary timings 0151 * @rtimings: Additional override timings while waiting for repeats. 0152 * @repeat: Maximum repeat interval (always in milliseconds). 0153 * @control: Control flags. 0154 * 0155 * @scancode: Pointer to function to convert the IR data into a scancode (it 0156 * must be safe to execute in interrupt context). 0157 * Returns IMG_IR_SCANCODE to emit new scancode. 0158 * Returns IMG_IR_REPEATCODE to repeat previous code. 0159 * Returns -errno (e.g. -EINVAL) on error. 0160 * @filter: Pointer to function to convert scancode filter to raw hardware 0161 * filter. The minlen and maxlen fields will have been initialised 0162 * to the maximum range. 0163 */ 0164 struct img_ir_decoder { 0165 /* core description */ 0166 u64 type; 0167 unsigned int tolerance; 0168 unsigned int unit; 0169 struct img_ir_timings timings; 0170 struct img_ir_timings rtimings; 0171 unsigned int repeat; 0172 struct img_ir_control control; 0173 0174 /* scancode logic */ 0175 int (*scancode)(int len, u64 raw, u64 enabled_protocols, 0176 struct img_ir_scancode_req *request); 0177 int (*filter)(const struct rc_scancode_filter *in, 0178 struct img_ir_filter *out, u64 protocols); 0179 }; 0180 0181 extern struct img_ir_decoder img_ir_nec; 0182 extern struct img_ir_decoder img_ir_jvc; 0183 extern struct img_ir_decoder img_ir_sony; 0184 extern struct img_ir_decoder img_ir_sharp; 0185 extern struct img_ir_decoder img_ir_sanyo; 0186 extern struct img_ir_decoder img_ir_rc5; 0187 extern struct img_ir_decoder img_ir_rc6; 0188 0189 /** 0190 * struct img_ir_reg_timings - Reg values for decoder timings at clock rate. 0191 * @ctrl: Processed control register value. 0192 * @timings: Processed primary timings. 0193 * @rtimings: Processed repeat timings. 0194 */ 0195 struct img_ir_reg_timings { 0196 u32 ctrl; 0197 struct img_ir_timing_regvals timings; 0198 struct img_ir_timing_regvals rtimings; 0199 }; 0200 0201 struct img_ir_priv; 0202 0203 #ifdef CONFIG_IR_IMG_HW 0204 0205 enum img_ir_mode { 0206 IMG_IR_M_NORMAL, 0207 IMG_IR_M_REPEATING, 0208 #ifdef CONFIG_PM_SLEEP 0209 IMG_IR_M_WAKE, 0210 #endif 0211 }; 0212 0213 /** 0214 * struct img_ir_priv_hw - Private driver data for hardware decoder. 0215 * @ct_quirks: Quirk bits for each code type. 0216 * @rdev: Remote control device 0217 * @clk_nb: Notifier block for clock notify events. 0218 * @end_timer: Timer until repeat timeout. 0219 * @suspend_timer: Timer to re-enable protocol. 0220 * @decoder: Current decoder settings. 0221 * @enabled_protocols: Currently enabled protocols. 0222 * @clk_hz: Current core clock rate in Hz. 0223 * @reg_timings: Timing reg values for decoder at clock rate. 0224 * @flags: IMG_IR_F_*. 0225 * @filters: HW filters (derived from scancode filters). 0226 * @mode: Current decode mode. 0227 * @stopping: Indicates that decoder is being taken down and timers 0228 * should not be restarted. 0229 * @suspend_irqen: Saved IRQ enable mask over suspend. 0230 * @quirk_suspend_irq: Saved IRQ enable mask over quirk suspend timer. 0231 */ 0232 struct img_ir_priv_hw { 0233 unsigned int ct_quirks[4]; 0234 struct rc_dev *rdev; 0235 struct notifier_block clk_nb; 0236 struct timer_list end_timer; 0237 struct timer_list suspend_timer; 0238 const struct img_ir_decoder *decoder; 0239 u64 enabled_protocols; 0240 unsigned long clk_hz; 0241 struct img_ir_reg_timings reg_timings; 0242 unsigned int flags; 0243 struct img_ir_filter filters[RC_FILTER_MAX]; 0244 0245 enum img_ir_mode mode; 0246 bool stopping; 0247 u32 suspend_irqen; 0248 u32 quirk_suspend_irq; 0249 }; 0250 0251 static inline bool img_ir_hw_enabled(struct img_ir_priv_hw *hw) 0252 { 0253 return hw->rdev; 0254 }; 0255 0256 void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status); 0257 void img_ir_setup_hw(struct img_ir_priv *priv); 0258 int img_ir_probe_hw(struct img_ir_priv *priv); 0259 void img_ir_remove_hw(struct img_ir_priv *priv); 0260 0261 #ifdef CONFIG_PM_SLEEP 0262 int img_ir_suspend(struct device *dev); 0263 int img_ir_resume(struct device *dev); 0264 #else 0265 #define img_ir_suspend NULL 0266 #define img_ir_resume NULL 0267 #endif 0268 0269 #else 0270 0271 struct img_ir_priv_hw { 0272 }; 0273 0274 static inline bool img_ir_hw_enabled(struct img_ir_priv_hw *hw) 0275 { 0276 return false; 0277 }; 0278 static inline void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status) 0279 { 0280 } 0281 static inline void img_ir_setup_hw(struct img_ir_priv *priv) 0282 { 0283 } 0284 static inline int img_ir_probe_hw(struct img_ir_priv *priv) 0285 { 0286 return -ENODEV; 0287 } 0288 static inline void img_ir_remove_hw(struct img_ir_priv *priv) 0289 { 0290 } 0291 0292 #define img_ir_suspend NULL 0293 #define img_ir_resume NULL 0294 0295 #endif /* CONFIG_IR_IMG_HW */ 0296 0297 #endif /* _IMG_IR_HW_H_ */
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