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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * driver for ENE KB3926 B/C/D/E/F CIR (pnp id: ENE0XXX)
0004  *
0005  * Copyright (C) 2010 Maxim Levitsky <maximlevitsky@gmail.com>
0006  *
0007  * Special thanks to:
0008  *   Sami R. <maesesami@gmail.com> for lot of help in debugging and therefore
0009  *    bringing to life support for transmission & learning mode.
0010  *
0011  *   Charlie Andrews <charliethepilot@googlemail.com> for lots of help in
0012  *   bringing up the support of new firmware buffer that is popular
0013  *   on latest notebooks
0014  *
0015  *   ENE for partial device documentation
0016  */
0017 
0018 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0019 
0020 #include <linux/kernel.h>
0021 #include <linux/module.h>
0022 #include <linux/pnp.h>
0023 #include <linux/io.h>
0024 #include <linux/interrupt.h>
0025 #include <linux/sched.h>
0026 #include <linux/slab.h>
0027 #include <media/rc-core.h>
0028 #include "ene_ir.h"
0029 
0030 static int sample_period;
0031 static bool learning_mode_force;
0032 static int debug;
0033 static bool txsim;
0034 
0035 static void ene_set_reg_addr(struct ene_device *dev, u16 reg)
0036 {
0037     outb(reg >> 8, dev->hw_io + ENE_ADDR_HI);
0038     outb(reg & 0xFF, dev->hw_io + ENE_ADDR_LO);
0039 }
0040 
0041 /* read a hardware register */
0042 static u8 ene_read_reg(struct ene_device *dev, u16 reg)
0043 {
0044     u8 retval;
0045     ene_set_reg_addr(dev, reg);
0046     retval = inb(dev->hw_io + ENE_IO);
0047     dbg_regs("reg %04x == %02x", reg, retval);
0048     return retval;
0049 }
0050 
0051 /* write a hardware register */
0052 static void ene_write_reg(struct ene_device *dev, u16 reg, u8 value)
0053 {
0054     dbg_regs("reg %04x <- %02x", reg, value);
0055     ene_set_reg_addr(dev, reg);
0056     outb(value, dev->hw_io + ENE_IO);
0057 }
0058 
0059 /* Set bits in hardware register */
0060 static void ene_set_reg_mask(struct ene_device *dev, u16 reg, u8 mask)
0061 {
0062     dbg_regs("reg %04x |= %02x", reg, mask);
0063     ene_set_reg_addr(dev, reg);
0064     outb(inb(dev->hw_io + ENE_IO) | mask, dev->hw_io + ENE_IO);
0065 }
0066 
0067 /* Clear bits in hardware register */
0068 static void ene_clear_reg_mask(struct ene_device *dev, u16 reg, u8 mask)
0069 {
0070     dbg_regs("reg %04x &= ~%02x ", reg, mask);
0071     ene_set_reg_addr(dev, reg);
0072     outb(inb(dev->hw_io + ENE_IO) & ~mask, dev->hw_io + ENE_IO);
0073 }
0074 
0075 /* A helper to set/clear a bit in register according to boolean variable */
0076 static void ene_set_clear_reg_mask(struct ene_device *dev, u16 reg, u8 mask,
0077                                 bool set)
0078 {
0079     if (set)
0080         ene_set_reg_mask(dev, reg, mask);
0081     else
0082         ene_clear_reg_mask(dev, reg, mask);
0083 }
0084 
0085 /* detect hardware features */
0086 static int ene_hw_detect(struct ene_device *dev)
0087 {
0088     u8 chip_major, chip_minor;
0089     u8 hw_revision, old_ver;
0090     u8 fw_reg2, fw_reg1;
0091 
0092     ene_clear_reg_mask(dev, ENE_ECSTS, ENE_ECSTS_RSRVD);
0093     chip_major = ene_read_reg(dev, ENE_ECVER_MAJOR);
0094     chip_minor = ene_read_reg(dev, ENE_ECVER_MINOR);
0095     ene_set_reg_mask(dev, ENE_ECSTS, ENE_ECSTS_RSRVD);
0096 
0097     hw_revision = ene_read_reg(dev, ENE_ECHV);
0098     old_ver = ene_read_reg(dev, ENE_HW_VER_OLD);
0099 
0100     dev->pll_freq = (ene_read_reg(dev, ENE_PLLFRH) << 4) +
0101         (ene_read_reg(dev, ENE_PLLFRL) >> 4);
0102 
0103     if (sample_period != ENE_DEFAULT_SAMPLE_PERIOD)
0104         dev->rx_period_adjust =
0105             dev->pll_freq == ENE_DEFAULT_PLL_FREQ ? 2 : 4;
0106 
0107     if (hw_revision == 0xFF) {
0108         pr_warn("device seems to be disabled\n");
0109         pr_warn("send a mail to lirc-list@lists.sourceforge.net\n");
0110         pr_warn("please attach output of acpidump and dmidecode\n");
0111         return -ENODEV;
0112     }
0113 
0114     pr_notice("chip is 0x%02x%02x - kbver = 0x%02x, rev = 0x%02x\n",
0115           chip_major, chip_minor, old_ver, hw_revision);
0116 
0117     pr_notice("PLL freq = %d\n", dev->pll_freq);
0118 
0119     if (chip_major == 0x33) {
0120         pr_warn("chips 0x33xx aren't supported\n");
0121         return -ENODEV;
0122     }
0123 
0124     if (chip_major == 0x39 && chip_minor == 0x26 && hw_revision == 0xC0) {
0125         dev->hw_revision = ENE_HW_C;
0126         pr_notice("KB3926C detected\n");
0127     } else if (old_ver == 0x24 && hw_revision == 0xC0) {
0128         dev->hw_revision = ENE_HW_B;
0129         pr_notice("KB3926B detected\n");
0130     } else {
0131         dev->hw_revision = ENE_HW_D;
0132         pr_notice("KB3926D or higher detected\n");
0133     }
0134 
0135     /* detect features hardware supports */
0136     if (dev->hw_revision < ENE_HW_C)
0137         return 0;
0138 
0139     fw_reg1 = ene_read_reg(dev, ENE_FW1);
0140     fw_reg2 = ene_read_reg(dev, ENE_FW2);
0141 
0142     pr_notice("Firmware regs: %02x %02x\n", fw_reg1, fw_reg2);
0143 
0144     dev->hw_use_gpio_0a = !!(fw_reg2 & ENE_FW2_GP0A);
0145     dev->hw_learning_and_tx_capable = !!(fw_reg2 & ENE_FW2_LEARNING);
0146     dev->hw_extra_buffer = !!(fw_reg1 & ENE_FW1_HAS_EXTRA_BUF);
0147 
0148     if (dev->hw_learning_and_tx_capable)
0149         dev->hw_fan_input = !!(fw_reg2 & ENE_FW2_FAN_INPUT);
0150 
0151     pr_notice("Hardware features:\n");
0152 
0153     if (dev->hw_learning_and_tx_capable) {
0154         pr_notice("* Supports transmitting & learning mode\n");
0155         pr_notice("   This feature is rare and therefore,\n");
0156         pr_notice("   you are welcome to test it,\n");
0157         pr_notice("   and/or contact the author via:\n");
0158         pr_notice("   lirc-list@lists.sourceforge.net\n");
0159         pr_notice("   or maximlevitsky@gmail.com\n");
0160 
0161         pr_notice("* Uses GPIO %s for IR raw input\n",
0162               dev->hw_use_gpio_0a ? "40" : "0A");
0163 
0164         if (dev->hw_fan_input)
0165             pr_notice("* Uses unused fan feedback input as source of demodulated IR data\n");
0166     }
0167 
0168     if (!dev->hw_fan_input)
0169         pr_notice("* Uses GPIO %s for IR demodulated input\n",
0170               dev->hw_use_gpio_0a ? "0A" : "40");
0171 
0172     if (dev->hw_extra_buffer)
0173         pr_notice("* Uses new style input buffer\n");
0174     return 0;
0175 }
0176 
0177 /* Read properties of hw sample buffer */
0178 static void ene_rx_setup_hw_buffer(struct ene_device *dev)
0179 {
0180     u16 tmp;
0181 
0182     ene_rx_read_hw_pointer(dev);
0183     dev->r_pointer = dev->w_pointer;
0184 
0185     if (!dev->hw_extra_buffer) {
0186         dev->buffer_len = ENE_FW_PACKET_SIZE * 2;
0187         return;
0188     }
0189 
0190     tmp = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER);
0191     tmp |= ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER+1) << 8;
0192     dev->extra_buf1_address = tmp;
0193 
0194     dev->extra_buf1_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 2);
0195 
0196     tmp = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 3);
0197     tmp |= ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 4) << 8;
0198     dev->extra_buf2_address = tmp;
0199 
0200     dev->extra_buf2_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 5);
0201 
0202     dev->buffer_len = dev->extra_buf1_len + dev->extra_buf2_len + 8;
0203 
0204     pr_notice("Hardware uses 2 extended buffers:\n");
0205     pr_notice("  0x%04x - len : %d\n",
0206           dev->extra_buf1_address, dev->extra_buf1_len);
0207     pr_notice("  0x%04x - len : %d\n",
0208           dev->extra_buf2_address, dev->extra_buf2_len);
0209 
0210     pr_notice("Total buffer len = %d\n", dev->buffer_len);
0211 
0212     if (dev->buffer_len > 64 || dev->buffer_len < 16)
0213         goto error;
0214 
0215     if (dev->extra_buf1_address > 0xFBFC ||
0216                     dev->extra_buf1_address < 0xEC00)
0217         goto error;
0218 
0219     if (dev->extra_buf2_address > 0xFBFC ||
0220                     dev->extra_buf2_address < 0xEC00)
0221         goto error;
0222 
0223     if (dev->r_pointer > dev->buffer_len)
0224         goto error;
0225 
0226     ene_set_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND);
0227     return;
0228 error:
0229     pr_warn("Error validating extra buffers, device probably won't work\n");
0230     dev->hw_extra_buffer = false;
0231     ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND);
0232 }
0233 
0234 
0235 /* Restore the pointers to extra buffers - to make module reload work*/
0236 static void ene_rx_restore_hw_buffer(struct ene_device *dev)
0237 {
0238     if (!dev->hw_extra_buffer)
0239         return;
0240 
0241     ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 0,
0242                 dev->extra_buf1_address & 0xFF);
0243     ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 1,
0244                 dev->extra_buf1_address >> 8);
0245     ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 2, dev->extra_buf1_len);
0246 
0247     ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 3,
0248                 dev->extra_buf2_address & 0xFF);
0249     ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 4,
0250                 dev->extra_buf2_address >> 8);
0251     ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 5,
0252                 dev->extra_buf2_len);
0253     ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND);
0254 }
0255 
0256 /* Read hardware write pointer */
0257 static void ene_rx_read_hw_pointer(struct ene_device *dev)
0258 {
0259     if (dev->hw_extra_buffer)
0260         dev->w_pointer = ene_read_reg(dev, ENE_FW_RX_POINTER);
0261     else
0262         dev->w_pointer = ene_read_reg(dev, ENE_FW2)
0263             & ENE_FW2_BUF_WPTR ? 0 : ENE_FW_PACKET_SIZE;
0264 
0265     dbg_verbose("RB: HW write pointer: %02x, driver read pointer: %02x",
0266         dev->w_pointer, dev->r_pointer);
0267 }
0268 
0269 /* Gets address of next sample from HW ring buffer */
0270 static int ene_rx_get_sample_reg(struct ene_device *dev)
0271 {
0272     int r_pointer;
0273 
0274     if (dev->r_pointer == dev->w_pointer) {
0275         dbg_verbose("RB: hit end, try update w_pointer");
0276         ene_rx_read_hw_pointer(dev);
0277     }
0278 
0279     if (dev->r_pointer == dev->w_pointer) {
0280         dbg_verbose("RB: end of data at %d", dev->r_pointer);
0281         return 0;
0282     }
0283 
0284     dbg_verbose("RB: reading at offset %d", dev->r_pointer);
0285     r_pointer = dev->r_pointer;
0286 
0287     dev->r_pointer++;
0288     if (dev->r_pointer == dev->buffer_len)
0289         dev->r_pointer = 0;
0290 
0291     dbg_verbose("RB: next read will be from offset %d", dev->r_pointer);
0292 
0293     if (r_pointer < 8) {
0294         dbg_verbose("RB: read at main buffer at %d", r_pointer);
0295         return ENE_FW_SAMPLE_BUFFER + r_pointer;
0296     }
0297 
0298     r_pointer -= 8;
0299 
0300     if (r_pointer < dev->extra_buf1_len) {
0301         dbg_verbose("RB: read at 1st extra buffer at %d", r_pointer);
0302         return dev->extra_buf1_address + r_pointer;
0303     }
0304 
0305     r_pointer -= dev->extra_buf1_len;
0306 
0307     if (r_pointer < dev->extra_buf2_len) {
0308         dbg_verbose("RB: read at 2nd extra buffer at %d", r_pointer);
0309         return dev->extra_buf2_address + r_pointer;
0310     }
0311 
0312     dbg("attempt to read beyond ring buffer end");
0313     return 0;
0314 }
0315 
0316 /* Sense current received carrier */
0317 static void ene_rx_sense_carrier(struct ene_device *dev)
0318 {
0319     int carrier, duty_cycle;
0320     int period = ene_read_reg(dev, ENE_CIRCAR_PRD);
0321     int hperiod = ene_read_reg(dev, ENE_CIRCAR_HPRD);
0322 
0323     if (!(period & ENE_CIRCAR_PRD_VALID))
0324         return;
0325 
0326     period &= ~ENE_CIRCAR_PRD_VALID;
0327 
0328     if (!period)
0329         return;
0330 
0331     dbg("RX: hardware carrier period = %02x", period);
0332     dbg("RX: hardware carrier pulse period = %02x", hperiod);
0333 
0334     carrier = 2000000 / period;
0335     duty_cycle = (hperiod * 100) / period;
0336     dbg("RX: sensed carrier = %d Hz, duty cycle %d%%",
0337                         carrier, duty_cycle);
0338     if (dev->carrier_detect_enabled) {
0339         struct ir_raw_event ev = {
0340             .carrier_report = true,
0341             .carrier = carrier,
0342             .duty_cycle = duty_cycle
0343         };
0344         ir_raw_event_store(dev->rdev, &ev);
0345     }
0346 }
0347 
0348 /* this enables/disables the CIR RX engine */
0349 static void ene_rx_enable_cir_engine(struct ene_device *dev, bool enable)
0350 {
0351     ene_set_clear_reg_mask(dev, ENE_CIRCFG,
0352             ENE_CIRCFG_RX_EN | ENE_CIRCFG_RX_IRQ, enable);
0353 }
0354 
0355 /* this selects input for CIR engine. Ether GPIO 0A or GPIO40*/
0356 static void ene_rx_select_input(struct ene_device *dev, bool gpio_0a)
0357 {
0358     ene_set_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_GPIO0A, gpio_0a);
0359 }
0360 
0361 /*
0362  * this enables alternative input via fan tachometer sensor and bypasses
0363  * the hw CIR engine
0364  */
0365 static void ene_rx_enable_fan_input(struct ene_device *dev, bool enable)
0366 {
0367     if (!dev->hw_fan_input)
0368         return;
0369 
0370     if (!enable)
0371         ene_write_reg(dev, ENE_FAN_AS_IN1, 0);
0372     else {
0373         ene_write_reg(dev, ENE_FAN_AS_IN1, ENE_FAN_AS_IN1_EN);
0374         ene_write_reg(dev, ENE_FAN_AS_IN2, ENE_FAN_AS_IN2_EN);
0375     }
0376 }
0377 
0378 /* setup the receiver for RX*/
0379 static void ene_rx_setup(struct ene_device *dev)
0380 {
0381     bool learning_mode = dev->learning_mode_enabled ||
0382                     dev->carrier_detect_enabled;
0383     int sample_period_adjust = 0;
0384 
0385     dbg("RX: setup receiver, learning mode = %d", learning_mode);
0386 
0387 
0388     /* This selects RLC input and clears CFG2 settings */
0389     ene_write_reg(dev, ENE_CIRCFG2, 0x00);
0390 
0391     /* set sample period*/
0392     if (sample_period == ENE_DEFAULT_SAMPLE_PERIOD)
0393         sample_period_adjust =
0394             dev->pll_freq == ENE_DEFAULT_PLL_FREQ ? 1 : 2;
0395 
0396     ene_write_reg(dev, ENE_CIRRLC_CFG,
0397             (sample_period + sample_period_adjust) |
0398                         ENE_CIRRLC_CFG_OVERFLOW);
0399     /* revB doesn't support inputs */
0400     if (dev->hw_revision < ENE_HW_C)
0401         goto select_timeout;
0402 
0403     if (learning_mode) {
0404 
0405         WARN_ON(!dev->hw_learning_and_tx_capable);
0406 
0407         /* Enable the opposite of the normal input
0408         That means that if GPIO40 is normally used, use GPIO0A
0409         and vice versa.
0410         This input will carry non demodulated
0411         signal, and we will tell the hw to demodulate it itself */
0412         ene_rx_select_input(dev, !dev->hw_use_gpio_0a);
0413         dev->rx_fan_input_inuse = false;
0414 
0415         /* Enable carrier demodulation */
0416         ene_set_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_CARR_DEMOD);
0417 
0418         /* Enable carrier detection */
0419         ene_write_reg(dev, ENE_CIRCAR_PULS, 0x63);
0420         ene_set_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_CARR_DETECT,
0421             dev->carrier_detect_enabled || debug);
0422     } else {
0423         if (dev->hw_fan_input)
0424             dev->rx_fan_input_inuse = true;
0425         else
0426             ene_rx_select_input(dev, dev->hw_use_gpio_0a);
0427 
0428         /* Disable carrier detection & demodulation */
0429         ene_clear_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_CARR_DEMOD);
0430         ene_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_CARR_DETECT);
0431     }
0432 
0433 select_timeout:
0434     if (dev->rx_fan_input_inuse) {
0435         dev->rdev->rx_resolution = ENE_FW_SAMPLE_PERIOD_FAN;
0436 
0437         /* Fan input doesn't support timeouts, it just ends the
0438             input with a maximum sample */
0439         dev->rdev->min_timeout = dev->rdev->max_timeout =
0440             ENE_FW_SMPL_BUF_FAN_MSK *
0441                 ENE_FW_SAMPLE_PERIOD_FAN;
0442     } else {
0443         dev->rdev->rx_resolution = sample_period;
0444 
0445         /* Theoreticly timeout is unlimited, but we cap it
0446          * because it was seen that on one device, it
0447          * would stop sending spaces after around 250 msec.
0448          * Besides, this is close to 2^32 anyway and timeout is u32.
0449          */
0450         dev->rdev->min_timeout = 127 * sample_period;
0451         dev->rdev->max_timeout = 200000;
0452     }
0453 
0454     if (dev->hw_learning_and_tx_capable)
0455         dev->rdev->tx_resolution = sample_period;
0456 
0457     if (dev->rdev->timeout > dev->rdev->max_timeout)
0458         dev->rdev->timeout = dev->rdev->max_timeout;
0459     if (dev->rdev->timeout < dev->rdev->min_timeout)
0460         dev->rdev->timeout = dev->rdev->min_timeout;
0461 }
0462 
0463 /* Enable the device for receive */
0464 static void ene_rx_enable_hw(struct ene_device *dev)
0465 {
0466     u8 reg_value;
0467 
0468     /* Enable system interrupt */
0469     if (dev->hw_revision < ENE_HW_C) {
0470         ene_write_reg(dev, ENEB_IRQ, dev->irq << 1);
0471         ene_write_reg(dev, ENEB_IRQ_UNK1, 0x01);
0472     } else {
0473         reg_value = ene_read_reg(dev, ENE_IRQ) & 0xF0;
0474         reg_value |= ENE_IRQ_UNK_EN;
0475         reg_value &= ~ENE_IRQ_STATUS;
0476         reg_value |= (dev->irq & ENE_IRQ_MASK);
0477         ene_write_reg(dev, ENE_IRQ, reg_value);
0478     }
0479 
0480     /* Enable inputs */
0481     ene_rx_enable_fan_input(dev, dev->rx_fan_input_inuse);
0482     ene_rx_enable_cir_engine(dev, !dev->rx_fan_input_inuse);
0483 
0484     /* ack any pending irqs - just in case */
0485     ene_irq_status(dev);
0486 
0487     /* enable firmware bits */
0488     ene_set_reg_mask(dev, ENE_FW1, ENE_FW1_ENABLE | ENE_FW1_IRQ);
0489 
0490     /* enter idle mode */
0491     ir_raw_event_set_idle(dev->rdev, true);
0492 }
0493 
0494 /* Enable the device for receive - wrapper to track the state*/
0495 static void ene_rx_enable(struct ene_device *dev)
0496 {
0497     ene_rx_enable_hw(dev);
0498     dev->rx_enabled = true;
0499 }
0500 
0501 /* Disable the device receiver */
0502 static void ene_rx_disable_hw(struct ene_device *dev)
0503 {
0504     /* disable inputs */
0505     ene_rx_enable_cir_engine(dev, false);
0506     ene_rx_enable_fan_input(dev, false);
0507 
0508     /* disable hardware IRQ and firmware flag */
0509     ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_ENABLE | ENE_FW1_IRQ);
0510     ir_raw_event_set_idle(dev->rdev, true);
0511 }
0512 
0513 /* Disable the device receiver - wrapper to track the state */
0514 static void ene_rx_disable(struct ene_device *dev)
0515 {
0516     ene_rx_disable_hw(dev);
0517     dev->rx_enabled = false;
0518 }
0519 
0520 /* This resets the receiver. Useful to stop stream of spaces at end of
0521  * transmission
0522  */
0523 static void ene_rx_reset(struct ene_device *dev)
0524 {
0525     ene_clear_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_RX_EN);
0526     ene_set_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_RX_EN);
0527 }
0528 
0529 /* Set up the TX carrier frequency and duty cycle */
0530 static void ene_tx_set_carrier(struct ene_device *dev)
0531 {
0532     u8 tx_puls_width;
0533     unsigned long flags;
0534 
0535     spin_lock_irqsave(&dev->hw_lock, flags);
0536 
0537     ene_set_clear_reg_mask(dev, ENE_CIRCFG,
0538         ENE_CIRCFG_TX_CARR, dev->tx_period > 0);
0539 
0540     if (!dev->tx_period)
0541         goto unlock;
0542 
0543     BUG_ON(dev->tx_duty_cycle >= 100 || dev->tx_duty_cycle <= 0);
0544 
0545     tx_puls_width = dev->tx_period / (100 / dev->tx_duty_cycle);
0546 
0547     if (!tx_puls_width)
0548         tx_puls_width = 1;
0549 
0550     dbg("TX: pulse distance = %d * 500 ns", dev->tx_period);
0551     dbg("TX: pulse width = %d * 500 ns", tx_puls_width);
0552 
0553     ene_write_reg(dev, ENE_CIRMOD_PRD, dev->tx_period | ENE_CIRMOD_PRD_POL);
0554     ene_write_reg(dev, ENE_CIRMOD_HPRD, tx_puls_width);
0555 unlock:
0556     spin_unlock_irqrestore(&dev->hw_lock, flags);
0557 }
0558 
0559 /* Enable/disable transmitters */
0560 static void ene_tx_set_transmitters(struct ene_device *dev)
0561 {
0562     unsigned long flags;
0563 
0564     spin_lock_irqsave(&dev->hw_lock, flags);
0565     ene_set_clear_reg_mask(dev, ENE_GPIOFS8, ENE_GPIOFS8_GPIO41,
0566                     !!(dev->transmitter_mask & 0x01));
0567     ene_set_clear_reg_mask(dev, ENE_GPIOFS1, ENE_GPIOFS1_GPIO0D,
0568                     !!(dev->transmitter_mask & 0x02));
0569     spin_unlock_irqrestore(&dev->hw_lock, flags);
0570 }
0571 
0572 /* prepare transmission */
0573 static void ene_tx_enable(struct ene_device *dev)
0574 {
0575     u8 conf1 = ene_read_reg(dev, ENE_CIRCFG);
0576     u8 fwreg2 = ene_read_reg(dev, ENE_FW2);
0577 
0578     dev->saved_conf1 = conf1;
0579 
0580     /* Show information about currently connected transmitter jacks */
0581     if (fwreg2 & ENE_FW2_EMMITER1_CONN)
0582         dbg("TX: Transmitter #1 is connected");
0583 
0584     if (fwreg2 & ENE_FW2_EMMITER2_CONN)
0585         dbg("TX: Transmitter #2 is connected");
0586 
0587     if (!(fwreg2 & (ENE_FW2_EMMITER1_CONN | ENE_FW2_EMMITER2_CONN)))
0588         pr_warn("TX: transmitter cable isn't connected!\n");
0589 
0590     /* disable receive on revc */
0591     if (dev->hw_revision == ENE_HW_C)
0592         conf1 &= ~ENE_CIRCFG_RX_EN;
0593 
0594     /* Enable TX engine */
0595     conf1 |= ENE_CIRCFG_TX_EN | ENE_CIRCFG_TX_IRQ;
0596     ene_write_reg(dev, ENE_CIRCFG, conf1);
0597 }
0598 
0599 /* end transmission */
0600 static void ene_tx_disable(struct ene_device *dev)
0601 {
0602     ene_write_reg(dev, ENE_CIRCFG, dev->saved_conf1);
0603     dev->tx_buffer = NULL;
0604 }
0605 
0606 
0607 /* TX one sample - must be called with dev->hw_lock*/
0608 static void ene_tx_sample(struct ene_device *dev)
0609 {
0610     u8 raw_tx;
0611     u32 sample;
0612     bool pulse = dev->tx_sample_pulse;
0613 
0614     if (!dev->tx_buffer) {
0615         pr_warn("TX: BUG: attempt to transmit NULL buffer\n");
0616         return;
0617     }
0618 
0619     /* Grab next TX sample */
0620     if (!dev->tx_sample) {
0621 
0622         if (dev->tx_pos == dev->tx_len) {
0623             if (!dev->tx_done) {
0624                 dbg("TX: no more data to send");
0625                 dev->tx_done = true;
0626                 goto exit;
0627             } else {
0628                 dbg("TX: last sample sent by hardware");
0629                 ene_tx_disable(dev);
0630                 complete(&dev->tx_complete);
0631                 return;
0632             }
0633         }
0634 
0635         sample = dev->tx_buffer[dev->tx_pos++];
0636         dev->tx_sample_pulse = !dev->tx_sample_pulse;
0637 
0638         dev->tx_sample = DIV_ROUND_CLOSEST(sample, sample_period);
0639 
0640         if (!dev->tx_sample)
0641             dev->tx_sample = 1;
0642     }
0643 
0644     raw_tx = min(dev->tx_sample , (unsigned int)ENE_CIRRLC_OUT_MASK);
0645     dev->tx_sample -= raw_tx;
0646 
0647     dbg("TX: sample %8d (%s)", raw_tx * sample_period,
0648                         pulse ? "pulse" : "space");
0649     if (pulse)
0650         raw_tx |= ENE_CIRRLC_OUT_PULSE;
0651 
0652     ene_write_reg(dev,
0653         dev->tx_reg ? ENE_CIRRLC_OUT1 : ENE_CIRRLC_OUT0, raw_tx);
0654 
0655     dev->tx_reg = !dev->tx_reg;
0656 exit:
0657     /* simulate TX done interrupt */
0658     if (txsim)
0659         mod_timer(&dev->tx_sim_timer, jiffies + HZ / 500);
0660 }
0661 
0662 /* timer to simulate tx done interrupt */
0663 static void ene_tx_irqsim(struct timer_list *t)
0664 {
0665     struct ene_device *dev = from_timer(dev, t, tx_sim_timer);
0666     unsigned long flags;
0667 
0668     spin_lock_irqsave(&dev->hw_lock, flags);
0669     ene_tx_sample(dev);
0670     spin_unlock_irqrestore(&dev->hw_lock, flags);
0671 }
0672 
0673 
0674 /* read irq status and ack it */
0675 static int ene_irq_status(struct ene_device *dev)
0676 {
0677     u8 irq_status;
0678     u8 fw_flags1, fw_flags2;
0679     int retval = 0;
0680 
0681     fw_flags2 = ene_read_reg(dev, ENE_FW2);
0682 
0683     if (dev->hw_revision < ENE_HW_C) {
0684         irq_status = ene_read_reg(dev, ENEB_IRQ_STATUS);
0685 
0686         if (!(irq_status & ENEB_IRQ_STATUS_IR))
0687             return 0;
0688 
0689         ene_clear_reg_mask(dev, ENEB_IRQ_STATUS, ENEB_IRQ_STATUS_IR);
0690         return ENE_IRQ_RX;
0691     }
0692 
0693     irq_status = ene_read_reg(dev, ENE_IRQ);
0694     if (!(irq_status & ENE_IRQ_STATUS))
0695         return 0;
0696 
0697     /* original driver does that twice - a workaround ? */
0698     ene_write_reg(dev, ENE_IRQ, irq_status & ~ENE_IRQ_STATUS);
0699     ene_write_reg(dev, ENE_IRQ, irq_status & ~ENE_IRQ_STATUS);
0700 
0701     /* check RX interrupt */
0702     if (fw_flags2 & ENE_FW2_RXIRQ) {
0703         retval |= ENE_IRQ_RX;
0704         ene_write_reg(dev, ENE_FW2, fw_flags2 & ~ENE_FW2_RXIRQ);
0705     }
0706 
0707     /* check TX interrupt */
0708     fw_flags1 = ene_read_reg(dev, ENE_FW1);
0709     if (fw_flags1 & ENE_FW1_TXIRQ) {
0710         ene_write_reg(dev, ENE_FW1, fw_flags1 & ~ENE_FW1_TXIRQ);
0711         retval |= ENE_IRQ_TX;
0712     }
0713 
0714     return retval;
0715 }
0716 
0717 /* interrupt handler */
0718 static irqreturn_t ene_isr(int irq, void *data)
0719 {
0720     u16 hw_value, reg;
0721     int hw_sample, irq_status;
0722     bool pulse;
0723     unsigned long flags;
0724     irqreturn_t retval = IRQ_NONE;
0725     struct ene_device *dev = (struct ene_device *)data;
0726     struct ir_raw_event ev = {};
0727 
0728     spin_lock_irqsave(&dev->hw_lock, flags);
0729 
0730     dbg_verbose("ISR called");
0731     ene_rx_read_hw_pointer(dev);
0732     irq_status = ene_irq_status(dev);
0733 
0734     if (!irq_status)
0735         goto unlock;
0736 
0737     retval = IRQ_HANDLED;
0738 
0739     if (irq_status & ENE_IRQ_TX) {
0740         dbg_verbose("TX interrupt");
0741         if (!dev->hw_learning_and_tx_capable) {
0742             dbg("TX interrupt on unsupported device!");
0743             goto unlock;
0744         }
0745         ene_tx_sample(dev);
0746     }
0747 
0748     if (!(irq_status & ENE_IRQ_RX))
0749         goto unlock;
0750 
0751     dbg_verbose("RX interrupt");
0752 
0753     if (dev->hw_learning_and_tx_capable)
0754         ene_rx_sense_carrier(dev);
0755 
0756     /* On hardware that don't support extra buffer we need to trust
0757         the interrupt and not track the read pointer */
0758     if (!dev->hw_extra_buffer)
0759         dev->r_pointer = dev->w_pointer == 0 ? ENE_FW_PACKET_SIZE : 0;
0760 
0761     while (1) {
0762 
0763         reg = ene_rx_get_sample_reg(dev);
0764 
0765         dbg_verbose("next sample to read at: %04x", reg);
0766         if (!reg)
0767             break;
0768 
0769         hw_value = ene_read_reg(dev, reg);
0770 
0771         if (dev->rx_fan_input_inuse) {
0772 
0773             int offset = ENE_FW_SMPL_BUF_FAN - ENE_FW_SAMPLE_BUFFER;
0774 
0775             /* read high part of the sample */
0776             hw_value |= ene_read_reg(dev, reg + offset) << 8;
0777             pulse = hw_value & ENE_FW_SMPL_BUF_FAN_PLS;
0778 
0779             /* clear space bit, and other unused bits */
0780             hw_value &= ENE_FW_SMPL_BUF_FAN_MSK;
0781             hw_sample = hw_value * ENE_FW_SAMPLE_PERIOD_FAN;
0782 
0783         } else {
0784             pulse = !(hw_value & ENE_FW_SAMPLE_SPACE);
0785             hw_value &= ~ENE_FW_SAMPLE_SPACE;
0786             hw_sample = hw_value * sample_period;
0787 
0788             if (dev->rx_period_adjust) {
0789                 hw_sample *= 100;
0790                 hw_sample /= (100 + dev->rx_period_adjust);
0791             }
0792         }
0793 
0794         if (!dev->hw_extra_buffer && !hw_sample) {
0795             dev->r_pointer = dev->w_pointer;
0796             continue;
0797         }
0798 
0799         dbg("RX: %d (%s)", hw_sample, pulse ? "pulse" : "space");
0800 
0801         ev.duration = hw_sample;
0802         ev.pulse = pulse;
0803         ir_raw_event_store_with_filter(dev->rdev, &ev);
0804     }
0805 
0806     ir_raw_event_handle(dev->rdev);
0807 unlock:
0808     spin_unlock_irqrestore(&dev->hw_lock, flags);
0809     return retval;
0810 }
0811 
0812 /* Initialize default settings */
0813 static void ene_setup_default_settings(struct ene_device *dev)
0814 {
0815     dev->tx_period = 32;
0816     dev->tx_duty_cycle = 50; /*%*/
0817     dev->transmitter_mask = 0x03;
0818     dev->learning_mode_enabled = learning_mode_force;
0819 
0820     /* Set reasonable default timeout */
0821     dev->rdev->timeout = MS_TO_US(150);
0822 }
0823 
0824 /* Upload all hardware settings at once. Used at load and resume time */
0825 static void ene_setup_hw_settings(struct ene_device *dev)
0826 {
0827     if (dev->hw_learning_and_tx_capable) {
0828         ene_tx_set_carrier(dev);
0829         ene_tx_set_transmitters(dev);
0830     }
0831 
0832     ene_rx_setup(dev);
0833 }
0834 
0835 /* outside interface: called on first open*/
0836 static int ene_open(struct rc_dev *rdev)
0837 {
0838     struct ene_device *dev = rdev->priv;
0839     unsigned long flags;
0840 
0841     spin_lock_irqsave(&dev->hw_lock, flags);
0842     ene_rx_enable(dev);
0843     spin_unlock_irqrestore(&dev->hw_lock, flags);
0844     return 0;
0845 }
0846 
0847 /* outside interface: called on device close*/
0848 static void ene_close(struct rc_dev *rdev)
0849 {
0850     struct ene_device *dev = rdev->priv;
0851     unsigned long flags;
0852     spin_lock_irqsave(&dev->hw_lock, flags);
0853 
0854     ene_rx_disable(dev);
0855     spin_unlock_irqrestore(&dev->hw_lock, flags);
0856 }
0857 
0858 /* outside interface: set transmitter mask */
0859 static int ene_set_tx_mask(struct rc_dev *rdev, u32 tx_mask)
0860 {
0861     struct ene_device *dev = rdev->priv;
0862     dbg("TX: attempt to set transmitter mask %02x", tx_mask);
0863 
0864     /* invalid txmask */
0865     if (!tx_mask || tx_mask & ~0x03) {
0866         dbg("TX: invalid mask");
0867         /* return count of transmitters */
0868         return 2;
0869     }
0870 
0871     dev->transmitter_mask = tx_mask;
0872     ene_tx_set_transmitters(dev);
0873     return 0;
0874 }
0875 
0876 /* outside interface : set tx carrier */
0877 static int ene_set_tx_carrier(struct rc_dev *rdev, u32 carrier)
0878 {
0879     struct ene_device *dev = rdev->priv;
0880     u32 period;
0881 
0882     dbg("TX: attempt to set tx carrier to %d kHz", carrier);
0883     if (carrier == 0)
0884         return -EINVAL;
0885 
0886     period = 2000000 / carrier;
0887     if (period && (period > ENE_CIRMOD_PRD_MAX ||
0888             period < ENE_CIRMOD_PRD_MIN)) {
0889 
0890         dbg("TX: out of range %d-%d kHz carrier",
0891             2000 / ENE_CIRMOD_PRD_MIN, 2000 / ENE_CIRMOD_PRD_MAX);
0892         return -EINVAL;
0893     }
0894 
0895     dev->tx_period = period;
0896     ene_tx_set_carrier(dev);
0897     return 0;
0898 }
0899 
0900 /*outside interface : set tx duty cycle */
0901 static int ene_set_tx_duty_cycle(struct rc_dev *rdev, u32 duty_cycle)
0902 {
0903     struct ene_device *dev = rdev->priv;
0904     dbg("TX: setting duty cycle to %d%%", duty_cycle);
0905     dev->tx_duty_cycle = duty_cycle;
0906     ene_tx_set_carrier(dev);
0907     return 0;
0908 }
0909 
0910 /* outside interface: enable learning mode */
0911 static int ene_set_learning_mode(struct rc_dev *rdev, int enable)
0912 {
0913     struct ene_device *dev = rdev->priv;
0914     unsigned long flags;
0915     if (enable == dev->learning_mode_enabled)
0916         return 0;
0917 
0918     spin_lock_irqsave(&dev->hw_lock, flags);
0919     dev->learning_mode_enabled = enable;
0920     ene_rx_disable(dev);
0921     ene_rx_setup(dev);
0922     ene_rx_enable(dev);
0923     spin_unlock_irqrestore(&dev->hw_lock, flags);
0924     return 0;
0925 }
0926 
0927 static int ene_set_carrier_report(struct rc_dev *rdev, int enable)
0928 {
0929     struct ene_device *dev = rdev->priv;
0930     unsigned long flags;
0931 
0932     if (enable == dev->carrier_detect_enabled)
0933         return 0;
0934 
0935     spin_lock_irqsave(&dev->hw_lock, flags);
0936     dev->carrier_detect_enabled = enable;
0937     ene_rx_disable(dev);
0938     ene_rx_setup(dev);
0939     ene_rx_enable(dev);
0940     spin_unlock_irqrestore(&dev->hw_lock, flags);
0941     return 0;
0942 }
0943 
0944 /* outside interface: enable or disable idle mode */
0945 static void ene_set_idle(struct rc_dev *rdev, bool idle)
0946 {
0947     struct ene_device *dev = rdev->priv;
0948 
0949     if (idle) {
0950         ene_rx_reset(dev);
0951         dbg("RX: end of data");
0952     }
0953 }
0954 
0955 /* outside interface: transmit */
0956 static int ene_transmit(struct rc_dev *rdev, unsigned *buf, unsigned n)
0957 {
0958     struct ene_device *dev = rdev->priv;
0959     unsigned long flags;
0960 
0961     dev->tx_buffer = buf;
0962     dev->tx_len = n;
0963     dev->tx_pos = 0;
0964     dev->tx_reg = 0;
0965     dev->tx_done = 0;
0966     dev->tx_sample = 0;
0967     dev->tx_sample_pulse = false;
0968 
0969     dbg("TX: %d samples", dev->tx_len);
0970 
0971     spin_lock_irqsave(&dev->hw_lock, flags);
0972 
0973     ene_tx_enable(dev);
0974 
0975     /* Transmit first two samples */
0976     ene_tx_sample(dev);
0977     ene_tx_sample(dev);
0978 
0979     spin_unlock_irqrestore(&dev->hw_lock, flags);
0980 
0981     if (wait_for_completion_timeout(&dev->tx_complete, 2 * HZ) == 0) {
0982         dbg("TX: timeout");
0983         spin_lock_irqsave(&dev->hw_lock, flags);
0984         ene_tx_disable(dev);
0985         spin_unlock_irqrestore(&dev->hw_lock, flags);
0986     } else
0987         dbg("TX: done");
0988     return n;
0989 }
0990 
0991 /* probe entry */
0992 static int ene_probe(struct pnp_dev *pnp_dev, const struct pnp_device_id *id)
0993 {
0994     int error = -ENOMEM;
0995     struct rc_dev *rdev;
0996     struct ene_device *dev;
0997 
0998     /* allocate memory */
0999     dev = kzalloc(sizeof(struct ene_device), GFP_KERNEL);
1000     rdev = rc_allocate_device(RC_DRIVER_IR_RAW);
1001     if (!dev || !rdev)
1002         goto exit_free_dev_rdev;
1003 
1004     /* validate resources */
1005     error = -ENODEV;
1006 
1007     /* init these to -1, as 0 is valid for both */
1008     dev->hw_io = -1;
1009     dev->irq = -1;
1010 
1011     if (!pnp_port_valid(pnp_dev, 0) ||
1012         pnp_port_len(pnp_dev, 0) < ENE_IO_SIZE)
1013         goto exit_free_dev_rdev;
1014 
1015     if (!pnp_irq_valid(pnp_dev, 0))
1016         goto exit_free_dev_rdev;
1017 
1018     spin_lock_init(&dev->hw_lock);
1019 
1020     dev->hw_io = pnp_port_start(pnp_dev, 0);
1021     dev->irq = pnp_irq(pnp_dev, 0);
1022 
1023 
1024     pnp_set_drvdata(pnp_dev, dev);
1025     dev->pnp_dev = pnp_dev;
1026 
1027     /* don't allow too short/long sample periods */
1028     if (sample_period < 5 || sample_period > 0x7F)
1029         sample_period = ENE_DEFAULT_SAMPLE_PERIOD;
1030 
1031     /* detect hardware version and features */
1032     error = ene_hw_detect(dev);
1033     if (error)
1034         goto exit_free_dev_rdev;
1035 
1036     if (!dev->hw_learning_and_tx_capable && txsim) {
1037         dev->hw_learning_and_tx_capable = true;
1038         timer_setup(&dev->tx_sim_timer, ene_tx_irqsim, 0);
1039         pr_warn("Simulation of TX activated\n");
1040     }
1041 
1042     if (!dev->hw_learning_and_tx_capable)
1043         learning_mode_force = false;
1044 
1045     rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER;
1046     rdev->priv = dev;
1047     rdev->open = ene_open;
1048     rdev->close = ene_close;
1049     rdev->s_idle = ene_set_idle;
1050     rdev->driver_name = ENE_DRIVER_NAME;
1051     rdev->map_name = RC_MAP_RC6_MCE;
1052     rdev->device_name = "ENE eHome Infrared Remote Receiver";
1053 
1054     if (dev->hw_learning_and_tx_capable) {
1055         rdev->s_wideband_receiver = ene_set_learning_mode;
1056         init_completion(&dev->tx_complete);
1057         rdev->tx_ir = ene_transmit;
1058         rdev->s_tx_mask = ene_set_tx_mask;
1059         rdev->s_tx_carrier = ene_set_tx_carrier;
1060         rdev->s_tx_duty_cycle = ene_set_tx_duty_cycle;
1061         rdev->s_carrier_report = ene_set_carrier_report;
1062         rdev->device_name = "ENE eHome Infrared Remote Transceiver";
1063     }
1064 
1065     dev->rdev = rdev;
1066 
1067     ene_rx_setup_hw_buffer(dev);
1068     ene_setup_default_settings(dev);
1069     ene_setup_hw_settings(dev);
1070 
1071     device_set_wakeup_capable(&pnp_dev->dev, true);
1072     device_set_wakeup_enable(&pnp_dev->dev, true);
1073 
1074     error = rc_register_device(rdev);
1075     if (error < 0)
1076         goto exit_free_dev_rdev;
1077 
1078     /* claim the resources */
1079     error = -EBUSY;
1080     if (!request_region(dev->hw_io, ENE_IO_SIZE, ENE_DRIVER_NAME)) {
1081         goto exit_unregister_device;
1082     }
1083 
1084     if (request_irq(dev->irq, ene_isr,
1085             IRQF_SHARED, ENE_DRIVER_NAME, (void *)dev)) {
1086         goto exit_release_hw_io;
1087     }
1088 
1089     pr_notice("driver has been successfully loaded\n");
1090     return 0;
1091 
1092 exit_release_hw_io:
1093     release_region(dev->hw_io, ENE_IO_SIZE);
1094 exit_unregister_device:
1095     rc_unregister_device(rdev);
1096     rdev = NULL;
1097 exit_free_dev_rdev:
1098     rc_free_device(rdev);
1099     kfree(dev);
1100     return error;
1101 }
1102 
1103 /* main unload function */
1104 static void ene_remove(struct pnp_dev *pnp_dev)
1105 {
1106     struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1107     unsigned long flags;
1108 
1109     spin_lock_irqsave(&dev->hw_lock, flags);
1110     ene_rx_disable(dev);
1111     ene_rx_restore_hw_buffer(dev);
1112     spin_unlock_irqrestore(&dev->hw_lock, flags);
1113 
1114     free_irq(dev->irq, dev);
1115     release_region(dev->hw_io, ENE_IO_SIZE);
1116     rc_unregister_device(dev->rdev);
1117     kfree(dev);
1118 }
1119 
1120 /* enable wake on IR (wakes on specific button on original remote) */
1121 static void ene_enable_wake(struct ene_device *dev, bool enable)
1122 {
1123     dbg("wake on IR %s", enable ? "enabled" : "disabled");
1124     ene_set_clear_reg_mask(dev, ENE_FW1, ENE_FW1_WAKE, enable);
1125 }
1126 
1127 #ifdef CONFIG_PM
1128 static int ene_suspend(struct pnp_dev *pnp_dev, pm_message_t state)
1129 {
1130     struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1131     bool wake = device_may_wakeup(&dev->pnp_dev->dev);
1132 
1133     if (!wake && dev->rx_enabled)
1134         ene_rx_disable_hw(dev);
1135 
1136     ene_enable_wake(dev, wake);
1137     return 0;
1138 }
1139 
1140 static int ene_resume(struct pnp_dev *pnp_dev)
1141 {
1142     struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1143     ene_setup_hw_settings(dev);
1144 
1145     if (dev->rx_enabled)
1146         ene_rx_enable(dev);
1147 
1148     ene_enable_wake(dev, false);
1149     return 0;
1150 }
1151 #endif
1152 
1153 static void ene_shutdown(struct pnp_dev *pnp_dev)
1154 {
1155     struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1156     ene_enable_wake(dev, true);
1157 }
1158 
1159 static const struct pnp_device_id ene_ids[] = {
1160     {.id = "ENE0100",},
1161     {.id = "ENE0200",},
1162     {.id = "ENE0201",},
1163     {.id = "ENE0202",},
1164     {},
1165 };
1166 
1167 static struct pnp_driver ene_driver = {
1168     .name = ENE_DRIVER_NAME,
1169     .id_table = ene_ids,
1170     .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1171 
1172     .probe = ene_probe,
1173     .remove = ene_remove,
1174 #ifdef CONFIG_PM
1175     .suspend = ene_suspend,
1176     .resume = ene_resume,
1177 #endif
1178     .shutdown = ene_shutdown,
1179 };
1180 
1181 module_param(sample_period, int, S_IRUGO);
1182 MODULE_PARM_DESC(sample_period, "Hardware sample period (50 us default)");
1183 
1184 module_param(learning_mode_force, bool, S_IRUGO);
1185 MODULE_PARM_DESC(learning_mode_force, "Enable learning mode by default");
1186 
1187 module_param(debug, int, S_IRUGO | S_IWUSR);
1188 MODULE_PARM_DESC(debug, "Debug level");
1189 
1190 module_param(txsim, bool, S_IRUGO);
1191 MODULE_PARM_DESC(txsim,
1192     "Simulate TX features on unsupported hardware (dangerous)");
1193 
1194 MODULE_DEVICE_TABLE(pnp, ene_ids);
1195 MODULE_DESCRIPTION
1196     ("Infrared input driver for KB3926B/C/D/E/F (aka ENE0100/ENE0200/ENE0201/ENE0202) CIR port");
1197 
1198 MODULE_AUTHOR("Maxim Levitsky");
1199 MODULE_LICENSE("GPL");
1200 
1201 module_pnp_driver(ene_driver);
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