platform/chips-media/coda-gdi.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Coda multi-standard codec IP
0004  *
0005  * Copyright (C) 2014 Philipp Zabel, Pengutronix
0006  */
0007
0008 #include <linux/bitops.h>
0009 #include "coda.h"
0010
0011 #define XY2_INVERT  BIT(7)
0012 #define XY2_ZERO    BIT(6)
0013 #define XY2_TB_XOR  BIT(5)
0014 #define XY2_XYSEL   BIT(4)
0015 #define XY2_Y       (1 << 4)
0016 #define XY2_X       (0 << 4)
0017
0018 #define XY2(luma_sel, luma_bit, chroma_sel, chroma_bit) \
0019     (((XY2_##luma_sel) | (luma_bit)) << 8 | \
0020      (XY2_##chroma_sel) | (chroma_bit))
0021
0022 static const u16 xy2ca_zero_map[16] = {
0023     XY2(ZERO, 0, ZERO, 0),
0024     XY2(ZERO, 0, ZERO, 0),
0025     XY2(ZERO, 0, ZERO, 0),
0026     XY2(ZERO, 0, ZERO, 0),
0027     XY2(ZERO, 0, ZERO, 0),
0028     XY2(ZERO, 0, ZERO, 0),
0029     XY2(ZERO, 0, ZERO, 0),
0030     XY2(ZERO, 0, ZERO, 0),
0031     XY2(ZERO, 0, ZERO, 0),
0032     XY2(ZERO, 0, ZERO, 0),
0033     XY2(ZERO, 0, ZERO, 0),
0034     XY2(ZERO, 0, ZERO, 0),
0035     XY2(ZERO, 0, ZERO, 0),
0036     XY2(ZERO, 0, ZERO, 0),
0037     XY2(ZERO, 0, ZERO, 0),
0038     XY2(ZERO, 0, ZERO, 0),
0039 };
0040
0041 static const u16 xy2ca_tiled_map[16] = {
0042     XY2(Y,    0, Y,    0),
0043     XY2(Y,    1, Y,    1),
0044     XY2(Y,    2, Y,    2),
0045     XY2(Y,    3, X,    3),
0046     XY2(X,    3, ZERO, 0),
0047     XY2(ZERO, 0, ZERO, 0),
0048     XY2(ZERO, 0, ZERO, 0),
0049     XY2(ZERO, 0, ZERO, 0),
0050     XY2(ZERO, 0, ZERO, 0),
0051     XY2(ZERO, 0, ZERO, 0),
0052     XY2(ZERO, 0, ZERO, 0),
0053     XY2(ZERO, 0, ZERO, 0),
0054     XY2(ZERO, 0, ZERO, 0),
0055     XY2(ZERO, 0, ZERO, 0),
0056     XY2(ZERO, 0, ZERO, 0),
0057     XY2(ZERO, 0, ZERO, 0),
0058 };
0059
0060 /*
0061  * RA[15:0], CA[15:8] are hardwired to contain the 24-bit macroblock
0062  * start offset (macroblock size is 16x16 for luma, 16x8 for chroma).
0063  * Bits CA[4:0] are set using XY2CA above. BA[3:0] seems to be unused.
0064  */
0065
0066 #define RBC_CA      (0 << 4)
0067 #define RBC_BA      (1 << 4)
0068 #define RBC_RA      (2 << 4)
0069 #define RBC_ZERO    (3 << 4)
0070
0071 #define RBC(luma_sel, luma_bit, chroma_sel, chroma_bit) \
0072     (((RBC_##luma_sel) | (luma_bit)) << 6 | \
0073      (RBC_##chroma_sel) | (chroma_bit))
0074
0075 static const u16 rbc2axi_tiled_map[32] = {
0076     RBC(ZERO, 0, ZERO, 0),
0077     RBC(ZERO, 0, ZERO, 0),
0078     RBC(ZERO, 0, ZERO, 0),
0079     RBC(CA,   0, CA,   0),
0080     RBC(CA,   1, CA,   1),
0081     RBC(CA,   2, CA,   2),
0082     RBC(CA,   3, CA,   3),
0083     RBC(CA,   4, CA,   8),
0084     RBC(CA,   8, CA,   9),
0085     RBC(CA,   9, CA,  10),
0086     RBC(CA,  10, CA,  11),
0087     RBC(CA,  11, CA,  12),
0088     RBC(CA,  12, CA,  13),
0089     RBC(CA,  13, CA,  14),
0090     RBC(CA,  14, CA,  15),
0091     RBC(CA,  15, RA,   0),
0092     RBC(RA,   0, RA,   1),
0093     RBC(RA,   1, RA,   2),
0094     RBC(RA,   2, RA,   3),
0095     RBC(RA,   3, RA,   4),
0096     RBC(RA,   4, RA,   5),
0097     RBC(RA,   5, RA,   6),
0098     RBC(RA,   6, RA,   7),
0099     RBC(RA,   7, RA,   8),
0100     RBC(RA,   8, RA,   9),
0101     RBC(RA,   9, RA,  10),
0102     RBC(RA,  10, RA,  11),
0103     RBC(RA,  11, RA,  12),
0104     RBC(RA,  12, RA,  13),
0105     RBC(RA,  13, RA,  14),
0106     RBC(RA,  14, RA,  15),
0107     RBC(RA,  15, ZERO, 0),
0108 };
0109
0110 void coda_set_gdi_regs(struct coda_ctx *ctx)
0111 {
0112     struct coda_dev *dev = ctx->dev;
0113     const u16 *xy2ca_map;
0114     u32 xy2rbc_config;
0115     int i;
0116
0117     switch (ctx->tiled_map_type) {
0118     case GDI_LINEAR_FRAME_MAP:
0119     default:
0120         xy2ca_map = xy2ca_zero_map;
0121         xy2rbc_config = 0;
0122         break;
0123     case GDI_TILED_FRAME_MB_RASTER_MAP:
0124         xy2ca_map = xy2ca_tiled_map;
0125         xy2rbc_config = CODA9_XY2RBC_TILED_MAP |
0126                 CODA9_XY2RBC_CA_INC_HOR |
0127                 (16 - 1) << 12 | (8 - 1) << 4;
0128         break;
0129     }
0130
0131     for (i = 0; i < 16; i++)
0132         coda_write(dev, xy2ca_map[i],
0133                 CODA9_GDI_XY2_CAS_0 + 4 * i);
0134     for (i = 0; i < 4; i++)
0135         coda_write(dev, XY2(ZERO, 0, ZERO, 0),
0136                 CODA9_GDI_XY2_BA_0 + 4 * i);
0137     for (i = 0; i < 16; i++)
0138         coda_write(dev, XY2(ZERO, 0, ZERO, 0),
0139                 CODA9_GDI_XY2_RAS_0 + 4 * i);
0140     coda_write(dev, xy2rbc_config, CODA9_GDI_XY2_RBC_CONFIG);
0141     if (xy2rbc_config) {
0142         for (i = 0; i < 32; i++)
0143             coda_write(dev, rbc2axi_tiled_map[i],
0144                     CODA9_GDI_RBC2_AXI_0 + 4 * i);
0145     }
0146 }