Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Coda multi-standard codec IP - BIT processor functions
0004  *
0005  * Copyright (C) 2012 Vista Silicon S.L.
0006  *    Javier Martin, <javier.martin@vista-silicon.com>
0007  *    Xavier Duret
0008  * Copyright (C) 2012-2014 Philipp Zabel, Pengutronix
0009  */
0010 
0011 #include <linux/clk.h>
0012 #include <linux/irqreturn.h>
0013 #include <linux/kernel.h>
0014 #include <linux/log2.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/ratelimit.h>
0017 #include <linux/reset.h>
0018 #include <linux/slab.h>
0019 #include <linux/videodev2.h>
0020 
0021 #include <media/v4l2-common.h>
0022 #include <media/v4l2-ctrls.h>
0023 #include <media/v4l2-fh.h>
0024 #include <media/v4l2-mem2mem.h>
0025 #include <media/videobuf2-v4l2.h>
0026 #include <media/videobuf2-dma-contig.h>
0027 #include <media/videobuf2-vmalloc.h>
0028 
0029 #include "coda.h"
0030 #include "imx-vdoa.h"
0031 #define CREATE_TRACE_POINTS
0032 #include "trace.h"
0033 
0034 #define CODA_PARA_BUF_SIZE  (10 * 1024)
0035 #define CODA7_PS_BUF_SIZE   0x28000
0036 #define CODA9_PS_SAVE_SIZE  (512 * 1024)
0037 
0038 #define CODA_DEFAULT_GAMMA  4096
0039 #define CODA9_DEFAULT_GAMMA 24576   /* 0.75 * 32768 */
0040 
0041 static void coda_free_bitstream_buffer(struct coda_ctx *ctx);
0042 
0043 static inline int coda_is_initialized(struct coda_dev *dev)
0044 {
0045     return coda_read(dev, CODA_REG_BIT_CUR_PC) != 0;
0046 }
0047 
0048 static inline unsigned long coda_isbusy(struct coda_dev *dev)
0049 {
0050     return coda_read(dev, CODA_REG_BIT_BUSY);
0051 }
0052 
0053 static int coda_wait_timeout(struct coda_dev *dev)
0054 {
0055     unsigned long timeout = jiffies + msecs_to_jiffies(1000);
0056 
0057     while (coda_isbusy(dev)) {
0058         if (time_after(jiffies, timeout))
0059             return -ETIMEDOUT;
0060     }
0061     return 0;
0062 }
0063 
0064 static void coda_command_async(struct coda_ctx *ctx, int cmd)
0065 {
0066     struct coda_dev *dev = ctx->dev;
0067 
0068     if (dev->devtype->product == CODA_HX4 ||
0069         dev->devtype->product == CODA_7541 ||
0070         dev->devtype->product == CODA_960) {
0071         /* Restore context related registers to CODA */
0072         coda_write(dev, ctx->bit_stream_param,
0073                 CODA_REG_BIT_BIT_STREAM_PARAM);
0074         coda_write(dev, ctx->frm_dis_flg,
0075                 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
0076         coda_write(dev, ctx->frame_mem_ctrl,
0077                 CODA_REG_BIT_FRAME_MEM_CTRL);
0078         coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR);
0079     }
0080 
0081     if (dev->devtype->product == CODA_960) {
0082         coda_write(dev, 1, CODA9_GDI_WPROT_ERR_CLR);
0083         coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
0084     }
0085 
0086     coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
0087 
0088     coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
0089     coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
0090     coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD);
0091 
0092     trace_coda_bit_run(ctx, cmd);
0093 
0094     coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
0095 }
0096 
0097 static int coda_command_sync(struct coda_ctx *ctx, int cmd)
0098 {
0099     struct coda_dev *dev = ctx->dev;
0100     int ret;
0101 
0102     lockdep_assert_held(&dev->coda_mutex);
0103 
0104     coda_command_async(ctx, cmd);
0105     ret = coda_wait_timeout(dev);
0106     trace_coda_bit_done(ctx);
0107 
0108     return ret;
0109 }
0110 
0111 int coda_hw_reset(struct coda_ctx *ctx)
0112 {
0113     struct coda_dev *dev = ctx->dev;
0114     unsigned long timeout;
0115     unsigned int idx;
0116     int ret;
0117 
0118     lockdep_assert_held(&dev->coda_mutex);
0119 
0120     if (!dev->rstc)
0121         return -ENOENT;
0122 
0123     idx = coda_read(dev, CODA_REG_BIT_RUN_INDEX);
0124 
0125     if (dev->devtype->product == CODA_960) {
0126         timeout = jiffies + msecs_to_jiffies(100);
0127         coda_write(dev, 0x11, CODA9_GDI_BUS_CTRL);
0128         while (coda_read(dev, CODA9_GDI_BUS_STATUS) != 0x77) {
0129             if (time_after(jiffies, timeout))
0130                 return -ETIME;
0131             cpu_relax();
0132         }
0133     }
0134 
0135     ret = reset_control_reset(dev->rstc);
0136     if (ret < 0)
0137         return ret;
0138 
0139     if (dev->devtype->product == CODA_960)
0140         coda_write(dev, 0x00, CODA9_GDI_BUS_CTRL);
0141     coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
0142     coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
0143     ret = coda_wait_timeout(dev);
0144     coda_write(dev, idx, CODA_REG_BIT_RUN_INDEX);
0145 
0146     return ret;
0147 }
0148 
0149 static void coda_kfifo_sync_from_device(struct coda_ctx *ctx)
0150 {
0151     struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
0152     struct coda_dev *dev = ctx->dev;
0153     u32 rd_ptr;
0154 
0155     rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
0156     kfifo->out = (kfifo->in & ~kfifo->mask) |
0157               (rd_ptr - ctx->bitstream.paddr);
0158     if (kfifo->out > kfifo->in)
0159         kfifo->out -= kfifo->mask + 1;
0160 }
0161 
0162 static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx)
0163 {
0164     struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
0165     struct coda_dev *dev = ctx->dev;
0166     u32 rd_ptr, wr_ptr;
0167 
0168     rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask);
0169     coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
0170     wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
0171     coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
0172 }
0173 
0174 static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx)
0175 {
0176     struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
0177     struct coda_dev *dev = ctx->dev;
0178     u32 wr_ptr;
0179 
0180     wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
0181     coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
0182 }
0183 
0184 static int coda_h264_bitstream_pad(struct coda_ctx *ctx, u32 size)
0185 {
0186     unsigned char *buf;
0187     u32 n;
0188 
0189     if (size < 6)
0190         size = 6;
0191 
0192     buf = kmalloc(size, GFP_KERNEL);
0193     if (!buf)
0194         return -ENOMEM;
0195 
0196     coda_h264_filler_nal(size, buf);
0197     n = kfifo_in(&ctx->bitstream_fifo, buf, size);
0198     kfree(buf);
0199 
0200     return (n < size) ? -ENOSPC : 0;
0201 }
0202 
0203 int coda_bitstream_flush(struct coda_ctx *ctx)
0204 {
0205     int ret;
0206 
0207     if (ctx->inst_type != CODA_INST_DECODER || !ctx->use_bit)
0208         return 0;
0209 
0210     ret = coda_command_sync(ctx, CODA_COMMAND_DEC_BUF_FLUSH);
0211     if (ret < 0) {
0212         v4l2_err(&ctx->dev->v4l2_dev, "failed to flush bitstream\n");
0213         return ret;
0214     }
0215 
0216     kfifo_init(&ctx->bitstream_fifo, ctx->bitstream.vaddr,
0217            ctx->bitstream.size);
0218     coda_kfifo_sync_to_device_full(ctx);
0219 
0220     return 0;
0221 }
0222 
0223 static int coda_bitstream_queue(struct coda_ctx *ctx, const u8 *buf, u32 size)
0224 {
0225     u32 n = kfifo_in(&ctx->bitstream_fifo, buf, size);
0226 
0227     return (n < size) ? -ENOSPC : 0;
0228 }
0229 
0230 static u32 coda_buffer_parse_headers(struct coda_ctx *ctx,
0231                      struct vb2_v4l2_buffer *src_buf,
0232                      u32 payload)
0233 {
0234     u8 *vaddr = vb2_plane_vaddr(&src_buf->vb2_buf, 0);
0235     u32 size = 0;
0236 
0237     switch (ctx->codec->src_fourcc) {
0238     case V4L2_PIX_FMT_MPEG2:
0239         size = coda_mpeg2_parse_headers(ctx, vaddr, payload);
0240         break;
0241     case V4L2_PIX_FMT_MPEG4:
0242         size = coda_mpeg4_parse_headers(ctx, vaddr, payload);
0243         break;
0244     default:
0245         break;
0246     }
0247 
0248     return size;
0249 }
0250 
0251 static bool coda_bitstream_try_queue(struct coda_ctx *ctx,
0252                      struct vb2_v4l2_buffer *src_buf)
0253 {
0254     unsigned long payload = vb2_get_plane_payload(&src_buf->vb2_buf, 0);
0255     u8 *vaddr = vb2_plane_vaddr(&src_buf->vb2_buf, 0);
0256     int ret;
0257     int i;
0258 
0259     if (coda_get_bitstream_payload(ctx) + payload + 512 >=
0260         ctx->bitstream.size)
0261         return false;
0262 
0263     if (!vaddr) {
0264         v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n");
0265         return true;
0266     }
0267 
0268     if (ctx->qsequence == 0 && payload < 512) {
0269         /*
0270          * Add padding after the first buffer, if it is too small to be
0271          * fetched by the CODA, by repeating the headers. Without
0272          * repeated headers, or the first frame already queued, decoder
0273          * sequence initialization fails with error code 0x2000 on i.MX6
0274          * or error code 0x1 on i.MX51.
0275          */
0276         u32 header_size = coda_buffer_parse_headers(ctx, src_buf,
0277                                 payload);
0278 
0279         if (header_size) {
0280             coda_dbg(1, ctx, "pad with %u-byte header\n",
0281                  header_size);
0282             for (i = payload; i < 512; i += header_size) {
0283                 ret = coda_bitstream_queue(ctx, vaddr,
0284                                header_size);
0285                 if (ret < 0) {
0286                     v4l2_err(&ctx->dev->v4l2_dev,
0287                          "bitstream buffer overflow\n");
0288                     return false;
0289                 }
0290                 if (ctx->dev->devtype->product == CODA_960)
0291                     break;
0292             }
0293         } else {
0294             coda_dbg(1, ctx,
0295                  "could not parse header, sequence initialization might fail\n");
0296         }
0297 
0298         /* Add padding before the first buffer, if it is too small */
0299         if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264)
0300             coda_h264_bitstream_pad(ctx, 512 - payload);
0301     }
0302 
0303     ret = coda_bitstream_queue(ctx, vaddr, payload);
0304     if (ret < 0) {
0305         v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n");
0306         return false;
0307     }
0308 
0309     src_buf->sequence = ctx->qsequence++;
0310 
0311     /* Sync read pointer to device */
0312     if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev))
0313         coda_kfifo_sync_to_device_write(ctx);
0314 
0315     /* Set the stream-end flag after the last buffer is queued */
0316     if (src_buf->flags & V4L2_BUF_FLAG_LAST)
0317         coda_bit_stream_end_flag(ctx);
0318     ctx->hold = false;
0319 
0320     return true;
0321 }
0322 
0323 void coda_fill_bitstream(struct coda_ctx *ctx, struct list_head *buffer_list)
0324 {
0325     struct vb2_v4l2_buffer *src_buf;
0326     struct coda_buffer_meta *meta;
0327     u32 start;
0328 
0329     lockdep_assert_held(&ctx->bitstream_mutex);
0330 
0331     if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG)
0332         return;
0333 
0334     while (v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) > 0) {
0335         /*
0336          * Only queue two JPEGs into the bitstream buffer to keep
0337          * latency low. We need at least one complete buffer and the
0338          * header of another buffer (for prescan) in the bitstream.
0339          */
0340         if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG &&
0341             ctx->num_metas > 1)
0342             break;
0343 
0344         if (ctx->num_internal_frames &&
0345             ctx->num_metas >= ctx->num_internal_frames) {
0346             meta = list_first_entry(&ctx->buffer_meta_list,
0347                         struct coda_buffer_meta, list);
0348 
0349             /*
0350              * If we managed to fill in at least a full reorder
0351              * window of buffers (num_internal_frames is a
0352              * conservative estimate for this) and the bitstream
0353              * prefetcher has at least 2 256 bytes periods beyond
0354              * the first buffer to fetch, we can safely stop queuing
0355              * in order to limit the decoder drain latency.
0356              */
0357             if (coda_bitstream_can_fetch_past(ctx, meta->end))
0358                 break;
0359         }
0360 
0361         src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
0362 
0363         /* Drop frames that do not start/end with a SOI/EOI markers */
0364         if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG &&
0365             !coda_jpeg_check_buffer(ctx, &src_buf->vb2_buf)) {
0366             v4l2_err(&ctx->dev->v4l2_dev,
0367                  "dropping invalid JPEG frame %d\n",
0368                  ctx->qsequence);
0369             src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
0370             if (buffer_list) {
0371                 struct v4l2_m2m_buffer *m2m_buf;
0372 
0373                 m2m_buf = container_of(src_buf,
0374                                struct v4l2_m2m_buffer,
0375                                vb);
0376                 list_add_tail(&m2m_buf->list, buffer_list);
0377             } else {
0378                 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_ERROR);
0379             }
0380             continue;
0381         }
0382 
0383         /* Dump empty buffers */
0384         if (!vb2_get_plane_payload(&src_buf->vb2_buf, 0)) {
0385             src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
0386             v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
0387             continue;
0388         }
0389 
0390         /* Buffer start position */
0391         start = ctx->bitstream_fifo.kfifo.in;
0392 
0393         if (coda_bitstream_try_queue(ctx, src_buf)) {
0394             /*
0395              * Source buffer is queued in the bitstream ringbuffer;
0396              * queue the timestamp and mark source buffer as done
0397              */
0398             src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
0399 
0400             meta = kmalloc(sizeof(*meta), GFP_KERNEL);
0401             if (meta) {
0402                 meta->sequence = src_buf->sequence;
0403                 meta->timecode = src_buf->timecode;
0404                 meta->timestamp = src_buf->vb2_buf.timestamp;
0405                 meta->start = start;
0406                 meta->end = ctx->bitstream_fifo.kfifo.in;
0407                 meta->last = src_buf->flags & V4L2_BUF_FLAG_LAST;
0408                 if (meta->last)
0409                     coda_dbg(1, ctx, "marking last meta");
0410                 spin_lock(&ctx->buffer_meta_lock);
0411                 list_add_tail(&meta->list,
0412                           &ctx->buffer_meta_list);
0413                 ctx->num_metas++;
0414                 spin_unlock(&ctx->buffer_meta_lock);
0415 
0416                 trace_coda_bit_queue(ctx, src_buf, meta);
0417             }
0418 
0419             if (buffer_list) {
0420                 struct v4l2_m2m_buffer *m2m_buf;
0421 
0422                 m2m_buf = container_of(src_buf,
0423                                struct v4l2_m2m_buffer,
0424                                vb);
0425                 list_add_tail(&m2m_buf->list, buffer_list);
0426             } else {
0427                 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
0428             }
0429         } else {
0430             break;
0431         }
0432     }
0433 }
0434 
0435 void coda_bit_stream_end_flag(struct coda_ctx *ctx)
0436 {
0437     struct coda_dev *dev = ctx->dev;
0438 
0439     ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
0440 
0441     /* If this context is currently running, update the hardware flag */
0442     if ((dev->devtype->product == CODA_960) &&
0443         coda_isbusy(dev) &&
0444         (ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX))) {
0445         coda_write(dev, ctx->bit_stream_param,
0446                CODA_REG_BIT_BIT_STREAM_PARAM);
0447     }
0448 }
0449 
0450 static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
0451 {
0452     struct coda_dev *dev = ctx->dev;
0453     u32 *p = ctx->parabuf.vaddr;
0454 
0455     if (dev->devtype->product == CODA_DX6)
0456         p[index] = value;
0457     else
0458         p[index ^ 1] = value;
0459 }
0460 
0461 static inline int coda_alloc_context_buf(struct coda_ctx *ctx,
0462                      struct coda_aux_buf *buf, size_t size,
0463                      const char *name)
0464 {
0465     return coda_alloc_aux_buf(ctx->dev, buf, size, name, ctx->debugfs_entry);
0466 }
0467 
0468 
0469 static void coda_free_framebuffers(struct coda_ctx *ctx)
0470 {
0471     int i;
0472 
0473     for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++)
0474         coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i].buf);
0475 }
0476 
0477 static int coda_alloc_framebuffers(struct coda_ctx *ctx,
0478                    struct coda_q_data *q_data, u32 fourcc)
0479 {
0480     struct coda_dev *dev = ctx->dev;
0481     unsigned int ysize, ycbcr_size;
0482     int ret;
0483     int i;
0484 
0485     if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 ||
0486         ctx->codec->dst_fourcc == V4L2_PIX_FMT_H264 ||
0487         ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4 ||
0488         ctx->codec->dst_fourcc == V4L2_PIX_FMT_MPEG4)
0489         ysize = round_up(q_data->rect.width, 16) *
0490             round_up(q_data->rect.height, 16);
0491     else
0492         ysize = round_up(q_data->rect.width, 8) * q_data->rect.height;
0493 
0494     if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP)
0495         ycbcr_size = round_up(ysize, 4096) + ysize / 2;
0496     else
0497         ycbcr_size = ysize + ysize / 2;
0498 
0499     /* Allocate frame buffers */
0500     for (i = 0; i < ctx->num_internal_frames; i++) {
0501         size_t size = ycbcr_size;
0502         char *name;
0503 
0504         /* Add space for mvcol buffers */
0505         if (dev->devtype->product != CODA_DX6 &&
0506             (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 ||
0507              (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4 && i == 0)))
0508             size += ysize / 4;
0509         name = kasprintf(GFP_KERNEL, "fb%d", i);
0510         if (!name) {
0511             coda_free_framebuffers(ctx);
0512             return -ENOMEM;
0513         }
0514         ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i].buf,
0515                          size, name);
0516         kfree(name);
0517         if (ret < 0) {
0518             coda_free_framebuffers(ctx);
0519             return ret;
0520         }
0521     }
0522 
0523     /* Register frame buffers in the parameter buffer */
0524     for (i = 0; i < ctx->num_internal_frames; i++) {
0525         u32 y, cb, cr, mvcol;
0526 
0527         /* Start addresses of Y, Cb, Cr planes */
0528         y = ctx->internal_frames[i].buf.paddr;
0529         cb = y + ysize;
0530         cr = y + ysize + ysize/4;
0531         mvcol = y + ysize + ysize/4 + ysize/4;
0532         if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP) {
0533             cb = round_up(cb, 4096);
0534             mvcol = cb + ysize/2;
0535             cr = 0;
0536             /* Packed 20-bit MSB of base addresses */
0537             /* YYYYYCCC, CCyyyyyc, cccc.... */
0538             y = (y & 0xfffff000) | cb >> 20;
0539             cb = (cb & 0x000ff000) << 12;
0540         }
0541         coda_parabuf_write(ctx, i * 3 + 0, y);
0542         coda_parabuf_write(ctx, i * 3 + 1, cb);
0543         coda_parabuf_write(ctx, i * 3 + 2, cr);
0544 
0545         if (dev->devtype->product == CODA_DX6)
0546             continue;
0547 
0548         /* mvcol buffer for h.264 and mpeg4 */
0549         if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264)
0550             coda_parabuf_write(ctx, 96 + i, mvcol);
0551         if (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4 && i == 0)
0552             coda_parabuf_write(ctx, 97, mvcol);
0553     }
0554 
0555     return 0;
0556 }
0557 
0558 static void coda_free_context_buffers(struct coda_ctx *ctx)
0559 {
0560     struct coda_dev *dev = ctx->dev;
0561 
0562     coda_free_aux_buf(dev, &ctx->slicebuf);
0563     coda_free_aux_buf(dev, &ctx->psbuf);
0564     if (dev->devtype->product != CODA_DX6)
0565         coda_free_aux_buf(dev, &ctx->workbuf);
0566     coda_free_aux_buf(dev, &ctx->parabuf);
0567 }
0568 
0569 static int coda_alloc_context_buffers(struct coda_ctx *ctx,
0570                       struct coda_q_data *q_data)
0571 {
0572     struct coda_dev *dev = ctx->dev;
0573     size_t size;
0574     int ret;
0575 
0576     if (!ctx->parabuf.vaddr) {
0577         ret = coda_alloc_context_buf(ctx, &ctx->parabuf,
0578                          CODA_PARA_BUF_SIZE, "parabuf");
0579         if (ret < 0)
0580             return ret;
0581     }
0582 
0583     if (dev->devtype->product == CODA_DX6)
0584         return 0;
0585 
0586     if (!ctx->slicebuf.vaddr && q_data->fourcc == V4L2_PIX_FMT_H264) {
0587         /* worst case slice size */
0588         size = (DIV_ROUND_UP(q_data->rect.width, 16) *
0589             DIV_ROUND_UP(q_data->rect.height, 16)) * 3200 / 8 + 512;
0590         ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size,
0591                          "slicebuf");
0592         if (ret < 0)
0593             goto err;
0594     }
0595 
0596     if (!ctx->psbuf.vaddr && (dev->devtype->product == CODA_HX4 ||
0597                   dev->devtype->product == CODA_7541)) {
0598         ret = coda_alloc_context_buf(ctx, &ctx->psbuf,
0599                          CODA7_PS_BUF_SIZE, "psbuf");
0600         if (ret < 0)
0601             goto err;
0602     }
0603 
0604     if (!ctx->workbuf.vaddr) {
0605         size = dev->devtype->workbuf_size;
0606         if (dev->devtype->product == CODA_960 &&
0607             q_data->fourcc == V4L2_PIX_FMT_H264)
0608             size += CODA9_PS_SAVE_SIZE;
0609         ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size,
0610                          "workbuf");
0611         if (ret < 0)
0612             goto err;
0613     }
0614 
0615     return 0;
0616 
0617 err:
0618     coda_free_context_buffers(ctx);
0619     return ret;
0620 }
0621 
0622 static int coda_encode_header(struct coda_ctx *ctx, struct vb2_v4l2_buffer *buf,
0623                   int header_code, u8 *header, int *size)
0624 {
0625     struct vb2_buffer *vb = &buf->vb2_buf;
0626     struct coda_dev *dev = ctx->dev;
0627     struct coda_q_data *q_data_src;
0628     struct v4l2_rect *r;
0629     size_t bufsize;
0630     int ret;
0631     int i;
0632 
0633     if (dev->devtype->product == CODA_960)
0634         memset(vb2_plane_vaddr(vb, 0), 0, 64);
0635 
0636     coda_write(dev, vb2_dma_contig_plane_dma_addr(vb, 0),
0637            CODA_CMD_ENC_HEADER_BB_START);
0638     bufsize = vb2_plane_size(vb, 0);
0639     if (dev->devtype->product == CODA_960)
0640         bufsize /= 1024;
0641     coda_write(dev, bufsize, CODA_CMD_ENC_HEADER_BB_SIZE);
0642     if (dev->devtype->product == CODA_960 &&
0643         ctx->codec->dst_fourcc == V4L2_PIX_FMT_H264 &&
0644         header_code == CODA_HEADER_H264_SPS) {
0645         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
0646         r = &q_data_src->rect;
0647 
0648         if (r->width % 16 || r->height % 16) {
0649             u32 crop_right = round_up(r->width, 16) -  r->width;
0650             u32 crop_bottom = round_up(r->height, 16) - r->height;
0651 
0652             coda_write(dev, crop_right,
0653                    CODA9_CMD_ENC_HEADER_FRAME_CROP_H);
0654             coda_write(dev, crop_bottom,
0655                    CODA9_CMD_ENC_HEADER_FRAME_CROP_V);
0656             header_code |= CODA9_HEADER_FRAME_CROP;
0657         }
0658     }
0659     coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE);
0660     ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER);
0661     if (ret < 0) {
0662         v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
0663         return ret;
0664     }
0665 
0666     if (dev->devtype->product == CODA_960) {
0667         for (i = 63; i > 0; i--)
0668             if (((char *)vb2_plane_vaddr(vb, 0))[i] != 0)
0669                 break;
0670         *size = i + 1;
0671     } else {
0672         *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) -
0673             coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
0674     }
0675     memcpy(header, vb2_plane_vaddr(vb, 0), *size);
0676 
0677     return 0;
0678 }
0679 
0680 static u32 coda_slice_mode(struct coda_ctx *ctx)
0681 {
0682     int size, unit;
0683 
0684     switch (ctx->params.slice_mode) {
0685     case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
0686     default:
0687         return 0;
0688     case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB:
0689         size = ctx->params.slice_max_mb;
0690         unit = 1;
0691         break;
0692     case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES:
0693         size = ctx->params.slice_max_bits;
0694         unit = 0;
0695         break;
0696     }
0697 
0698     return ((size & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET) |
0699            ((unit & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET) |
0700            ((1 & CODA_SLICING_MODE_MASK) << CODA_SLICING_MODE_OFFSET);
0701 }
0702 
0703 static int coda_enc_param_change(struct coda_ctx *ctx)
0704 {
0705     struct coda_dev *dev = ctx->dev;
0706     u32 change_enable = 0;
0707     u32 success;
0708     int ret;
0709 
0710     if (ctx->params.gop_size_changed) {
0711         change_enable |= CODA_PARAM_CHANGE_RC_GOP;
0712         coda_write(dev, ctx->params.gop_size,
0713                CODA_CMD_ENC_PARAM_RC_GOP);
0714         ctx->gopcounter = ctx->params.gop_size - 1;
0715         ctx->params.gop_size_changed = false;
0716     }
0717     if (ctx->params.h264_intra_qp_changed) {
0718         coda_dbg(1, ctx, "parameter change: intra Qp %u\n",
0719              ctx->params.h264_intra_qp);
0720 
0721         if (ctx->params.bitrate) {
0722             change_enable |= CODA_PARAM_CHANGE_RC_INTRA_QP;
0723             coda_write(dev, ctx->params.h264_intra_qp,
0724                    CODA_CMD_ENC_PARAM_RC_INTRA_QP);
0725         }
0726         ctx->params.h264_intra_qp_changed = false;
0727     }
0728     if (ctx->params.bitrate_changed) {
0729         coda_dbg(1, ctx, "parameter change: bitrate %u kbit/s\n",
0730              ctx->params.bitrate);
0731         change_enable |= CODA_PARAM_CHANGE_RC_BITRATE;
0732         coda_write(dev, ctx->params.bitrate,
0733                CODA_CMD_ENC_PARAM_RC_BITRATE);
0734         ctx->params.bitrate_changed = false;
0735     }
0736     if (ctx->params.framerate_changed) {
0737         coda_dbg(1, ctx, "parameter change: frame rate %u/%u Hz\n",
0738              ctx->params.framerate & 0xffff,
0739              (ctx->params.framerate >> 16) + 1);
0740         change_enable |= CODA_PARAM_CHANGE_RC_FRAME_RATE;
0741         coda_write(dev, ctx->params.framerate,
0742                CODA_CMD_ENC_PARAM_RC_FRAME_RATE);
0743         ctx->params.framerate_changed = false;
0744     }
0745     if (ctx->params.intra_refresh_changed) {
0746         coda_dbg(1, ctx, "parameter change: intra refresh MBs %u\n",
0747              ctx->params.intra_refresh);
0748         change_enable |= CODA_PARAM_CHANGE_INTRA_MB_NUM;
0749         coda_write(dev, ctx->params.intra_refresh,
0750                CODA_CMD_ENC_PARAM_INTRA_MB_NUM);
0751         ctx->params.intra_refresh_changed = false;
0752     }
0753     if (ctx->params.slice_mode_changed) {
0754         change_enable |= CODA_PARAM_CHANGE_SLICE_MODE;
0755         coda_write(dev, coda_slice_mode(ctx),
0756                CODA_CMD_ENC_PARAM_SLICE_MODE);
0757         ctx->params.slice_mode_changed = false;
0758     }
0759 
0760     if (!change_enable)
0761         return 0;
0762 
0763     coda_write(dev, change_enable, CODA_CMD_ENC_PARAM_CHANGE_ENABLE);
0764 
0765     ret = coda_command_sync(ctx, CODA_COMMAND_RC_CHANGE_PARAMETER);
0766     if (ret < 0)
0767         return ret;
0768 
0769     success = coda_read(dev, CODA_RET_ENC_PARAM_CHANGE_SUCCESS);
0770     if (success != 1)
0771         coda_dbg(1, ctx, "parameter change failed: %u\n", success);
0772 
0773     return 0;
0774 }
0775 
0776 static phys_addr_t coda_iram_alloc(struct coda_iram_info *iram, size_t size)
0777 {
0778     phys_addr_t ret;
0779 
0780     size = round_up(size, 1024);
0781     if (size > iram->remaining)
0782         return 0;
0783     iram->remaining -= size;
0784 
0785     ret = iram->next_paddr;
0786     iram->next_paddr += size;
0787 
0788     return ret;
0789 }
0790 
0791 static void coda_setup_iram(struct coda_ctx *ctx)
0792 {
0793     struct coda_iram_info *iram_info = &ctx->iram_info;
0794     struct coda_dev *dev = ctx->dev;
0795     int w64, w128;
0796     int mb_width;
0797     int dbk_bits;
0798     int bit_bits;
0799     int ip_bits;
0800     int me_bits;
0801 
0802     memset(iram_info, 0, sizeof(*iram_info));
0803     iram_info->next_paddr = dev->iram.paddr;
0804     iram_info->remaining = dev->iram.size;
0805 
0806     if (!dev->iram.vaddr)
0807         return;
0808 
0809     switch (dev->devtype->product) {
0810     case CODA_HX4:
0811         dbk_bits = CODA7_USE_HOST_DBK_ENABLE;
0812         bit_bits = CODA7_USE_HOST_BIT_ENABLE;
0813         ip_bits = CODA7_USE_HOST_IP_ENABLE;
0814         me_bits = CODA7_USE_HOST_ME_ENABLE;
0815         break;
0816     case CODA_7541:
0817         dbk_bits = CODA7_USE_HOST_DBK_ENABLE | CODA7_USE_DBK_ENABLE;
0818         bit_bits = CODA7_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
0819         ip_bits = CODA7_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
0820         me_bits = CODA7_USE_HOST_ME_ENABLE | CODA7_USE_ME_ENABLE;
0821         break;
0822     case CODA_960:
0823         dbk_bits = CODA9_USE_HOST_DBK_ENABLE | CODA9_USE_DBK_ENABLE;
0824         bit_bits = CODA9_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
0825         ip_bits = CODA9_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
0826         me_bits = 0;
0827         break;
0828     default: /* CODA_DX6 */
0829         return;
0830     }
0831 
0832     if (ctx->inst_type == CODA_INST_ENCODER) {
0833         struct coda_q_data *q_data_src;
0834 
0835         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
0836         mb_width = DIV_ROUND_UP(q_data_src->rect.width, 16);
0837         w128 = mb_width * 128;
0838         w64 = mb_width * 64;
0839 
0840         /* Prioritize in case IRAM is too small for everything */
0841         if (dev->devtype->product == CODA_HX4 ||
0842             dev->devtype->product == CODA_7541) {
0843             iram_info->search_ram_size = round_up(mb_width * 16 *
0844                                   36 + 2048, 1024);
0845             iram_info->search_ram_paddr = coda_iram_alloc(iram_info,
0846                         iram_info->search_ram_size);
0847             if (!iram_info->search_ram_paddr) {
0848                 pr_err("IRAM is smaller than the search ram size\n");
0849                 goto out;
0850             }
0851             iram_info->axi_sram_use |= me_bits;
0852         }
0853 
0854         /* Only H.264BP and H.263P3 are considered */
0855         iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, w64);
0856         iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, w64);
0857         if (!iram_info->buf_dbk_c_use)
0858             goto out;
0859         iram_info->axi_sram_use |= dbk_bits;
0860 
0861         iram_info->buf_bit_use = coda_iram_alloc(iram_info, w128);
0862         if (!iram_info->buf_bit_use)
0863             goto out;
0864         iram_info->axi_sram_use |= bit_bits;
0865 
0866         iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, w128);
0867         if (!iram_info->buf_ip_ac_dc_use)
0868             goto out;
0869         iram_info->axi_sram_use |= ip_bits;
0870 
0871         /* OVL and BTP disabled for encoder */
0872     } else if (ctx->inst_type == CODA_INST_DECODER) {
0873         struct coda_q_data *q_data_dst;
0874 
0875         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
0876         mb_width = DIV_ROUND_UP(q_data_dst->width, 16);
0877         w128 = mb_width * 128;
0878 
0879         iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, w128);
0880         iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, w128);
0881         if (!iram_info->buf_dbk_c_use)
0882             goto out;
0883         iram_info->axi_sram_use |= dbk_bits;
0884 
0885         iram_info->buf_bit_use = coda_iram_alloc(iram_info, w128);
0886         if (!iram_info->buf_bit_use)
0887             goto out;
0888         iram_info->axi_sram_use |= bit_bits;
0889 
0890         iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, w128);
0891         if (!iram_info->buf_ip_ac_dc_use)
0892             goto out;
0893         iram_info->axi_sram_use |= ip_bits;
0894 
0895         /* OVL and BTP unused as there is no VC1 support yet */
0896     }
0897 
0898 out:
0899     if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE))
0900         coda_dbg(1, ctx, "IRAM smaller than needed\n");
0901 
0902     if (dev->devtype->product == CODA_HX4 ||
0903         dev->devtype->product == CODA_7541) {
0904         /* TODO - Enabling these causes picture errors on CODA7541 */
0905         if (ctx->inst_type == CODA_INST_DECODER) {
0906             /* fw 1.4.50 */
0907             iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
0908                              CODA7_USE_IP_ENABLE);
0909         } else {
0910             /* fw 13.4.29 */
0911             iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
0912                              CODA7_USE_HOST_DBK_ENABLE |
0913                              CODA7_USE_IP_ENABLE |
0914                              CODA7_USE_DBK_ENABLE);
0915         }
0916     }
0917 }
0918 
0919 static u32 coda_supported_firmwares[] = {
0920     CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
0921     CODA_FIRMWARE_VERNUM(CODA_HX4, 1, 4, 50),
0922     CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
0923     CODA_FIRMWARE_VERNUM(CODA_960, 2, 1, 5),
0924     CODA_FIRMWARE_VERNUM(CODA_960, 2, 1, 9),
0925     CODA_FIRMWARE_VERNUM(CODA_960, 2, 3, 10),
0926     CODA_FIRMWARE_VERNUM(CODA_960, 3, 1, 1),
0927 };
0928 
0929 static bool coda_firmware_supported(u32 vernum)
0930 {
0931     int i;
0932 
0933     for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
0934         if (vernum == coda_supported_firmwares[i])
0935             return true;
0936     return false;
0937 }
0938 
0939 int coda_check_firmware(struct coda_dev *dev)
0940 {
0941     u16 product, major, minor, release;
0942     u32 data;
0943     int ret;
0944 
0945     ret = clk_prepare_enable(dev->clk_per);
0946     if (ret)
0947         goto err_clk_per;
0948 
0949     ret = clk_prepare_enable(dev->clk_ahb);
0950     if (ret)
0951         goto err_clk_ahb;
0952 
0953     coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
0954     coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
0955     coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
0956     coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
0957     coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
0958     if (coda_wait_timeout(dev)) {
0959         v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
0960         ret = -EIO;
0961         goto err_run_cmd;
0962     }
0963 
0964     if (dev->devtype->product == CODA_960) {
0965         data = coda_read(dev, CODA9_CMD_FIRMWARE_CODE_REV);
0966         v4l2_info(&dev->v4l2_dev, "Firmware code revision: %d\n",
0967               data);
0968     }
0969 
0970     /* Check we are compatible with the loaded firmware */
0971     data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
0972     product = CODA_FIRMWARE_PRODUCT(data);
0973     major = CODA_FIRMWARE_MAJOR(data);
0974     minor = CODA_FIRMWARE_MINOR(data);
0975     release = CODA_FIRMWARE_RELEASE(data);
0976 
0977     clk_disable_unprepare(dev->clk_per);
0978     clk_disable_unprepare(dev->clk_ahb);
0979 
0980     if (product != dev->devtype->product) {
0981         v4l2_err(&dev->v4l2_dev,
0982              "Wrong firmware. Hw: %s, Fw: %s, Version: %u.%u.%u\n",
0983              coda_product_name(dev->devtype->product),
0984              coda_product_name(product), major, minor, release);
0985         return -EINVAL;
0986     }
0987 
0988     v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
0989           coda_product_name(product));
0990 
0991     if (coda_firmware_supported(data)) {
0992         v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
0993               major, minor, release);
0994     } else {
0995         v4l2_warn(&dev->v4l2_dev,
0996               "Unsupported firmware version: %u.%u.%u\n",
0997               major, minor, release);
0998     }
0999 
1000     return 0;
1001 
1002 err_run_cmd:
1003     clk_disable_unprepare(dev->clk_ahb);
1004 err_clk_ahb:
1005     clk_disable_unprepare(dev->clk_per);
1006 err_clk_per:
1007     return ret;
1008 }
1009 
1010 static void coda9_set_frame_cache(struct coda_ctx *ctx, u32 fourcc)
1011 {
1012     u32 cache_size, cache_config;
1013 
1014     if (ctx->tiled_map_type == GDI_LINEAR_FRAME_MAP) {
1015         /* Luma 2x0 page, 2x6 cache, chroma 2x0 page, 2x4 cache size */
1016         cache_size = 0x20262024;
1017         cache_config = 2 << CODA9_CACHE_PAGEMERGE_OFFSET;
1018     } else {
1019         /* Luma 0x2 page, 4x4 cache, chroma 0x2 page, 4x3 cache size */
1020         cache_size = 0x02440243;
1021         cache_config = 1 << CODA9_CACHE_PAGEMERGE_OFFSET;
1022     }
1023     coda_write(ctx->dev, cache_size, CODA9_CMD_SET_FRAME_CACHE_SIZE);
1024     if (fourcc == V4L2_PIX_FMT_NV12 || fourcc == V4L2_PIX_FMT_YUYV) {
1025         cache_config |= 32 << CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET |
1026                 16 << CODA9_CACHE_CR_BUFFER_SIZE_OFFSET |
1027                 0 << CODA9_CACHE_CB_BUFFER_SIZE_OFFSET;
1028     } else {
1029         cache_config |= 32 << CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET |
1030                 8 << CODA9_CACHE_CR_BUFFER_SIZE_OFFSET |
1031                 8 << CODA9_CACHE_CB_BUFFER_SIZE_OFFSET;
1032     }
1033     coda_write(ctx->dev, cache_config, CODA9_CMD_SET_FRAME_CACHE_CONFIG);
1034 }
1035 
1036 /*
1037  * Encoder context operations
1038  */
1039 
1040 static int coda_encoder_reqbufs(struct coda_ctx *ctx,
1041                 struct v4l2_requestbuffers *rb)
1042 {
1043     struct coda_q_data *q_data_src;
1044     int ret;
1045 
1046     if (rb->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
1047         return 0;
1048 
1049     if (rb->count) {
1050         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1051         ret = coda_alloc_context_buffers(ctx, q_data_src);
1052         if (ret < 0)
1053             return ret;
1054     } else {
1055         coda_free_context_buffers(ctx);
1056     }
1057 
1058     return 0;
1059 }
1060 
1061 static int coda_start_encoding(struct coda_ctx *ctx)
1062 {
1063     struct coda_dev *dev = ctx->dev;
1064     struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
1065     struct coda_q_data *q_data_src, *q_data_dst;
1066     u32 bitstream_buf, bitstream_size;
1067     struct vb2_v4l2_buffer *buf;
1068     int gamma, ret, value;
1069     u32 dst_fourcc;
1070     int num_fb;
1071     u32 stride;
1072 
1073     q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1074     q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1075     dst_fourcc = q_data_dst->fourcc;
1076 
1077     buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1078     bitstream_buf = vb2_dma_contig_plane_dma_addr(&buf->vb2_buf, 0);
1079     bitstream_size = q_data_dst->sizeimage;
1080 
1081     if (!coda_is_initialized(dev)) {
1082         v4l2_err(v4l2_dev, "coda is not initialized.\n");
1083         return -EFAULT;
1084     }
1085 
1086     if (dst_fourcc == V4L2_PIX_FMT_JPEG) {
1087         if (!ctx->params.jpeg_qmat_tab[0])
1088             ctx->params.jpeg_qmat_tab[0] = kmalloc(64, GFP_KERNEL);
1089         if (!ctx->params.jpeg_qmat_tab[1])
1090             ctx->params.jpeg_qmat_tab[1] = kmalloc(64, GFP_KERNEL);
1091         coda_set_jpeg_compression_quality(ctx, ctx->params.jpeg_quality);
1092     }
1093 
1094     mutex_lock(&dev->coda_mutex);
1095 
1096     coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1097     coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
1098     coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
1099     switch (dev->devtype->product) {
1100     case CODA_DX6:
1101         coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
1102             CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1103         break;
1104     case CODA_960:
1105         coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
1106         fallthrough;
1107     case CODA_HX4:
1108     case CODA_7541:
1109         coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
1110             CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1111         break;
1112     }
1113 
1114     ctx->frame_mem_ctrl &= ~(CODA_FRAME_CHROMA_INTERLEAVE | (0x3 << 9) |
1115                  CODA9_FRAME_TILED2LINEAR);
1116     if (q_data_src->fourcc == V4L2_PIX_FMT_NV12)
1117         ctx->frame_mem_ctrl |= CODA_FRAME_CHROMA_INTERLEAVE;
1118     if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP)
1119         ctx->frame_mem_ctrl |= (0x3 << 9) | CODA9_FRAME_TILED2LINEAR;
1120     coda_write(dev, ctx->frame_mem_ctrl, CODA_REG_BIT_FRAME_MEM_CTRL);
1121 
1122     if (dev->devtype->product == CODA_DX6) {
1123         /* Configure the coda */
1124         coda_write(dev, dev->iram.paddr,
1125                CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
1126     }
1127 
1128     /* Could set rotation here if needed */
1129     value = 0;
1130     switch (dev->devtype->product) {
1131     case CODA_DX6:
1132         value = (q_data_src->rect.width & CODADX6_PICWIDTH_MASK)
1133             << CODADX6_PICWIDTH_OFFSET;
1134         value |= (q_data_src->rect.height & CODADX6_PICHEIGHT_MASK)
1135              << CODA_PICHEIGHT_OFFSET;
1136         break;
1137     case CODA_HX4:
1138     case CODA_7541:
1139         if (dst_fourcc == V4L2_PIX_FMT_H264) {
1140             value = (round_up(q_data_src->rect.width, 16) &
1141                  CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
1142             value |= (round_up(q_data_src->rect.height, 16) &
1143                  CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
1144             break;
1145         }
1146         fallthrough;
1147     case CODA_960:
1148         value = (q_data_src->rect.width & CODA7_PICWIDTH_MASK)
1149             << CODA7_PICWIDTH_OFFSET;
1150         value |= (q_data_src->rect.height & CODA7_PICHEIGHT_MASK)
1151              << CODA_PICHEIGHT_OFFSET;
1152     }
1153     coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
1154     if (dst_fourcc == V4L2_PIX_FMT_JPEG)
1155         ctx->params.framerate = 0;
1156     coda_write(dev, ctx->params.framerate,
1157            CODA_CMD_ENC_SEQ_SRC_F_RATE);
1158 
1159     ctx->params.codec_mode = ctx->codec->mode;
1160     switch (dst_fourcc) {
1161     case V4L2_PIX_FMT_MPEG4:
1162         if (dev->devtype->product == CODA_960)
1163             coda_write(dev, CODA9_STD_MPEG4,
1164                    CODA_CMD_ENC_SEQ_COD_STD);
1165         else
1166             coda_write(dev, CODA_STD_MPEG4,
1167                    CODA_CMD_ENC_SEQ_COD_STD);
1168         coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
1169         break;
1170     case V4L2_PIX_FMT_H264:
1171         if (dev->devtype->product == CODA_960)
1172             coda_write(dev, CODA9_STD_H264,
1173                    CODA_CMD_ENC_SEQ_COD_STD);
1174         else
1175             coda_write(dev, CODA_STD_H264,
1176                    CODA_CMD_ENC_SEQ_COD_STD);
1177         value = ((ctx->params.h264_disable_deblocking_filter_idc &
1178               CODA_264PARAM_DISABLEDEBLK_MASK) <<
1179              CODA_264PARAM_DISABLEDEBLK_OFFSET) |
1180             ((ctx->params.h264_slice_alpha_c0_offset_div2 &
1181               CODA_264PARAM_DEBLKFILTEROFFSETALPHA_MASK) <<
1182              CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET) |
1183             ((ctx->params.h264_slice_beta_offset_div2 &
1184               CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK) <<
1185              CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET) |
1186             (ctx->params.h264_constrained_intra_pred_flag <<
1187              CODA_264PARAM_CONSTRAINEDINTRAPREDFLAG_OFFSET) |
1188             (ctx->params.h264_chroma_qp_index_offset &
1189              CODA_264PARAM_CHROMAQPOFFSET_MASK);
1190         coda_write(dev, value, CODA_CMD_ENC_SEQ_264_PARA);
1191         break;
1192     case V4L2_PIX_FMT_JPEG:
1193         coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_PARA);
1194         coda_write(dev, ctx->params.jpeg_restart_interval,
1195                 CODA_CMD_ENC_SEQ_JPG_RST_INTERVAL);
1196         coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_EN);
1197         coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_SIZE);
1198         coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_OFFSET);
1199 
1200         coda_jpeg_write_tables(ctx);
1201         break;
1202     default:
1203         v4l2_err(v4l2_dev,
1204              "dst format (0x%08x) invalid.\n", dst_fourcc);
1205         ret = -EINVAL;
1206         goto out;
1207     }
1208 
1209     /*
1210      * slice mode and GOP size registers are used for thumb size/offset
1211      * in JPEG mode
1212      */
1213     if (dst_fourcc != V4L2_PIX_FMT_JPEG) {
1214         value = coda_slice_mode(ctx);
1215         coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
1216         value = ctx->params.gop_size;
1217         coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
1218     }
1219 
1220     if (ctx->params.bitrate && (ctx->params.frame_rc_enable ||
1221                     ctx->params.mb_rc_enable)) {
1222         ctx->params.bitrate_changed = false;
1223         ctx->params.h264_intra_qp_changed = false;
1224 
1225         /* Rate control enabled */
1226         value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK)
1227             << CODA_RATECONTROL_BITRATE_OFFSET;
1228         value |=  1 & CODA_RATECONTROL_ENABLE_MASK;
1229         value |= (ctx->params.vbv_delay &
1230               CODA_RATECONTROL_INITIALDELAY_MASK)
1231              << CODA_RATECONTROL_INITIALDELAY_OFFSET;
1232         if (dev->devtype->product == CODA_960)
1233             value |= BIT(31); /* disable autoskip */
1234     } else {
1235         value = 0;
1236     }
1237     coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
1238 
1239     coda_write(dev, ctx->params.vbv_size, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
1240     coda_write(dev, ctx->params.intra_refresh,
1241            CODA_CMD_ENC_SEQ_INTRA_REFRESH);
1242 
1243     coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
1244     coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
1245 
1246 
1247     value = 0;
1248     if (dev->devtype->product == CODA_960)
1249         gamma = CODA9_DEFAULT_GAMMA;
1250     else
1251         gamma = CODA_DEFAULT_GAMMA;
1252     if (gamma > 0) {
1253         coda_write(dev, (gamma & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET,
1254                CODA_CMD_ENC_SEQ_RC_GAMMA);
1255     }
1256 
1257     if (ctx->params.h264_min_qp || ctx->params.h264_max_qp) {
1258         coda_write(dev,
1259                ctx->params.h264_min_qp << CODA_QPMIN_OFFSET |
1260                ctx->params.h264_max_qp << CODA_QPMAX_OFFSET,
1261                CODA_CMD_ENC_SEQ_RC_QP_MIN_MAX);
1262     }
1263     if (dev->devtype->product == CODA_960) {
1264         if (ctx->params.h264_max_qp)
1265             value |= 1 << CODA9_OPTION_RCQPMAX_OFFSET;
1266         if (CODA_DEFAULT_GAMMA > 0)
1267             value |= 1 << CODA9_OPTION_GAMMA_OFFSET;
1268     } else {
1269         if (CODA_DEFAULT_GAMMA > 0) {
1270             if (dev->devtype->product == CODA_DX6)
1271                 value |= 1 << CODADX6_OPTION_GAMMA_OFFSET;
1272             else
1273                 value |= 1 << CODA7_OPTION_GAMMA_OFFSET;
1274         }
1275         if (ctx->params.h264_min_qp)
1276             value |= 1 << CODA7_OPTION_RCQPMIN_OFFSET;
1277         if (ctx->params.h264_max_qp)
1278             value |= 1 << CODA7_OPTION_RCQPMAX_OFFSET;
1279     }
1280     coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
1281 
1282     if (ctx->params.frame_rc_enable && !ctx->params.mb_rc_enable)
1283         value = 1;
1284     else
1285         value = 0;
1286     coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_INTERVAL_MODE);
1287 
1288     coda_setup_iram(ctx);
1289 
1290     if (dst_fourcc == V4L2_PIX_FMT_H264) {
1291         switch (dev->devtype->product) {
1292         case CODA_DX6:
1293             value = FMO_SLICE_SAVE_BUF_SIZE << 7;
1294             coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
1295             break;
1296         case CODA_HX4:
1297         case CODA_7541:
1298             coda_write(dev, ctx->iram_info.search_ram_paddr,
1299                     CODA7_CMD_ENC_SEQ_SEARCH_BASE);
1300             coda_write(dev, ctx->iram_info.search_ram_size,
1301                     CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
1302             break;
1303         case CODA_960:
1304             coda_write(dev, 0, CODA9_CMD_ENC_SEQ_ME_OPTION);
1305             coda_write(dev, 0, CODA9_CMD_ENC_SEQ_INTRA_WEIGHT);
1306         }
1307     }
1308 
1309     ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
1310     if (ret < 0) {
1311         v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1312         goto out;
1313     }
1314 
1315     if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) {
1316         v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n");
1317         ret = -EFAULT;
1318         goto out;
1319     }
1320     ctx->initialized = 1;
1321 
1322     if (dst_fourcc != V4L2_PIX_FMT_JPEG) {
1323         if (dev->devtype->product == CODA_960)
1324             ctx->num_internal_frames = 4;
1325         else
1326             ctx->num_internal_frames = 2;
1327         ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
1328         if (ret < 0) {
1329             v4l2_err(v4l2_dev, "failed to allocate framebuffers\n");
1330             goto out;
1331         }
1332         num_fb = 2;
1333         stride = q_data_src->bytesperline;
1334     } else {
1335         ctx->num_internal_frames = 0;
1336         num_fb = 0;
1337         stride = 0;
1338     }
1339     coda_write(dev, num_fb, CODA_CMD_SET_FRAME_BUF_NUM);
1340     coda_write(dev, stride, CODA_CMD_SET_FRAME_BUF_STRIDE);
1341 
1342     if (dev->devtype->product == CODA_HX4 ||
1343         dev->devtype->product == CODA_7541) {
1344         coda_write(dev, q_data_src->bytesperline,
1345                 CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
1346     }
1347     if (dev->devtype->product != CODA_DX6) {
1348         coda_write(dev, ctx->iram_info.buf_bit_use,
1349                 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1350         coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
1351                 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1352         coda_write(dev, ctx->iram_info.buf_dbk_y_use,
1353                 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1354         coda_write(dev, ctx->iram_info.buf_dbk_c_use,
1355                 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1356         coda_write(dev, ctx->iram_info.buf_ovl_use,
1357                 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1358         if (dev->devtype->product == CODA_960) {
1359             coda_write(dev, ctx->iram_info.buf_btp_use,
1360                     CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
1361 
1362             coda9_set_frame_cache(ctx, q_data_src->fourcc);
1363 
1364             /* FIXME */
1365             coda_write(dev, ctx->internal_frames[2].buf.paddr,
1366                    CODA9_CMD_SET_FRAME_SUBSAMP_A);
1367             coda_write(dev, ctx->internal_frames[3].buf.paddr,
1368                    CODA9_CMD_SET_FRAME_SUBSAMP_B);
1369         }
1370     }
1371 
1372     ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF);
1373     if (ret < 0) {
1374         v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1375         goto out;
1376     }
1377 
1378     coda_dbg(1, ctx, "start encoding %dx%d %4.4s->%4.4s @ %d/%d Hz\n",
1379          q_data_src->rect.width, q_data_src->rect.height,
1380          (char *)&ctx->codec->src_fourcc, (char *)&dst_fourcc,
1381          ctx->params.framerate & 0xffff,
1382          (ctx->params.framerate >> 16) + 1);
1383 
1384     /* Save stream headers */
1385     buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1386     switch (dst_fourcc) {
1387     case V4L2_PIX_FMT_H264:
1388         /*
1389          * Get SPS in the first frame and copy it to an
1390          * intermediate buffer.
1391          */
1392         ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS,
1393                      &ctx->vpu_header[0][0],
1394                      &ctx->vpu_header_size[0]);
1395         if (ret < 0)
1396             goto out;
1397 
1398         /*
1399          * If visible width or height are not aligned to macroblock
1400          * size, the crop_right and crop_bottom SPS fields must be set
1401          * to the difference between visible and coded size.  This is
1402          * only supported by CODA960 firmware. All others do not allow
1403          * writing frame cropping parameters, so we have to manually
1404          * fix up the SPS RBSP (Sequence Parameter Set Raw Byte
1405          * Sequence Payload) ourselves.
1406          */
1407         if (ctx->dev->devtype->product != CODA_960 &&
1408             ((q_data_src->rect.width % 16) ||
1409              (q_data_src->rect.height % 16))) {
1410             ret = coda_h264_sps_fixup(ctx, q_data_src->rect.width,
1411                           q_data_src->rect.height,
1412                           &ctx->vpu_header[0][0],
1413                           &ctx->vpu_header_size[0],
1414                           sizeof(ctx->vpu_header[0]));
1415             if (ret < 0)
1416                 goto out;
1417         }
1418 
1419         /*
1420          * Get PPS in the first frame and copy it to an
1421          * intermediate buffer.
1422          */
1423         ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS,
1424                      &ctx->vpu_header[1][0],
1425                      &ctx->vpu_header_size[1]);
1426         if (ret < 0)
1427             goto out;
1428 
1429         /*
1430          * Length of H.264 headers is variable and thus it might not be
1431          * aligned for the coda to append the encoded frame. In that is
1432          * the case a filler NAL must be added to header 2.
1433          */
1434         ctx->vpu_header_size[2] = coda_h264_padding(
1435                     (ctx->vpu_header_size[0] +
1436                      ctx->vpu_header_size[1]),
1437                      ctx->vpu_header[2]);
1438         break;
1439     case V4L2_PIX_FMT_MPEG4:
1440         /*
1441          * Get VOS in the first frame and copy it to an
1442          * intermediate buffer
1443          */
1444         ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS,
1445                      &ctx->vpu_header[0][0],
1446                      &ctx->vpu_header_size[0]);
1447         if (ret < 0)
1448             goto out;
1449 
1450         ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS,
1451                      &ctx->vpu_header[1][0],
1452                      &ctx->vpu_header_size[1]);
1453         if (ret < 0)
1454             goto out;
1455 
1456         ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL,
1457                      &ctx->vpu_header[2][0],
1458                      &ctx->vpu_header_size[2]);
1459         if (ret < 0)
1460             goto out;
1461         break;
1462     default:
1463         /* No more formats need to save headers at the moment */
1464         break;
1465     }
1466 
1467 out:
1468     mutex_unlock(&dev->coda_mutex);
1469     return ret;
1470 }
1471 
1472 static int coda_prepare_encode(struct coda_ctx *ctx)
1473 {
1474     struct coda_q_data *q_data_src, *q_data_dst;
1475     struct vb2_v4l2_buffer *src_buf, *dst_buf;
1476     struct coda_dev *dev = ctx->dev;
1477     int force_ipicture;
1478     int quant_param = 0;
1479     u32 pic_stream_buffer_addr, pic_stream_buffer_size;
1480     u32 rot_mode = 0;
1481     u32 dst_fourcc;
1482     u32 reg;
1483     int ret;
1484 
1485     ret = coda_enc_param_change(ctx);
1486     if (ret < 0) {
1487         v4l2_warn(&ctx->dev->v4l2_dev, "parameter change failed: %d\n",
1488               ret);
1489     }
1490 
1491     src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
1492     dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1493     q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1494     q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1495     dst_fourcc = q_data_dst->fourcc;
1496 
1497     src_buf->sequence = ctx->osequence;
1498     dst_buf->sequence = ctx->osequence;
1499     ctx->osequence++;
1500 
1501     force_ipicture = ctx->params.force_ipicture;
1502     if (force_ipicture)
1503         ctx->params.force_ipicture = false;
1504     else if (ctx->params.gop_size != 0 &&
1505          (src_buf->sequence % ctx->params.gop_size) == 0)
1506         force_ipicture = 1;
1507 
1508     /*
1509      * Workaround coda firmware BUG that only marks the first
1510      * frame as IDR. This is a problem for some decoders that can't
1511      * recover when a frame is lost.
1512      */
1513     if (!force_ipicture) {
1514         src_buf->flags |= V4L2_BUF_FLAG_PFRAME;
1515         src_buf->flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1516     } else {
1517         src_buf->flags |= V4L2_BUF_FLAG_KEYFRAME;
1518         src_buf->flags &= ~V4L2_BUF_FLAG_PFRAME;
1519     }
1520 
1521     if (dev->devtype->product == CODA_960)
1522         coda_set_gdi_regs(ctx);
1523 
1524     /*
1525      * Copy headers in front of the first frame and forced I frames for
1526      * H.264 only. In MPEG4 they are already copied by the CODA.
1527      */
1528     if (src_buf->sequence == 0 || force_ipicture) {
1529         pic_stream_buffer_addr =
1530             vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0) +
1531             ctx->vpu_header_size[0] +
1532             ctx->vpu_header_size[1] +
1533             ctx->vpu_header_size[2];
1534         pic_stream_buffer_size = q_data_dst->sizeimage -
1535             ctx->vpu_header_size[0] -
1536             ctx->vpu_header_size[1] -
1537             ctx->vpu_header_size[2];
1538         memcpy(vb2_plane_vaddr(&dst_buf->vb2_buf, 0),
1539                &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
1540         memcpy(vb2_plane_vaddr(&dst_buf->vb2_buf, 0)
1541             + ctx->vpu_header_size[0], &ctx->vpu_header[1][0],
1542             ctx->vpu_header_size[1]);
1543         memcpy(vb2_plane_vaddr(&dst_buf->vb2_buf, 0)
1544             + ctx->vpu_header_size[0] + ctx->vpu_header_size[1],
1545             &ctx->vpu_header[2][0], ctx->vpu_header_size[2]);
1546     } else {
1547         pic_stream_buffer_addr =
1548             vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0);
1549         pic_stream_buffer_size = q_data_dst->sizeimage;
1550     }
1551 
1552     if (force_ipicture) {
1553         switch (dst_fourcc) {
1554         case V4L2_PIX_FMT_H264:
1555             quant_param = ctx->params.h264_intra_qp;
1556             break;
1557         case V4L2_PIX_FMT_MPEG4:
1558             quant_param = ctx->params.mpeg4_intra_qp;
1559             break;
1560         case V4L2_PIX_FMT_JPEG:
1561             quant_param = 30;
1562             break;
1563         default:
1564             v4l2_warn(&ctx->dev->v4l2_dev,
1565                 "cannot set intra qp, fmt not supported\n");
1566             break;
1567         }
1568     } else {
1569         switch (dst_fourcc) {
1570         case V4L2_PIX_FMT_H264:
1571             quant_param = ctx->params.h264_inter_qp;
1572             break;
1573         case V4L2_PIX_FMT_MPEG4:
1574             quant_param = ctx->params.mpeg4_inter_qp;
1575             break;
1576         default:
1577             v4l2_warn(&ctx->dev->v4l2_dev,
1578                 "cannot set inter qp, fmt not supported\n");
1579             break;
1580         }
1581     }
1582 
1583     /* submit */
1584     if (ctx->params.rot_mode)
1585         rot_mode = CODA_ROT_MIR_ENABLE | ctx->params.rot_mode;
1586     coda_write(dev, rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
1587     coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
1588 
1589     if (dev->devtype->product == CODA_960) {
1590         coda_write(dev, 4/*FIXME: 0*/, CODA9_CMD_ENC_PIC_SRC_INDEX);
1591         coda_write(dev, q_data_src->bytesperline,
1592                CODA9_CMD_ENC_PIC_SRC_STRIDE);
1593         coda_write(dev, 0, CODA9_CMD_ENC_PIC_SUB_FRAME_SYNC);
1594 
1595         reg = CODA9_CMD_ENC_PIC_SRC_ADDR_Y;
1596     } else {
1597         reg = CODA_CMD_ENC_PIC_SRC_ADDR_Y;
1598     }
1599     coda_write_base(ctx, q_data_src, src_buf, reg);
1600 
1601     coda_write(dev, force_ipicture << 1 & 0x2,
1602            CODA_CMD_ENC_PIC_OPTION);
1603 
1604     coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
1605     coda_write(dev, pic_stream_buffer_size / 1024,
1606            CODA_CMD_ENC_PIC_BB_SIZE);
1607 
1608     if (!ctx->streamon_out) {
1609         /* After streamoff on the output side, set stream end flag */
1610         ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
1611         coda_write(dev, ctx->bit_stream_param,
1612                CODA_REG_BIT_BIT_STREAM_PARAM);
1613     }
1614 
1615     if (dev->devtype->product != CODA_DX6)
1616         coda_write(dev, ctx->iram_info.axi_sram_use,
1617                 CODA7_REG_BIT_AXI_SRAM_USE);
1618 
1619     trace_coda_enc_pic_run(ctx, src_buf);
1620 
1621     coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1622 
1623     return 0;
1624 }
1625 
1626 static char coda_frame_type_char(u32 flags)
1627 {
1628     return (flags & V4L2_BUF_FLAG_KEYFRAME) ? 'I' :
1629            (flags & V4L2_BUF_FLAG_PFRAME) ? 'P' :
1630            (flags & V4L2_BUF_FLAG_BFRAME) ? 'B' : '?';
1631 }
1632 
1633 static void coda_finish_encode(struct coda_ctx *ctx)
1634 {
1635     struct vb2_v4l2_buffer *src_buf, *dst_buf;
1636     struct coda_dev *dev = ctx->dev;
1637     u32 wr_ptr, start_ptr;
1638 
1639     if (ctx->aborting)
1640         return;
1641 
1642     /*
1643      * Lock to make sure that an encoder stop command running in parallel
1644      * will either already have marked src_buf as last, or it will wake up
1645      * the capture queue after the buffers are returned.
1646      */
1647     mutex_lock(&ctx->wakeup_mutex);
1648     src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
1649     dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1650 
1651     trace_coda_enc_pic_done(ctx, dst_buf);
1652 
1653     /* Get results from the coda */
1654     start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
1655     wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
1656 
1657     /* Calculate bytesused field */
1658     if (dst_buf->sequence == 0 ||
1659         src_buf->flags & V4L2_BUF_FLAG_KEYFRAME) {
1660         vb2_set_plane_payload(&dst_buf->vb2_buf, 0, wr_ptr - start_ptr +
1661                     ctx->vpu_header_size[0] +
1662                     ctx->vpu_header_size[1] +
1663                     ctx->vpu_header_size[2]);
1664     } else {
1665         vb2_set_plane_payload(&dst_buf->vb2_buf, 0, wr_ptr - start_ptr);
1666     }
1667 
1668     coda_dbg(1, ctx, "frame size = %u\n", wr_ptr - start_ptr);
1669 
1670     coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
1671     coda_read(dev, CODA_RET_ENC_PIC_FLAG);
1672 
1673     dst_buf->flags &= ~(V4L2_BUF_FLAG_KEYFRAME |
1674                 V4L2_BUF_FLAG_PFRAME |
1675                 V4L2_BUF_FLAG_LAST);
1676     if (coda_read(dev, CODA_RET_ENC_PIC_TYPE) == 0)
1677         dst_buf->flags |= V4L2_BUF_FLAG_KEYFRAME;
1678     else
1679         dst_buf->flags |= V4L2_BUF_FLAG_PFRAME;
1680     dst_buf->flags |= src_buf->flags & V4L2_BUF_FLAG_LAST;
1681 
1682     v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, false);
1683 
1684     v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
1685 
1686     dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
1687     coda_m2m_buf_done(ctx, dst_buf, VB2_BUF_STATE_DONE);
1688     mutex_unlock(&ctx->wakeup_mutex);
1689 
1690     ctx->gopcounter--;
1691     if (ctx->gopcounter < 0)
1692         ctx->gopcounter = ctx->params.gop_size - 1;
1693 
1694     coda_dbg(1, ctx, "job finished: encoded %c frame (%d)%s\n",
1695          coda_frame_type_char(dst_buf->flags), dst_buf->sequence,
1696          (dst_buf->flags & V4L2_BUF_FLAG_LAST) ? " (last)" : "");
1697 }
1698 
1699 static void coda_seq_end_work(struct work_struct *work)
1700 {
1701     struct coda_ctx *ctx = container_of(work, struct coda_ctx, seq_end_work);
1702     struct coda_dev *dev = ctx->dev;
1703 
1704     mutex_lock(&ctx->buffer_mutex);
1705     mutex_lock(&dev->coda_mutex);
1706 
1707     if (ctx->initialized == 0)
1708         goto out;
1709 
1710     coda_dbg(1, ctx, "%s: sent command 'SEQ_END' to coda\n", __func__);
1711     if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1712         v4l2_err(&dev->v4l2_dev,
1713              "CODA_COMMAND_SEQ_END failed\n");
1714     }
1715 
1716     /*
1717      * FIXME: Sometimes h.264 encoding fails with 8-byte sequences missing
1718      * from the output stream after the h.264 decoder has run. Resetting the
1719      * hardware after the decoder has finished seems to help.
1720      */
1721     if (dev->devtype->product == CODA_960)
1722         coda_hw_reset(ctx);
1723 
1724     kfifo_init(&ctx->bitstream_fifo,
1725         ctx->bitstream.vaddr, ctx->bitstream.size);
1726 
1727     coda_free_framebuffers(ctx);
1728 
1729     ctx->initialized = 0;
1730 
1731 out:
1732     mutex_unlock(&dev->coda_mutex);
1733     mutex_unlock(&ctx->buffer_mutex);
1734 }
1735 
1736 static void coda_bit_release(struct coda_ctx *ctx)
1737 {
1738     mutex_lock(&ctx->buffer_mutex);
1739     coda_free_framebuffers(ctx);
1740     coda_free_context_buffers(ctx);
1741     coda_free_bitstream_buffer(ctx);
1742     mutex_unlock(&ctx->buffer_mutex);
1743 }
1744 
1745 const struct coda_context_ops coda_bit_encode_ops = {
1746     .queue_init = coda_encoder_queue_init,
1747     .reqbufs = coda_encoder_reqbufs,
1748     .start_streaming = coda_start_encoding,
1749     .prepare_run = coda_prepare_encode,
1750     .finish_run = coda_finish_encode,
1751     .seq_end_work = coda_seq_end_work,
1752     .release = coda_bit_release,
1753 };
1754 
1755 /*
1756  * Decoder context operations
1757  */
1758 
1759 static int coda_alloc_bitstream_buffer(struct coda_ctx *ctx,
1760                        struct coda_q_data *q_data)
1761 {
1762     if (ctx->bitstream.vaddr)
1763         return 0;
1764 
1765     ctx->bitstream.size = roundup_pow_of_two(q_data->sizeimage * 2);
1766     ctx->bitstream.vaddr = dma_alloc_wc(ctx->dev->dev, ctx->bitstream.size,
1767                         &ctx->bitstream.paddr, GFP_KERNEL);
1768     if (!ctx->bitstream.vaddr) {
1769         v4l2_err(&ctx->dev->v4l2_dev,
1770              "failed to allocate bitstream ringbuffer");
1771         return -ENOMEM;
1772     }
1773     kfifo_init(&ctx->bitstream_fifo,
1774            ctx->bitstream.vaddr, ctx->bitstream.size);
1775 
1776     return 0;
1777 }
1778 
1779 static void coda_free_bitstream_buffer(struct coda_ctx *ctx)
1780 {
1781     if (ctx->bitstream.vaddr == NULL)
1782         return;
1783 
1784     dma_free_wc(ctx->dev->dev, ctx->bitstream.size, ctx->bitstream.vaddr,
1785             ctx->bitstream.paddr);
1786     ctx->bitstream.vaddr = NULL;
1787     kfifo_init(&ctx->bitstream_fifo, NULL, 0);
1788 }
1789 
1790 static int coda_decoder_reqbufs(struct coda_ctx *ctx,
1791                 struct v4l2_requestbuffers *rb)
1792 {
1793     struct coda_q_data *q_data_src;
1794     int ret;
1795 
1796     if (rb->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
1797         return 0;
1798 
1799     if (rb->count) {
1800         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1801         ret = coda_alloc_context_buffers(ctx, q_data_src);
1802         if (ret < 0)
1803             return ret;
1804         ret = coda_alloc_bitstream_buffer(ctx, q_data_src);
1805         if (ret < 0) {
1806             coda_free_context_buffers(ctx);
1807             return ret;
1808         }
1809     } else {
1810         coda_free_bitstream_buffer(ctx);
1811         coda_free_context_buffers(ctx);
1812     }
1813 
1814     return 0;
1815 }
1816 
1817 static bool coda_reorder_enable(struct coda_ctx *ctx)
1818 {
1819     struct coda_dev *dev = ctx->dev;
1820     int profile;
1821 
1822     if (dev->devtype->product != CODA_HX4 &&
1823         dev->devtype->product != CODA_7541 &&
1824         dev->devtype->product != CODA_960)
1825         return false;
1826 
1827     if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG)
1828         return false;
1829 
1830     if (ctx->codec->src_fourcc != V4L2_PIX_FMT_H264)
1831         return true;
1832 
1833     profile = coda_h264_profile(ctx->params.h264_profile_idc);
1834     if (profile < 0)
1835         v4l2_warn(&dev->v4l2_dev, "Unknown H264 Profile: %u\n",
1836               ctx->params.h264_profile_idc);
1837 
1838     /* Baseline profile does not support reordering */
1839     return profile > V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE;
1840 }
1841 
1842 static void coda_decoder_drop_used_metas(struct coda_ctx *ctx)
1843 {
1844     struct coda_buffer_meta *meta, *tmp;
1845 
1846     /*
1847      * All metas that end at or before the RD pointer (fifo out),
1848      * are now consumed by the VPU and should be released.
1849      */
1850     spin_lock(&ctx->buffer_meta_lock);
1851     list_for_each_entry_safe(meta, tmp, &ctx->buffer_meta_list, list) {
1852         if (ctx->bitstream_fifo.kfifo.out >= meta->end) {
1853             coda_dbg(2, ctx, "releasing meta: seq=%d start=%d end=%d\n",
1854                  meta->sequence, meta->start, meta->end);
1855 
1856             list_del(&meta->list);
1857             ctx->num_metas--;
1858             ctx->first_frame_sequence++;
1859             kfree(meta);
1860         }
1861     }
1862     spin_unlock(&ctx->buffer_meta_lock);
1863 }
1864 
1865 static int __coda_decoder_seq_init(struct coda_ctx *ctx)
1866 {
1867     struct coda_q_data *q_data_src, *q_data_dst;
1868     u32 bitstream_buf, bitstream_size;
1869     struct coda_dev *dev = ctx->dev;
1870     int width, height;
1871     u32 src_fourcc, dst_fourcc;
1872     u32 val;
1873     int ret;
1874 
1875     lockdep_assert_held(&dev->coda_mutex);
1876 
1877     coda_dbg(1, ctx, "Video Data Order Adapter: %s\n",
1878          ctx->use_vdoa ? "Enabled" : "Disabled");
1879 
1880     /* Start decoding */
1881     q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1882     q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1883     bitstream_buf = ctx->bitstream.paddr;
1884     bitstream_size = ctx->bitstream.size;
1885     src_fourcc = q_data_src->fourcc;
1886     dst_fourcc = q_data_dst->fourcc;
1887 
1888     /* Update coda bitstream read and write pointers from kfifo */
1889     coda_kfifo_sync_to_device_full(ctx);
1890 
1891     ctx->frame_mem_ctrl &= ~(CODA_FRAME_CHROMA_INTERLEAVE | (0x3 << 9) |
1892                  CODA9_FRAME_TILED2LINEAR);
1893     if (dst_fourcc == V4L2_PIX_FMT_NV12 || dst_fourcc == V4L2_PIX_FMT_YUYV)
1894         ctx->frame_mem_ctrl |= CODA_FRAME_CHROMA_INTERLEAVE;
1895     if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP)
1896         ctx->frame_mem_ctrl |= (0x3 << 9) |
1897             ((ctx->use_vdoa) ? 0 : CODA9_FRAME_TILED2LINEAR);
1898     coda_write(dev, ctx->frame_mem_ctrl, CODA_REG_BIT_FRAME_MEM_CTRL);
1899 
1900     ctx->display_idx = -1;
1901     ctx->frm_dis_flg = 0;
1902     coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1903 
1904     coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START);
1905     coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE);
1906     val = 0;
1907     if (coda_reorder_enable(ctx))
1908         val |= CODA_REORDER_ENABLE;
1909     if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG)
1910         val |= CODA_NO_INT_ENABLE;
1911     coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION);
1912 
1913     ctx->params.codec_mode = ctx->codec->mode;
1914     if (dev->devtype->product == CODA_960 &&
1915         src_fourcc == V4L2_PIX_FMT_MPEG4)
1916         ctx->params.codec_mode_aux = CODA_MP4_AUX_MPEG4;
1917     else
1918         ctx->params.codec_mode_aux = 0;
1919     if (src_fourcc == V4L2_PIX_FMT_MPEG4) {
1920         coda_write(dev, CODA_MP4_CLASS_MPEG4,
1921                CODA_CMD_DEC_SEQ_MP4_ASP_CLASS);
1922     }
1923     if (src_fourcc == V4L2_PIX_FMT_H264) {
1924         if (dev->devtype->product == CODA_HX4 ||
1925             dev->devtype->product == CODA_7541) {
1926             coda_write(dev, ctx->psbuf.paddr,
1927                     CODA_CMD_DEC_SEQ_PS_BB_START);
1928             coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
1929                     CODA_CMD_DEC_SEQ_PS_BB_SIZE);
1930         }
1931         if (dev->devtype->product == CODA_960) {
1932             coda_write(dev, 0, CODA_CMD_DEC_SEQ_X264_MV_EN);
1933             coda_write(dev, 512, CODA_CMD_DEC_SEQ_SPP_CHUNK_SIZE);
1934         }
1935     }
1936     if (src_fourcc == V4L2_PIX_FMT_JPEG)
1937         coda_write(dev, 0, CODA_CMD_DEC_SEQ_JPG_THUMB_EN);
1938     if (dev->devtype->product != CODA_960)
1939         coda_write(dev, 0, CODA_CMD_DEC_SEQ_SRC_SIZE);
1940 
1941     ctx->bit_stream_param = CODA_BIT_DEC_SEQ_INIT_ESCAPE;
1942     ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
1943     ctx->bit_stream_param = 0;
1944     if (ret) {
1945         v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1946         return ret;
1947     }
1948     ctx->sequence_offset = ~0U;
1949     ctx->initialized = 1;
1950     ctx->first_frame_sequence = 0;
1951 
1952     /* Update kfifo out pointer from coda bitstream read pointer */
1953     coda_kfifo_sync_from_device(ctx);
1954 
1955     /*
1956      * After updating the read pointer, we need to check if
1957      * any metas are consumed and should be released.
1958      */
1959     coda_decoder_drop_used_metas(ctx);
1960 
1961     if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) {
1962         v4l2_err(&dev->v4l2_dev,
1963             "CODA_COMMAND_SEQ_INIT failed, error code = 0x%x\n",
1964             coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON));
1965         return -EAGAIN;
1966     }
1967 
1968     val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE);
1969     if (dev->devtype->product == CODA_DX6) {
1970         width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK;
1971         height = val & CODADX6_PICHEIGHT_MASK;
1972     } else {
1973         width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK;
1974         height = val & CODA7_PICHEIGHT_MASK;
1975     }
1976 
1977     if (width > q_data_dst->bytesperline || height > q_data_dst->height) {
1978         v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n",
1979              width, height, q_data_dst->bytesperline,
1980              q_data_dst->height);
1981         return -EINVAL;
1982     }
1983 
1984     width = round_up(width, 16);
1985     height = round_up(height, 16);
1986 
1987     coda_dbg(1, ctx, "start decoding: %dx%d\n", width, height);
1988 
1989     ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED);
1990     /*
1991      * If the VDOA is used, the decoder needs one additional frame,
1992      * because the frames are freed when the next frame is decoded.
1993      * Otherwise there are visible errors in the decoded frames (green
1994      * regions in displayed frames) and a broken order of frames (earlier
1995      * frames are sporadically displayed after later frames).
1996      */
1997     if (ctx->use_vdoa)
1998         ctx->num_internal_frames += 1;
1999     if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) {
2000         v4l2_err(&dev->v4l2_dev,
2001              "not enough framebuffers to decode (%d < %d)\n",
2002              CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames);
2003         return -EINVAL;
2004     }
2005 
2006     if (src_fourcc == V4L2_PIX_FMT_H264) {
2007         u32 left_right;
2008         u32 top_bottom;
2009 
2010         left_right = coda_read(dev, CODA_RET_DEC_SEQ_CROP_LEFT_RIGHT);
2011         top_bottom = coda_read(dev, CODA_RET_DEC_SEQ_CROP_TOP_BOTTOM);
2012 
2013         q_data_dst->rect.left = (left_right >> 10) & 0x3ff;
2014         q_data_dst->rect.top = (top_bottom >> 10) & 0x3ff;
2015         q_data_dst->rect.width = width - q_data_dst->rect.left -
2016                      (left_right & 0x3ff);
2017         q_data_dst->rect.height = height - q_data_dst->rect.top -
2018                       (top_bottom & 0x3ff);
2019     }
2020 
2021     if (dev->devtype->product != CODA_DX6) {
2022         u8 profile, level;
2023 
2024         val = coda_read(dev, CODA7_RET_DEC_SEQ_HEADER_REPORT);
2025         profile = val & 0xff;
2026         level = (val >> 8) & 0x7f;
2027 
2028         if (profile || level)
2029             coda_update_profile_level_ctrls(ctx, profile, level);
2030     }
2031 
2032     return 0;
2033 }
2034 
2035 static void coda_dec_seq_init_work(struct work_struct *work)
2036 {
2037     struct coda_ctx *ctx = container_of(work,
2038                         struct coda_ctx, seq_init_work);
2039     struct coda_dev *dev = ctx->dev;
2040 
2041     mutex_lock(&ctx->buffer_mutex);
2042     mutex_lock(&dev->coda_mutex);
2043 
2044     if (!ctx->initialized)
2045         __coda_decoder_seq_init(ctx);
2046 
2047     mutex_unlock(&dev->coda_mutex);
2048     mutex_unlock(&ctx->buffer_mutex);
2049 }
2050 
2051 static int __coda_start_decoding(struct coda_ctx *ctx)
2052 {
2053     struct coda_q_data *q_data_src, *q_data_dst;
2054     struct coda_dev *dev = ctx->dev;
2055     u32 src_fourcc, dst_fourcc;
2056     int ret;
2057 
2058     q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2059     q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2060     src_fourcc = q_data_src->fourcc;
2061     dst_fourcc = q_data_dst->fourcc;
2062 
2063     if (!ctx->initialized) {
2064         ret = __coda_decoder_seq_init(ctx);
2065         if (ret < 0)
2066             return ret;
2067     } else {
2068         ctx->frame_mem_ctrl &= ~(CODA_FRAME_CHROMA_INTERLEAVE | (0x3 << 9) |
2069                      CODA9_FRAME_TILED2LINEAR);
2070         if (dst_fourcc == V4L2_PIX_FMT_NV12 || dst_fourcc == V4L2_PIX_FMT_YUYV)
2071             ctx->frame_mem_ctrl |= CODA_FRAME_CHROMA_INTERLEAVE;
2072         if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP)
2073             ctx->frame_mem_ctrl |= (0x3 << 9) |
2074                 ((ctx->use_vdoa) ? 0 : CODA9_FRAME_TILED2LINEAR);
2075     }
2076 
2077     coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
2078 
2079     ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc);
2080     if (ret < 0) {
2081         v4l2_err(&dev->v4l2_dev, "failed to allocate framebuffers\n");
2082         return ret;
2083     }
2084 
2085     /* Tell the decoder how many frame buffers we allocated. */
2086     coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
2087     coda_write(dev, round_up(q_data_dst->rect.width, 16),
2088            CODA_CMD_SET_FRAME_BUF_STRIDE);
2089 
2090     if (dev->devtype->product != CODA_DX6) {
2091         /* Set secondary AXI IRAM */
2092         coda_setup_iram(ctx);
2093 
2094         coda_write(dev, ctx->iram_info.buf_bit_use,
2095                 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
2096         coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
2097                 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
2098         coda_write(dev, ctx->iram_info.buf_dbk_y_use,
2099                 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
2100         coda_write(dev, ctx->iram_info.buf_dbk_c_use,
2101                 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
2102         coda_write(dev, ctx->iram_info.buf_ovl_use,
2103                 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
2104         if (dev->devtype->product == CODA_960) {
2105             coda_write(dev, ctx->iram_info.buf_btp_use,
2106                     CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
2107 
2108             coda_write(dev, -1, CODA9_CMD_SET_FRAME_DELAY);
2109             coda9_set_frame_cache(ctx, dst_fourcc);
2110         }
2111     }
2112 
2113     if (src_fourcc == V4L2_PIX_FMT_H264) {
2114         coda_write(dev, ctx->slicebuf.paddr,
2115                 CODA_CMD_SET_FRAME_SLICE_BB_START);
2116         coda_write(dev, ctx->slicebuf.size / 1024,
2117                 CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
2118     }
2119 
2120     if (dev->devtype->product == CODA_HX4 ||
2121         dev->devtype->product == CODA_7541) {
2122         int max_mb_x = 1920 / 16;
2123         int max_mb_y = 1088 / 16;
2124         int max_mb_num = max_mb_x * max_mb_y;
2125 
2126         coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
2127                 CODA7_CMD_SET_FRAME_MAX_DEC_SIZE);
2128     } else if (dev->devtype->product == CODA_960) {
2129         int max_mb_x = 1920 / 16;
2130         int max_mb_y = 1088 / 16;
2131         int max_mb_num = max_mb_x * max_mb_y;
2132 
2133         coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
2134                 CODA9_CMD_SET_FRAME_MAX_DEC_SIZE);
2135     }
2136 
2137     if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
2138         v4l2_err(&ctx->dev->v4l2_dev,
2139              "CODA_COMMAND_SET_FRAME_BUF timeout\n");
2140         return -ETIMEDOUT;
2141     }
2142 
2143     return 0;
2144 }
2145 
2146 static int coda_start_decoding(struct coda_ctx *ctx)
2147 {
2148     struct coda_dev *dev = ctx->dev;
2149     int ret;
2150 
2151     mutex_lock(&dev->coda_mutex);
2152     ret = __coda_start_decoding(ctx);
2153     mutex_unlock(&dev->coda_mutex);
2154 
2155     return ret;
2156 }
2157 
2158 static int coda_prepare_decode(struct coda_ctx *ctx)
2159 {
2160     struct vb2_v4l2_buffer *dst_buf;
2161     struct coda_dev *dev = ctx->dev;
2162     struct coda_q_data *q_data_dst;
2163     struct coda_buffer_meta *meta;
2164     u32 rot_mode = 0;
2165     u32 reg_addr, reg_stride;
2166 
2167     dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
2168     q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2169 
2170     /* Try to copy source buffer contents into the bitstream ringbuffer */
2171     mutex_lock(&ctx->bitstream_mutex);
2172     coda_fill_bitstream(ctx, NULL);
2173     mutex_unlock(&ctx->bitstream_mutex);
2174 
2175     if (coda_get_bitstream_payload(ctx) < 512 &&
2176         (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
2177         coda_dbg(1, ctx, "bitstream payload: %d, skipping\n",
2178              coda_get_bitstream_payload(ctx));
2179         return -EAGAIN;
2180     }
2181 
2182     /* Run coda_start_decoding (again) if not yet initialized */
2183     if (!ctx->initialized) {
2184         int ret = __coda_start_decoding(ctx);
2185 
2186         if (ret < 0) {
2187             v4l2_err(&dev->v4l2_dev, "failed to start decoding\n");
2188             return -EAGAIN;
2189         } else {
2190             ctx->initialized = 1;
2191         }
2192     }
2193 
2194     if (dev->devtype->product == CODA_960)
2195         coda_set_gdi_regs(ctx);
2196 
2197     if (ctx->use_vdoa &&
2198         ctx->display_idx >= 0 &&
2199         ctx->display_idx < ctx->num_internal_frames) {
2200         vdoa_device_run(ctx->vdoa,
2201                 vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0),
2202                 ctx->internal_frames[ctx->display_idx].buf.paddr);
2203     } else {
2204         if (dev->devtype->product == CODA_960) {
2205             /*
2206              * It was previously assumed that the CODA960 has an
2207              * internal list of 64 buffer entries that contains
2208              * both the registered internal frame buffers as well
2209              * as the rotator buffer output, and that the ROT_INDEX
2210              * register must be set to a value between the last
2211              * internal frame buffers' index and 64.
2212              * At least on firmware version 3.1.1 it turns out that
2213              * setting ROT_INDEX to any value >= 32 causes CODA
2214              * hangups that it can not recover from with the SRC VPU
2215              * reset.
2216              * It does appear to work however, to just set it to a
2217              * fixed value in the [ctx->num_internal_frames, 31]
2218              * range, for example CODA_MAX_FRAMEBUFFERS.
2219              */
2220             coda_write(dev, CODA_MAX_FRAMEBUFFERS,
2221                    CODA9_CMD_DEC_PIC_ROT_INDEX);
2222 
2223             reg_addr = CODA9_CMD_DEC_PIC_ROT_ADDR_Y;
2224             reg_stride = CODA9_CMD_DEC_PIC_ROT_STRIDE;
2225         } else {
2226             reg_addr = CODA_CMD_DEC_PIC_ROT_ADDR_Y;
2227             reg_stride = CODA_CMD_DEC_PIC_ROT_STRIDE;
2228         }
2229         coda_write_base(ctx, q_data_dst, dst_buf, reg_addr);
2230         coda_write(dev, q_data_dst->bytesperline, reg_stride);
2231 
2232         rot_mode = CODA_ROT_MIR_ENABLE | ctx->params.rot_mode;
2233     }
2234 
2235     coda_write(dev, rot_mode, CODA_CMD_DEC_PIC_ROT_MODE);
2236 
2237     switch (dev->devtype->product) {
2238     case CODA_DX6:
2239         /* TBD */
2240     case CODA_HX4:
2241     case CODA_7541:
2242         coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
2243         break;
2244     case CODA_960:
2245         /* 'hardcode to use interrupt disable mode'? */
2246         coda_write(dev, (1 << 10), CODA_CMD_DEC_PIC_OPTION);
2247         break;
2248     }
2249 
2250     coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM);
2251 
2252     coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START);
2253     coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE);
2254 
2255     if (dev->devtype->product != CODA_DX6)
2256         coda_write(dev, ctx->iram_info.axi_sram_use,
2257                 CODA7_REG_BIT_AXI_SRAM_USE);
2258 
2259     spin_lock(&ctx->buffer_meta_lock);
2260     meta = list_first_entry_or_null(&ctx->buffer_meta_list,
2261                     struct coda_buffer_meta, list);
2262 
2263     if (meta && ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG) {
2264 
2265         /* If this is the last buffer in the bitstream, add padding */
2266         if (meta->end == ctx->bitstream_fifo.kfifo.in) {
2267             static unsigned char buf[512];
2268             unsigned int pad;
2269 
2270             /* Pad to multiple of 256 and then add 256 more */
2271             pad = ((0 - meta->end) & 0xff) + 256;
2272 
2273             memset(buf, 0xff, sizeof(buf));
2274 
2275             kfifo_in(&ctx->bitstream_fifo, buf, pad);
2276         }
2277     }
2278     spin_unlock(&ctx->buffer_meta_lock);
2279 
2280     coda_kfifo_sync_to_device_full(ctx);
2281 
2282     /* Clear decode success flag */
2283     coda_write(dev, 0, CODA_RET_DEC_PIC_SUCCESS);
2284 
2285     /* Clear error return value */
2286     coda_write(dev, 0, CODA_RET_DEC_PIC_ERR_MB);
2287 
2288     trace_coda_dec_pic_run(ctx, meta);
2289 
2290     coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
2291 
2292     return 0;
2293 }
2294 
2295 static void coda_finish_decode(struct coda_ctx *ctx)
2296 {
2297     struct coda_dev *dev = ctx->dev;
2298     struct coda_q_data *q_data_src;
2299     struct coda_q_data *q_data_dst;
2300     struct vb2_v4l2_buffer *dst_buf;
2301     struct coda_buffer_meta *meta;
2302     int width, height;
2303     int decoded_idx;
2304     int display_idx;
2305     struct coda_internal_frame *decoded_frame = NULL;
2306     u32 src_fourcc;
2307     int success;
2308     u32 err_mb;
2309     int err_vdoa = 0;
2310     u32 val;
2311 
2312     if (ctx->aborting)
2313         return;
2314 
2315     /* Update kfifo out pointer from coda bitstream read pointer */
2316     coda_kfifo_sync_from_device(ctx);
2317 
2318     /*
2319      * in stream-end mode, the read pointer can overshoot the write pointer
2320      * by up to 512 bytes
2321      */
2322     if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) {
2323         if (coda_get_bitstream_payload(ctx) >= ctx->bitstream.size - 512)
2324             kfifo_init(&ctx->bitstream_fifo,
2325                 ctx->bitstream.vaddr, ctx->bitstream.size);
2326     }
2327 
2328     q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2329     src_fourcc = q_data_src->fourcc;
2330 
2331     val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS);
2332     if (val != 1)
2333         pr_err("DEC_PIC_SUCCESS = %d\n", val);
2334 
2335     success = val & 0x1;
2336     if (!success)
2337         v4l2_err(&dev->v4l2_dev, "decode failed\n");
2338 
2339     if (src_fourcc == V4L2_PIX_FMT_H264) {
2340         if (val & (1 << 3))
2341             v4l2_err(&dev->v4l2_dev,
2342                  "insufficient PS buffer space (%d bytes)\n",
2343                  ctx->psbuf.size);
2344         if (val & (1 << 2))
2345             v4l2_err(&dev->v4l2_dev,
2346                  "insufficient slice buffer space (%d bytes)\n",
2347                  ctx->slicebuf.size);
2348     }
2349 
2350     val = coda_read(dev, CODA_RET_DEC_PIC_SIZE);
2351     width = (val >> 16) & 0xffff;
2352     height = val & 0xffff;
2353 
2354     q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2355 
2356     /* frame crop information */
2357     if (src_fourcc == V4L2_PIX_FMT_H264) {
2358         u32 left_right;
2359         u32 top_bottom;
2360 
2361         left_right = coda_read(dev, CODA_RET_DEC_PIC_CROP_LEFT_RIGHT);
2362         top_bottom = coda_read(dev, CODA_RET_DEC_PIC_CROP_TOP_BOTTOM);
2363 
2364         if (left_right == 0xffffffff && top_bottom == 0xffffffff) {
2365             /* Keep current crop information */
2366         } else {
2367             struct v4l2_rect *rect = &q_data_dst->rect;
2368 
2369             rect->left = left_right >> 16 & 0xffff;
2370             rect->top = top_bottom >> 16 & 0xffff;
2371             rect->width = width - rect->left -
2372                       (left_right & 0xffff);
2373             rect->height = height - rect->top -
2374                        (top_bottom & 0xffff);
2375         }
2376     } else {
2377         /* no cropping */
2378     }
2379 
2380     err_mb = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB);
2381     if (err_mb > 0) {
2382         if (__ratelimit(&dev->mb_err_rs))
2383             coda_dbg(1, ctx, "errors in %d macroblocks\n", err_mb);
2384         v4l2_ctrl_s_ctrl(ctx->mb_err_cnt_ctrl,
2385                  v4l2_ctrl_g_ctrl(ctx->mb_err_cnt_ctrl) + err_mb);
2386     }
2387 
2388     if (dev->devtype->product == CODA_HX4 ||
2389         dev->devtype->product == CODA_7541) {
2390         val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
2391         if (val == 0) {
2392             /* not enough bitstream data */
2393             coda_dbg(1, ctx, "prescan failed: %d\n", val);
2394             ctx->hold = true;
2395             return;
2396         }
2397     }
2398 
2399     /* Wait until the VDOA finished writing the previous display frame */
2400     if (ctx->use_vdoa &&
2401         ctx->display_idx >= 0 &&
2402         ctx->display_idx < ctx->num_internal_frames) {
2403         err_vdoa = vdoa_wait_for_completion(ctx->vdoa);
2404     }
2405 
2406     ctx->frm_dis_flg = coda_read(dev,
2407                      CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
2408 
2409     /* The previous display frame was copied out and can be overwritten */
2410     if (ctx->display_idx >= 0 &&
2411         ctx->display_idx < ctx->num_internal_frames) {
2412         ctx->frm_dis_flg &= ~(1 << ctx->display_idx);
2413         coda_write(dev, ctx->frm_dis_flg,
2414                 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
2415     }
2416 
2417     /*
2418      * The index of the last decoded frame, not necessarily in
2419      * display order, and the index of the next display frame.
2420      * The latter could have been decoded in a previous run.
2421      */
2422     decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX);
2423     display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX);
2424 
2425     if (decoded_idx == -1) {
2426         /* no frame was decoded, but we might have a display frame */
2427         if (display_idx >= 0 && display_idx < ctx->num_internal_frames)
2428             ctx->sequence_offset++;
2429         else if (ctx->display_idx < 0)
2430             ctx->hold = true;
2431     } else if (decoded_idx == -2) {
2432         if (ctx->display_idx >= 0 &&
2433             ctx->display_idx < ctx->num_internal_frames)
2434             ctx->sequence_offset++;
2435         /* no frame was decoded, we still return remaining buffers */
2436     } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) {
2437         v4l2_err(&dev->v4l2_dev,
2438              "decoded frame index out of range: %d\n", decoded_idx);
2439     } else {
2440         int sequence;
2441 
2442         decoded_frame = &ctx->internal_frames[decoded_idx];
2443 
2444         val = coda_read(dev, CODA_RET_DEC_PIC_FRAME_NUM);
2445         if (ctx->sequence_offset == -1)
2446             ctx->sequence_offset = val;
2447 
2448         sequence = val + ctx->first_frame_sequence
2449                    - ctx->sequence_offset;
2450         spin_lock(&ctx->buffer_meta_lock);
2451         if (!list_empty(&ctx->buffer_meta_list)) {
2452             meta = list_first_entry(&ctx->buffer_meta_list,
2453                           struct coda_buffer_meta, list);
2454             list_del(&meta->list);
2455             ctx->num_metas--;
2456             spin_unlock(&ctx->buffer_meta_lock);
2457             /*
2458              * Clamp counters to 16 bits for comparison, as the HW
2459              * counter rolls over at this point for h.264. This
2460              * may be different for other formats, but using 16 bits
2461              * should be enough to detect most errors and saves us
2462              * from doing different things based on the format.
2463              */
2464             if ((sequence & 0xffff) != (meta->sequence & 0xffff)) {
2465                 v4l2_err(&dev->v4l2_dev,
2466                      "sequence number mismatch (%d(%d) != %d)\n",
2467                      sequence, ctx->sequence_offset,
2468                      meta->sequence);
2469             }
2470             decoded_frame->meta = *meta;
2471             kfree(meta);
2472         } else {
2473             spin_unlock(&ctx->buffer_meta_lock);
2474             v4l2_err(&dev->v4l2_dev, "empty timestamp list!\n");
2475             memset(&decoded_frame->meta, 0,
2476                    sizeof(struct coda_buffer_meta));
2477             decoded_frame->meta.sequence = sequence;
2478             decoded_frame->meta.last = false;
2479             ctx->sequence_offset++;
2480         }
2481 
2482         trace_coda_dec_pic_done(ctx, &decoded_frame->meta);
2483 
2484         val = coda_read(dev, CODA_RET_DEC_PIC_TYPE) & 0x7;
2485         decoded_frame->type = (val == 0) ? V4L2_BUF_FLAG_KEYFRAME :
2486                       (val == 1) ? V4L2_BUF_FLAG_PFRAME :
2487                            V4L2_BUF_FLAG_BFRAME;
2488 
2489         decoded_frame->error = err_mb;
2490     }
2491 
2492     if (display_idx == -1) {
2493         /*
2494          * no more frames to be decoded, but there could still
2495          * be rotator output to dequeue
2496          */
2497         ctx->hold = true;
2498     } else if (display_idx == -3) {
2499         /* possibly prescan failure */
2500     } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) {
2501         v4l2_err(&dev->v4l2_dev,
2502              "presentation frame index out of range: %d\n",
2503              display_idx);
2504     }
2505 
2506     /* If a frame was copied out, return it */
2507     if (ctx->display_idx >= 0 &&
2508         ctx->display_idx < ctx->num_internal_frames) {
2509         struct coda_internal_frame *ready_frame;
2510 
2511         ready_frame = &ctx->internal_frames[ctx->display_idx];
2512 
2513         dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
2514         dst_buf->sequence = ctx->osequence++;
2515 
2516         dst_buf->field = V4L2_FIELD_NONE;
2517         dst_buf->flags &= ~(V4L2_BUF_FLAG_KEYFRAME |
2518                          V4L2_BUF_FLAG_PFRAME |
2519                          V4L2_BUF_FLAG_BFRAME);
2520         dst_buf->flags |= ready_frame->type;
2521         meta = &ready_frame->meta;
2522         if (meta->last && !coda_reorder_enable(ctx)) {
2523             /*
2524              * If this was the last decoded frame, and reordering
2525              * is disabled, this will be the last display frame.
2526              */
2527             coda_dbg(1, ctx, "last meta, marking as last frame\n");
2528             dst_buf->flags |= V4L2_BUF_FLAG_LAST;
2529         } else if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG &&
2530                display_idx == -1) {
2531             /*
2532              * If there is no designated presentation frame anymore,
2533              * this frame has to be the last one.
2534              */
2535             coda_dbg(1, ctx,
2536                  "no more frames to return, marking as last frame\n");
2537             dst_buf->flags |= V4L2_BUF_FLAG_LAST;
2538         }
2539         dst_buf->timecode = meta->timecode;
2540         dst_buf->vb2_buf.timestamp = meta->timestamp;
2541 
2542         trace_coda_dec_rot_done(ctx, dst_buf, meta);
2543 
2544         vb2_set_plane_payload(&dst_buf->vb2_buf, 0,
2545                       q_data_dst->sizeimage);
2546 
2547         if (ready_frame->error || err_vdoa)
2548             coda_m2m_buf_done(ctx, dst_buf, VB2_BUF_STATE_ERROR);
2549         else
2550             coda_m2m_buf_done(ctx, dst_buf, VB2_BUF_STATE_DONE);
2551 
2552         if (decoded_frame) {
2553             coda_dbg(1, ctx, "job finished: decoded %c frame %u, returned %c frame %u (%u/%u)%s\n",
2554                  coda_frame_type_char(decoded_frame->type),
2555                  decoded_frame->meta.sequence,
2556                  coda_frame_type_char(dst_buf->flags),
2557                  ready_frame->meta.sequence,
2558                  dst_buf->sequence, ctx->qsequence,
2559                  (dst_buf->flags & V4L2_BUF_FLAG_LAST) ?
2560                  " (last)" : "");
2561         } else {
2562             coda_dbg(1, ctx, "job finished: no frame decoded (%d), returned %c frame %u (%u/%u)%s\n",
2563                  decoded_idx,
2564                  coda_frame_type_char(dst_buf->flags),
2565                  ready_frame->meta.sequence,
2566                  dst_buf->sequence, ctx->qsequence,
2567                  (dst_buf->flags & V4L2_BUF_FLAG_LAST) ?
2568                  " (last)" : "");
2569         }
2570     } else {
2571         if (decoded_frame) {
2572             coda_dbg(1, ctx, "job finished: decoded %c frame %u, no frame returned (%d)\n",
2573                  coda_frame_type_char(decoded_frame->type),
2574                  decoded_frame->meta.sequence,
2575                  ctx->display_idx);
2576         } else {
2577             coda_dbg(1, ctx, "job finished: no frame decoded (%d) or returned (%d)\n",
2578                  decoded_idx, ctx->display_idx);
2579         }
2580     }
2581 
2582     /* The rotator will copy the current display frame next time */
2583     ctx->display_idx = display_idx;
2584 
2585     /*
2586      * The current decode run might have brought the bitstream fill level
2587      * below the size where we can start the next decode run. As userspace
2588      * might have filled the output queue completely and might thus be
2589      * blocked, we can't rely on the next qbuf to trigger the bitstream
2590      * refill. Check if we have data to refill the bitstream now.
2591      */
2592     mutex_lock(&ctx->bitstream_mutex);
2593     coda_fill_bitstream(ctx, NULL);
2594     mutex_unlock(&ctx->bitstream_mutex);
2595 }
2596 
2597 static void coda_decode_timeout(struct coda_ctx *ctx)
2598 {
2599     struct vb2_v4l2_buffer *dst_buf;
2600 
2601     /*
2602      * For now this only handles the case where we would deadlock with
2603      * userspace, i.e. userspace issued DEC_CMD_STOP and waits for EOS,
2604      * but after a failed decode run we would hold the context and wait for
2605      * userspace to queue more buffers.
2606      */
2607     if (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))
2608         return;
2609 
2610     dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
2611     dst_buf->sequence = ctx->qsequence - 1;
2612 
2613     coda_m2m_buf_done(ctx, dst_buf, VB2_BUF_STATE_ERROR);
2614 }
2615 
2616 const struct coda_context_ops coda_bit_decode_ops = {
2617     .queue_init = coda_decoder_queue_init,
2618     .reqbufs = coda_decoder_reqbufs,
2619     .start_streaming = coda_start_decoding,
2620     .prepare_run = coda_prepare_decode,
2621     .finish_run = coda_finish_decode,
2622     .run_timeout = coda_decode_timeout,
2623     .seq_init_work = coda_dec_seq_init_work,
2624     .seq_end_work = coda_seq_end_work,
2625     .release = coda_bit_release,
2626 };
2627 
2628 irqreturn_t coda_irq_handler(int irq, void *data)
2629 {
2630     struct coda_dev *dev = data;
2631     struct coda_ctx *ctx;
2632 
2633     /* read status register to attend the IRQ */
2634     coda_read(dev, CODA_REG_BIT_INT_STATUS);
2635     coda_write(dev, 0, CODA_REG_BIT_INT_REASON);
2636     coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
2637               CODA_REG_BIT_INT_CLEAR);
2638 
2639     ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
2640     if (ctx == NULL) {
2641         v4l2_err(&dev->v4l2_dev,
2642              "Instance released before the end of transaction\n");
2643         return IRQ_HANDLED;
2644     }
2645 
2646     trace_coda_bit_done(ctx);
2647 
2648     if (ctx->aborting) {
2649         coda_dbg(1, ctx, "task has been aborted\n");
2650     }
2651 
2652     if (coda_isbusy(ctx->dev)) {
2653         coda_dbg(1, ctx, "coda is still busy!!!!\n");
2654         return IRQ_NONE;
2655     }
2656 
2657     complete(&ctx->completion);
2658 
2659     return IRQ_HANDLED;
2660 }