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0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  *  tw68-reg.h - TW68xx register offsets
0004  *
0005  *  Much of this code is derived from the cx88 and sa7134 drivers, which
0006  *  were in turn derived from the bt87x driver.  The original work was by
0007  *  Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
0008  *  Hans Verkuil, Andy Walls and many others.  Their work is gratefully
0009  *  acknowledged.  Full credit goes to them - any problems within this code
0010  *  are mine.
0011  *
0012  *  Copyright (C) William M. Brack
0013  *
0014  *  Refactored and updated to the latest v4l core frameworks:
0015  *
0016  *  Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl>
0017 */
0018 
0019 #ifndef _TW68_REG_H_
0020 #define _TW68_REG_H_
0021 
0022 /* ---------------------------------------------------------------------- */
0023 #define TW68_DMAC       0x000
0024 #define TW68_DMAP_SA        0x004
0025 #define TW68_DMAP_EXE       0x008
0026 #define TW68_DMAP_PP        0x00c
0027 #define TW68_VBIC       0x010
0028 #define TW68_SBUSC      0x014
0029 #define TW68_SBUSSD     0x018
0030 #define TW68_INTSTAT        0x01C
0031 #define TW68_INTMASK        0x020
0032 #define TW68_GPIOC      0x024
0033 #define TW68_GPOE       0x028
0034 #define TW68_TESTREG        0x02C
0035 #define TW68_SBUSRD     0x030
0036 #define TW68_SBUS_TRIG      0x034
0037 #define TW68_CAP_CTL        0x040
0038 #define TW68_SUBSYS     0x054
0039 #define TW68_I2C_RST        0x064
0040 #define TW68_VBIINST        0x06C
0041 /* define bits in FIFO and DMAP Control reg */
0042 #define TW68_DMAP_EN        (1 << 0)
0043 #define TW68_FIFO_EN        (1 << 1)
0044 /* define the Interrupt Status Register bits */
0045 #define TW68_SBDONE     (1 << 0)
0046 #define TW68_DMAPI      (1 << 1)
0047 #define TW68_GPINT      (1 << 2)
0048 #define TW68_FFOF       (1 << 3)
0049 #define TW68_FDMIS      (1 << 4)
0050 #define TW68_DMAPERR        (1 << 5)
0051 #define TW68_PABORT     (1 << 6)
0052 #define TW68_SBDONE2        (1 << 12)
0053 #define TW68_SBERR2     (1 << 13)
0054 #define TW68_PPERR      (1 << 14)
0055 #define TW68_FFERR      (1 << 15)
0056 #define TW68_DET50      (1 << 16)
0057 #define TW68_FLOCK      (1 << 17)
0058 #define TW68_CCVALID        (1 << 18)
0059 #define TW68_VLOCK      (1 << 19)
0060 #define TW68_FIELD      (1 << 20)
0061 #define TW68_SLOCK      (1 << 21)
0062 #define TW68_HLOCK      (1 << 22)
0063 #define TW68_VDLOSS     (1 << 23)
0064 #define TW68_SBERR      (1 << 24)
0065 /* define the i2c control register bits */
0066 #define TW68_SBMODE     (0)
0067 #define TW68_WREN       (1)
0068 #define TW68_SSCLK      (6)
0069 #define TW68_SSDAT      (7)
0070 #define TW68_SBCLK      (8)
0071 #define TW68_WDLEN      (16)
0072 #define TW68_RDLEN      (20)
0073 #define TW68_SBRW       (24)
0074 #define TW68_SBDEV      (25)
0075 
0076 #define TW68_SBMODE_B       (1 << TW68_SBMODE)
0077 #define TW68_WREN_B     (1 << TW68_WREN)
0078 #define TW68_SSCLK_B        (1 << TW68_SSCLK)
0079 #define TW68_SSDAT_B        (1 << TW68_SSDAT)
0080 #define TW68_SBRW_B     (1 << TW68_SBRW)
0081 
0082 #define TW68_GPDATA     0x100
0083 #define TW68_STATUS1        0x204
0084 #define TW68_INFORM     0x208
0085 #define TW68_OPFORM     0x20C
0086 #define TW68_HSYNC      0x210
0087 #define TW68_ACNTL      0x218
0088 #define TW68_CROP_HI        0x21C
0089 #define TW68_VDELAY_LO      0x220
0090 #define TW68_VACTIVE_LO     0x224
0091 #define TW68_HDELAY_LO      0x228
0092 #define TW68_HACTIVE_LO     0x22C
0093 #define TW68_CNTRL1     0x230
0094 #define TW68_VSCALE_LO      0x234
0095 #define TW68_SCALE_HI       0x238
0096 #define TW68_HSCALE_LO      0x23C
0097 #define TW68_BRIGHT     0x240
0098 #define TW68_CONTRAST       0x244
0099 #define TW68_SHARPNESS      0x248
0100 #define TW68_SAT_U      0x24C
0101 #define TW68_SAT_V      0x250
0102 #define TW68_HUE        0x254
0103 #define TW68_SHARP2     0x258
0104 #define TW68_VSHARP     0x25C
0105 #define TW68_CORING     0x260
0106 #define TW68_VBICNTL        0x264
0107 #define TW68_CNTRL2     0x268
0108 #define TW68_CC_DATA        0x26C
0109 #define TW68_SDT        0x270
0110 #define TW68_SDTR       0x274
0111 #define TW68_RESERV2        0x278
0112 #define TW68_RESERV3        0x27C
0113 #define TW68_CLMPG      0x280
0114 #define TW68_IAGC       0x284
0115 #define TW68_AGCGAIN        0x288
0116 #define TW68_PEAKWT     0x28C
0117 #define TW68_CLMPL      0x290
0118 #define TW68_SYNCT      0x294
0119 #define TW68_MISSCNT        0x298
0120 #define TW68_PCLAMP     0x29C
0121 #define TW68_VCNTL1     0x2A0
0122 #define TW68_VCNTL2     0x2A4
0123 #define TW68_CKILL      0x2A8
0124 #define TW68_COMB       0x2AC
0125 #define TW68_LDLY       0x2B0
0126 #define TW68_MISC1      0x2B4
0127 #define TW68_LOOP       0x2B8
0128 #define TW68_MISC2      0x2BC
0129 #define TW68_MVSN       0x2C0
0130 #define TW68_STATUS2        0x2C4
0131 #define TW68_HFREF      0x2C8
0132 #define TW68_CLMD       0x2CC
0133 #define TW68_IDCNTL     0x2D0
0134 #define TW68_CLCNTL1        0x2D4
0135 
0136 /* Audio */
0137 #define TW68_ACKI1      0x300
0138 #define TW68_ACKI2      0x304
0139 #define TW68_ACKI3      0x308
0140 #define TW68_ACKN1      0x30C
0141 #define TW68_ACKN2      0x310
0142 #define TW68_ACKN3      0x314
0143 #define TW68_SDIV       0x318
0144 #define TW68_LRDIV      0x31C
0145 #define TW68_ACCNTL     0x320
0146 
0147 #define TW68_VSCTL      0x3B8
0148 #define TW68_CHROMAGVAL     0x3BC
0149 
0150 #define TW68_F2CROP_HI      0x3DC
0151 #define TW68_F2VDELAY_LO    0x3E0
0152 #define TW68_F2VACTIVE_LO   0x3E4
0153 #define TW68_F2HDELAY_LO    0x3E8
0154 #define TW68_F2HACTIVE_LO   0x3EC
0155 #define TW68_F2CNT      0x3F0
0156 #define TW68_F2VSCALE_LO    0x3F4
0157 #define TW68_F2SCALE_HI     0x3F8
0158 #define TW68_F2HSCALE_LO    0x3FC
0159 
0160 #define RISC_INT_BIT        0x08000000
0161 #define RISC_SYNCO      0xC0000000
0162 #define RISC_SYNCE      0xD0000000
0163 #define RISC_JUMP       0xB0000000
0164 #define RISC_LINESTART      0x90000000
0165 #define RISC_INLINE     0xA0000000
0166 
0167 #define VideoFormatNTSC      0
0168 #define VideoFormatNTSCJapan     0
0169 #define VideoFormatPALBDGHI  1
0170 #define VideoFormatSECAM     2
0171 #define VideoFormatNTSC443   3
0172 #define VideoFormatPALM      4
0173 #define VideoFormatPALN      5
0174 #define VideoFormatPALNC     5
0175 #define VideoFormatPAL60     6
0176 #define VideoFormatAuto      7
0177 
0178 #define ColorFormatRGB32     0x00
0179 #define ColorFormatRGB24     0x10
0180 #define ColorFormatRGB16     0x20
0181 #define ColorFormatRGB15     0x30
0182 #define ColorFormatYUY2      0x40
0183 #define ColorFormatBSWAP         0x04
0184 #define ColorFormatWSWAP         0x08
0185 #define ColorFormatGamma         0x80
0186 #endif