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0012 #ifndef __SOLO6X10_H
0013 #define __SOLO6X10_H
0014
0015 #include <linux/pci.h>
0016 #include <linux/i2c.h>
0017 #include <linux/mutex.h>
0018 #include <linux/list.h>
0019 #include <linux/wait.h>
0020 #include <linux/stringify.h>
0021 #include <linux/io.h>
0022 #include <linux/atomic.h>
0023 #include <linux/slab.h>
0024 #include <linux/videodev2.h>
0025 #include <linux/gpio/driver.h>
0026
0027 #include <media/v4l2-dev.h>
0028 #include <media/v4l2-device.h>
0029 #include <media/v4l2-ctrls.h>
0030 #include <media/videobuf2-v4l2.h>
0031
0032 #include "solo6x10-regs.h"
0033
0034 #ifndef PCI_VENDOR_ID_SOFTLOGIC
0035 #define PCI_VENDOR_ID_SOFTLOGIC 0x9413
0036 #define PCI_DEVICE_ID_SOLO6010 0x6010
0037 #define PCI_DEVICE_ID_SOLO6110 0x6110
0038 #endif
0039
0040 #ifndef PCI_VENDOR_ID_BLUECHERRY
0041 #define PCI_VENDOR_ID_BLUECHERRY 0x1BB3
0042
0043 #define PCI_DEVICE_ID_NEUSOLO_4 0x4304
0044 #define PCI_DEVICE_ID_NEUSOLO_9 0x4309
0045 #define PCI_DEVICE_ID_NEUSOLO_16 0x4310
0046
0047 #define PCI_DEVICE_ID_BC_SOLO_4 0x4E04
0048 #define PCI_DEVICE_ID_BC_SOLO_9 0x4E09
0049 #define PCI_DEVICE_ID_BC_SOLO_16 0x4E10
0050
0051 #define PCI_DEVICE_ID_BC_6110_4 0x5304
0052 #define PCI_DEVICE_ID_BC_6110_8 0x5308
0053 #define PCI_DEVICE_ID_BC_6110_16 0x5310
0054 #endif
0055
0056
0057 #define SOLO_DEV_6010 0
0058 #define SOLO_DEV_6110 1
0059
0060 #define SOLO6X10_NAME "solo6x10"
0061
0062 #define SOLO_MAX_CHANNELS 16
0063
0064 #define SOLO6X10_VERSION "3.0.0"
0065
0066
0067
0068
0069
0070
0071 #define SOLO_I2C_ADAPTERS 2
0072 #define SOLO_I2C_TW 0
0073 #define SOLO_I2C_SAA 1
0074
0075
0076 #define SOLO_NR_P2M 4
0077 #define SOLO_NR_P2M_DESC 256
0078 #define SOLO_P2M_DESC_SIZE (SOLO_NR_P2M_DESC * 16)
0079
0080
0081 #define SOLO_ENC_MODE_CIF 2
0082 #define SOLO_ENC_MODE_HD1 1
0083 #define SOLO_ENC_MODE_D1 9
0084
0085 #define SOLO_DEFAULT_QP 3
0086
0087 #define SOLO_CID_CUSTOM_BASE (V4L2_CID_USER_BASE | 0xf000)
0088 #define V4L2_CID_MOTION_TRACE (SOLO_CID_CUSTOM_BASE+2)
0089 #define V4L2_CID_OSD_TEXT (SOLO_CID_CUSTOM_BASE+3)
0090
0091
0092
0093
0094
0095
0096
0097
0098
0099
0100 #define SOLO_MOTION_SZ (45)
0101
0102 enum SOLO_I2C_STATE {
0103 IIC_STATE_IDLE,
0104 IIC_STATE_START,
0105 IIC_STATE_READ,
0106 IIC_STATE_WRITE,
0107 IIC_STATE_STOP
0108 };
0109
0110
0111 struct solo_p2m_desc {
0112 u32 ctrl;
0113 u32 cfg;
0114 u32 dma_addr;
0115 u32 ext_addr;
0116 };
0117
0118 struct solo_p2m_dev {
0119 struct mutex mutex;
0120 struct completion completion;
0121 int desc_count;
0122 int desc_idx;
0123 struct solo_p2m_desc *descs;
0124 int error;
0125 };
0126
0127 #define OSD_TEXT_MAX 44
0128
0129 struct solo_vb2_buf {
0130 struct vb2_v4l2_buffer vb;
0131 struct list_head list;
0132 };
0133
0134 enum solo_enc_types {
0135 SOLO_ENC_TYPE_STD,
0136 SOLO_ENC_TYPE_EXT,
0137 };
0138
0139 struct solo_enc_dev {
0140 struct solo_dev *solo_dev;
0141
0142 struct v4l2_ctrl_handler hdl;
0143 struct v4l2_ctrl *md_thresholds;
0144 struct video_device *vfd;
0145
0146 struct mutex lock;
0147 spinlock_t motion_lock;
0148 u8 ch;
0149 u8 mode, gop, qp, interlaced, interval;
0150 u8 bw_weight;
0151 u16 motion_thresh;
0152 bool motion_global;
0153 bool motion_enabled;
0154 u16 width;
0155 u16 height;
0156
0157
0158 char osd_text[OSD_TEXT_MAX + 1];
0159 u8 osd_buf[SOLO_EOSD_EXT_SIZE_MAX]
0160 __aligned(4);
0161
0162
0163 u8 vop[64];
0164 int vop_len;
0165 u8 jpeg_header[1024];
0166 int jpeg_len;
0167
0168 u32 fmt;
0169 enum solo_enc_types type;
0170 u32 sequence;
0171 struct vb2_queue vidq;
0172 struct list_head vidq_active;
0173 int desc_count;
0174 int desc_nelts;
0175 struct solo_p2m_desc *desc_items;
0176 dma_addr_t desc_dma;
0177 spinlock_t av_lock;
0178 };
0179
0180
0181 struct solo_dev {
0182
0183 struct pci_dev *pdev;
0184 int type;
0185 unsigned int time_sync;
0186 unsigned int usec_lsb;
0187 unsigned int clock_mhz;
0188 u8 __iomem *reg_base;
0189 int nr_chans;
0190 int nr_ext;
0191 u32 irq_mask;
0192 u32 motion_mask;
0193 struct v4l2_device v4l2_dev;
0194 #ifdef CONFIG_GPIOLIB
0195
0196 struct gpio_chip gpio_dev;
0197 #endif
0198
0199
0200 u8 tw2865, tw2864, tw2815;
0201 u8 tw28_cnt;
0202
0203
0204 struct i2c_adapter i2c_adap[SOLO_I2C_ADAPTERS];
0205 enum SOLO_I2C_STATE i2c_state;
0206 struct mutex i2c_mutex;
0207 int i2c_id;
0208 wait_queue_head_t i2c_wait;
0209 struct i2c_msg *i2c_msg;
0210 unsigned int i2c_msg_num;
0211 unsigned int i2c_msg_ptr;
0212
0213
0214 struct solo_p2m_dev p2m_dev[SOLO_NR_P2M];
0215 atomic_t p2m_count;
0216 int p2m_jiffies;
0217 unsigned int p2m_timeouts;
0218
0219
0220 struct video_device *vfd;
0221 unsigned int erasing;
0222 unsigned int frame_blank;
0223 u8 cur_disp_ch;
0224 wait_queue_head_t disp_thread_wait;
0225 struct v4l2_ctrl_handler disp_hdl;
0226
0227
0228 struct solo_enc_dev *v4l2_enc[SOLO_MAX_CHANNELS];
0229 u16 enc_bw_remain;
0230
0231 u8 enc_idx;
0232
0233
0234 u32 video_type;
0235 u16 video_hsize, video_vsize;
0236 u16 vout_hstart, vout_vstart;
0237 u16 vin_hstart, vin_vstart;
0238 u8 fps;
0239
0240
0241 spinlock_t jpeg_qp_lock;
0242 u32 jpeg_qp[2];
0243
0244
0245 struct snd_card *snd_card;
0246 struct snd_pcm *snd_pcm;
0247 atomic_t snd_users;
0248 int g723_hw_idx;
0249
0250
0251 struct device dev;
0252 int sdram_size;
0253 struct bin_attribute sdram_attr;
0254 unsigned int sys_config;
0255
0256
0257 struct task_struct *ring_thread;
0258 wait_queue_head_t ring_thread_wait;
0259
0260
0261 void *vh_buf;
0262 dma_addr_t vh_dma;
0263 int vh_size;
0264
0265
0266 struct vb2_queue vidq;
0267 u32 sequence;
0268 struct task_struct *kthread;
0269 struct mutex lock;
0270 spinlock_t slock;
0271 int old_write;
0272 struct list_head vidq_active;
0273 };
0274
0275 static inline u32 solo_reg_read(struct solo_dev *solo_dev, int reg)
0276 {
0277 return readl(solo_dev->reg_base + reg);
0278 }
0279
0280 static inline void solo_reg_write(struct solo_dev *solo_dev, int reg,
0281 u32 data)
0282 {
0283 u16 val;
0284
0285 writel(data, solo_dev->reg_base + reg);
0286 pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val);
0287 }
0288
0289 static inline void solo_irq_on(struct solo_dev *dev, u32 mask)
0290 {
0291 dev->irq_mask |= mask;
0292 solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask);
0293 }
0294
0295 static inline void solo_irq_off(struct solo_dev *dev, u32 mask)
0296 {
0297 dev->irq_mask &= ~mask;
0298 solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask);
0299 }
0300
0301
0302 int solo_disp_init(struct solo_dev *solo_dev);
0303 void solo_disp_exit(struct solo_dev *solo_dev);
0304
0305 int solo_gpio_init(struct solo_dev *solo_dev);
0306 void solo_gpio_exit(struct solo_dev *solo_dev);
0307
0308 int solo_i2c_init(struct solo_dev *solo_dev);
0309 void solo_i2c_exit(struct solo_dev *solo_dev);
0310
0311 int solo_p2m_init(struct solo_dev *solo_dev);
0312 void solo_p2m_exit(struct solo_dev *solo_dev);
0313
0314 int solo_v4l2_init(struct solo_dev *solo_dev, unsigned nr);
0315 void solo_v4l2_exit(struct solo_dev *solo_dev);
0316
0317 int solo_enc_init(struct solo_dev *solo_dev);
0318 void solo_enc_exit(struct solo_dev *solo_dev);
0319
0320 int solo_enc_v4l2_init(struct solo_dev *solo_dev, unsigned nr);
0321 void solo_enc_v4l2_exit(struct solo_dev *solo_dev);
0322
0323 int solo_g723_init(struct solo_dev *solo_dev);
0324 void solo_g723_exit(struct solo_dev *solo_dev);
0325
0326
0327 int solo_i2c_isr(struct solo_dev *solo_dev);
0328 void solo_p2m_isr(struct solo_dev *solo_dev, int id);
0329 void solo_p2m_error_isr(struct solo_dev *solo_dev);
0330 void solo_enc_v4l2_isr(struct solo_dev *solo_dev);
0331 void solo_g723_isr(struct solo_dev *solo_dev);
0332 void solo_motion_isr(struct solo_dev *solo_dev);
0333 void solo_video_in_isr(struct solo_dev *solo_dev);
0334
0335
0336 u8 solo_i2c_readbyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off);
0337 void solo_i2c_writebyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off,
0338 u8 data);
0339
0340
0341 int solo_p2m_dma_t(struct solo_dev *solo_dev, int wr,
0342 dma_addr_t dma_addr, u32 ext_addr, u32 size,
0343 int repeat, u32 ext_size);
0344 int solo_p2m_dma(struct solo_dev *solo_dev, int wr,
0345 void *sys_addr, u32 ext_addr, u32 size,
0346 int repeat, u32 ext_size);
0347 void solo_p2m_fill_desc(struct solo_p2m_desc *desc, int wr,
0348 dma_addr_t dma_addr, u32 ext_addr, u32 size,
0349 int repeat, u32 ext_size);
0350 int solo_p2m_dma_desc(struct solo_dev *solo_dev,
0351 struct solo_p2m_desc *desc, dma_addr_t desc_dma,
0352 int desc_cnt);
0353
0354
0355 int solo_set_video_type(struct solo_dev *solo_dev, bool is_50hz);
0356 void solo_update_mode(struct solo_enc_dev *solo_enc);
0357
0358
0359 int solo_set_motion_threshold(struct solo_dev *solo_dev, u8 ch, u16 val);
0360 int solo_set_motion_block(struct solo_dev *solo_dev, u8 ch,
0361 const u16 *thresholds);
0362 #define SOLO_DEF_MOT_THRESH 0x0300
0363
0364
0365 int solo_osd_print(struct solo_enc_dev *solo_enc);
0366
0367
0368 unsigned int solo_eeprom_ewen(struct solo_dev *solo_dev, int w_en);
0369 __be16 solo_eeprom_read(struct solo_dev *solo_dev, int loc);
0370 int solo_eeprom_write(struct solo_dev *solo_dev, int loc,
0371 __be16 data);
0372
0373
0374 void solo_s_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch,
0375 unsigned int qp);
0376 int solo_g_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch);
0377
0378 #define CHK_FLAGS(v, flags) (((v) & (flags)) == (flags))
0379
0380 #endif