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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright (C) 2010-2013 Bluecherry, LLC <https://www.bluecherrydvr.com>
0004  *
0005  * Original author:
0006  * Ben Collins <bcollins@ubuntu.com>
0007  *
0008  * Additional work by:
0009  * John Brooks <john.brooks@bluecherry.net>
0010  */
0011 
0012 #include <linux/kernel.h>
0013 #include <linux/module.h>
0014 #include <linux/pci.h>
0015 #include <linux/interrupt.h>
0016 #include <linux/videodev2.h>
0017 #include <linux/delay.h>
0018 #include <linux/sysfs.h>
0019 #include <linux/ktime.h>
0020 #include <linux/slab.h>
0021 
0022 #include "solo6x10.h"
0023 #include "solo6x10-tw28.h"
0024 
0025 MODULE_DESCRIPTION("Softlogic 6x10 MPEG4/H.264/G.723 CODEC V4L2/ALSA Driver");
0026 MODULE_AUTHOR("Bluecherry <maintainers@bluecherrydvr.com>");
0027 MODULE_VERSION(SOLO6X10_VERSION);
0028 MODULE_LICENSE("GPL");
0029 
0030 static unsigned video_nr = -1;
0031 module_param(video_nr, uint, 0644);
0032 MODULE_PARM_DESC(video_nr, "videoX start number, -1 is autodetect (default)");
0033 
0034 static int full_eeprom; /* default is only top 64B */
0035 module_param(full_eeprom, uint, 0644);
0036 MODULE_PARM_DESC(full_eeprom, "Allow access to full 128B EEPROM (dangerous)");
0037 
0038 
0039 static void solo_set_time(struct solo_dev *solo_dev)
0040 {
0041     struct timespec64 ts;
0042 
0043     ktime_get_ts64(&ts);
0044 
0045     /* no overflow because we use monotonic timestamps */
0046     solo_reg_write(solo_dev, SOLO_TIMER_SEC, (u32)ts.tv_sec);
0047     solo_reg_write(solo_dev, SOLO_TIMER_USEC, (u32)ts.tv_nsec / NSEC_PER_USEC);
0048 }
0049 
0050 static void solo_timer_sync(struct solo_dev *solo_dev)
0051 {
0052     u32 sec, usec;
0053     struct timespec64 ts;
0054     long diff;
0055 
0056     if (solo_dev->type != SOLO_DEV_6110)
0057         return;
0058 
0059     if (++solo_dev->time_sync < 60)
0060         return;
0061 
0062     solo_dev->time_sync = 0;
0063 
0064     sec = solo_reg_read(solo_dev, SOLO_TIMER_SEC);
0065     usec = solo_reg_read(solo_dev, SOLO_TIMER_USEC);
0066 
0067     ktime_get_ts64(&ts);
0068 
0069     diff = (s32)ts.tv_sec - (s32)sec;
0070     diff = (diff * 1000000)
0071         + ((s32)(ts.tv_nsec / NSEC_PER_USEC) - (s32)usec);
0072 
0073     if (diff > 1000 || diff < -1000) {
0074         solo_set_time(solo_dev);
0075     } else if (diff) {
0076         long usec_lsb = solo_dev->usec_lsb;
0077 
0078         usec_lsb -= diff / 4;
0079         if (usec_lsb < 0)
0080             usec_lsb = 0;
0081         else if (usec_lsb > 255)
0082             usec_lsb = 255;
0083 
0084         solo_dev->usec_lsb = usec_lsb;
0085         solo_reg_write(solo_dev, SOLO_TIMER_USEC_LSB,
0086                    solo_dev->usec_lsb);
0087     }
0088 }
0089 
0090 static irqreturn_t solo_isr(int irq, void *data)
0091 {
0092     struct solo_dev *solo_dev = data;
0093     u32 status;
0094     int i;
0095 
0096     status = solo_reg_read(solo_dev, SOLO_IRQ_STAT);
0097     if (!status)
0098         return IRQ_NONE;
0099 
0100     /* Acknowledge all interrupts immediately */
0101     solo_reg_write(solo_dev, SOLO_IRQ_STAT, status);
0102 
0103     if (status & SOLO_IRQ_PCI_ERR)
0104         solo_p2m_error_isr(solo_dev);
0105 
0106     for (i = 0; i < SOLO_NR_P2M; i++)
0107         if (status & SOLO_IRQ_P2M(i))
0108             solo_p2m_isr(solo_dev, i);
0109 
0110     if (status & SOLO_IRQ_IIC)
0111         solo_i2c_isr(solo_dev);
0112 
0113     if (status & SOLO_IRQ_VIDEO_IN) {
0114         solo_video_in_isr(solo_dev);
0115         solo_timer_sync(solo_dev);
0116     }
0117 
0118     if (status & SOLO_IRQ_ENCODER)
0119         solo_enc_v4l2_isr(solo_dev);
0120 
0121     if (status & SOLO_IRQ_G723)
0122         solo_g723_isr(solo_dev);
0123 
0124     return IRQ_HANDLED;
0125 }
0126 
0127 static void free_solo_dev(struct solo_dev *solo_dev)
0128 {
0129     struct pci_dev *pdev = solo_dev->pdev;
0130 
0131     if (solo_dev->dev.parent)
0132         device_unregister(&solo_dev->dev);
0133 
0134     if (solo_dev->reg_base) {
0135         /* Bring down the sub-devices first */
0136         solo_g723_exit(solo_dev);
0137         solo_enc_v4l2_exit(solo_dev);
0138         solo_enc_exit(solo_dev);
0139         solo_v4l2_exit(solo_dev);
0140         solo_disp_exit(solo_dev);
0141         solo_gpio_exit(solo_dev);
0142         solo_p2m_exit(solo_dev);
0143         solo_i2c_exit(solo_dev);
0144 
0145         /* Now cleanup the PCI device */
0146         solo_irq_off(solo_dev, ~0);
0147         free_irq(pdev->irq, solo_dev);
0148         pci_iounmap(pdev, solo_dev->reg_base);
0149     }
0150 
0151     pci_release_regions(pdev);
0152     pci_disable_device(pdev);
0153     v4l2_device_unregister(&solo_dev->v4l2_dev);
0154     pci_set_drvdata(pdev, NULL);
0155 
0156     kfree(solo_dev);
0157 }
0158 
0159 static ssize_t eeprom_store(struct device *dev, struct device_attribute *attr,
0160                 const char *buf, size_t count)
0161 {
0162     struct solo_dev *solo_dev =
0163         container_of(dev, struct solo_dev, dev);
0164     u16 *p = (u16 *)buf;
0165     int i;
0166 
0167     if (count & 0x1)
0168         dev_warn(dev, "EEPROM Write not aligned (truncating)\n");
0169 
0170     if (!full_eeprom && count > 64) {
0171         dev_warn(dev, "EEPROM Write truncated to 64 bytes\n");
0172         count = 64;
0173     } else if (full_eeprom && count > 128) {
0174         dev_warn(dev, "EEPROM Write truncated to 128 bytes\n");
0175         count = 128;
0176     }
0177 
0178     solo_eeprom_ewen(solo_dev, 1);
0179 
0180     for (i = full_eeprom ? 0 : 32; i < min((int)(full_eeprom ? 64 : 32),
0181                            (int)(count / 2)); i++)
0182         solo_eeprom_write(solo_dev, i, cpu_to_be16(p[i]));
0183 
0184     solo_eeprom_ewen(solo_dev, 0);
0185 
0186     return count;
0187 }
0188 
0189 static ssize_t eeprom_show(struct device *dev, struct device_attribute *attr,
0190                char *buf)
0191 {
0192     struct solo_dev *solo_dev =
0193         container_of(dev, struct solo_dev, dev);
0194     u16 *p = (u16 *)buf;
0195     int count = (full_eeprom ? 128 : 64);
0196     int i;
0197 
0198     for (i = (full_eeprom ? 0 : 32); i < (count / 2); i++)
0199         p[i] = be16_to_cpu(solo_eeprom_read(solo_dev, i));
0200 
0201     return count;
0202 }
0203 
0204 static ssize_t p2m_timeouts_show(struct device *dev,
0205                  struct device_attribute *attr,
0206                  char *buf)
0207 {
0208     struct solo_dev *solo_dev =
0209         container_of(dev, struct solo_dev, dev);
0210 
0211     return sprintf(buf, "%d\n", solo_dev->p2m_timeouts);
0212 }
0213 
0214 static ssize_t sdram_size_show(struct device *dev,
0215                    struct device_attribute *attr,
0216                    char *buf)
0217 {
0218     struct solo_dev *solo_dev =
0219         container_of(dev, struct solo_dev, dev);
0220 
0221     return sprintf(buf, "%dMegs\n", solo_dev->sdram_size >> 20);
0222 }
0223 
0224 static ssize_t tw28xx_show(struct device *dev,
0225                struct device_attribute *attr,
0226                char *buf)
0227 {
0228     struct solo_dev *solo_dev =
0229         container_of(dev, struct solo_dev, dev);
0230 
0231     return sprintf(buf, "tw2815[%d] tw2864[%d] tw2865[%d]\n",
0232                hweight32(solo_dev->tw2815),
0233                hweight32(solo_dev->tw2864),
0234                hweight32(solo_dev->tw2865));
0235 }
0236 
0237 static ssize_t input_map_show(struct device *dev,
0238                   struct device_attribute *attr,
0239                   char *buf)
0240 {
0241     struct solo_dev *solo_dev =
0242         container_of(dev, struct solo_dev, dev);
0243     unsigned int val;
0244     char *out = buf;
0245 
0246     val = solo_reg_read(solo_dev, SOLO_VI_CH_SWITCH_0);
0247     out += sprintf(out, "Channel 0   => Input %d\n", val & 0x1f);
0248     out += sprintf(out, "Channel 1   => Input %d\n", (val >> 5) & 0x1f);
0249     out += sprintf(out, "Channel 2   => Input %d\n", (val >> 10) & 0x1f);
0250     out += sprintf(out, "Channel 3   => Input %d\n", (val >> 15) & 0x1f);
0251     out += sprintf(out, "Channel 4   => Input %d\n", (val >> 20) & 0x1f);
0252     out += sprintf(out, "Channel 5   => Input %d\n", (val >> 25) & 0x1f);
0253 
0254     val = solo_reg_read(solo_dev, SOLO_VI_CH_SWITCH_1);
0255     out += sprintf(out, "Channel 6   => Input %d\n", val & 0x1f);
0256     out += sprintf(out, "Channel 7   => Input %d\n", (val >> 5) & 0x1f);
0257     out += sprintf(out, "Channel 8   => Input %d\n", (val >> 10) & 0x1f);
0258     out += sprintf(out, "Channel 9   => Input %d\n", (val >> 15) & 0x1f);
0259     out += sprintf(out, "Channel 10  => Input %d\n", (val >> 20) & 0x1f);
0260     out += sprintf(out, "Channel 11  => Input %d\n", (val >> 25) & 0x1f);
0261 
0262     val = solo_reg_read(solo_dev, SOLO_VI_CH_SWITCH_2);
0263     out += sprintf(out, "Channel 12  => Input %d\n", val & 0x1f);
0264     out += sprintf(out, "Channel 13  => Input %d\n", (val >> 5) & 0x1f);
0265     out += sprintf(out, "Channel 14  => Input %d\n", (val >> 10) & 0x1f);
0266     out += sprintf(out, "Channel 15  => Input %d\n", (val >> 15) & 0x1f);
0267     out += sprintf(out, "Spot Output => Input %d\n", (val >> 20) & 0x1f);
0268 
0269     return out - buf;
0270 }
0271 
0272 static ssize_t p2m_timeout_store(struct device *dev,
0273                  struct device_attribute *attr,
0274                  const char *buf, size_t count)
0275 {
0276     struct solo_dev *solo_dev =
0277         container_of(dev, struct solo_dev, dev);
0278     unsigned long ms;
0279     int ret = kstrtoul(buf, 10, &ms);
0280 
0281     if (ret < 0 || ms > 200)
0282         return -EINVAL;
0283     solo_dev->p2m_jiffies = msecs_to_jiffies(ms);
0284 
0285     return count;
0286 }
0287 
0288 static ssize_t p2m_timeout_show(struct device *dev,
0289                 struct device_attribute *attr,
0290                 char *buf)
0291 {
0292     struct solo_dev *solo_dev =
0293         container_of(dev, struct solo_dev, dev);
0294 
0295     return sprintf(buf, "%ums\n", jiffies_to_msecs(solo_dev->p2m_jiffies));
0296 }
0297 
0298 static ssize_t intervals_show(struct device *dev,
0299                   struct device_attribute *attr,
0300                   char *buf)
0301 {
0302     struct solo_dev *solo_dev =
0303         container_of(dev, struct solo_dev, dev);
0304     char *out = buf;
0305     int fps = solo_dev->fps;
0306     int i;
0307 
0308     for (i = 0; i < solo_dev->nr_chans; i++) {
0309         out += sprintf(out, "Channel %d: %d/%d (0x%08x)\n",
0310                    i, solo_dev->v4l2_enc[i]->interval, fps,
0311                    solo_reg_read(solo_dev, SOLO_CAP_CH_INTV(i)));
0312     }
0313 
0314     return out - buf;
0315 }
0316 
0317 static ssize_t sdram_offsets_show(struct device *dev,
0318                   struct device_attribute *attr,
0319                   char *buf)
0320 {
0321     struct solo_dev *solo_dev =
0322         container_of(dev, struct solo_dev, dev);
0323     char *out = buf;
0324 
0325     out += sprintf(out, "DISP: 0x%08x @ 0x%08x\n",
0326                SOLO_DISP_EXT_ADDR,
0327                SOLO_DISP_EXT_SIZE);
0328 
0329     out += sprintf(out, "EOSD: 0x%08x @ 0x%08x (0x%08x * %d)\n",
0330                SOLO_EOSD_EXT_ADDR,
0331                SOLO_EOSD_EXT_AREA(solo_dev),
0332                SOLO_EOSD_EXT_SIZE(solo_dev),
0333                SOLO_EOSD_EXT_AREA(solo_dev) /
0334                SOLO_EOSD_EXT_SIZE(solo_dev));
0335 
0336     out += sprintf(out, "MOTI: 0x%08x @ 0x%08x\n",
0337                SOLO_MOTION_EXT_ADDR(solo_dev),
0338                SOLO_MOTION_EXT_SIZE);
0339 
0340     out += sprintf(out, "G723: 0x%08x @ 0x%08x\n",
0341                SOLO_G723_EXT_ADDR(solo_dev),
0342                SOLO_G723_EXT_SIZE);
0343 
0344     out += sprintf(out, "CAPT: 0x%08x @ 0x%08x (0x%08x * %d)\n",
0345                SOLO_CAP_EXT_ADDR(solo_dev),
0346                SOLO_CAP_EXT_SIZE(solo_dev),
0347                SOLO_CAP_PAGE_SIZE,
0348                SOLO_CAP_EXT_SIZE(solo_dev) / SOLO_CAP_PAGE_SIZE);
0349 
0350     out += sprintf(out, "EREF: 0x%08x @ 0x%08x (0x%08x * %d)\n",
0351                SOLO_EREF_EXT_ADDR(solo_dev),
0352                SOLO_EREF_EXT_AREA(solo_dev),
0353                SOLO_EREF_EXT_SIZE,
0354                SOLO_EREF_EXT_AREA(solo_dev) / SOLO_EREF_EXT_SIZE);
0355 
0356     out += sprintf(out, "MPEG: 0x%08x @ 0x%08x\n",
0357                SOLO_MP4E_EXT_ADDR(solo_dev),
0358                SOLO_MP4E_EXT_SIZE(solo_dev));
0359 
0360     out += sprintf(out, "JPEG: 0x%08x @ 0x%08x\n",
0361                SOLO_JPEG_EXT_ADDR(solo_dev),
0362                SOLO_JPEG_EXT_SIZE(solo_dev));
0363 
0364     return out - buf;
0365 }
0366 
0367 static ssize_t sdram_show(struct file *file, struct kobject *kobj,
0368               struct bin_attribute *a, char *buf,
0369               loff_t off, size_t count)
0370 {
0371     struct device *dev = kobj_to_dev(kobj);
0372     struct solo_dev *solo_dev =
0373         container_of(dev, struct solo_dev, dev);
0374     const int size = solo_dev->sdram_size;
0375 
0376     if (off >= size)
0377         return 0;
0378 
0379     if (off + count > size)
0380         count = size - off;
0381 
0382     if (solo_p2m_dma(solo_dev, 0, buf, off, count, 0, 0))
0383         return -EIO;
0384 
0385     return count;
0386 }
0387 
0388 static const struct device_attribute solo_dev_attrs[] = {
0389     __ATTR(eeprom, 0640, eeprom_show, eeprom_store),
0390     __ATTR(p2m_timeout, 0644, p2m_timeout_show, p2m_timeout_store),
0391     __ATTR_RO(p2m_timeouts),
0392     __ATTR_RO(sdram_size),
0393     __ATTR_RO(tw28xx),
0394     __ATTR_RO(input_map),
0395     __ATTR_RO(intervals),
0396     __ATTR_RO(sdram_offsets),
0397 };
0398 
0399 static void solo_device_release(struct device *dev)
0400 {
0401     /* Do nothing */
0402 }
0403 
0404 static int solo_sysfs_init(struct solo_dev *solo_dev)
0405 {
0406     struct bin_attribute *sdram_attr = &solo_dev->sdram_attr;
0407     struct device *dev = &solo_dev->dev;
0408     const char *driver;
0409     int i;
0410 
0411     if (solo_dev->type == SOLO_DEV_6110)
0412         driver = "solo6110";
0413     else
0414         driver = "solo6010";
0415 
0416     dev->release = solo_device_release;
0417     dev->parent = &solo_dev->pdev->dev;
0418     set_dev_node(dev, dev_to_node(&solo_dev->pdev->dev));
0419     dev_set_name(dev, "%s-%d-%d", driver, solo_dev->vfd->num,
0420              solo_dev->nr_chans);
0421 
0422     if (device_register(dev)) {
0423         dev->parent = NULL;
0424         return -ENOMEM;
0425     }
0426 
0427     for (i = 0; i < ARRAY_SIZE(solo_dev_attrs); i++) {
0428         if (device_create_file(dev, &solo_dev_attrs[i])) {
0429             device_unregister(dev);
0430             return -ENOMEM;
0431         }
0432     }
0433 
0434     sysfs_attr_init(&sdram_attr->attr);
0435     sdram_attr->attr.name = "sdram";
0436     sdram_attr->attr.mode = 0440;
0437     sdram_attr->read = sdram_show;
0438     sdram_attr->size = solo_dev->sdram_size;
0439 
0440     if (device_create_bin_file(dev, sdram_attr)) {
0441         device_unregister(dev);
0442         return -ENOMEM;
0443     }
0444 
0445     return 0;
0446 }
0447 
0448 static int solo_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
0449 {
0450     struct solo_dev *solo_dev;
0451     int ret;
0452     u8 chip_id;
0453 
0454     solo_dev = kzalloc(sizeof(*solo_dev), GFP_KERNEL);
0455     if (solo_dev == NULL)
0456         return -ENOMEM;
0457 
0458     if (id->driver_data == SOLO_DEV_6010)
0459         dev_info(&pdev->dev, "Probing Softlogic 6010\n");
0460     else
0461         dev_info(&pdev->dev, "Probing Softlogic 6110\n");
0462 
0463     solo_dev->type = id->driver_data;
0464     solo_dev->pdev = pdev;
0465     ret = v4l2_device_register(&pdev->dev, &solo_dev->v4l2_dev);
0466     if (ret)
0467         goto fail_probe;
0468 
0469     /* Only for during init */
0470     solo_dev->p2m_jiffies = msecs_to_jiffies(100);
0471 
0472     ret = pci_enable_device(pdev);
0473     if (ret)
0474         goto fail_probe;
0475 
0476     pci_set_master(pdev);
0477 
0478     /* RETRY/TRDY Timeout disabled */
0479     pci_write_config_byte(pdev, 0x40, 0x00);
0480     pci_write_config_byte(pdev, 0x41, 0x00);
0481 
0482     ret = pci_request_regions(pdev, SOLO6X10_NAME);
0483     if (ret)
0484         goto fail_probe;
0485 
0486     solo_dev->reg_base = pci_ioremap_bar(pdev, 0);
0487     if (solo_dev->reg_base == NULL) {
0488         ret = -ENOMEM;
0489         goto fail_probe;
0490     }
0491 
0492     chip_id = solo_reg_read(solo_dev, SOLO_CHIP_OPTION) &
0493                 SOLO_CHIP_ID_MASK;
0494     switch (chip_id) {
0495     case 7:
0496         solo_dev->nr_chans = 16;
0497         solo_dev->nr_ext = 5;
0498         break;
0499     case 6:
0500         solo_dev->nr_chans = 8;
0501         solo_dev->nr_ext = 2;
0502         break;
0503     default:
0504         dev_warn(&pdev->dev, "Invalid chip_id 0x%02x, assuming 4 ch\n",
0505              chip_id);
0506         fallthrough;
0507     case 5:
0508         solo_dev->nr_chans = 4;
0509         solo_dev->nr_ext = 1;
0510     }
0511 
0512     /* Disable all interrupts to start */
0513     solo_irq_off(solo_dev, ~0);
0514 
0515     /* Initial global settings */
0516     if (solo_dev->type == SOLO_DEV_6010) {
0517         solo_dev->clock_mhz = 108;
0518         solo_dev->sys_config = SOLO_SYS_CFG_SDRAM64BIT
0519             | SOLO_SYS_CFG_INPUTDIV(25)
0520             | SOLO_SYS_CFG_FEEDBACKDIV(solo_dev->clock_mhz * 2 - 2)
0521             | SOLO_SYS_CFG_OUTDIV(3);
0522         solo_reg_write(solo_dev, SOLO_SYS_CFG, solo_dev->sys_config);
0523     } else {
0524         u32 divq, divf;
0525 
0526         solo_dev->clock_mhz = 135;
0527 
0528         if (solo_dev->clock_mhz < 125) {
0529             divq = 3;
0530             divf = (solo_dev->clock_mhz * 4) / 3 - 1;
0531         } else {
0532             divq = 2;
0533             divf = (solo_dev->clock_mhz * 2) / 3 - 1;
0534         }
0535 
0536         solo_reg_write(solo_dev, SOLO_PLL_CONFIG,
0537                    (1 << 20) | /* PLL_RANGE */
0538                    (8 << 15) | /* PLL_DIVR  */
0539                    (divq << 12) |
0540                    (divf <<  4) |
0541                    (1 <<  1)   /* PLL_FSEN */);
0542 
0543         solo_dev->sys_config = SOLO_SYS_CFG_SDRAM64BIT;
0544     }
0545 
0546     solo_reg_write(solo_dev, SOLO_SYS_CFG, solo_dev->sys_config);
0547     solo_reg_write(solo_dev, SOLO_TIMER_CLOCK_NUM,
0548                solo_dev->clock_mhz - 1);
0549 
0550     /* PLL locking time of 1ms */
0551     mdelay(1);
0552 
0553     ret = request_irq(pdev->irq, solo_isr, IRQF_SHARED, SOLO6X10_NAME,
0554               solo_dev);
0555     if (ret)
0556         goto fail_probe;
0557 
0558     /* Handle this from the start */
0559     solo_irq_on(solo_dev, SOLO_IRQ_PCI_ERR);
0560 
0561     ret = solo_i2c_init(solo_dev);
0562     if (ret)
0563         goto fail_probe;
0564 
0565     /* Setup the DMA engine */
0566     solo_reg_write(solo_dev, SOLO_DMA_CTRL,
0567                SOLO_DMA_CTRL_REFRESH_CYCLE(1) |
0568                SOLO_DMA_CTRL_SDRAM_SIZE(2) |
0569                SOLO_DMA_CTRL_SDRAM_CLK_INVERT |
0570                SOLO_DMA_CTRL_READ_CLK_SELECT |
0571                SOLO_DMA_CTRL_LATENCY(1));
0572 
0573     /* Undocumented crap */
0574     solo_reg_write(solo_dev, SOLO_DMA_CTRL1,
0575                solo_dev->type == SOLO_DEV_6010 ? 0x100 : 0x300);
0576 
0577     if (solo_dev->type != SOLO_DEV_6010) {
0578         solo_dev->usec_lsb = 0x3f;
0579         solo_set_time(solo_dev);
0580     }
0581 
0582     /* Disable watchdog */
0583     solo_reg_write(solo_dev, SOLO_WATCHDOG, 0);
0584 
0585     /* Initialize sub components */
0586 
0587     ret = solo_p2m_init(solo_dev);
0588     if (ret)
0589         goto fail_probe;
0590 
0591     ret = solo_disp_init(solo_dev);
0592     if (ret)
0593         goto fail_probe;
0594 
0595     ret = solo_gpio_init(solo_dev);
0596     if (ret)
0597         goto fail_probe;
0598 
0599     ret = solo_tw28_init(solo_dev);
0600     if (ret)
0601         goto fail_probe;
0602 
0603     ret = solo_v4l2_init(solo_dev, video_nr);
0604     if (ret)
0605         goto fail_probe;
0606 
0607     ret = solo_enc_init(solo_dev);
0608     if (ret)
0609         goto fail_probe;
0610 
0611     ret = solo_enc_v4l2_init(solo_dev, video_nr);
0612     if (ret)
0613         goto fail_probe;
0614 
0615     ret = solo_g723_init(solo_dev);
0616     if (ret)
0617         goto fail_probe;
0618 
0619     ret = solo_sysfs_init(solo_dev);
0620     if (ret)
0621         goto fail_probe;
0622 
0623     /* Now that init is over, set this lower */
0624     solo_dev->p2m_jiffies = msecs_to_jiffies(20);
0625 
0626     return 0;
0627 
0628 fail_probe:
0629     free_solo_dev(solo_dev);
0630     return ret;
0631 }
0632 
0633 static void solo_pci_remove(struct pci_dev *pdev)
0634 {
0635     struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev);
0636     struct solo_dev *solo_dev = container_of(v4l2_dev, struct solo_dev, v4l2_dev);
0637 
0638     free_solo_dev(solo_dev);
0639 }
0640 
0641 static const struct pci_device_id solo_id_table[] = {
0642     /* 6010 based cards */
0643     { PCI_DEVICE(PCI_VENDOR_ID_SOFTLOGIC, PCI_DEVICE_ID_SOLO6010),
0644       .driver_data = SOLO_DEV_6010 },
0645     { PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_NEUSOLO_4),
0646       .driver_data = SOLO_DEV_6010 },
0647     { PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_NEUSOLO_9),
0648       .driver_data = SOLO_DEV_6010 },
0649     { PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_NEUSOLO_16),
0650       .driver_data = SOLO_DEV_6010 },
0651     { PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_BC_SOLO_4),
0652       .driver_data = SOLO_DEV_6010 },
0653     { PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_BC_SOLO_9),
0654       .driver_data = SOLO_DEV_6010 },
0655     { PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_BC_SOLO_16),
0656       .driver_data = SOLO_DEV_6010 },
0657     /* 6110 based cards */
0658     { PCI_DEVICE(PCI_VENDOR_ID_SOFTLOGIC, PCI_DEVICE_ID_SOLO6110),
0659       .driver_data = SOLO_DEV_6110 },
0660     { PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_BC_6110_4),
0661       .driver_data = SOLO_DEV_6110 },
0662     { PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_BC_6110_8),
0663       .driver_data = SOLO_DEV_6110 },
0664     { PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_BC_6110_16),
0665       .driver_data = SOLO_DEV_6110 },
0666     {0,}
0667 };
0668 
0669 MODULE_DEVICE_TABLE(pci, solo_id_table);
0670 
0671 static struct pci_driver solo_pci_driver = {
0672     .name = SOLO6X10_NAME,
0673     .id_table = solo_id_table,
0674     .probe = solo_pci_probe,
0675     .remove = solo_pci_remove,
0676 };
0677 
0678 module_pci_driver(solo_pci_driver);
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