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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *  Driver for the NXP SAA7164 PCIe bridge
0004  *
0005  *  Copyright (c) 2010-2015 Steven Toth <stoth@kernellabs.com>
0006  */
0007 
0008 #include <linux/init.h>
0009 #include <linux/list.h>
0010 #include <linux/module.h>
0011 #include <linux/moduleparam.h>
0012 #include <linux/kmod.h>
0013 #include <linux/kernel.h>
0014 #include <linux/slab.h>
0015 #include <linux/interrupt.h>
0016 #include <linux/debugfs.h>
0017 #include <linux/delay.h>
0018 #include <asm/div64.h>
0019 
0020 #include "saa7164.h"
0021 
0022 MODULE_DESCRIPTION("Driver for NXP SAA7164 based TV cards");
0023 MODULE_AUTHOR("Steven Toth <stoth@kernellabs.com>");
0024 MODULE_LICENSE("GPL");
0025 
0026 /*
0027  *  1 Basic
0028  *  2
0029  *  4 i2c
0030  *  8 api
0031  * 16 cmd
0032  * 32 bus
0033  */
0034 
0035 unsigned int saa_debug;
0036 module_param_named(debug, saa_debug, int, 0644);
0037 MODULE_PARM_DESC(debug, "enable debug messages");
0038 
0039 static unsigned int fw_debug;
0040 module_param(fw_debug, int, 0644);
0041 MODULE_PARM_DESC(fw_debug, "Firmware debug level def:2");
0042 
0043 unsigned int encoder_buffers = SAA7164_MAX_ENCODER_BUFFERS;
0044 module_param(encoder_buffers, int, 0644);
0045 MODULE_PARM_DESC(encoder_buffers, "Total buffers in read queue 16-512 def:64");
0046 
0047 unsigned int vbi_buffers = SAA7164_MAX_VBI_BUFFERS;
0048 module_param(vbi_buffers, int, 0644);
0049 MODULE_PARM_DESC(vbi_buffers, "Total buffers in read queue 16-512 def:64");
0050 
0051 unsigned int waitsecs = 10;
0052 module_param(waitsecs, int, 0644);
0053 MODULE_PARM_DESC(waitsecs, "timeout on firmware messages");
0054 
0055 static unsigned int card[]  = {[0 ... (SAA7164_MAXBOARDS - 1)] = UNSET };
0056 module_param_array(card,  int, NULL, 0444);
0057 MODULE_PARM_DESC(card, "card type");
0058 
0059 static unsigned int print_histogram = 64;
0060 module_param(print_histogram, int, 0644);
0061 MODULE_PARM_DESC(print_histogram, "print histogram values once");
0062 
0063 unsigned int crc_checking = 1;
0064 module_param(crc_checking, int, 0644);
0065 MODULE_PARM_DESC(crc_checking, "enable crc sanity checking on buffers");
0066 
0067 static unsigned int guard_checking = 1;
0068 module_param(guard_checking, int, 0644);
0069 MODULE_PARM_DESC(guard_checking,
0070     "enable dma sanity checking for buffer overruns");
0071 
0072 static bool enable_msi = true;
0073 module_param(enable_msi, bool, 0444);
0074 MODULE_PARM_DESC(enable_msi,
0075         "enable the use of an msi interrupt if available");
0076 
0077 static unsigned int saa7164_devcount;
0078 
0079 static DEFINE_MUTEX(devlist);
0080 LIST_HEAD(saa7164_devlist);
0081 
0082 #define INT_SIZE 16
0083 
0084 static void saa7164_pack_verifier(struct saa7164_buffer *buf)
0085 {
0086     u8 *p = (u8 *)buf->cpu;
0087     int i;
0088 
0089     for (i = 0; i < buf->actual_size; i += 2048) {
0090 
0091         if ((*(p + i + 0) != 0x00) || (*(p + i + 1) != 0x00) ||
0092             (*(p + i + 2) != 0x01) || (*(p + i + 3) != 0xBA)) {
0093             printk(KERN_ERR "No pack at 0x%x\n", i);
0094 #if 0
0095             print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
0096                        p + 1, 32, false);
0097 #endif
0098         }
0099     }
0100 }
0101 
0102 #define FIXED_VIDEO_PID 0xf1
0103 #define FIXED_AUDIO_PID 0xf2
0104 
0105 static void saa7164_ts_verifier(struct saa7164_buffer *buf)
0106 {
0107     struct saa7164_port *port = buf->port;
0108     u32 i;
0109     u8 cc, a;
0110     u16 pid;
0111     u8 *bufcpu = (u8 *)buf->cpu;
0112 
0113     port->sync_errors = 0;
0114     port->v_cc_errors = 0;
0115     port->a_cc_errors = 0;
0116 
0117     for (i = 0; i < buf->actual_size; i += 188) {
0118         if (*(bufcpu + i) != 0x47)
0119             port->sync_errors++;
0120 
0121         /* TODO: Query pid lower 8 bits, ignoring upper bits intensionally */
0122         pid = ((*(bufcpu + i + 1) & 0x1f) << 8) | *(bufcpu + i + 2);
0123         cc = *(bufcpu + i + 3) & 0x0f;
0124 
0125         if (pid == FIXED_VIDEO_PID) {
0126             a = ((port->last_v_cc + 1) & 0x0f);
0127             if (a != cc) {
0128                 printk(KERN_ERR "video cc last = %x current = %x i = %d\n",
0129                     port->last_v_cc, cc, i);
0130                 port->v_cc_errors++;
0131             }
0132 
0133             port->last_v_cc = cc;
0134         } else
0135         if (pid == FIXED_AUDIO_PID) {
0136             a = ((port->last_a_cc + 1) & 0x0f);
0137             if (a != cc) {
0138                 printk(KERN_ERR "audio cc last = %x current = %x i = %d\n",
0139                     port->last_a_cc, cc, i);
0140                 port->a_cc_errors++;
0141             }
0142 
0143             port->last_a_cc = cc;
0144         }
0145 
0146     }
0147 
0148     /* Only report errors if we've been through this function at least
0149      * once already and the cached cc values are primed. First time through
0150      * always generates errors.
0151      */
0152     if (port->v_cc_errors && (port->done_first_interrupt > 1))
0153         printk(KERN_ERR "video pid cc, %d errors\n", port->v_cc_errors);
0154 
0155     if (port->a_cc_errors && (port->done_first_interrupt > 1))
0156         printk(KERN_ERR "audio pid cc, %d errors\n", port->a_cc_errors);
0157 
0158     if (port->sync_errors && (port->done_first_interrupt > 1))
0159         printk(KERN_ERR "sync_errors = %d\n", port->sync_errors);
0160 
0161     if (port->done_first_interrupt == 1)
0162         port->done_first_interrupt++;
0163 }
0164 
0165 static void saa7164_histogram_reset(struct saa7164_histogram *hg, char *name)
0166 {
0167     int i;
0168 
0169     memset(hg, 0, sizeof(struct saa7164_histogram));
0170     strscpy(hg->name, name, sizeof(hg->name));
0171 
0172     /* First 30ms x 1ms */
0173     for (i = 0; i < 30; i++)
0174         hg->counter1[0 + i].val = i;
0175 
0176     /* 30 - 200ms x 10ms  */
0177     for (i = 0; i < 18; i++)
0178         hg->counter1[30 + i].val = 30 + (i * 10);
0179 
0180     /* 200 - 2000ms x 100ms  */
0181     for (i = 0; i < 15; i++)
0182         hg->counter1[48 + i].val = 200 + (i * 200);
0183 
0184     /* Catch all massive value (2secs) */
0185     hg->counter1[55].val = 2000;
0186 
0187     /* Catch all massive value (4secs) */
0188     hg->counter1[56].val = 4000;
0189 
0190     /* Catch all massive value (8secs) */
0191     hg->counter1[57].val = 8000;
0192 
0193     /* Catch all massive value (15secs) */
0194     hg->counter1[58].val = 15000;
0195 
0196     /* Catch all massive value (30secs) */
0197     hg->counter1[59].val = 30000;
0198 
0199     /* Catch all massive value (60secs) */
0200     hg->counter1[60].val = 60000;
0201 
0202     /* Catch all massive value (5mins) */
0203     hg->counter1[61].val = 300000;
0204 
0205     /* Catch all massive value (15mins) */
0206     hg->counter1[62].val = 900000;
0207 
0208     /* Catch all massive values (1hr) */
0209     hg->counter1[63].val = 3600000;
0210 }
0211 
0212 void saa7164_histogram_update(struct saa7164_histogram *hg, u32 val)
0213 {
0214     int i;
0215     for (i = 0; i < 64; i++) {
0216         if (val <= hg->counter1[i].val) {
0217             hg->counter1[i].count++;
0218             hg->counter1[i].update_time = jiffies;
0219             break;
0220         }
0221     }
0222 }
0223 
0224 static void saa7164_histogram_print(struct saa7164_port *port,
0225     struct saa7164_histogram *hg)
0226 {
0227     u32 entries = 0;
0228     int i;
0229 
0230     printk(KERN_ERR "Histogram named %s (ms, count, last_update_jiffy)\n", hg->name);
0231     for (i = 0; i < 64; i++) {
0232         if (hg->counter1[i].count == 0)
0233             continue;
0234 
0235         printk(KERN_ERR " %4d %12d %Ld\n",
0236             hg->counter1[i].val,
0237             hg->counter1[i].count,
0238             hg->counter1[i].update_time);
0239 
0240         entries++;
0241     }
0242     printk(KERN_ERR "Total: %d\n", entries);
0243 }
0244 
0245 static void saa7164_work_enchandler_helper(struct saa7164_port *port, int bufnr)
0246 {
0247     struct saa7164_dev *dev = port->dev;
0248     struct saa7164_buffer *buf = NULL;
0249     struct saa7164_user_buffer *ubuf = NULL;
0250     struct list_head *c, *n;
0251     int i = 0;
0252     u8 *p;
0253 
0254     mutex_lock(&port->dmaqueue_lock);
0255     list_for_each_safe(c, n, &port->dmaqueue.list) {
0256 
0257         buf = list_entry(c, struct saa7164_buffer, list);
0258         if (i++ > port->hwcfg.buffercount) {
0259             printk(KERN_ERR "%s() illegal i count %d\n",
0260                 __func__, i);
0261             break;
0262         }
0263 
0264         if (buf->idx == bufnr) {
0265 
0266             /* Found the buffer, deal with it */
0267             dprintk(DBGLVL_IRQ, "%s() bufnr: %d\n", __func__, bufnr);
0268 
0269             if (crc_checking) {
0270                 /* Throw a new checksum on the dma buffer */
0271                 buf->crc = crc32(0, buf->cpu, buf->actual_size);
0272             }
0273 
0274             if (guard_checking) {
0275                 p = (u8 *)buf->cpu;
0276                 if ((*(p + buf->actual_size + 0) != 0xff) ||
0277                     (*(p + buf->actual_size + 1) != 0xff) ||
0278                     (*(p + buf->actual_size + 2) != 0xff) ||
0279                     (*(p + buf->actual_size + 3) != 0xff) ||
0280                     (*(p + buf->actual_size + 0x10) != 0xff) ||
0281                     (*(p + buf->actual_size + 0x11) != 0xff) ||
0282                     (*(p + buf->actual_size + 0x12) != 0xff) ||
0283                     (*(p + buf->actual_size + 0x13) != 0xff)) {
0284                         printk(KERN_ERR "%s() buf %p guard buffer breach\n",
0285                             __func__, buf);
0286 #if 0
0287             print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
0288                        p + buf->actual_size - 32, 64, false);
0289 #endif
0290                 }
0291             }
0292 
0293             if ((port->nr != SAA7164_PORT_VBI1) && (port->nr != SAA7164_PORT_VBI2)) {
0294                 /* Validate the incoming buffer content */
0295                 if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_TS)
0296                     saa7164_ts_verifier(buf);
0297                 else if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_PS)
0298                     saa7164_pack_verifier(buf);
0299             }
0300 
0301             /* find a free user buffer and clone to it */
0302             if (!list_empty(&port->list_buf_free.list)) {
0303 
0304                 /* Pull the first buffer from the used list */
0305                 ubuf = list_first_entry(&port->list_buf_free.list,
0306                     struct saa7164_user_buffer, list);
0307 
0308                 if (buf->actual_size <= ubuf->actual_size) {
0309 
0310                     memcpy(ubuf->data, buf->cpu, ubuf->actual_size);
0311 
0312                     if (crc_checking) {
0313                         /* Throw a new checksum on the read buffer */
0314                         ubuf->crc = crc32(0, ubuf->data, ubuf->actual_size);
0315                     }
0316 
0317                     /* Requeue the buffer on the free list */
0318                     ubuf->pos = 0;
0319 
0320                     list_move_tail(&ubuf->list,
0321                         &port->list_buf_used.list);
0322 
0323                     /* Flag any userland waiters */
0324                     wake_up_interruptible(&port->wait_read);
0325 
0326                 } else {
0327                     printk(KERN_ERR "buf %p bufsize fails match\n", buf);
0328                 }
0329 
0330             } else
0331                 printk(KERN_ERR "encirq no free buffers, increase param encoder_buffers\n");
0332 
0333             /* Ensure offset into buffer remains 0, fill buffer
0334              * with known bad data. We check for this data at a later point
0335              * in time. */
0336             saa7164_buffer_zero_offsets(port, bufnr);
0337             memset(buf->cpu, 0xff, buf->pci_size);
0338             if (crc_checking) {
0339                 /* Throw yet aanother new checksum on the dma buffer */
0340                 buf->crc = crc32(0, buf->cpu, buf->actual_size);
0341             }
0342 
0343             break;
0344         }
0345     }
0346     mutex_unlock(&port->dmaqueue_lock);
0347 }
0348 
0349 static void saa7164_work_enchandler(struct work_struct *w)
0350 {
0351     struct saa7164_port *port =
0352         container_of(w, struct saa7164_port, workenc);
0353     struct saa7164_dev *dev = port->dev;
0354 
0355     u32 wp, mcb, rp, cnt = 0;
0356 
0357     port->last_svc_msecs_diff = port->last_svc_msecs;
0358     port->last_svc_msecs = jiffies_to_msecs(jiffies);
0359 
0360     port->last_svc_msecs_diff = port->last_svc_msecs -
0361         port->last_svc_msecs_diff;
0362 
0363     saa7164_histogram_update(&port->svc_interval,
0364         port->last_svc_msecs_diff);
0365 
0366     port->last_irq_svc_msecs_diff = port->last_svc_msecs -
0367         port->last_irq_msecs;
0368 
0369     saa7164_histogram_update(&port->irq_svc_interval,
0370         port->last_irq_svc_msecs_diff);
0371 
0372     dprintk(DBGLVL_IRQ,
0373         "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
0374         __func__,
0375         port->last_svc_msecs_diff,
0376         port->last_irq_svc_msecs_diff,
0377         port->last_svc_wp,
0378         port->last_svc_rp
0379         );
0380 
0381     /* Current write position */
0382     wp = saa7164_readl(port->bufcounter);
0383     if (wp > (port->hwcfg.buffercount - 1)) {
0384         printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
0385         return;
0386     }
0387 
0388     /* Most current complete buffer */
0389     if (wp == 0)
0390         mcb = (port->hwcfg.buffercount - 1);
0391     else
0392         mcb = wp - 1;
0393 
0394     while (1) {
0395         if (port->done_first_interrupt == 0) {
0396             port->done_first_interrupt++;
0397             rp = mcb;
0398         } else
0399             rp = (port->last_svc_rp + 1) % 8;
0400 
0401         if (rp > (port->hwcfg.buffercount - 1)) {
0402             printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
0403             break;
0404         }
0405 
0406         saa7164_work_enchandler_helper(port, rp);
0407         port->last_svc_rp = rp;
0408         cnt++;
0409 
0410         if (rp == mcb)
0411             break;
0412     }
0413 
0414     /* TODO: Convert this into a /proc/saa7164 style readable file */
0415     if (print_histogram == port->nr) {
0416         saa7164_histogram_print(port, &port->irq_interval);
0417         saa7164_histogram_print(port, &port->svc_interval);
0418         saa7164_histogram_print(port, &port->irq_svc_interval);
0419         saa7164_histogram_print(port, &port->read_interval);
0420         saa7164_histogram_print(port, &port->poll_interval);
0421         /* TODO: fix this to preserve any previous state */
0422         print_histogram = 64 + port->nr;
0423     }
0424 }
0425 
0426 static void saa7164_work_vbihandler(struct work_struct *w)
0427 {
0428     struct saa7164_port *port =
0429         container_of(w, struct saa7164_port, workenc);
0430     struct saa7164_dev *dev = port->dev;
0431 
0432     u32 wp, mcb, rp, cnt = 0;
0433 
0434     port->last_svc_msecs_diff = port->last_svc_msecs;
0435     port->last_svc_msecs = jiffies_to_msecs(jiffies);
0436     port->last_svc_msecs_diff = port->last_svc_msecs -
0437         port->last_svc_msecs_diff;
0438 
0439     saa7164_histogram_update(&port->svc_interval,
0440         port->last_svc_msecs_diff);
0441 
0442     port->last_irq_svc_msecs_diff = port->last_svc_msecs -
0443         port->last_irq_msecs;
0444 
0445     saa7164_histogram_update(&port->irq_svc_interval,
0446         port->last_irq_svc_msecs_diff);
0447 
0448     dprintk(DBGLVL_IRQ,
0449         "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
0450         __func__,
0451         port->last_svc_msecs_diff,
0452         port->last_irq_svc_msecs_diff,
0453         port->last_svc_wp,
0454         port->last_svc_rp
0455         );
0456 
0457     /* Current write position */
0458     wp = saa7164_readl(port->bufcounter);
0459     if (wp > (port->hwcfg.buffercount - 1)) {
0460         printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
0461         return;
0462     }
0463 
0464     /* Most current complete buffer */
0465     if (wp == 0)
0466         mcb = (port->hwcfg.buffercount - 1);
0467     else
0468         mcb = wp - 1;
0469 
0470     while (1) {
0471         if (port->done_first_interrupt == 0) {
0472             port->done_first_interrupt++;
0473             rp = mcb;
0474         } else
0475             rp = (port->last_svc_rp + 1) % 8;
0476 
0477         if (rp > (port->hwcfg.buffercount - 1)) {
0478             printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
0479             break;
0480         }
0481 
0482         saa7164_work_enchandler_helper(port, rp);
0483         port->last_svc_rp = rp;
0484         cnt++;
0485 
0486         if (rp == mcb)
0487             break;
0488     }
0489 
0490     /* TODO: Convert this into a /proc/saa7164 style readable file */
0491     if (print_histogram == port->nr) {
0492         saa7164_histogram_print(port, &port->irq_interval);
0493         saa7164_histogram_print(port, &port->svc_interval);
0494         saa7164_histogram_print(port, &port->irq_svc_interval);
0495         saa7164_histogram_print(port, &port->read_interval);
0496         saa7164_histogram_print(port, &port->poll_interval);
0497         /* TODO: fix this to preserve any previous state */
0498         print_histogram = 64 + port->nr;
0499     }
0500 }
0501 
0502 static void saa7164_work_cmdhandler(struct work_struct *w)
0503 {
0504     struct saa7164_dev *dev = container_of(w, struct saa7164_dev, workcmd);
0505 
0506     /* Wake up any complete commands */
0507     saa7164_irq_dequeue(dev);
0508 }
0509 
0510 static void saa7164_buffer_deliver(struct saa7164_buffer *buf)
0511 {
0512     struct saa7164_port *port = buf->port;
0513 
0514     /* Feed the transport payload into the kernel demux */
0515     dvb_dmx_swfilter_packets(&port->dvb.demux, (u8 *)buf->cpu,
0516         SAA7164_TS_NUMBER_OF_LINES);
0517 
0518 }
0519 
0520 static irqreturn_t saa7164_irq_vbi(struct saa7164_port *port)
0521 {
0522     struct saa7164_dev *dev = port->dev;
0523 
0524     /* Store old time */
0525     port->last_irq_msecs_diff = port->last_irq_msecs;
0526 
0527     /* Collect new stats */
0528     port->last_irq_msecs = jiffies_to_msecs(jiffies);
0529 
0530     /* Calculate stats */
0531     port->last_irq_msecs_diff = port->last_irq_msecs -
0532         port->last_irq_msecs_diff;
0533 
0534     saa7164_histogram_update(&port->irq_interval,
0535         port->last_irq_msecs_diff);
0536 
0537     dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
0538         port->last_irq_msecs_diff);
0539 
0540     /* Tis calls the vbi irq handler */
0541     schedule_work(&port->workenc);
0542     return 0;
0543 }
0544 
0545 static irqreturn_t saa7164_irq_encoder(struct saa7164_port *port)
0546 {
0547     struct saa7164_dev *dev = port->dev;
0548 
0549     /* Store old time */
0550     port->last_irq_msecs_diff = port->last_irq_msecs;
0551 
0552     /* Collect new stats */
0553     port->last_irq_msecs = jiffies_to_msecs(jiffies);
0554 
0555     /* Calculate stats */
0556     port->last_irq_msecs_diff = port->last_irq_msecs -
0557         port->last_irq_msecs_diff;
0558 
0559     saa7164_histogram_update(&port->irq_interval,
0560         port->last_irq_msecs_diff);
0561 
0562     dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
0563         port->last_irq_msecs_diff);
0564 
0565     schedule_work(&port->workenc);
0566     return 0;
0567 }
0568 
0569 static irqreturn_t saa7164_irq_ts(struct saa7164_port *port)
0570 {
0571     struct saa7164_dev *dev = port->dev;
0572     struct saa7164_buffer *buf;
0573     struct list_head *c, *n;
0574     int wp, i = 0, rp;
0575 
0576     /* Find the current write point from the hardware */
0577     wp = saa7164_readl(port->bufcounter);
0578 
0579     BUG_ON(wp > (port->hwcfg.buffercount - 1));
0580 
0581     /* Find the previous buffer to the current write point */
0582     if (wp == 0)
0583         rp = (port->hwcfg.buffercount - 1);
0584     else
0585         rp = wp - 1;
0586 
0587     /* Lookup the WP in the buffer list */
0588     /* TODO: turn this into a worker thread */
0589     list_for_each_safe(c, n, &port->dmaqueue.list) {
0590         buf = list_entry(c, struct saa7164_buffer, list);
0591         BUG_ON(i > port->hwcfg.buffercount);
0592         i++;
0593 
0594         if (buf->idx == rp) {
0595             /* Found the buffer, deal with it */
0596             dprintk(DBGLVL_IRQ, "%s() wp: %d processing: %d\n",
0597                 __func__, wp, rp);
0598             saa7164_buffer_deliver(buf);
0599             break;
0600         }
0601 
0602     }
0603     return 0;
0604 }
0605 
0606 /* Primary IRQ handler and dispatch mechanism */
0607 static irqreturn_t saa7164_irq(int irq, void *dev_id)
0608 {
0609     struct saa7164_dev *dev = dev_id;
0610     struct saa7164_port *porta, *portb, *portc, *portd, *porte, *portf;
0611 
0612     u32 intid, intstat[INT_SIZE/4];
0613     int i, handled = 0, bit;
0614 
0615     if (dev == NULL) {
0616         printk(KERN_ERR "%s() No device specified\n", __func__);
0617         handled = 0;
0618         goto out;
0619     }
0620 
0621     porta = &dev->ports[SAA7164_PORT_TS1];
0622     portb = &dev->ports[SAA7164_PORT_TS2];
0623     portc = &dev->ports[SAA7164_PORT_ENC1];
0624     portd = &dev->ports[SAA7164_PORT_ENC2];
0625     porte = &dev->ports[SAA7164_PORT_VBI1];
0626     portf = &dev->ports[SAA7164_PORT_VBI2];
0627 
0628     /* Check that the hardware is accessible. If the status bytes are
0629      * 0xFF then the device is not accessible, the the IRQ belongs
0630      * to another driver.
0631      * 4 x u32 interrupt registers.
0632      */
0633     for (i = 0; i < INT_SIZE/4; i++) {
0634 
0635         /* TODO: Convert into saa7164_readl() */
0636         /* Read the 4 hardware interrupt registers */
0637         intstat[i] = saa7164_readl(dev->int_status + (i * 4));
0638 
0639         if (intstat[i])
0640             handled = 1;
0641     }
0642     if (handled == 0)
0643         goto out;
0644 
0645     /* For each of the HW interrupt registers */
0646     for (i = 0; i < INT_SIZE/4; i++) {
0647 
0648         if (intstat[i]) {
0649             /* Each function of the board has it's own interruptid.
0650              * Find the function that triggered then call
0651              * it's handler.
0652              */
0653             for (bit = 0; bit < 32; bit++) {
0654 
0655                 if (((intstat[i] >> bit) & 0x00000001) == 0)
0656                     continue;
0657 
0658                 /* Calculate the interrupt id (0x00 to 0x7f) */
0659 
0660                 intid = (i * 32) + bit;
0661                 if (intid == dev->intfdesc.bInterruptId) {
0662                     /* A response to an cmd/api call */
0663                     schedule_work(&dev->workcmd);
0664                 } else if (intid == porta->hwcfg.interruptid) {
0665 
0666                     /* Transport path 1 */
0667                     saa7164_irq_ts(porta);
0668 
0669                 } else if (intid == portb->hwcfg.interruptid) {
0670 
0671                     /* Transport path 2 */
0672                     saa7164_irq_ts(portb);
0673 
0674                 } else if (intid == portc->hwcfg.interruptid) {
0675 
0676                     /* Encoder path 1 */
0677                     saa7164_irq_encoder(portc);
0678 
0679                 } else if (intid == portd->hwcfg.interruptid) {
0680 
0681                     /* Encoder path 2 */
0682                     saa7164_irq_encoder(portd);
0683 
0684                 } else if (intid == porte->hwcfg.interruptid) {
0685 
0686                     /* VBI path 1 */
0687                     saa7164_irq_vbi(porte);
0688 
0689                 } else if (intid == portf->hwcfg.interruptid) {
0690 
0691                     /* VBI path 2 */
0692                     saa7164_irq_vbi(portf);
0693 
0694                 } else {
0695                     /* Find the function */
0696                     dprintk(DBGLVL_IRQ,
0697                         "%s() unhandled interrupt reg 0x%x bit 0x%x intid = 0x%x\n",
0698                         __func__, i, bit, intid);
0699                 }
0700             }
0701 
0702             /* Ack it */
0703             saa7164_writel(dev->int_ack + (i * 4), intstat[i]);
0704 
0705         }
0706     }
0707 out:
0708     return IRQ_RETVAL(handled);
0709 }
0710 
0711 void saa7164_getfirmwarestatus(struct saa7164_dev *dev)
0712 {
0713     struct saa7164_fw_status *s = &dev->fw_status;
0714 
0715     dev->fw_status.status = saa7164_readl(SAA_DEVICE_SYSINIT_STATUS);
0716     dev->fw_status.mode = saa7164_readl(SAA_DEVICE_SYSINIT_MODE);
0717     dev->fw_status.spec = saa7164_readl(SAA_DEVICE_SYSINIT_SPEC);
0718     dev->fw_status.inst = saa7164_readl(SAA_DEVICE_SYSINIT_INST);
0719     dev->fw_status.cpuload = saa7164_readl(SAA_DEVICE_SYSINIT_CPULOAD);
0720     dev->fw_status.remainheap =
0721         saa7164_readl(SAA_DEVICE_SYSINIT_REMAINHEAP);
0722 
0723     dprintk(1, "Firmware status:\n");
0724     dprintk(1, " .status     = 0x%08x\n", s->status);
0725     dprintk(1, " .mode       = 0x%08x\n", s->mode);
0726     dprintk(1, " .spec       = 0x%08x\n", s->spec);
0727     dprintk(1, " .inst       = 0x%08x\n", s->inst);
0728     dprintk(1, " .cpuload    = 0x%08x\n", s->cpuload);
0729     dprintk(1, " .remainheap = 0x%08x\n", s->remainheap);
0730 }
0731 
0732 u32 saa7164_getcurrentfirmwareversion(struct saa7164_dev *dev)
0733 {
0734     u32 reg;
0735 
0736     reg = saa7164_readl(SAA_DEVICE_VERSION);
0737     dprintk(1, "Device running firmware version %d.%d.%d.%d (0x%x)\n",
0738         (reg & 0x0000fc00) >> 10,
0739         (reg & 0x000003e0) >> 5,
0740         (reg & 0x0000001f),
0741         (reg & 0xffff0000) >> 16,
0742         reg);
0743 
0744     return reg;
0745 }
0746 
0747 /* TODO: Debugging func, remove */
0748 void saa7164_dumpregs(struct saa7164_dev *dev, u32 addr)
0749 {
0750     int i;
0751 
0752     dprintk(1, "--------------------> 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
0753 
0754     for (i = 0; i < 0x100; i += 16)
0755         dprintk(1, "region0[0x%08x] = %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
0756             i,
0757             (u8)saa7164_readb(addr + i + 0),
0758             (u8)saa7164_readb(addr + i + 1),
0759             (u8)saa7164_readb(addr + i + 2),
0760             (u8)saa7164_readb(addr + i + 3),
0761             (u8)saa7164_readb(addr + i + 4),
0762             (u8)saa7164_readb(addr + i + 5),
0763             (u8)saa7164_readb(addr + i + 6),
0764             (u8)saa7164_readb(addr + i + 7),
0765             (u8)saa7164_readb(addr + i + 8),
0766             (u8)saa7164_readb(addr + i + 9),
0767             (u8)saa7164_readb(addr + i + 10),
0768             (u8)saa7164_readb(addr + i + 11),
0769             (u8)saa7164_readb(addr + i + 12),
0770             (u8)saa7164_readb(addr + i + 13),
0771             (u8)saa7164_readb(addr + i + 14),
0772             (u8)saa7164_readb(addr + i + 15)
0773             );
0774 }
0775 
0776 static void saa7164_dump_hwdesc(struct saa7164_dev *dev)
0777 {
0778     dprintk(1, "@0x%p hwdesc sizeof(struct tmComResHWDescr) = %d bytes\n",
0779         &dev->hwdesc, (u32)sizeof(struct tmComResHWDescr));
0780 
0781     dprintk(1, " .bLength = 0x%x\n", dev->hwdesc.bLength);
0782     dprintk(1, " .bDescriptorType = 0x%x\n", dev->hwdesc.bDescriptorType);
0783     dprintk(1, " .bDescriptorSubtype = 0x%x\n",
0784         dev->hwdesc.bDescriptorSubtype);
0785 
0786     dprintk(1, " .bcdSpecVersion = 0x%x\n", dev->hwdesc.bcdSpecVersion);
0787     dprintk(1, " .dwClockFrequency = 0x%x\n", dev->hwdesc.dwClockFrequency);
0788     dprintk(1, " .dwClockUpdateRes = 0x%x\n", dev->hwdesc.dwClockUpdateRes);
0789     dprintk(1, " .bCapabilities = 0x%x\n", dev->hwdesc.bCapabilities);
0790     dprintk(1, " .dwDeviceRegistersLocation = 0x%x\n",
0791         dev->hwdesc.dwDeviceRegistersLocation);
0792 
0793     dprintk(1, " .dwHostMemoryRegion = 0x%x\n",
0794         dev->hwdesc.dwHostMemoryRegion);
0795 
0796     dprintk(1, " .dwHostMemoryRegionSize = 0x%x\n",
0797         dev->hwdesc.dwHostMemoryRegionSize);
0798 
0799     dprintk(1, " .dwHostHibernatMemRegion = 0x%x\n",
0800         dev->hwdesc.dwHostHibernatMemRegion);
0801 
0802     dprintk(1, " .dwHostHibernatMemRegionSize = 0x%x\n",
0803         dev->hwdesc.dwHostHibernatMemRegionSize);
0804 }
0805 
0806 static void saa7164_dump_intfdesc(struct saa7164_dev *dev)
0807 {
0808     dprintk(1, "@0x%p intfdesc sizeof(struct tmComResInterfaceDescr) = %d bytes\n",
0809         &dev->intfdesc, (u32)sizeof(struct tmComResInterfaceDescr));
0810 
0811     dprintk(1, " .bLength = 0x%x\n", dev->intfdesc.bLength);
0812     dprintk(1, " .bDescriptorType = 0x%x\n", dev->intfdesc.bDescriptorType);
0813     dprintk(1, " .bDescriptorSubtype = 0x%x\n",
0814         dev->intfdesc.bDescriptorSubtype);
0815 
0816     dprintk(1, " .bFlags = 0x%x\n", dev->intfdesc.bFlags);
0817     dprintk(1, " .bInterfaceType = 0x%x\n", dev->intfdesc.bInterfaceType);
0818     dprintk(1, " .bInterfaceId = 0x%x\n", dev->intfdesc.bInterfaceId);
0819     dprintk(1, " .bBaseInterface = 0x%x\n", dev->intfdesc.bBaseInterface);
0820     dprintk(1, " .bInterruptId = 0x%x\n", dev->intfdesc.bInterruptId);
0821     dprintk(1, " .bDebugInterruptId = 0x%x\n",
0822         dev->intfdesc.bDebugInterruptId);
0823 
0824     dprintk(1, " .BARLocation = 0x%x\n", dev->intfdesc.BARLocation);
0825 }
0826 
0827 static void saa7164_dump_busdesc(struct saa7164_dev *dev)
0828 {
0829     dprintk(1, "@0x%p busdesc sizeof(struct tmComResBusDescr) = %d bytes\n",
0830         &dev->busdesc, (u32)sizeof(struct tmComResBusDescr));
0831 
0832     dprintk(1, " .CommandRing   = 0x%016Lx\n", dev->busdesc.CommandRing);
0833     dprintk(1, " .ResponseRing  = 0x%016Lx\n", dev->busdesc.ResponseRing);
0834     dprintk(1, " .CommandWrite  = 0x%x\n", dev->busdesc.CommandWrite);
0835     dprintk(1, " .CommandRead   = 0x%x\n", dev->busdesc.CommandRead);
0836     dprintk(1, " .ResponseWrite = 0x%x\n", dev->busdesc.ResponseWrite);
0837     dprintk(1, " .ResponseRead  = 0x%x\n", dev->busdesc.ResponseRead);
0838 }
0839 
0840 /* Much of the hardware configuration and PCI registers are configured
0841  * dynamically depending on firmware. We have to cache some initial
0842  * structures then use these to locate other important structures
0843  * from PCI space.
0844  */
0845 static void saa7164_get_descriptors(struct saa7164_dev *dev)
0846 {
0847     memcpy_fromio(&dev->hwdesc, dev->bmmio, sizeof(struct tmComResHWDescr));
0848     memcpy_fromio(&dev->intfdesc, dev->bmmio + sizeof(struct tmComResHWDescr),
0849         sizeof(struct tmComResInterfaceDescr));
0850     memcpy_fromio(&dev->busdesc, dev->bmmio + dev->intfdesc.BARLocation,
0851         sizeof(struct tmComResBusDescr));
0852 
0853     if (dev->hwdesc.bLength != sizeof(struct tmComResHWDescr)) {
0854         printk(KERN_ERR "Structure struct tmComResHWDescr is mangled\n");
0855         printk(KERN_ERR "Need %x got %d\n", dev->hwdesc.bLength,
0856             (u32)sizeof(struct tmComResHWDescr));
0857     } else
0858         saa7164_dump_hwdesc(dev);
0859 
0860     if (dev->intfdesc.bLength != sizeof(struct tmComResInterfaceDescr)) {
0861         printk(KERN_ERR "struct struct tmComResInterfaceDescr is mangled\n");
0862         printk(KERN_ERR "Need %x got %d\n", dev->intfdesc.bLength,
0863             (u32)sizeof(struct tmComResInterfaceDescr));
0864     } else
0865         saa7164_dump_intfdesc(dev);
0866 
0867     saa7164_dump_busdesc(dev);
0868 }
0869 
0870 static int saa7164_pci_quirks(struct saa7164_dev *dev)
0871 {
0872     return 0;
0873 }
0874 
0875 static int get_resources(struct saa7164_dev *dev)
0876 {
0877     if (request_mem_region(pci_resource_start(dev->pci, 0),
0878         pci_resource_len(dev->pci, 0), dev->name)) {
0879 
0880         if (request_mem_region(pci_resource_start(dev->pci, 2),
0881             pci_resource_len(dev->pci, 2), dev->name))
0882             return 0;
0883     }
0884 
0885     printk(KERN_ERR "%s: can't get MMIO memory @ 0x%llx or 0x%llx\n",
0886         dev->name,
0887         (u64)pci_resource_start(dev->pci, 0),
0888         (u64)pci_resource_start(dev->pci, 2));
0889 
0890     return -EBUSY;
0891 }
0892 
0893 static int saa7164_port_init(struct saa7164_dev *dev, int portnr)
0894 {
0895     struct saa7164_port *port = NULL;
0896 
0897     BUG_ON((portnr < 0) || (portnr >= SAA7164_MAX_PORTS));
0898 
0899     port = &dev->ports[portnr];
0900 
0901     port->dev = dev;
0902     port->nr = portnr;
0903 
0904     if ((portnr == SAA7164_PORT_TS1) || (portnr == SAA7164_PORT_TS2))
0905         port->type = SAA7164_MPEG_DVB;
0906     else
0907     if ((portnr == SAA7164_PORT_ENC1) || (portnr == SAA7164_PORT_ENC2)) {
0908         port->type = SAA7164_MPEG_ENCODER;
0909 
0910         /* We need a deferred interrupt handler for cmd handling */
0911         INIT_WORK(&port->workenc, saa7164_work_enchandler);
0912     } else if ((portnr == SAA7164_PORT_VBI1) || (portnr == SAA7164_PORT_VBI2)) {
0913         port->type = SAA7164_MPEG_VBI;
0914 
0915         /* We need a deferred interrupt handler for cmd handling */
0916         INIT_WORK(&port->workenc, saa7164_work_vbihandler);
0917     } else
0918         BUG();
0919 
0920     /* Init all the critical resources */
0921     mutex_init(&port->dvb.lock);
0922     INIT_LIST_HEAD(&port->dmaqueue.list);
0923     mutex_init(&port->dmaqueue_lock);
0924 
0925     INIT_LIST_HEAD(&port->list_buf_used.list);
0926     INIT_LIST_HEAD(&port->list_buf_free.list);
0927     init_waitqueue_head(&port->wait_read);
0928 
0929 
0930     saa7164_histogram_reset(&port->irq_interval, "irq intervals");
0931     saa7164_histogram_reset(&port->svc_interval, "deferred intervals");
0932     saa7164_histogram_reset(&port->irq_svc_interval,
0933         "irq to deferred intervals");
0934     saa7164_histogram_reset(&port->read_interval,
0935         "encoder/vbi read() intervals");
0936     saa7164_histogram_reset(&port->poll_interval,
0937         "encoder/vbi poll() intervals");
0938 
0939     return 0;
0940 }
0941 
0942 static int saa7164_dev_setup(struct saa7164_dev *dev)
0943 {
0944     int i;
0945 
0946     mutex_init(&dev->lock);
0947     atomic_inc(&dev->refcount);
0948     dev->nr = saa7164_devcount++;
0949 
0950     snprintf(dev->name, sizeof(dev->name), "saa7164[%d]", dev->nr);
0951 
0952     mutex_lock(&devlist);
0953     list_add_tail(&dev->devlist, &saa7164_devlist);
0954     mutex_unlock(&devlist);
0955 
0956     /* board config */
0957     dev->board = UNSET;
0958     if (card[dev->nr] < saa7164_bcount)
0959         dev->board = card[dev->nr];
0960 
0961     for (i = 0; UNSET == dev->board  &&  i < saa7164_idcount; i++)
0962         if (dev->pci->subsystem_vendor == saa7164_subids[i].subvendor &&
0963             dev->pci->subsystem_device ==
0964                 saa7164_subids[i].subdevice)
0965                 dev->board = saa7164_subids[i].card;
0966 
0967     if (UNSET == dev->board) {
0968         dev->board = SAA7164_BOARD_UNKNOWN;
0969         saa7164_card_list(dev);
0970     }
0971 
0972     dev->pci_bus  = dev->pci->bus->number;
0973     dev->pci_slot = PCI_SLOT(dev->pci->devfn);
0974 
0975     /* I2C Defaults / setup */
0976     dev->i2c_bus[0].dev = dev;
0977     dev->i2c_bus[0].nr = 0;
0978     dev->i2c_bus[1].dev = dev;
0979     dev->i2c_bus[1].nr = 1;
0980     dev->i2c_bus[2].dev = dev;
0981     dev->i2c_bus[2].nr = 2;
0982 
0983     /* Transport + Encoder ports 1, 2, 3, 4 - Defaults / setup */
0984     saa7164_port_init(dev, SAA7164_PORT_TS1);
0985     saa7164_port_init(dev, SAA7164_PORT_TS2);
0986     saa7164_port_init(dev, SAA7164_PORT_ENC1);
0987     saa7164_port_init(dev, SAA7164_PORT_ENC2);
0988     saa7164_port_init(dev, SAA7164_PORT_VBI1);
0989     saa7164_port_init(dev, SAA7164_PORT_VBI2);
0990 
0991     if (get_resources(dev) < 0) {
0992         printk(KERN_ERR "CORE %s No more PCIe resources for subsystem: %04x:%04x\n",
0993                dev->name, dev->pci->subsystem_vendor,
0994                dev->pci->subsystem_device);
0995 
0996         saa7164_devcount--;
0997         return -ENODEV;
0998     }
0999 
1000     /* PCI/e allocations */
1001     dev->lmmio = ioremap(pci_resource_start(dev->pci, 0),
1002                  pci_resource_len(dev->pci, 0));
1003 
1004     dev->lmmio2 = ioremap(pci_resource_start(dev->pci, 2),
1005                  pci_resource_len(dev->pci, 2));
1006 
1007     dev->bmmio = (u8 __iomem *)dev->lmmio;
1008     dev->bmmio2 = (u8 __iomem *)dev->lmmio2;
1009 
1010     /* Interrupt and ack register locations offset of bmmio */
1011     dev->int_status = 0x183000 + 0xf80;
1012     dev->int_ack = 0x183000 + 0xf90;
1013 
1014     printk(KERN_INFO
1015         "CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n",
1016            dev->name, dev->pci->subsystem_vendor,
1017            dev->pci->subsystem_device, saa7164_boards[dev->board].name,
1018            dev->board, card[dev->nr] == dev->board ?
1019            "insmod option" : "autodetected");
1020 
1021     saa7164_pci_quirks(dev);
1022 
1023     return 0;
1024 }
1025 
1026 static void saa7164_dev_unregister(struct saa7164_dev *dev)
1027 {
1028     dprintk(1, "%s()\n", __func__);
1029 
1030     release_mem_region(pci_resource_start(dev->pci, 0),
1031         pci_resource_len(dev->pci, 0));
1032 
1033     release_mem_region(pci_resource_start(dev->pci, 2),
1034         pci_resource_len(dev->pci, 2));
1035 
1036     if (!atomic_dec_and_test(&dev->refcount))
1037         return;
1038 
1039     iounmap(dev->lmmio);
1040     iounmap(dev->lmmio2);
1041 
1042     return;
1043 }
1044 
1045 #ifdef CONFIG_DEBUG_FS
1046 static void *saa7164_seq_start(struct seq_file *s, loff_t *pos)
1047 {
1048     struct saa7164_dev *dev;
1049     loff_t index = *pos;
1050 
1051     mutex_lock(&devlist);
1052     list_for_each_entry(dev, &saa7164_devlist, devlist) {
1053         if (index-- == 0) {
1054             mutex_unlock(&devlist);
1055             return dev;
1056         }
1057     }
1058     mutex_unlock(&devlist);
1059 
1060     return NULL;
1061 }
1062 
1063 static void *saa7164_seq_next(struct seq_file *s, void *v, loff_t *pos)
1064 {
1065     struct saa7164_dev *dev = v;
1066     void *ret;
1067 
1068     mutex_lock(&devlist);
1069     if (list_is_last(&dev->devlist, &saa7164_devlist))
1070         ret = NULL;
1071     else
1072         ret = list_next_entry(dev, devlist);
1073     mutex_unlock(&devlist);
1074 
1075     ++*pos;
1076 
1077     return ret;
1078 }
1079 
1080 static void saa7164_seq_stop(struct seq_file *s, void *v)
1081 {
1082 }
1083 
1084 static int saa7164_seq_show(struct seq_file *m, void *v)
1085 {
1086     struct saa7164_dev *dev = v;
1087     struct tmComResBusInfo *b;
1088     int i, c;
1089 
1090     seq_printf(m, "%s = %p\n", dev->name, dev);
1091 
1092     /* Lock the bus from any other access */
1093     b = &dev->bus;
1094     mutex_lock(&b->lock);
1095 
1096     seq_printf(m, " .m_pdwSetWritePos = 0x%x (0x%08x)\n",
1097            b->m_dwSetReadPos, saa7164_readl(b->m_dwSetReadPos));
1098 
1099     seq_printf(m, " .m_pdwSetReadPos  = 0x%x (0x%08x)\n",
1100            b->m_dwSetWritePos, saa7164_readl(b->m_dwSetWritePos));
1101 
1102     seq_printf(m, " .m_pdwGetWritePos = 0x%x (0x%08x)\n",
1103            b->m_dwGetReadPos, saa7164_readl(b->m_dwGetReadPos));
1104 
1105     seq_printf(m, " .m_pdwGetReadPos  = 0x%x (0x%08x)\n",
1106            b->m_dwGetWritePos, saa7164_readl(b->m_dwGetWritePos));
1107     c = 0;
1108     seq_puts(m, "\n  Set Ring:\n");
1109     seq_puts(m, "\n addr  00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
1110     for (i = 0; i < b->m_dwSizeSetRing; i++) {
1111         if (c == 0)
1112             seq_printf(m, " %04x:", i);
1113 
1114         seq_printf(m, " %02x", readb(b->m_pdwSetRing + i));
1115 
1116         if (++c == 16) {
1117             seq_puts(m, "\n");
1118             c = 0;
1119         }
1120     }
1121 
1122     c = 0;
1123     seq_puts(m, "\n  Get Ring:\n");
1124     seq_puts(m, "\n addr  00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
1125     for (i = 0; i < b->m_dwSizeGetRing; i++) {
1126         if (c == 0)
1127             seq_printf(m, " %04x:", i);
1128 
1129         seq_printf(m, " %02x", readb(b->m_pdwGetRing + i));
1130 
1131         if (++c == 16) {
1132             seq_puts(m, "\n");
1133             c = 0;
1134         }
1135     }
1136 
1137     mutex_unlock(&b->lock);
1138 
1139     return 0;
1140 }
1141 
1142 static const struct seq_operations saa7164_sops = {
1143     .start = saa7164_seq_start,
1144     .next = saa7164_seq_next,
1145     .stop = saa7164_seq_stop,
1146     .show = saa7164_seq_show,
1147 };
1148 
1149 DEFINE_SEQ_ATTRIBUTE(saa7164);
1150 
1151 static struct dentry *saa7614_dentry;
1152 
1153 static void __init saa7164_debugfs_create(void)
1154 {
1155     saa7614_dentry = debugfs_create_file("saa7164", 0444, NULL, NULL,
1156                          &saa7164_fops);
1157 }
1158 
1159 static void __exit saa7164_debugfs_remove(void)
1160 {
1161     debugfs_remove(saa7614_dentry);
1162 }
1163 #else
1164 static void saa7164_debugfs_create(void) { }
1165 static void saa7164_debugfs_remove(void) { }
1166 #endif
1167 
1168 static int saa7164_thread_function(void *data)
1169 {
1170     struct saa7164_dev *dev = data;
1171     struct tmFwInfoStruct fwinfo;
1172     u64 last_poll_time = 0;
1173 
1174     dprintk(DBGLVL_THR, "thread started\n");
1175 
1176     set_freezable();
1177 
1178     while (1) {
1179         msleep_interruptible(100);
1180         if (kthread_should_stop())
1181             break;
1182         try_to_freeze();
1183 
1184         dprintk(DBGLVL_THR, "thread running\n");
1185 
1186         /* Dump the firmware debug message to console */
1187         /* Polling this costs us 1-2% of the arm CPU */
1188         /* convert this into a respnde to interrupt 0x7a */
1189         saa7164_api_collect_debug(dev);
1190 
1191         /* Monitor CPU load every 1 second */
1192         if ((last_poll_time + 1000 /* ms */) < jiffies_to_msecs(jiffies)) {
1193             saa7164_api_get_load_info(dev, &fwinfo);
1194             last_poll_time = jiffies_to_msecs(jiffies);
1195         }
1196 
1197     }
1198 
1199     dprintk(DBGLVL_THR, "thread exiting\n");
1200     return 0;
1201 }
1202 
1203 static bool saa7164_enable_msi(struct pci_dev *pci_dev, struct saa7164_dev *dev)
1204 {
1205     int err;
1206 
1207     if (!enable_msi) {
1208         printk(KERN_WARNING "%s() MSI disabled by module parameter 'enable_msi'"
1209                , __func__);
1210         return false;
1211     }
1212 
1213     err = pci_enable_msi(pci_dev);
1214 
1215     if (err) {
1216         printk(KERN_ERR "%s() Failed to enable MSI interrupt. Falling back to a shared IRQ\n",
1217                __func__);
1218         return false;
1219     }
1220 
1221     /* no error - so request an msi interrupt */
1222     err = request_irq(pci_dev->irq, saa7164_irq, 0,
1223                         dev->name, dev);
1224 
1225     if (err) {
1226         /* fall back to legacy interrupt */
1227         printk(KERN_ERR "%s() Failed to get an MSI interrupt. Falling back to a shared IRQ\n",
1228                __func__);
1229         pci_disable_msi(pci_dev);
1230         return false;
1231     }
1232 
1233     return true;
1234 }
1235 
1236 static int saa7164_initdev(struct pci_dev *pci_dev,
1237                const struct pci_device_id *pci_id)
1238 {
1239     struct saa7164_dev *dev;
1240     int err, i;
1241     u32 version;
1242 
1243     dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1244     if (NULL == dev)
1245         return -ENOMEM;
1246 
1247     err = v4l2_device_register(&pci_dev->dev, &dev->v4l2_dev);
1248     if (err < 0) {
1249         dev_err(&pci_dev->dev, "v4l2_device_register failed\n");
1250         goto fail_free;
1251     }
1252 
1253     /* pci init */
1254     dev->pci = pci_dev;
1255     if (pci_enable_device(pci_dev)) {
1256         err = -EIO;
1257         goto fail_free;
1258     }
1259 
1260     if (saa7164_dev_setup(dev) < 0) {
1261         err = -EINVAL;
1262         goto fail_free;
1263     }
1264 
1265     /* print pci info */
1266     dev->pci_rev = pci_dev->revision;
1267     pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER,  &dev->pci_lat);
1268     printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, latency: %d, mmio: 0x%llx\n",
1269            dev->name,
1270            pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
1271            dev->pci_lat,
1272         (unsigned long long)pci_resource_start(pci_dev, 0));
1273 
1274     pci_set_master(pci_dev);
1275     /* TODO */
1276     err = dma_set_mask(&pci_dev->dev, 0xffffffff);
1277     if (err) {
1278         printk("%s/0: Oops: no 32bit PCI DMA ???\n", dev->name);
1279         goto fail_irq;
1280     }
1281 
1282     /* irq bit */
1283     if (saa7164_enable_msi(pci_dev, dev)) {
1284         dev->msi = true;
1285     } else {
1286         /* if we have an error (i.e. we don't have an interrupt)
1287              or msi is not enabled - fallback to shared interrupt */
1288 
1289         err = request_irq(pci_dev->irq, saa7164_irq,
1290                 IRQF_SHARED, dev->name, dev);
1291 
1292         if (err < 0) {
1293             printk(KERN_ERR "%s: can't get IRQ %d\n", dev->name,
1294                    pci_dev->irq);
1295             err = -EIO;
1296             goto fail_irq;
1297         }
1298     }
1299 
1300     pci_set_drvdata(pci_dev, dev);
1301 
1302     /* Init the internal command list */
1303     for (i = 0; i < SAA_CMD_MAX_MSG_UNITS; i++) {
1304         dev->cmds[i].seqno = i;
1305         dev->cmds[i].inuse = 0;
1306         mutex_init(&dev->cmds[i].lock);
1307         init_waitqueue_head(&dev->cmds[i].wait);
1308     }
1309 
1310     /* We need a deferred interrupt handler for cmd handling */
1311     INIT_WORK(&dev->workcmd, saa7164_work_cmdhandler);
1312 
1313     /* Only load the firmware if we know the board */
1314     if (dev->board != SAA7164_BOARD_UNKNOWN) {
1315 
1316         err = saa7164_downloadfirmware(dev);
1317         if (err < 0) {
1318             printk(KERN_ERR
1319                 "Failed to boot firmware, no features registered\n");
1320             goto fail_fw;
1321         }
1322 
1323         saa7164_get_descriptors(dev);
1324         saa7164_dumpregs(dev, 0);
1325         saa7164_getcurrentfirmwareversion(dev);
1326         saa7164_getfirmwarestatus(dev);
1327         err = saa7164_bus_setup(dev);
1328         if (err < 0)
1329             printk(KERN_ERR
1330                 "Failed to setup the bus, will continue\n");
1331         saa7164_bus_dump(dev);
1332 
1333         /* Ping the running firmware via the command bus and get the
1334          * firmware version, this checks the bus is running OK.
1335          */
1336         version = 0;
1337         if (saa7164_api_get_fw_version(dev, &version) == SAA_OK)
1338             dprintk(1, "Bus is operating correctly using version %d.%d.%d.%d (0x%x)\n",
1339                 (version & 0x0000fc00) >> 10,
1340                 (version & 0x000003e0) >> 5,
1341                 (version & 0x0000001f),
1342                 (version & 0xffff0000) >> 16,
1343                 version);
1344         else
1345             printk(KERN_ERR
1346                 "Failed to communicate with the firmware\n");
1347 
1348         /* Bring up the I2C buses */
1349         saa7164_i2c_register(&dev->i2c_bus[0]);
1350         saa7164_i2c_register(&dev->i2c_bus[1]);
1351         saa7164_i2c_register(&dev->i2c_bus[2]);
1352         saa7164_gpio_setup(dev);
1353         saa7164_card_setup(dev);
1354 
1355         /* Parse the dynamic device configuration, find various
1356          * media endpoints (MPEG, WMV, PS, TS) and cache their
1357          * configuration details into the driver, so we can
1358          * reference them later during simething_register() func,
1359          * interrupt handlers, deferred work handlers etc.
1360          */
1361         saa7164_api_enum_subdevs(dev);
1362 
1363         /* Begin to create the video sub-systems and register funcs */
1364         if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) {
1365             if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS1]) < 0) {
1366                 printk(KERN_ERR "%s() Failed to register dvb adapters on porta\n",
1367                     __func__);
1368             }
1369         }
1370 
1371         if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) {
1372             if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS2]) < 0) {
1373                 printk(KERN_ERR"%s() Failed to register dvb adapters on portb\n",
1374                     __func__);
1375             }
1376         }
1377 
1378         if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) {
1379             if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC1]) < 0) {
1380                 printk(KERN_ERR"%s() Failed to register mpeg encoder\n",
1381                        __func__);
1382             }
1383         }
1384 
1385         if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) {
1386             if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC2]) < 0) {
1387                 printk(KERN_ERR"%s() Failed to register mpeg encoder\n",
1388                        __func__);
1389             }
1390         }
1391 
1392         if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI) {
1393             if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI1]) < 0) {
1394                 printk(KERN_ERR"%s() Failed to register vbi device\n",
1395                        __func__);
1396             }
1397         }
1398 
1399         if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI) {
1400             if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI2]) < 0) {
1401                 printk(KERN_ERR"%s() Failed to register vbi device\n",
1402                        __func__);
1403             }
1404         }
1405         saa7164_api_set_debug(dev, fw_debug);
1406 
1407         if (fw_debug) {
1408             dev->kthread = kthread_run(saa7164_thread_function, dev,
1409                 "saa7164 debug");
1410             if (IS_ERR(dev->kthread)) {
1411                 dev->kthread = NULL;
1412                 printk(KERN_ERR "%s() Failed to create debug kernel thread\n",
1413                        __func__);
1414             }
1415         }
1416 
1417     } /* != BOARD_UNKNOWN */
1418     else
1419         printk(KERN_ERR "%s() Unsupported board detected, registering without firmware\n",
1420                __func__);
1421 
1422     dprintk(1, "%s() parameter debug = %d\n", __func__, saa_debug);
1423     dprintk(1, "%s() parameter waitsecs = %d\n", __func__, waitsecs);
1424 
1425 fail_fw:
1426     return 0;
1427 
1428 fail_irq:
1429     saa7164_dev_unregister(dev);
1430 fail_free:
1431     v4l2_device_unregister(&dev->v4l2_dev);
1432     kfree(dev);
1433     return err;
1434 }
1435 
1436 static void saa7164_shutdown(struct saa7164_dev *dev)
1437 {
1438     dprintk(1, "%s()\n", __func__);
1439 }
1440 
1441 static void saa7164_finidev(struct pci_dev *pci_dev)
1442 {
1443     struct saa7164_dev *dev = pci_get_drvdata(pci_dev);
1444 
1445     if (dev->board != SAA7164_BOARD_UNKNOWN) {
1446         if (fw_debug && dev->kthread) {
1447             kthread_stop(dev->kthread);
1448             dev->kthread = NULL;
1449         }
1450         if (dev->firmwareloaded)
1451             saa7164_api_set_debug(dev, 0x00);
1452     }
1453 
1454     saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1455         &dev->ports[SAA7164_PORT_ENC1].irq_interval);
1456     saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1457         &dev->ports[SAA7164_PORT_ENC1].svc_interval);
1458     saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1459         &dev->ports[SAA7164_PORT_ENC1].irq_svc_interval);
1460     saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1461         &dev->ports[SAA7164_PORT_ENC1].read_interval);
1462     saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1463         &dev->ports[SAA7164_PORT_ENC1].poll_interval);
1464     saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI1],
1465         &dev->ports[SAA7164_PORT_VBI1].read_interval);
1466     saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI2],
1467         &dev->ports[SAA7164_PORT_VBI2].poll_interval);
1468 
1469     saa7164_shutdown(dev);
1470 
1471     if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB)
1472         saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS1]);
1473 
1474     if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB)
1475         saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS2]);
1476 
1477     if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER)
1478         saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC1]);
1479 
1480     if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER)
1481         saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC2]);
1482 
1483     if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI)
1484         saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI1]);
1485 
1486     if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI)
1487         saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI2]);
1488 
1489     saa7164_i2c_unregister(&dev->i2c_bus[0]);
1490     saa7164_i2c_unregister(&dev->i2c_bus[1]);
1491     saa7164_i2c_unregister(&dev->i2c_bus[2]);
1492 
1493     /* unregister stuff */
1494     free_irq(pci_dev->irq, dev);
1495 
1496     if (dev->msi) {
1497         pci_disable_msi(pci_dev);
1498         dev->msi = false;
1499     }
1500 
1501     pci_disable_device(pci_dev);
1502 
1503     mutex_lock(&devlist);
1504     list_del(&dev->devlist);
1505     mutex_unlock(&devlist);
1506 
1507     saa7164_dev_unregister(dev);
1508     v4l2_device_unregister(&dev->v4l2_dev);
1509     kfree(dev);
1510 }
1511 
1512 static const struct pci_device_id saa7164_pci_tbl[] = {
1513     {
1514         /* SAA7164 */
1515         .vendor       = 0x1131,
1516         .device       = 0x7164,
1517         .subvendor    = PCI_ANY_ID,
1518         .subdevice    = PCI_ANY_ID,
1519     }, {
1520         /* --- end of list --- */
1521     }
1522 };
1523 MODULE_DEVICE_TABLE(pci, saa7164_pci_tbl);
1524 
1525 static struct pci_driver saa7164_pci_driver = {
1526     .name     = "saa7164",
1527     .id_table = saa7164_pci_tbl,
1528     .probe    = saa7164_initdev,
1529     .remove   = saa7164_finidev,
1530 };
1531 
1532 static int __init saa7164_init(void)
1533 {
1534     int ret = pci_register_driver(&saa7164_pci_driver);
1535 
1536     if (ret)
1537         return ret;
1538 
1539     saa7164_debugfs_create();
1540 
1541     pr_info("saa7164 driver loaded\n");
1542 
1543     return 0;
1544 }
1545 
1546 static void __exit saa7164_fini(void)
1547 {
1548     saa7164_debugfs_remove();
1549     pci_unregister_driver(&saa7164_pci_driver);
1550 }
1551 
1552 module_init(saa7164_init);
1553 module_exit(saa7164_fini);
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