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0008 #include <linux/freezer.h>
0009 #include <linux/kernel.h>
0010 #include <linux/kthread.h>
0011 #include <linux/mutex.h>
0012 #include <linux/module.h>
0013 #include <linux/pci.h>
0014 #include <linux/string.h>
0015 #include <linux/sched/signal.h>
0016
0017 #include <media/dmxdev.h>
0018 #include <media/dvbdev.h>
0019 #include <media/dvb_demux.h>
0020 #include <media/dvb_frontend.h>
0021
0022 #include "pt3.h"
0023
0024 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
0025
0026 static bool one_adapter;
0027 module_param(one_adapter, bool, 0444);
0028 MODULE_PARM_DESC(one_adapter, "Place FE's together under one adapter.");
0029
0030 static int num_bufs = 4;
0031 module_param(num_bufs, int, 0444);
0032 MODULE_PARM_DESC(num_bufs, "Number of DMA buffer (188KiB) per FE.");
0033
0034
0035 static const struct i2c_algorithm pt3_i2c_algo = {
0036 .master_xfer = &pt3_i2c_master_xfer,
0037 .functionality = &pt3_i2c_functionality,
0038 };
0039
0040 static const struct pt3_adap_config adap_conf[PT3_NUM_FE] = {
0041 {
0042 .demod_info = {
0043 I2C_BOARD_INFO(TC90522_I2C_DEV_SAT, 0x11),
0044 },
0045 .tuner_info = {
0046 I2C_BOARD_INFO("qm1d1c0042", 0x63),
0047 },
0048 .tuner_cfg.qm1d1c0042 = {
0049 .lpf = 1,
0050 },
0051 .init_freq = 1049480 - 300,
0052 },
0053 {
0054 .demod_info = {
0055 I2C_BOARD_INFO(TC90522_I2C_DEV_TER, 0x10),
0056 },
0057 .tuner_info = {
0058 I2C_BOARD_INFO("mxl301rf", 0x62),
0059 },
0060 .init_freq = 515142857,
0061 },
0062 {
0063 .demod_info = {
0064 I2C_BOARD_INFO(TC90522_I2C_DEV_SAT, 0x13),
0065 },
0066 .tuner_info = {
0067 I2C_BOARD_INFO("qm1d1c0042", 0x60),
0068 },
0069 .tuner_cfg.qm1d1c0042 = {
0070 .lpf = 1,
0071 },
0072 .init_freq = 1049480 + 300,
0073 },
0074 {
0075 .demod_info = {
0076 I2C_BOARD_INFO(TC90522_I2C_DEV_TER, 0x12),
0077 },
0078 .tuner_info = {
0079 I2C_BOARD_INFO("mxl301rf", 0x61),
0080 },
0081 .init_freq = 521142857,
0082 },
0083 };
0084
0085
0086 struct reg_val {
0087 u8 reg;
0088 u8 val;
0089 };
0090
0091 static int
0092 pt3_demod_write(struct pt3_adapter *adap, const struct reg_val *data, int num)
0093 {
0094 struct i2c_msg msg;
0095 int i, ret;
0096
0097 ret = 0;
0098 msg.addr = adap->i2c_demod->addr;
0099 msg.flags = 0;
0100 msg.len = 2;
0101 for (i = 0; i < num; i++) {
0102 msg.buf = (u8 *)&data[i];
0103 ret = i2c_transfer(adap->i2c_demod->adapter, &msg, 1);
0104 if (ret == 0)
0105 ret = -EREMOTE;
0106 if (ret < 0)
0107 return ret;
0108 }
0109 return 0;
0110 }
0111
0112 static inline void pt3_lnb_ctrl(struct pt3_board *pt3, bool on)
0113 {
0114 iowrite32((on ? 0x0f : 0x0c), pt3->regs[0] + REG_SYSTEM_W);
0115 }
0116
0117 static inline struct pt3_adapter *pt3_find_adapter(struct dvb_frontend *fe)
0118 {
0119 struct pt3_board *pt3;
0120 int i;
0121
0122 if (one_adapter) {
0123 pt3 = fe->dvb->priv;
0124 for (i = 0; i < PT3_NUM_FE; i++)
0125 if (pt3->adaps[i]->fe == fe)
0126 return pt3->adaps[i];
0127 }
0128 return container_of(fe->dvb, struct pt3_adapter, dvb_adap);
0129 }
0130
0131
0132
0133
0134
0135
0136 static int
0137 pt3_set_tuner_power(struct pt3_board *pt3, bool tuner_on, bool amp_on)
0138 {
0139 struct reg_val rv = { 0x1e, 0x99 };
0140
0141 if (tuner_on)
0142 rv.val |= 0x40;
0143 if (amp_on)
0144 rv.val |= 0x04;
0145 return pt3_demod_write(pt3->adaps[PT3_NUM_FE - 1], &rv, 1);
0146 }
0147
0148 static int pt3_set_lna(struct dvb_frontend *fe)
0149 {
0150 struct pt3_adapter *adap;
0151 struct pt3_board *pt3;
0152 u32 val;
0153 int ret;
0154
0155
0156
0157 adap = pt3_find_adapter(fe);
0158 val = fe->dtv_property_cache.lna;
0159 if (val == LNA_AUTO || val == adap->cur_lna)
0160 return 0;
0161
0162 pt3 = adap->dvb_adap.priv;
0163 if (mutex_lock_interruptible(&pt3->lock))
0164 return -ERESTARTSYS;
0165 if (val)
0166 pt3->lna_on_cnt++;
0167 else
0168 pt3->lna_on_cnt--;
0169
0170 if (val && pt3->lna_on_cnt <= 1) {
0171 pt3->lna_on_cnt = 1;
0172 ret = pt3_set_tuner_power(pt3, true, true);
0173 } else if (!val && pt3->lna_on_cnt <= 0) {
0174 pt3->lna_on_cnt = 0;
0175 ret = pt3_set_tuner_power(pt3, true, false);
0176 } else
0177 ret = 0;
0178 mutex_unlock(&pt3->lock);
0179 adap->cur_lna = (val != 0);
0180 return ret;
0181 }
0182
0183 static int pt3_set_voltage(struct dvb_frontend *fe, enum fe_sec_voltage volt)
0184 {
0185 struct pt3_adapter *adap;
0186 struct pt3_board *pt3;
0187 bool on;
0188
0189
0190
0191 adap = pt3_find_adapter(fe);
0192 on = (volt != SEC_VOLTAGE_OFF);
0193 if (on == adap->cur_lnb)
0194 return 0;
0195 adap->cur_lnb = on;
0196 pt3 = adap->dvb_adap.priv;
0197 if (mutex_lock_interruptible(&pt3->lock))
0198 return -ERESTARTSYS;
0199 if (on)
0200 pt3->lnb_on_cnt++;
0201 else
0202 pt3->lnb_on_cnt--;
0203
0204 if (on && pt3->lnb_on_cnt <= 1) {
0205 pt3->lnb_on_cnt = 1;
0206 pt3_lnb_ctrl(pt3, true);
0207 } else if (!on && pt3->lnb_on_cnt <= 0) {
0208 pt3->lnb_on_cnt = 0;
0209 pt3_lnb_ctrl(pt3, false);
0210 }
0211 mutex_unlock(&pt3->lock);
0212 return 0;
0213 }
0214
0215
0216
0217 static const struct reg_val init0_sat[] = {
0218 { 0x03, 0x01 },
0219 { 0x1e, 0x10 },
0220 };
0221 static const struct reg_val init0_ter[] = {
0222 { 0x01, 0x40 },
0223 { 0x1c, 0x10 },
0224 };
0225 static const struct reg_val cfg_sat[] = {
0226 { 0x1c, 0x15 },
0227 { 0x1f, 0x04 },
0228 };
0229 static const struct reg_val cfg_ter[] = {
0230 { 0x1d, 0x01 },
0231 };
0232
0233
0234
0235
0236
0237
0238
0239
0240
0241
0242 static int pt3_fe_init(struct pt3_board *pt3)
0243 {
0244 int i, ret;
0245 struct dvb_frontend *fe;
0246
0247 pt3_i2c_reset(pt3);
0248 ret = pt3_init_all_demods(pt3);
0249 if (ret < 0) {
0250 dev_warn(&pt3->pdev->dev, "Failed to init demod chips\n");
0251 return ret;
0252 }
0253
0254
0255 for (i = 0; i < PT3_NUM_FE; i++) {
0256 fe = pt3->adaps[i]->fe;
0257
0258 if (fe->ops.delsys[0] == SYS_ISDBS)
0259 ret = pt3_demod_write(pt3->adaps[i],
0260 init0_sat, ARRAY_SIZE(init0_sat));
0261 else
0262 ret = pt3_demod_write(pt3->adaps[i],
0263 init0_ter, ARRAY_SIZE(init0_ter));
0264 if (ret < 0) {
0265 dev_warn(&pt3->pdev->dev,
0266 "demod[%d] failed in init sequence0\n", i);
0267 return ret;
0268 }
0269 ret = fe->ops.init(fe);
0270 if (ret < 0)
0271 return ret;
0272 }
0273
0274 usleep_range(2000, 4000);
0275 ret = pt3_set_tuner_power(pt3, true, false);
0276 if (ret < 0) {
0277 dev_warn(&pt3->pdev->dev, "Failed to control tuner module\n");
0278 return ret;
0279 }
0280
0281
0282 for (i = 0; i < PT3_NUM_FE; i++) {
0283 fe = pt3->adaps[i]->fe;
0284 if (fe->ops.delsys[0] == SYS_ISDBS)
0285 ret = pt3_demod_write(pt3->adaps[i],
0286 cfg_sat, ARRAY_SIZE(cfg_sat));
0287 else
0288 ret = pt3_demod_write(pt3->adaps[i],
0289 cfg_ter, ARRAY_SIZE(cfg_ter));
0290 if (ret < 0) {
0291 dev_warn(&pt3->pdev->dev,
0292 "demod[%d] failed in init sequence1\n", i);
0293 return ret;
0294 }
0295 }
0296 usleep_range(4000, 6000);
0297
0298 for (i = 0; i < PT3_NUM_FE; i++) {
0299 fe = pt3->adaps[i]->fe;
0300 if (fe->ops.delsys[0] != SYS_ISDBS)
0301 continue;
0302
0303 ret = fe->ops.tuner_ops.init(fe);
0304 if (ret < 0) {
0305 dev_warn(&pt3->pdev->dev,
0306 "Failed to init SAT-tuner[%d]\n", i);
0307 return ret;
0308 }
0309 }
0310 ret = pt3_init_all_mxl301rf(pt3);
0311 if (ret < 0) {
0312 dev_warn(&pt3->pdev->dev, "Failed to init TERR-tuners\n");
0313 return ret;
0314 }
0315
0316 ret = pt3_set_tuner_power(pt3, true, true);
0317 if (ret < 0) {
0318 dev_warn(&pt3->pdev->dev, "Failed to control tuner module\n");
0319 return ret;
0320 }
0321
0322
0323
0324
0325
0326 for (i = 0; i < PT3_NUM_FE; i++) {
0327 fe = pt3->adaps[i]->fe;
0328 ret = 0;
0329 if (fe->ops.delsys[0] == SYS_ISDBT)
0330 ret = fe->ops.tuner_ops.init(fe);
0331
0332 if (ret == 0 && fe->dtv_property_cache.frequency == 0) {
0333 fe->dtv_property_cache.frequency =
0334 adap_conf[i].init_freq;
0335 ret = fe->ops.tuner_ops.set_params(fe);
0336 }
0337 if (ret < 0) {
0338 dev_warn(&pt3->pdev->dev,
0339 "Failed in initial tuning of tuner[%d]\n", i);
0340 return ret;
0341 }
0342 }
0343
0344
0345 for (i = 0; i < PT3_NUM_FE; i++) {
0346 fe = pt3->adaps[i]->fe;
0347 if (fe->ops.tuner_ops.sleep)
0348 ret = fe->ops.tuner_ops.sleep(fe);
0349 if (ret < 0)
0350 break;
0351 if (fe->ops.sleep)
0352 ret = fe->ops.sleep(fe);
0353 if (ret < 0)
0354 break;
0355 if (fe->ops.delsys[0] == SYS_ISDBS)
0356 fe->ops.set_voltage = &pt3_set_voltage;
0357 else
0358 fe->ops.set_lna = &pt3_set_lna;
0359 }
0360 if (i < PT3_NUM_FE) {
0361 dev_warn(&pt3->pdev->dev, "FE[%d] failed to standby\n", i);
0362 return ret;
0363 }
0364 return 0;
0365 }
0366
0367
0368 static int pt3_attach_fe(struct pt3_board *pt3, int i)
0369 {
0370 const struct i2c_board_info *info;
0371 struct tc90522_config cfg;
0372 struct i2c_client *cl;
0373 struct dvb_adapter *dvb_adap;
0374 int ret;
0375
0376 info = &adap_conf[i].demod_info;
0377 cfg = adap_conf[i].demod_cfg;
0378 cfg.tuner_i2c = NULL;
0379
0380 ret = -ENODEV;
0381 cl = dvb_module_probe("tc90522", info->type, &pt3->i2c_adap,
0382 info->addr, &cfg);
0383 if (!cl)
0384 return -ENODEV;
0385 pt3->adaps[i]->i2c_demod = cl;
0386
0387 if (!strncmp(cl->name, TC90522_I2C_DEV_SAT,
0388 strlen(TC90522_I2C_DEV_SAT))) {
0389 struct qm1d1c0042_config tcfg;
0390
0391 tcfg = adap_conf[i].tuner_cfg.qm1d1c0042;
0392 tcfg.fe = cfg.fe;
0393 info = &adap_conf[i].tuner_info;
0394 cl = dvb_module_probe("qm1d1c0042", info->type, cfg.tuner_i2c,
0395 info->addr, &tcfg);
0396 } else {
0397 struct mxl301rf_config tcfg;
0398
0399 tcfg = adap_conf[i].tuner_cfg.mxl301rf;
0400 tcfg.fe = cfg.fe;
0401 info = &adap_conf[i].tuner_info;
0402 cl = dvb_module_probe("mxl301rf", info->type, cfg.tuner_i2c,
0403 info->addr, &tcfg);
0404 }
0405 if (!cl)
0406 goto err_demod_module_release;
0407 pt3->adaps[i]->i2c_tuner = cl;
0408
0409 dvb_adap = &pt3->adaps[one_adapter ? 0 : i]->dvb_adap;
0410 ret = dvb_register_frontend(dvb_adap, cfg.fe);
0411 if (ret < 0)
0412 goto err_tuner_module_release;
0413 pt3->adaps[i]->fe = cfg.fe;
0414 return 0;
0415
0416 err_tuner_module_release:
0417 dvb_module_release(pt3->adaps[i]->i2c_tuner);
0418 err_demod_module_release:
0419 dvb_module_release(pt3->adaps[i]->i2c_demod);
0420
0421 return ret;
0422 }
0423
0424
0425 static int pt3_fetch_thread(void *data)
0426 {
0427 struct pt3_adapter *adap = data;
0428 ktime_t delay;
0429 bool was_frozen;
0430
0431 #define PT3_INITIAL_BUF_DROPS 4
0432 #define PT3_FETCH_DELAY 10
0433 #define PT3_FETCH_DELAY_DELTA 2
0434
0435 pt3_init_dmabuf(adap);
0436 adap->num_discard = PT3_INITIAL_BUF_DROPS;
0437
0438 dev_dbg(adap->dvb_adap.device, "PT3: [%s] started\n",
0439 adap->thread->comm);
0440 set_freezable();
0441 while (!kthread_freezable_should_stop(&was_frozen)) {
0442 if (was_frozen)
0443 adap->num_discard = PT3_INITIAL_BUF_DROPS;
0444
0445 pt3_proc_dma(adap);
0446
0447 delay = ktime_set(0, PT3_FETCH_DELAY * NSEC_PER_MSEC);
0448 set_current_state(TASK_UNINTERRUPTIBLE);
0449 freezable_schedule_hrtimeout_range(&delay,
0450 PT3_FETCH_DELAY_DELTA * NSEC_PER_MSEC,
0451 HRTIMER_MODE_REL);
0452 }
0453 dev_dbg(adap->dvb_adap.device, "PT3: [%s] exited\n",
0454 adap->thread->comm);
0455 return 0;
0456 }
0457
0458 static int pt3_start_streaming(struct pt3_adapter *adap)
0459 {
0460 struct task_struct *thread;
0461
0462
0463 thread = kthread_run(pt3_fetch_thread, adap, "pt3-ad%i-dmx%i",
0464 adap->dvb_adap.num, adap->dmxdev.dvbdev->id);
0465 if (IS_ERR(thread)) {
0466 int ret = PTR_ERR(thread);
0467
0468 adap->thread = NULL;
0469 dev_warn(adap->dvb_adap.device,
0470 "PT3 (adap:%d, dmx:%d): failed to start kthread\n",
0471 adap->dvb_adap.num, adap->dmxdev.dvbdev->id);
0472 return ret;
0473 }
0474 adap->thread = thread;
0475
0476 return pt3_start_dma(adap);
0477 }
0478
0479 static int pt3_stop_streaming(struct pt3_adapter *adap)
0480 {
0481 int ret;
0482
0483 ret = pt3_stop_dma(adap);
0484 if (ret)
0485 dev_warn(adap->dvb_adap.device,
0486 "PT3: failed to stop streaming of adap:%d/FE:%d\n",
0487 adap->dvb_adap.num, adap->fe->id);
0488
0489
0490 ret = kthread_stop(adap->thread);
0491 adap->thread = NULL;
0492 return ret;
0493 }
0494
0495 static int pt3_start_feed(struct dvb_demux_feed *feed)
0496 {
0497 struct pt3_adapter *adap;
0498
0499 if (signal_pending(current))
0500 return -EINTR;
0501
0502 adap = container_of(feed->demux, struct pt3_adapter, demux);
0503 adap->num_feeds++;
0504 if (adap->num_feeds > 1)
0505 return 0;
0506
0507 return pt3_start_streaming(adap);
0508
0509 }
0510
0511 static int pt3_stop_feed(struct dvb_demux_feed *feed)
0512 {
0513 struct pt3_adapter *adap;
0514
0515 adap = container_of(feed->demux, struct pt3_adapter, demux);
0516
0517 adap->num_feeds--;
0518 if (adap->num_feeds > 0 || !adap->thread)
0519 return 0;
0520 adap->num_feeds = 0;
0521
0522 return pt3_stop_streaming(adap);
0523 }
0524
0525
0526 static int pt3_alloc_adapter(struct pt3_board *pt3, int index)
0527 {
0528 int ret;
0529 struct pt3_adapter *adap;
0530 struct dvb_adapter *da;
0531
0532 adap = kzalloc(sizeof(*adap), GFP_KERNEL);
0533 if (!adap)
0534 return -ENOMEM;
0535
0536 pt3->adaps[index] = adap;
0537 adap->adap_idx = index;
0538
0539 if (index == 0 || !one_adapter) {
0540 ret = dvb_register_adapter(&adap->dvb_adap, "PT3 DVB",
0541 THIS_MODULE, &pt3->pdev->dev, adapter_nr);
0542 if (ret < 0) {
0543 dev_err(&pt3->pdev->dev,
0544 "failed to register adapter dev\n");
0545 goto err_mem;
0546 }
0547 da = &adap->dvb_adap;
0548 } else
0549 da = &pt3->adaps[0]->dvb_adap;
0550
0551 adap->dvb_adap.priv = pt3;
0552 adap->demux.dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
0553 adap->demux.priv = adap;
0554 adap->demux.feednum = 256;
0555 adap->demux.filternum = 256;
0556 adap->demux.start_feed = pt3_start_feed;
0557 adap->demux.stop_feed = pt3_stop_feed;
0558 ret = dvb_dmx_init(&adap->demux);
0559 if (ret < 0) {
0560 dev_err(&pt3->pdev->dev, "failed to init dmx dev\n");
0561 goto err_adap;
0562 }
0563
0564 adap->dmxdev.filternum = 256;
0565 adap->dmxdev.demux = &adap->demux.dmx;
0566 ret = dvb_dmxdev_init(&adap->dmxdev, da);
0567 if (ret < 0) {
0568 dev_err(&pt3->pdev->dev, "failed to init dmxdev\n");
0569 goto err_demux;
0570 }
0571
0572 ret = pt3_alloc_dmabuf(adap);
0573 if (ret) {
0574 dev_err(&pt3->pdev->dev, "failed to alloc DMA buffers\n");
0575 goto err_dmabuf;
0576 }
0577
0578 return 0;
0579
0580 err_dmabuf:
0581 pt3_free_dmabuf(adap);
0582 dvb_dmxdev_release(&adap->dmxdev);
0583 err_demux:
0584 dvb_dmx_release(&adap->demux);
0585 err_adap:
0586 if (index == 0 || !one_adapter)
0587 dvb_unregister_adapter(da);
0588 err_mem:
0589 kfree(adap);
0590 pt3->adaps[index] = NULL;
0591 return ret;
0592 }
0593
0594 static void pt3_cleanup_adapter(struct pt3_board *pt3, int index)
0595 {
0596 struct pt3_adapter *adap;
0597 struct dmx_demux *dmx;
0598
0599 adap = pt3->adaps[index];
0600 if (adap == NULL)
0601 return;
0602
0603
0604 if (adap->thread)
0605 pt3_stop_streaming(adap);
0606
0607 dmx = &adap->demux.dmx;
0608 dmx->close(dmx);
0609 if (adap->fe) {
0610 adap->fe->callback = NULL;
0611 if (adap->fe->frontend_priv)
0612 dvb_unregister_frontend(adap->fe);
0613 dvb_module_release(adap->i2c_tuner);
0614 dvb_module_release(adap->i2c_demod);
0615 }
0616 pt3_free_dmabuf(adap);
0617 dvb_dmxdev_release(&adap->dmxdev);
0618 dvb_dmx_release(&adap->demux);
0619 if (index == 0 || !one_adapter)
0620 dvb_unregister_adapter(&adap->dvb_adap);
0621 kfree(adap);
0622 pt3->adaps[index] = NULL;
0623 }
0624
0625 #ifdef CONFIG_PM_SLEEP
0626
0627 static int pt3_suspend(struct device *dev)
0628 {
0629 struct pt3_board *pt3 = dev_get_drvdata(dev);
0630 int i;
0631 struct pt3_adapter *adap;
0632
0633 for (i = 0; i < PT3_NUM_FE; i++) {
0634 adap = pt3->adaps[i];
0635 if (adap->num_feeds > 0)
0636 pt3_stop_dma(adap);
0637 dvb_frontend_suspend(adap->fe);
0638 pt3_free_dmabuf(adap);
0639 }
0640
0641 pt3_lnb_ctrl(pt3, false);
0642 pt3_set_tuner_power(pt3, false, false);
0643 return 0;
0644 }
0645
0646 static int pt3_resume(struct device *dev)
0647 {
0648 struct pt3_board *pt3 = dev_get_drvdata(dev);
0649 int i, ret;
0650 struct pt3_adapter *adap;
0651
0652 ret = pt3_fe_init(pt3);
0653 if (ret)
0654 return ret;
0655
0656 if (pt3->lna_on_cnt > 0)
0657 pt3_set_tuner_power(pt3, true, true);
0658 if (pt3->lnb_on_cnt > 0)
0659 pt3_lnb_ctrl(pt3, true);
0660
0661 for (i = 0; i < PT3_NUM_FE; i++) {
0662 adap = pt3->adaps[i];
0663 dvb_frontend_resume(adap->fe);
0664 ret = pt3_alloc_dmabuf(adap);
0665 if (ret) {
0666 dev_err(&pt3->pdev->dev, "failed to alloc DMA bufs\n");
0667 continue;
0668 }
0669 if (adap->num_feeds > 0)
0670 pt3_start_dma(adap);
0671 }
0672
0673 return 0;
0674 }
0675
0676 #endif
0677
0678
0679 static void pt3_remove(struct pci_dev *pdev)
0680 {
0681 struct pt3_board *pt3;
0682 int i;
0683
0684 pt3 = pci_get_drvdata(pdev);
0685 for (i = PT3_NUM_FE - 1; i >= 0; i--)
0686 pt3_cleanup_adapter(pt3, i);
0687 i2c_del_adapter(&pt3->i2c_adap);
0688 }
0689
0690 static int pt3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
0691 {
0692 u8 rev;
0693 u32 ver;
0694 int i, ret;
0695 struct pt3_board *pt3;
0696 struct i2c_adapter *i2c;
0697
0698 if (pci_read_config_byte(pdev, PCI_REVISION_ID, &rev) || rev != 1)
0699 return -ENODEV;
0700
0701 ret = pcim_enable_device(pdev);
0702 if (ret < 0)
0703 return -ENODEV;
0704 pci_set_master(pdev);
0705
0706 ret = pcim_iomap_regions(pdev, BIT(0) | BIT(2), DRV_NAME);
0707 if (ret < 0)
0708 return ret;
0709
0710 ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
0711 if (ret == 0)
0712 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
0713 else {
0714 ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
0715 if (ret == 0)
0716 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
0717 else {
0718 dev_err(&pdev->dev, "Failed to set DMA mask\n");
0719 return ret;
0720 }
0721 dev_info(&pdev->dev, "Use 32bit DMA\n");
0722 }
0723
0724 pt3 = devm_kzalloc(&pdev->dev, sizeof(*pt3), GFP_KERNEL);
0725 if (!pt3)
0726 return -ENOMEM;
0727 pci_set_drvdata(pdev, pt3);
0728 pt3->pdev = pdev;
0729 mutex_init(&pt3->lock);
0730 pt3->regs[0] = pcim_iomap_table(pdev)[0];
0731 pt3->regs[1] = pcim_iomap_table(pdev)[2];
0732
0733 ver = ioread32(pt3->regs[0] + REG_VERSION);
0734 if ((ver >> 16) != 0x0301) {
0735 dev_warn(&pdev->dev, "PT%d, I/F-ver.:%d not supported\n",
0736 ver >> 24, (ver & 0x00ff0000) >> 16);
0737 return -ENODEV;
0738 }
0739
0740 pt3->num_bufs = clamp_val(num_bufs, MIN_DATA_BUFS, MAX_DATA_BUFS);
0741
0742 pt3->i2c_buf = devm_kmalloc(&pdev->dev, sizeof(*pt3->i2c_buf), GFP_KERNEL);
0743 if (!pt3->i2c_buf)
0744 return -ENOMEM;
0745 i2c = &pt3->i2c_adap;
0746 i2c->owner = THIS_MODULE;
0747 i2c->algo = &pt3_i2c_algo;
0748 i2c->algo_data = NULL;
0749 i2c->dev.parent = &pdev->dev;
0750 strscpy(i2c->name, DRV_NAME, sizeof(i2c->name));
0751 i2c_set_adapdata(i2c, pt3);
0752 ret = i2c_add_adapter(i2c);
0753 if (ret < 0)
0754 return ret;
0755
0756 for (i = 0; i < PT3_NUM_FE; i++) {
0757 ret = pt3_alloc_adapter(pt3, i);
0758 if (ret < 0)
0759 break;
0760
0761 ret = pt3_attach_fe(pt3, i);
0762 if (ret < 0)
0763 break;
0764 }
0765 if (i < PT3_NUM_FE) {
0766 dev_err(&pdev->dev, "Failed to create FE%d\n", i);
0767 goto err_cleanup_adapters;
0768 }
0769
0770 ret = pt3_fe_init(pt3);
0771 if (ret < 0) {
0772 dev_err(&pdev->dev, "Failed to init frontends\n");
0773 i = PT3_NUM_FE - 1;
0774 goto err_cleanup_adapters;
0775 }
0776
0777 dev_info(&pdev->dev,
0778 "successfully init'ed PT%d (fw:0x%02x, I/F:0x%02x)\n",
0779 ver >> 24, (ver >> 8) & 0xff, (ver >> 16) & 0xff);
0780 return 0;
0781
0782 err_cleanup_adapters:
0783 while (i >= 0)
0784 pt3_cleanup_adapter(pt3, i--);
0785 i2c_del_adapter(i2c);
0786 return ret;
0787 }
0788
0789 static const struct pci_device_id pt3_id_table[] = {
0790 { PCI_DEVICE_SUB(0x1172, 0x4c15, 0xee8d, 0x0368) },
0791 { },
0792 };
0793 MODULE_DEVICE_TABLE(pci, pt3_id_table);
0794
0795 static SIMPLE_DEV_PM_OPS(pt3_pm_ops, pt3_suspend, pt3_resume);
0796
0797 static struct pci_driver pt3_driver = {
0798 .name = DRV_NAME,
0799 .probe = pt3_probe,
0800 .remove = pt3_remove,
0801 .id_table = pt3_id_table,
0802
0803 .driver.pm = &pt3_pm_ops,
0804 };
0805
0806 module_pci_driver(pt3_driver);
0807
0808 MODULE_DESCRIPTION("Earthsoft PT3 Driver");
0809 MODULE_AUTHOR("Akihiro TSUKADA");
0810 MODULE_LICENSE("GPL");