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0014 #include <linux/module.h>
0015 #include <linux/init.h>
0016 #include <linux/delay.h>
0017 #include <linux/slab.h>
0018 #include <linux/poll.h>
0019 #include <linux/io.h>
0020 #include <asm/div64.h>
0021 #include <linux/pci.h>
0022 #include <linux/pci_ids.h>
0023 #include <linux/timer.h>
0024 #include <linux/byteorder/generic.h>
0025 #include <linux/firmware.h>
0026 #include <linux/vmalloc.h>
0027
0028 #include "ngene.h"
0029
0030
0031 static int ngene_command_i2c_read(struct ngene *dev, u8 adr,
0032 u8 *out, u8 outlen, u8 *in, u8 inlen, int flag)
0033 {
0034 struct ngene_command com;
0035
0036 com.cmd.hdr.Opcode = CMD_I2C_READ;
0037 com.cmd.hdr.Length = outlen + 3;
0038 com.cmd.I2CRead.Device = adr << 1;
0039 memcpy(com.cmd.I2CRead.Data, out, outlen);
0040 com.cmd.I2CRead.Data[outlen] = inlen;
0041 com.cmd.I2CRead.Data[outlen + 1] = 0;
0042 com.in_len = outlen + 3;
0043 com.out_len = inlen + 1;
0044
0045 if (ngene_command(dev, &com) < 0)
0046 return -EIO;
0047
0048 if ((com.cmd.raw8[0] >> 1) != adr)
0049 return -EIO;
0050
0051 if (flag)
0052 memcpy(in, com.cmd.raw8, inlen + 1);
0053 else
0054 memcpy(in, com.cmd.raw8 + 1, inlen);
0055 return 0;
0056 }
0057
0058 static int ngene_command_i2c_write(struct ngene *dev, u8 adr,
0059 u8 *out, u8 outlen)
0060 {
0061 struct ngene_command com;
0062
0063
0064 com.cmd.hdr.Opcode = CMD_I2C_WRITE;
0065 com.cmd.hdr.Length = outlen + 1;
0066 com.cmd.I2CRead.Device = adr << 1;
0067 memcpy(com.cmd.I2CRead.Data, out, outlen);
0068 com.in_len = outlen + 1;
0069 com.out_len = 1;
0070
0071 if (ngene_command(dev, &com) < 0)
0072 return -EIO;
0073
0074 if (com.cmd.raw8[0] == 1)
0075 return -EIO;
0076
0077 return 0;
0078 }
0079
0080 static void ngene_i2c_set_bus(struct ngene *dev, int bus)
0081 {
0082 if (!(dev->card_info->i2c_access & 2))
0083 return;
0084 if (dev->i2c_current_bus == bus)
0085 return;
0086
0087 switch (bus) {
0088 case 0:
0089 ngene_command_gpio_set(dev, 3, 0);
0090 ngene_command_gpio_set(dev, 2, 1);
0091 break;
0092
0093 case 1:
0094 ngene_command_gpio_set(dev, 2, 0);
0095 ngene_command_gpio_set(dev, 3, 1);
0096 break;
0097 }
0098 dev->i2c_current_bus = bus;
0099 }
0100
0101 static int ngene_i2c_master_xfer(struct i2c_adapter *adapter,
0102 struct i2c_msg msg[], int num)
0103 {
0104 struct ngene_channel *chan =
0105 (struct ngene_channel *)i2c_get_adapdata(adapter);
0106 struct ngene *dev = chan->dev;
0107
0108 mutex_lock(&dev->i2c_switch_mutex);
0109 ngene_i2c_set_bus(dev, chan->number);
0110
0111 if (num == 2 && msg[1].flags & I2C_M_RD && !(msg[0].flags & I2C_M_RD))
0112 if (!ngene_command_i2c_read(dev, msg[0].addr,
0113 msg[0].buf, msg[0].len,
0114 msg[1].buf, msg[1].len, 0))
0115 goto done;
0116
0117 if (num == 1 && !(msg[0].flags & I2C_M_RD))
0118 if (!ngene_command_i2c_write(dev, msg[0].addr,
0119 msg[0].buf, msg[0].len))
0120 goto done;
0121 if (num == 1 && (msg[0].flags & I2C_M_RD))
0122 if (!ngene_command_i2c_read(dev, msg[0].addr, NULL, 0,
0123 msg[0].buf, msg[0].len, 0))
0124 goto done;
0125
0126 mutex_unlock(&dev->i2c_switch_mutex);
0127 return -EIO;
0128
0129 done:
0130 mutex_unlock(&dev->i2c_switch_mutex);
0131 return num;
0132 }
0133
0134
0135 static u32 ngene_i2c_functionality(struct i2c_adapter *adap)
0136 {
0137 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
0138 }
0139
0140 static const struct i2c_algorithm ngene_i2c_algo = {
0141 .master_xfer = ngene_i2c_master_xfer,
0142 .functionality = ngene_i2c_functionality,
0143 };
0144
0145 int ngene_i2c_init(struct ngene *dev, int dev_nr)
0146 {
0147 struct i2c_adapter *adap = &(dev->channel[dev_nr].i2c_adapter);
0148
0149 i2c_set_adapdata(adap, &(dev->channel[dev_nr]));
0150
0151 strscpy(adap->name, "nGene", sizeof(adap->name));
0152
0153 adap->algo = &ngene_i2c_algo;
0154 adap->algo_data = (void *)&(dev->channel[dev_nr]);
0155 adap->dev.parent = &dev->pci_dev->dev;
0156
0157 return i2c_add_adapter(adap);
0158 }
0159