pci/netup_unidvb/netup_unidvb_spi.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * netup_unidvb_spi.c
0004  *
0005  * Internal SPI driver for NetUP Universal Dual DVB-CI
0006  *
0007  * Copyright (C) 2014 NetUP Inc.
0008  * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
0009  * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
0010  */
0011
0012 #include "netup_unidvb.h"
0013 #include <linux/spi/spi.h>
0014 #include <linux/spi/flash.h>
0015 #include <linux/mtd/partitions.h>
0016 #include <mtd/mtd-abi.h>
0017
0018 #define NETUP_SPI_CTRL_IRQ  0x1000
0019 #define NETUP_SPI_CTRL_IMASK    0x2000
0020 #define NETUP_SPI_CTRL_START    0x8000
0021 #define NETUP_SPI_CTRL_LAST_CS  0x4000
0022
0023 #define NETUP_SPI_TIMEOUT   6000
0024
0025 enum netup_spi_state {
0026     SPI_STATE_START,
0027     SPI_STATE_DONE,
0028 };
0029
0030 struct netup_spi_regs {
0031     __u8    data[1024];
0032     __le16  control_stat;
0033     __le16  clock_divider;
0034 } __packed __aligned(1);
0035
0036 struct netup_spi {
0037     struct device           *dev;
0038     struct spi_master       *master;
0039     struct netup_spi_regs __iomem   *regs;
0040     u8 __iomem          *mmio;
0041     spinlock_t          lock;
0042     wait_queue_head_t       waitq;
0043     enum netup_spi_state        state;
0044 };
0045
0046 static char netup_spi_name[64] = "fpga";
0047
0048 static struct mtd_partition netup_spi_flash_partitions = {
0049     .name = netup_spi_name,
0050     .size = 0x1000000, /* 16MB */
0051     .offset = 0,
0052     .mask_flags = MTD_CAP_ROM
0053 };
0054
0055 static struct flash_platform_data spi_flash_data = {
0056     .name = "netup0_m25p128",
0057     .parts = &netup_spi_flash_partitions,
0058     .nr_parts = 1,
0059 };
0060
0061 static struct spi_board_info netup_spi_board = {
0062     .modalias = "m25p128",
0063     .max_speed_hz = 11000000,
0064     .chip_select = 0,
0065     .mode = SPI_MODE_0,
0066     .platform_data = &spi_flash_data,
0067 };
0068
0069 irqreturn_t netup_spi_interrupt(struct netup_spi *spi)
0070 {
0071     u16 reg;
0072     unsigned long flags;
0073
0074     if (!spi)
0075         return IRQ_NONE;
0076
0077     spin_lock_irqsave(&spi->lock, flags);
0078     reg = readw(&spi->regs->control_stat);
0079     if (!(reg & NETUP_SPI_CTRL_IRQ)) {
0080         spin_unlock_irqrestore(&spi->lock, flags);
0081         dev_dbg(&spi->master->dev,
0082             "%s(): not mine interrupt\n", __func__);
0083         return IRQ_NONE;
0084     }
0085     writew(reg | NETUP_SPI_CTRL_IRQ, &spi->regs->control_stat);
0086     reg = readw(&spi->regs->control_stat);
0087     writew(reg & ~NETUP_SPI_CTRL_IMASK, &spi->regs->control_stat);
0088     spi->state = SPI_STATE_DONE;
0089     wake_up(&spi->waitq);
0090     spin_unlock_irqrestore(&spi->lock, flags);
0091     dev_dbg(&spi->master->dev,
0092         "%s(): SPI interrupt handled\n", __func__);
0093     return IRQ_HANDLED;
0094 }
0095
0096 static int netup_spi_transfer(struct spi_master *master,
0097                   struct spi_message *msg)
0098 {
0099     struct netup_spi *spi = spi_master_get_devdata(master);
0100     struct spi_transfer *t;
0101     int result = 0;
0102     u32 tr_size;
0103
0104     /* reset CS */
0105     writew(NETUP_SPI_CTRL_LAST_CS, &spi->regs->control_stat);
0106     writew(0, &spi->regs->control_stat);
0107     list_for_each_entry(t, &msg->transfers, transfer_list) {
0108         tr_size = t->len;
0109         while (tr_size) {
0110             u32 frag_offset = t->len - tr_size;
0111             u32 frag_size = (tr_size > sizeof(spi->regs->data)) ?
0112                     sizeof(spi->regs->data) : tr_size;
0113             int frag_last = 0;
0114
0115             if (list_is_last(&t->transfer_list,
0116                     &msg->transfers) &&
0117                     frag_offset + frag_size == t->len) {
0118                 frag_last = 1;
0119             }
0120             if (t->tx_buf) {
0121                 memcpy_toio(spi->regs->data,
0122                     t->tx_buf + frag_offset,
0123                     frag_size);
0124             } else {
0125                 memset_io(spi->regs->data,
0126                     0, frag_size);
0127             }
0128             spi->state = SPI_STATE_START;
0129             writew((frag_size & 0x3ff) |
0130                 NETUP_SPI_CTRL_IMASK |
0131                 NETUP_SPI_CTRL_START |
0132                 (frag_last ? NETUP_SPI_CTRL_LAST_CS : 0),
0133                 &spi->regs->control_stat);
0134             dev_dbg(&spi->master->dev,
0135                 "%s(): control_stat 0x%04x\n",
0136                 __func__, readw(&spi->regs->control_stat));
0137             wait_event_timeout(spi->waitq,
0138                 spi->state != SPI_STATE_START,
0139                 msecs_to_jiffies(NETUP_SPI_TIMEOUT));
0140             if (spi->state == SPI_STATE_DONE) {
0141                 if (t->rx_buf) {
0142                     memcpy_fromio(t->rx_buf + frag_offset,
0143                         spi->regs->data, frag_size);
0144                 }
0145             } else {
0146                 if (spi->state == SPI_STATE_START) {
0147                     dev_dbg(&spi->master->dev,
0148                         "%s(): transfer timeout\n",
0149                         __func__);
0150                 } else {
0151                     dev_dbg(&spi->master->dev,
0152                         "%s(): invalid state %d\n",
0153                         __func__, spi->state);
0154                 }
0155                 result = -EIO;
0156                 goto done;
0157             }
0158             tr_size -= frag_size;
0159             msg->actual_length += frag_size;
0160         }
0161     }
0162 done:
0163     msg->status = result;
0164     spi_finalize_current_message(master);
0165     return result;
0166 }
0167
0168 static int netup_spi_setup(struct spi_device *spi)
0169 {
0170     return 0;
0171 }
0172
0173 int netup_spi_init(struct netup_unidvb_dev *ndev)
0174 {
0175     struct spi_master *master;
0176     struct netup_spi *nspi;
0177
0178     master = devm_spi_alloc_master(&ndev->pci_dev->dev,
0179         sizeof(struct netup_spi));
0180     if (!master) {
0181         dev_err(&ndev->pci_dev->dev,
0182             "%s(): unable to alloc SPI master\n", __func__);
0183         return -EINVAL;
0184     }
0185     nspi = spi_master_get_devdata(master);
0186     master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
0187     master->bus_num = -1;
0188     master->num_chipselect = 1;
0189     master->transfer_one_message = netup_spi_transfer;
0190     master->setup = netup_spi_setup;
0191     spin_lock_init(&nspi->lock);
0192     init_waitqueue_head(&nspi->waitq);
0193     nspi->master = master;
0194     nspi->regs = (struct netup_spi_regs __iomem *)(ndev->bmmio0 + 0x4000);
0195     writew(2, &nspi->regs->clock_divider);
0196     writew(NETUP_UNIDVB_IRQ_SPI, ndev->bmmio0 + REG_IMASK_SET);
0197     ndev->spi = nspi;
0198     if (spi_register_master(master)) {
0199         ndev->spi = NULL;
0200         dev_err(&ndev->pci_dev->dev,
0201             "%s(): unable to register SPI bus\n", __func__);
0202         return -EINVAL;
0203     }
0204     snprintf(netup_spi_name,
0205         sizeof(netup_spi_name),
0206         "fpga_%02x:%02x.%01x",
0207         ndev->pci_bus,
0208         ndev->pci_slot,
0209         ndev->pci_func);
0210     if (!spi_new_device(master, &netup_spi_board)) {
0211         spi_unregister_master(master);
0212         ndev->spi = NULL;
0213         dev_err(&ndev->pci_dev->dev,
0214             "%s(): unable to create SPI device\n", __func__);
0215         return -EINVAL;
0216     }
0217     dev_dbg(&ndev->pci_dev->dev, "%s(): SPI init OK\n", __func__);
0218     return 0;
0219 }
0220
0221 void netup_spi_release(struct netup_unidvb_dev *ndev)
0222 {
0223     u16 reg;
0224     unsigned long flags;
0225     struct netup_spi *spi = ndev->spi;
0226
0227     if (!spi)
0228         return;
0229
0230     spi_unregister_master(spi->master);
0231     spin_lock_irqsave(&spi->lock, flags);
0232     reg = readw(&spi->regs->control_stat);
0233     writew(reg | NETUP_SPI_CTRL_IRQ, &spi->regs->control_stat);
0234     reg = readw(&spi->regs->control_stat);
0235     writew(reg & ~NETUP_SPI_CTRL_IMASK, &spi->regs->control_stat);
0236     spin_unlock_irqrestore(&spi->lock, flags);
0237     ndev->spi = NULL;
0238 }
0239
0240