pci/netup_unidvb/netup_unidvb_ci.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * netup_unidvb_ci.c
0004  *
0005  * DVB CAM support for NetUP Universal Dual DVB-CI
0006  *
0007  * Copyright (C) 2014 NetUP Inc.
0008  * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
0009  * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
0010  */
0011
0012 #include <linux/init.h>
0013 #include <linux/module.h>
0014 #include <linux/moduleparam.h>
0015 #include <linux/kmod.h>
0016 #include <linux/kernel.h>
0017 #include <linux/slab.h>
0018 #include <linux/interrupt.h>
0019 #include <linux/delay.h>
0020 #include "netup_unidvb.h"
0021
0022 /* CI slot 0 base address */
0023 #define CAM0_CONFIG     0x0
0024 #define CAM0_IO         0x8000
0025 #define CAM0_MEM        0x10000
0026 #define CAM0_SZ         32
0027 /* CI slot 1 base address */
0028 #define CAM1_CONFIG     0x20000
0029 #define CAM1_IO         0x28000
0030 #define CAM1_MEM        0x30000
0031 #define CAM1_SZ         32
0032 /* ctrlstat registers */
0033 #define CAM_CTRLSTAT_READ_SET   0x4980
0034 #define CAM_CTRLSTAT_CLR    0x4982
0035 /* register bits */
0036 #define BIT_CAM_STCHG       (1<<0)
0037 #define BIT_CAM_PRESENT     (1<<1)
0038 #define BIT_CAM_RESET       (1<<2)
0039 #define BIT_CAM_BYPASS      (1<<3)
0040 #define BIT_CAM_READY       (1<<4)
0041 #define BIT_CAM_ERROR       (1<<5)
0042 #define BIT_CAM_OVERCURR    (1<<6)
0043 /* BIT_CAM_BYPASS bit shift for SLOT 1 */
0044 #define CAM1_SHIFT 8
0045
0046 irqreturn_t netup_ci_interrupt(struct netup_unidvb_dev *ndev)
0047 {
0048     writew(0x101, ndev->bmmio0 + CAM_CTRLSTAT_CLR);
0049     return IRQ_HANDLED;
0050 }
0051
0052 static int netup_unidvb_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221,
0053                        int slot)
0054 {
0055     struct netup_ci_state *state = en50221->data;
0056     struct netup_unidvb_dev *dev = state->dev;
0057     u16 shift = (state->nr == 1) ? CAM1_SHIFT : 0;
0058
0059     dev_dbg(&dev->pci_dev->dev, "%s(): CAM_CTRLSTAT=0x%x\n",
0060         __func__, readw(dev->bmmio0 + CAM_CTRLSTAT_READ_SET));
0061     if (slot != 0)
0062         return -EINVAL;
0063     /* pass data to CAM module */
0064     writew(BIT_CAM_BYPASS << shift, dev->bmmio0 + CAM_CTRLSTAT_CLR);
0065     dev_dbg(&dev->pci_dev->dev, "%s(): CAM_CTRLSTAT=0x%x done\n",
0066         __func__, readw(dev->bmmio0 + CAM_CTRLSTAT_READ_SET));
0067     return 0;
0068 }
0069
0070 static int netup_unidvb_ci_slot_shutdown(struct dvb_ca_en50221 *en50221,
0071                      int slot)
0072 {
0073     struct netup_ci_state *state = en50221->data;
0074     struct netup_unidvb_dev *dev = state->dev;
0075
0076     dev_dbg(&dev->pci_dev->dev, "%s()\n", __func__);
0077     return 0;
0078 }
0079
0080 static int netup_unidvb_ci_slot_reset(struct dvb_ca_en50221 *en50221,
0081                       int slot)
0082 {
0083     struct netup_ci_state *state = en50221->data;
0084     struct netup_unidvb_dev *dev = state->dev;
0085     unsigned long timeout = 0;
0086     u16 shift = (state->nr == 1) ? CAM1_SHIFT : 0;
0087     u16 ci_stat = 0;
0088     int reset_counter = 3;
0089
0090     dev_dbg(&dev->pci_dev->dev, "%s(): CAM_CTRLSTAT_READ_SET=0x%x\n",
0091         __func__, readw(dev->bmmio0 + CAM_CTRLSTAT_READ_SET));
0092 reset:
0093     timeout = jiffies + msecs_to_jiffies(5000);
0094     /* start reset */
0095     writew(BIT_CAM_RESET << shift, dev->bmmio0 + CAM_CTRLSTAT_READ_SET);
0096     dev_dbg(&dev->pci_dev->dev, "%s(): waiting for reset\n", __func__);
0097     /* wait until reset done */
0098     while (time_before(jiffies, timeout)) {
0099         ci_stat = readw(dev->bmmio0 + CAM_CTRLSTAT_READ_SET);
0100         if (ci_stat & (BIT_CAM_READY << shift))
0101             break;
0102         udelay(1000);
0103     }
0104     if (!(ci_stat & (BIT_CAM_READY << shift)) && reset_counter > 0) {
0105         dev_dbg(&dev->pci_dev->dev,
0106             "%s(): CAMP reset timeout! Will try again..\n",
0107              __func__);
0108         reset_counter--;
0109         goto reset;
0110     }
0111     return 0;
0112 }
0113
0114 static int netup_unidvb_poll_ci_slot_status(struct dvb_ca_en50221 *en50221,
0115                         int slot, int open)
0116 {
0117     struct netup_ci_state *state = en50221->data;
0118     struct netup_unidvb_dev *dev = state->dev;
0119     u16 shift = (state->nr == 1) ? CAM1_SHIFT : 0;
0120     u16 ci_stat = 0;
0121
0122     dev_dbg(&dev->pci_dev->dev, "%s(): CAM_CTRLSTAT_READ_SET=0x%x\n",
0123         __func__, readw(dev->bmmio0 + CAM_CTRLSTAT_READ_SET));
0124     ci_stat = readw(dev->bmmio0 + CAM_CTRLSTAT_READ_SET);
0125     if (ci_stat & (BIT_CAM_READY << shift)) {
0126         state->status = DVB_CA_EN50221_POLL_CAM_PRESENT |
0127             DVB_CA_EN50221_POLL_CAM_READY;
0128     } else if (ci_stat & (BIT_CAM_PRESENT << shift)) {
0129         state->status = DVB_CA_EN50221_POLL_CAM_PRESENT;
0130     } else {
0131         state->status = 0;
0132     }
0133     return state->status;
0134 }
0135
0136 static int netup_unidvb_ci_read_attribute_mem(struct dvb_ca_en50221 *en50221,
0137                           int slot, int addr)
0138 {
0139     struct netup_ci_state *state = en50221->data;
0140     struct netup_unidvb_dev *dev = state->dev;
0141     u8 val = *((u8 __force *)state->membase8_config + addr);
0142
0143     dev_dbg(&dev->pci_dev->dev,
0144         "%s(): addr=0x%x val=0x%x\n", __func__, addr, val);
0145     return val;
0146 }
0147
0148 static int netup_unidvb_ci_write_attribute_mem(struct dvb_ca_en50221 *en50221,
0149                            int slot, int addr, u8 data)
0150 {
0151     struct netup_ci_state *state = en50221->data;
0152     struct netup_unidvb_dev *dev = state->dev;
0153
0154     dev_dbg(&dev->pci_dev->dev,
0155         "%s(): addr=0x%x data=0x%x\n", __func__, addr, data);
0156     *((u8 __force *)state->membase8_config + addr) = data;
0157     return 0;
0158 }
0159
0160 static int netup_unidvb_ci_read_cam_ctl(struct dvb_ca_en50221 *en50221,
0161                     int slot, u8 addr)
0162 {
0163     struct netup_ci_state *state = en50221->data;
0164     struct netup_unidvb_dev *dev = state->dev;
0165     u8 val = *((u8 __force *)state->membase8_io + addr);
0166
0167     dev_dbg(&dev->pci_dev->dev,
0168         "%s(): addr=0x%x val=0x%x\n", __func__, addr, val);
0169     return val;
0170 }
0171
0172 static int netup_unidvb_ci_write_cam_ctl(struct dvb_ca_en50221 *en50221,
0173                      int slot, u8 addr, u8 data)
0174 {
0175     struct netup_ci_state *state = en50221->data;
0176     struct netup_unidvb_dev *dev = state->dev;
0177
0178     dev_dbg(&dev->pci_dev->dev,
0179         "%s(): addr=0x%x data=0x%x\n", __func__, addr, data);
0180     *((u8 __force *)state->membase8_io + addr) = data;
0181     return 0;
0182 }
0183
0184 int netup_unidvb_ci_register(struct netup_unidvb_dev *dev,
0185                  int num, struct pci_dev *pci_dev)
0186 {
0187     int result;
0188     struct netup_ci_state *state;
0189
0190     if (num < 0 || num > 1) {
0191         dev_err(&pci_dev->dev, "%s(): invalid CI adapter %d\n",
0192             __func__, num);
0193         return -EINVAL;
0194     }
0195     state = &dev->ci[num];
0196     state->nr = num;
0197     state->membase8_config = dev->bmmio1 +
0198         ((num == 0) ? CAM0_CONFIG : CAM1_CONFIG);
0199     state->membase8_io = dev->bmmio1 +
0200         ((num == 0) ? CAM0_IO : CAM1_IO);
0201     state->dev = dev;
0202     state->ca.owner = THIS_MODULE;
0203     state->ca.read_attribute_mem = netup_unidvb_ci_read_attribute_mem;
0204     state->ca.write_attribute_mem = netup_unidvb_ci_write_attribute_mem;
0205     state->ca.read_cam_control = netup_unidvb_ci_read_cam_ctl;
0206     state->ca.write_cam_control = netup_unidvb_ci_write_cam_ctl;
0207     state->ca.slot_reset = netup_unidvb_ci_slot_reset;
0208     state->ca.slot_shutdown = netup_unidvb_ci_slot_shutdown;
0209     state->ca.slot_ts_enable = netup_unidvb_ci_slot_ts_ctl;
0210     state->ca.poll_slot_status = netup_unidvb_poll_ci_slot_status;
0211     state->ca.data = state;
0212     result = dvb_ca_en50221_init(&dev->frontends[num].adapter,
0213         &state->ca, 0, 1);
0214     if (result < 0) {
0215         dev_err(&pci_dev->dev,
0216             "%s(): dvb_ca_en50221_init result %d\n",
0217             __func__, result);
0218         return result;
0219     }
0220     writew(NETUP_UNIDVB_IRQ_CI, dev->bmmio0 + REG_IMASK_SET);
0221     dev_info(&pci_dev->dev,
0222         "%s(): CI adapter %d init done\n", __func__, num);
0223     return 0;
0224 }
0225
0226 void netup_unidvb_ci_unregister(struct netup_unidvb_dev *dev, int num)
0227 {
0228     struct netup_ci_state *state;
0229
0230     dev_dbg(&dev->pci_dev->dev, "%s()\n", __func__);
0231     if (num < 0 || num > 1) {
0232         dev_err(&dev->pci_dev->dev, "%s(): invalid CI adapter %d\n",
0233                 __func__, num);
0234         return;
0235     }
0236     state = &dev->ci[num];
0237     dvb_ca_en50221_release(&state->ca);
0238 }
0239