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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
0004  *
0005  * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
0006  */
0007 
0008 #include <linux/i2c.h>
0009 #include <linux/i2c-algo-bit.h>
0010 #include <linux/init.h>
0011 #include <linux/interrupt.h>
0012 #include <linux/kernel.h>
0013 #include <linux/module.h>
0014 #include <linux/pci.h>
0015 #include <linux/dma-mapping.h>
0016 #include <linux/slab.h>
0017 #include <media/rc-core.h>
0018 
0019 #include <media/demux.h>
0020 #include <media/dmxdev.h>
0021 #include <media/dvb_demux.h>
0022 #include <media/dvb_frontend.h>
0023 #include <media/dvb_net.h>
0024 #include <media/dvbdev.h>
0025 #include "dvb-pll.h"
0026 
0027 #include "stv0299.h"
0028 #include "stv0288.h"
0029 #include "stb6000.h"
0030 #include "si21xx.h"
0031 #include "cx24116.h"
0032 #include "z0194a.h"
0033 #include "ts2020.h"
0034 #include "ds3000.h"
0035 
0036 #define MODULE_NAME "dm1105"
0037 
0038 #define UNSET (-1U)
0039 
0040 #define DM1105_BOARD_NOAUTO         UNSET
0041 #define DM1105_BOARD_UNKNOWN            0
0042 #define DM1105_BOARD_DVBWORLD_2002      1
0043 #define DM1105_BOARD_DVBWORLD_2004      2
0044 #define DM1105_BOARD_AXESS_DM05         3
0045 #define DM1105_BOARD_UNBRANDED_I2C_ON_GPIO  4
0046 
0047 /* ----------------------------------------------- */
0048 /*
0049  * PCI ID's
0050  */
0051 #ifndef PCI_VENDOR_ID_TRIGEM
0052 #define PCI_VENDOR_ID_TRIGEM    0x109f
0053 #endif
0054 #ifndef PCI_VENDOR_ID_AXESS
0055 #define PCI_VENDOR_ID_AXESS 0x195d
0056 #endif
0057 #ifndef PCI_DEVICE_ID_DM1105
0058 #define PCI_DEVICE_ID_DM1105    0x036f
0059 #endif
0060 #ifndef PCI_DEVICE_ID_DW2002
0061 #define PCI_DEVICE_ID_DW2002    0x2002
0062 #endif
0063 #ifndef PCI_DEVICE_ID_DW2004
0064 #define PCI_DEVICE_ID_DW2004    0x2004
0065 #endif
0066 #ifndef PCI_DEVICE_ID_DM05
0067 #define PCI_DEVICE_ID_DM05  0x1105
0068 #endif
0069 /* ----------------------------------------------- */
0070 /* sdmc dm1105 registers */
0071 
0072 /* TS Control */
0073 #define DM1105_TSCTR                0x00
0074 #define DM1105_DTALENTH             0x04
0075 
0076 /* GPIO Interface */
0077 #define DM1105_GPIOVAL              0x08
0078 #define DM1105_GPIOCTR              0x0c
0079 
0080 /* PID serial number */
0081 #define DM1105_PIDN             0x10
0082 
0083 /* Odd-even secret key select */
0084 #define DM1105_CWSEL                0x14
0085 
0086 /* Host Command Interface */
0087 #define DM1105_HOST_CTR             0x18
0088 #define DM1105_HOST_AD              0x1c
0089 
0090 /* PCI Interface */
0091 #define DM1105_CR               0x30
0092 #define DM1105_RST              0x34
0093 #define DM1105_STADR                0x38
0094 #define DM1105_RLEN             0x3c
0095 #define DM1105_WRP              0x40
0096 #define DM1105_INTCNT               0x44
0097 #define DM1105_INTMAK               0x48
0098 #define DM1105_INTSTS               0x4c
0099 
0100 /* CW Value */
0101 #define DM1105_ODD              0x50
0102 #define DM1105_EVEN             0x58
0103 
0104 /* PID Value */
0105 #define DM1105_PID              0x60
0106 
0107 /* IR Control */
0108 #define DM1105_IRCTR                0x64
0109 #define DM1105_IRMODE               0x68
0110 #define DM1105_SYSTEMCODE           0x6c
0111 #define DM1105_IRCODE               0x70
0112 
0113 /* Unknown Values */
0114 #define DM1105_ENCRYPT              0x74
0115 #define DM1105_VER              0x7c
0116 
0117 /* I2C Interface */
0118 #define DM1105_I2CCTR               0x80
0119 #define DM1105_I2CSTS               0x81
0120 #define DM1105_I2CDAT               0x82
0121 #define DM1105_I2C_RA               0x83
0122 /* ----------------------------------------------- */
0123 /* Interrupt Mask Bits */
0124 
0125 #define INTMAK_TSIRQM               0x01
0126 #define INTMAK_HIRQM                0x04
0127 #define INTMAK_IRM              0x08
0128 #define INTMAK_ALLMASK              (INTMAK_TSIRQM | \
0129                         INTMAK_HIRQM | \
0130                         INTMAK_IRM)
0131 #define INTMAK_NONEMASK             0x00
0132 
0133 /* Interrupt Status Bits */
0134 #define INTSTS_TSIRQ                0x01
0135 #define INTSTS_HIRQ             0x04
0136 #define INTSTS_IR               0x08
0137 
0138 /* IR Control Bits */
0139 #define DM1105_IR_EN                0x01
0140 #define DM1105_SYS_CHK              0x02
0141 #define DM1105_REP_FLG              0x08
0142 
0143 /* EEPROM addr */
0144 #define IIC_24C01_addr              0xa0
0145 /* Max board count */
0146 #define DM1105_MAX              0x04
0147 
0148 #define DRIVER_NAME             "dm1105"
0149 #define DM1105_I2C_GPIO_NAME            "dm1105-gpio"
0150 
0151 #define DM1105_DMA_PACKETS          47
0152 #define DM1105_DMA_PACKET_LENGTH        (128*4)
0153 #define DM1105_DMA_BYTES            (128 * 4 * DM1105_DMA_PACKETS)
0154 
0155 /*  */
0156 #define GPIO08                  (1 << 8)
0157 #define GPIO13                  (1 << 13)
0158 #define GPIO14                  (1 << 14)
0159 #define GPIO15                  (1 << 15)
0160 #define GPIO16                  (1 << 16)
0161 #define GPIO17                  (1 << 17)
0162 #define GPIO_ALL                0x03ffff
0163 
0164 /* GPIO's for LNB power control */
0165 #define DM1105_LNB_MASK             (GPIO_ALL & ~(GPIO14 | GPIO13))
0166 #define DM1105_LNB_OFF              GPIO17
0167 #define DM1105_LNB_13V              (GPIO16 | GPIO08)
0168 #define DM1105_LNB_18V              GPIO08
0169 
0170 /* GPIO's for LNB power control for Axess DM05 */
0171 #define DM05_LNB_MASK               (GPIO_ALL & ~(GPIO14 | GPIO13))
0172 #define DM05_LNB_OFF                GPIO17/* actually 13v */
0173 #define DM05_LNB_13V                GPIO17
0174 #define DM05_LNB_18V                (GPIO17 | GPIO16)
0175 
0176 /* GPIO's for LNB power control for unbranded with I2C on GPIO */
0177 #define UNBR_LNB_MASK               (GPIO17 | GPIO16)
0178 #define UNBR_LNB_OFF                0
0179 #define UNBR_LNB_13V                GPIO17
0180 #define UNBR_LNB_18V                (GPIO17 | GPIO16)
0181 
0182 static unsigned int card[]  = {[0 ... 3] = UNSET };
0183 module_param_array(card,  int, NULL, 0444);
0184 MODULE_PARM_DESC(card, "card type");
0185 
0186 static int ir_debug;
0187 module_param(ir_debug, int, 0644);
0188 MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
0189 
0190 static unsigned int dm1105_devcount;
0191 
0192 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
0193 
0194 struct dm1105_board {
0195     char    *name;
0196     struct  {
0197         u32 mask, off, v13, v18;
0198     } lnb;
0199     u32 gpio_scl, gpio_sda;
0200 };
0201 
0202 struct dm1105_subid {
0203     u16     subvendor;
0204     u16     subdevice;
0205     u32     card;
0206 };
0207 
0208 static const struct dm1105_board dm1105_boards[] = {
0209     [DM1105_BOARD_UNKNOWN] = {
0210         .name       = "UNKNOWN/GENERIC",
0211         .lnb = {
0212             .mask = DM1105_LNB_MASK,
0213             .off = DM1105_LNB_OFF,
0214             .v13 = DM1105_LNB_13V,
0215             .v18 = DM1105_LNB_18V,
0216         },
0217     },
0218     [DM1105_BOARD_DVBWORLD_2002] = {
0219         .name       = "DVBWorld PCI 2002",
0220         .lnb = {
0221             .mask = DM1105_LNB_MASK,
0222             .off = DM1105_LNB_OFF,
0223             .v13 = DM1105_LNB_13V,
0224             .v18 = DM1105_LNB_18V,
0225         },
0226     },
0227     [DM1105_BOARD_DVBWORLD_2004] = {
0228         .name       = "DVBWorld PCI 2004",
0229         .lnb = {
0230             .mask = DM1105_LNB_MASK,
0231             .off = DM1105_LNB_OFF,
0232             .v13 = DM1105_LNB_13V,
0233             .v18 = DM1105_LNB_18V,
0234         },
0235     },
0236     [DM1105_BOARD_AXESS_DM05] = {
0237         .name       = "Axess/EasyTv DM05",
0238         .lnb = {
0239             .mask = DM05_LNB_MASK,
0240             .off = DM05_LNB_OFF,
0241             .v13 = DM05_LNB_13V,
0242             .v18 = DM05_LNB_18V,
0243         },
0244     },
0245     [DM1105_BOARD_UNBRANDED_I2C_ON_GPIO] = {
0246         .name       = "Unbranded DM1105 with i2c on GPIOs",
0247         .lnb = {
0248             .mask = UNBR_LNB_MASK,
0249             .off = UNBR_LNB_OFF,
0250             .v13 = UNBR_LNB_13V,
0251             .v18 = UNBR_LNB_18V,
0252         },
0253         .gpio_scl   = GPIO14,
0254         .gpio_sda   = GPIO13,
0255     },
0256 };
0257 
0258 static const struct dm1105_subid dm1105_subids[] = {
0259     {
0260         .subvendor = 0x0000,
0261         .subdevice = 0x2002,
0262         .card      = DM1105_BOARD_DVBWORLD_2002,
0263     }, {
0264         .subvendor = 0x0001,
0265         .subdevice = 0x2002,
0266         .card      = DM1105_BOARD_DVBWORLD_2002,
0267     }, {
0268         .subvendor = 0x0000,
0269         .subdevice = 0x2004,
0270         .card      = DM1105_BOARD_DVBWORLD_2004,
0271     }, {
0272         .subvendor = 0x0001,
0273         .subdevice = 0x2004,
0274         .card      = DM1105_BOARD_DVBWORLD_2004,
0275     }, {
0276         .subvendor = 0x195d,
0277         .subdevice = 0x1105,
0278         .card      = DM1105_BOARD_AXESS_DM05,
0279     },
0280 };
0281 
0282 static void dm1105_card_list(struct pci_dev *pci)
0283 {
0284     int i;
0285 
0286     if (0 == pci->subsystem_vendor &&
0287             0 == pci->subsystem_device) {
0288         printk(KERN_ERR
0289             "dm1105: Your board has no valid PCI Subsystem ID\n"
0290             "dm1105: and thus can't be autodetected\n"
0291             "dm1105: Please pass card=<n> insmod option to\n"
0292             "dm1105: workaround that.  Redirect complaints to\n"
0293             "dm1105: the vendor of the TV card.  Best regards,\n"
0294             "dm1105: -- tux\n");
0295     } else {
0296         printk(KERN_ERR
0297             "dm1105: Your board isn't known (yet) to the driver.\n"
0298             "dm1105: You can try to pick one of the existing\n"
0299             "dm1105: card configs via card=<n> insmod option.\n"
0300             "dm1105: Updating to the latest version might help\n"
0301             "dm1105: as well.\n");
0302     }
0303     printk(KERN_ERR "Here is a list of valid choices for the card=<n> insmod option:\n");
0304     for (i = 0; i < ARRAY_SIZE(dm1105_boards); i++)
0305         printk(KERN_ERR "dm1105:    card=%d -> %s\n",
0306                 i, dm1105_boards[i].name);
0307 }
0308 
0309 /* infrared remote control */
0310 struct infrared {
0311     struct rc_dev       *dev;
0312     char            input_phys[32];
0313     struct work_struct  work;
0314     u32         ir_command;
0315 };
0316 
0317 struct dm1105_dev {
0318     /* pci */
0319     struct pci_dev *pdev;
0320     u8 __iomem *io_mem;
0321 
0322     /* ir */
0323     struct infrared ir;
0324 
0325     /* dvb */
0326     struct dmx_frontend hw_frontend;
0327     struct dmx_frontend mem_frontend;
0328     struct dmxdev dmxdev;
0329     struct dvb_adapter dvb_adapter;
0330     struct dvb_demux demux;
0331     struct dvb_frontend *fe;
0332     struct dvb_net dvbnet;
0333     unsigned int full_ts_users;
0334     unsigned int boardnr;
0335     int nr;
0336 
0337     /* i2c */
0338     struct i2c_adapter i2c_adap;
0339     struct i2c_adapter i2c_bb_adap;
0340     struct i2c_algo_bit_data i2c_bit;
0341 
0342     /* irq */
0343     struct work_struct work;
0344     struct workqueue_struct *wq;
0345     char wqn[16];
0346 
0347     /* dma */
0348     dma_addr_t dma_addr;
0349     unsigned char *ts_buf;
0350     u32 wrp;
0351     u32 nextwrp;
0352     u32 buffer_size;
0353     unsigned int    PacketErrorCount;
0354     unsigned int dmarst;
0355     spinlock_t lock;
0356 };
0357 
0358 #define dm_io_mem(reg)  ((unsigned long)(&dev->io_mem[reg]))
0359 
0360 #define dm_readb(reg)       inb(dm_io_mem(reg))
0361 #define dm_writeb(reg, value)   outb((value), (dm_io_mem(reg)))
0362 
0363 #define dm_readw(reg)       inw(dm_io_mem(reg))
0364 #define dm_writew(reg, value)   outw((value), (dm_io_mem(reg)))
0365 
0366 #define dm_readl(reg)       inl(dm_io_mem(reg))
0367 #define dm_writel(reg, value)   outl((value), (dm_io_mem(reg)))
0368 
0369 #define dm_andorl(reg, mask, value) \
0370     outl((inl(dm_io_mem(reg)) & ~(mask)) |\
0371         ((value) & (mask)), (dm_io_mem(reg)))
0372 
0373 #define dm_setl(reg, bit)   dm_andorl((reg), (bit), (bit))
0374 #define dm_clearl(reg, bit) dm_andorl((reg), (bit), 0)
0375 
0376 /* The chip has 18 GPIOs. In HOST mode GPIO's used as 15 bit address lines,
0377  so we can use only 3 GPIO's from GPIO15 to GPIO17.
0378  Here I don't check whether HOST is enebled as it is not implemented yet.
0379  */
0380 static void dm1105_gpio_set(struct dm1105_dev *dev, u32 mask)
0381 {
0382     if (mask & 0xfffc0000)
0383         printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
0384 
0385     if (mask & 0x0003ffff)
0386         dm_setl(DM1105_GPIOVAL, mask & 0x0003ffff);
0387 
0388 }
0389 
0390 static void dm1105_gpio_clear(struct dm1105_dev *dev, u32 mask)
0391 {
0392     if (mask & 0xfffc0000)
0393         printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
0394 
0395     if (mask & 0x0003ffff)
0396         dm_clearl(DM1105_GPIOVAL, mask & 0x0003ffff);
0397 
0398 }
0399 
0400 static void dm1105_gpio_andor(struct dm1105_dev *dev, u32 mask, u32 val)
0401 {
0402     if (mask & 0xfffc0000)
0403         printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
0404 
0405     if (mask & 0x0003ffff)
0406         dm_andorl(DM1105_GPIOVAL, mask & 0x0003ffff, val);
0407 
0408 }
0409 
0410 static u32 dm1105_gpio_get(struct dm1105_dev *dev, u32 mask)
0411 {
0412     if (mask & 0xfffc0000)
0413         printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
0414 
0415     if (mask & 0x0003ffff)
0416         return dm_readl(DM1105_GPIOVAL) & mask & 0x0003ffff;
0417 
0418     return 0;
0419 }
0420 
0421 static void dm1105_gpio_enable(struct dm1105_dev *dev, u32 mask, int asoutput)
0422 {
0423     if (mask & 0xfffc0000)
0424         printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
0425 
0426     if ((mask & 0x0003ffff) && asoutput)
0427         dm_clearl(DM1105_GPIOCTR, mask & 0x0003ffff);
0428     else if ((mask & 0x0003ffff) && !asoutput)
0429         dm_setl(DM1105_GPIOCTR, mask & 0x0003ffff);
0430 
0431 }
0432 
0433 static void dm1105_setline(struct dm1105_dev *dev, u32 line, int state)
0434 {
0435     if (state)
0436         dm1105_gpio_enable(dev, line, 0);
0437     else {
0438         dm1105_gpio_enable(dev, line, 1);
0439         dm1105_gpio_clear(dev, line);
0440     }
0441 }
0442 
0443 static void dm1105_setsda(void *data, int state)
0444 {
0445     struct dm1105_dev *dev = data;
0446 
0447     dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_sda, state);
0448 }
0449 
0450 static void dm1105_setscl(void *data, int state)
0451 {
0452     struct dm1105_dev *dev = data;
0453 
0454     dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_scl, state);
0455 }
0456 
0457 static int dm1105_getsda(void *data)
0458 {
0459     struct dm1105_dev *dev = data;
0460 
0461     return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_sda)
0462                                     ? 1 : 0;
0463 }
0464 
0465 static int dm1105_getscl(void *data)
0466 {
0467     struct dm1105_dev *dev = data;
0468 
0469     return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_scl)
0470                                     ? 1 : 0;
0471 }
0472 
0473 static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
0474                 struct i2c_msg *msgs, int num)
0475 {
0476     struct dm1105_dev *dev ;
0477 
0478     int addr, rc, i, j, k, len, byte, data;
0479     u8 status;
0480 
0481     dev = i2c_adap->algo_data;
0482     for (i = 0; i < num; i++) {
0483         dm_writeb(DM1105_I2CCTR, 0x00);
0484         if (msgs[i].flags & I2C_M_RD) {
0485             /* read bytes */
0486             addr  = msgs[i].addr << 1;
0487             addr |= 1;
0488             dm_writeb(DM1105_I2CDAT, addr);
0489             for (byte = 0; byte < msgs[i].len; byte++)
0490                 dm_writeb(DM1105_I2CDAT + byte + 1, 0);
0491 
0492             dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
0493             for (j = 0; j < 55; j++) {
0494                 mdelay(10);
0495                 status = dm_readb(DM1105_I2CSTS);
0496                 if ((status & 0xc0) == 0x40)
0497                     break;
0498             }
0499             if (j >= 55)
0500                 return -1;
0501 
0502             for (byte = 0; byte < msgs[i].len; byte++) {
0503                 rc = dm_readb(DM1105_I2CDAT + byte + 1);
0504                 if (rc < 0)
0505                     goto err;
0506                 msgs[i].buf[byte] = rc;
0507             }
0508         } else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
0509             /* prepared for cx24116 firmware */
0510             /* Write in small blocks */
0511             len = msgs[i].len - 1;
0512             k = 1;
0513             do {
0514                 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
0515                 dm_writeb(DM1105_I2CDAT + 1, 0xf7);
0516                 for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
0517                     data = msgs[i].buf[k + byte];
0518                     dm_writeb(DM1105_I2CDAT + byte + 2, data);
0519                 }
0520                 dm_writeb(DM1105_I2CCTR, 0x82 + (len > 48 ? 48 : len));
0521                 for (j = 0; j < 25; j++) {
0522                     mdelay(10);
0523                     status = dm_readb(DM1105_I2CSTS);
0524                     if ((status & 0xc0) == 0x40)
0525                         break;
0526                 }
0527 
0528                 if (j >= 25)
0529                     return -1;
0530 
0531                 k += 48;
0532                 len -= 48;
0533             } while (len > 0);
0534         } else {
0535             /* write bytes */
0536             dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
0537             for (byte = 0; byte < msgs[i].len; byte++) {
0538                 data = msgs[i].buf[byte];
0539                 dm_writeb(DM1105_I2CDAT + byte + 1, data);
0540             }
0541             dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
0542             for (j = 0; j < 25; j++) {
0543                 mdelay(10);
0544                 status = dm_readb(DM1105_I2CSTS);
0545                 if ((status & 0xc0) == 0x40)
0546                     break;
0547             }
0548 
0549             if (j >= 25)
0550                 return -1;
0551         }
0552     }
0553     return num;
0554  err:
0555     return rc;
0556 }
0557 
0558 static u32 functionality(struct i2c_adapter *adap)
0559 {
0560     return I2C_FUNC_I2C;
0561 }
0562 
0563 static const struct i2c_algorithm dm1105_algo = {
0564     .master_xfer   = dm1105_i2c_xfer,
0565     .functionality = functionality,
0566 };
0567 
0568 static inline struct dm1105_dev *feed_to_dm1105_dev(struct dvb_demux_feed *feed)
0569 {
0570     return container_of(feed->demux, struct dm1105_dev, demux);
0571 }
0572 
0573 static inline struct dm1105_dev *frontend_to_dm1105_dev(struct dvb_frontend *fe)
0574 {
0575     return container_of(fe->dvb, struct dm1105_dev, dvb_adapter);
0576 }
0577 
0578 static int dm1105_set_voltage(struct dvb_frontend *fe,
0579                   enum fe_sec_voltage voltage)
0580 {
0581     struct dm1105_dev *dev = frontend_to_dm1105_dev(fe);
0582 
0583     dm1105_gpio_enable(dev, dm1105_boards[dev->boardnr].lnb.mask, 1);
0584     if (voltage == SEC_VOLTAGE_18)
0585         dm1105_gpio_andor(dev,
0586                 dm1105_boards[dev->boardnr].lnb.mask,
0587                 dm1105_boards[dev->boardnr].lnb.v18);
0588     else if (voltage == SEC_VOLTAGE_13)
0589         dm1105_gpio_andor(dev,
0590                 dm1105_boards[dev->boardnr].lnb.mask,
0591                 dm1105_boards[dev->boardnr].lnb.v13);
0592     else
0593         dm1105_gpio_andor(dev,
0594                 dm1105_boards[dev->boardnr].lnb.mask,
0595                 dm1105_boards[dev->boardnr].lnb.off);
0596 
0597     return 0;
0598 }
0599 
0600 static void dm1105_set_dma_addr(struct dm1105_dev *dev)
0601 {
0602     dm_writel(DM1105_STADR, (__force u32)cpu_to_le32(dev->dma_addr));
0603 }
0604 
0605 static int dm1105_dma_map(struct dm1105_dev *dev)
0606 {
0607     dev->ts_buf = dma_alloc_coherent(&dev->pdev->dev,
0608                      6 * DM1105_DMA_BYTES, &dev->dma_addr,
0609                      GFP_KERNEL);
0610 
0611     return !dev->ts_buf;
0612 }
0613 
0614 static void dm1105_dma_unmap(struct dm1105_dev *dev)
0615 {
0616     dma_free_coherent(&dev->pdev->dev, 6 * DM1105_DMA_BYTES, dev->ts_buf,
0617               dev->dma_addr);
0618 }
0619 
0620 static void dm1105_enable_irqs(struct dm1105_dev *dev)
0621 {
0622     dm_writeb(DM1105_INTMAK, INTMAK_ALLMASK);
0623     dm_writeb(DM1105_CR, 1);
0624 }
0625 
0626 static void dm1105_disable_irqs(struct dm1105_dev *dev)
0627 {
0628     dm_writeb(DM1105_INTMAK, INTMAK_IRM);
0629     dm_writeb(DM1105_CR, 0);
0630 }
0631 
0632 static int dm1105_start_feed(struct dvb_demux_feed *f)
0633 {
0634     struct dm1105_dev *dev = feed_to_dm1105_dev(f);
0635 
0636     if (dev->full_ts_users++ == 0)
0637         dm1105_enable_irqs(dev);
0638 
0639     return 0;
0640 }
0641 
0642 static int dm1105_stop_feed(struct dvb_demux_feed *f)
0643 {
0644     struct dm1105_dev *dev = feed_to_dm1105_dev(f);
0645 
0646     if (--dev->full_ts_users == 0)
0647         dm1105_disable_irqs(dev);
0648 
0649     return 0;
0650 }
0651 
0652 /* ir work handler */
0653 static void dm1105_emit_key(struct work_struct *work)
0654 {
0655     struct infrared *ir = container_of(work, struct infrared, work);
0656     u32 ircom = ir->ir_command;
0657     u8 data;
0658 
0659     if (ir_debug)
0660         printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom);
0661 
0662     data = (ircom >> 8) & 0x7f;
0663 
0664     /* FIXME: UNKNOWN because we don't generate a full NEC scancode (yet?) */
0665     rc_keydown(ir->dev, RC_PROTO_UNKNOWN, data, 0);
0666 }
0667 
0668 /* work handler */
0669 static void dm1105_dmx_buffer(struct work_struct *work)
0670 {
0671     struct dm1105_dev *dev = container_of(work, struct dm1105_dev, work);
0672     unsigned int nbpackets;
0673     u32 oldwrp = dev->wrp;
0674     u32 nextwrp = dev->nextwrp;
0675 
0676     if (!((dev->ts_buf[oldwrp] == 0x47) &&
0677             (dev->ts_buf[oldwrp + 188] == 0x47) &&
0678             (dev->ts_buf[oldwrp + 188 * 2] == 0x47))) {
0679         dev->PacketErrorCount++;
0680         /* bad packet found */
0681         if ((dev->PacketErrorCount >= 2) &&
0682                 (dev->dmarst == 0)) {
0683             dm_writeb(DM1105_RST, 1);
0684             dev->wrp = 0;
0685             dev->PacketErrorCount = 0;
0686             dev->dmarst = 0;
0687             return;
0688         }
0689     }
0690 
0691     if (nextwrp < oldwrp) {
0692         memcpy(dev->ts_buf + dev->buffer_size, dev->ts_buf, nextwrp);
0693         nbpackets = ((dev->buffer_size - oldwrp) + nextwrp) / 188;
0694     } else
0695         nbpackets = (nextwrp - oldwrp) / 188;
0696 
0697     dev->wrp = nextwrp;
0698     dvb_dmx_swfilter_packets(&dev->demux, &dev->ts_buf[oldwrp], nbpackets);
0699 }
0700 
0701 static irqreturn_t dm1105_irq(int irq, void *dev_id)
0702 {
0703     struct dm1105_dev *dev = dev_id;
0704 
0705     /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
0706     unsigned int intsts = dm_readb(DM1105_INTSTS);
0707     dm_writeb(DM1105_INTSTS, intsts);
0708 
0709     switch (intsts) {
0710     case INTSTS_TSIRQ:
0711     case (INTSTS_TSIRQ | INTSTS_IR):
0712         dev->nextwrp = dm_readl(DM1105_WRP) - dm_readl(DM1105_STADR);
0713         queue_work(dev->wq, &dev->work);
0714         break;
0715     case INTSTS_IR:
0716         dev->ir.ir_command = dm_readl(DM1105_IRCODE);
0717         schedule_work(&dev->ir.work);
0718         break;
0719     }
0720 
0721     return IRQ_HANDLED;
0722 }
0723 
0724 static int dm1105_ir_init(struct dm1105_dev *dm1105)
0725 {
0726     struct rc_dev *dev;
0727     int err = -ENOMEM;
0728 
0729     dev = rc_allocate_device(RC_DRIVER_SCANCODE);
0730     if (!dev)
0731         return -ENOMEM;
0732 
0733     snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
0734         "pci-%s/ir0", pci_name(dm1105->pdev));
0735 
0736     dev->driver_name = MODULE_NAME;
0737     dev->map_name = RC_MAP_DM1105_NEC;
0738     dev->device_name = "DVB on-card IR receiver";
0739     dev->input_phys = dm1105->ir.input_phys;
0740     dev->input_id.bustype = BUS_PCI;
0741     dev->input_id.version = 1;
0742     if (dm1105->pdev->subsystem_vendor) {
0743         dev->input_id.vendor = dm1105->pdev->subsystem_vendor;
0744         dev->input_id.product = dm1105->pdev->subsystem_device;
0745     } else {
0746         dev->input_id.vendor = dm1105->pdev->vendor;
0747         dev->input_id.product = dm1105->pdev->device;
0748     }
0749     dev->dev.parent = &dm1105->pdev->dev;
0750 
0751     INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
0752 
0753     err = rc_register_device(dev);
0754     if (err < 0) {
0755         rc_free_device(dev);
0756         return err;
0757     }
0758 
0759     dm1105->ir.dev = dev;
0760     return 0;
0761 }
0762 
0763 static void dm1105_ir_exit(struct dm1105_dev *dm1105)
0764 {
0765     rc_unregister_device(dm1105->ir.dev);
0766 }
0767 
0768 static int dm1105_hw_init(struct dm1105_dev *dev)
0769 {
0770     dm1105_disable_irqs(dev);
0771 
0772     dm_writeb(DM1105_HOST_CTR, 0);
0773 
0774     /*DATALEN 188,*/
0775     dm_writeb(DM1105_DTALENTH, 188);
0776     /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
0777     dm_writew(DM1105_TSCTR, 0xc10a);
0778 
0779     /* map DMA and set address */
0780     dm1105_dma_map(dev);
0781     dm1105_set_dma_addr(dev);
0782     /* big buffer */
0783     dm_writel(DM1105_RLEN, 5 * DM1105_DMA_BYTES);
0784     dm_writeb(DM1105_INTCNT, 47);
0785 
0786     /* IR NEC mode enable */
0787     dm_writeb(DM1105_IRCTR, (DM1105_IR_EN | DM1105_SYS_CHK));
0788     dm_writeb(DM1105_IRMODE, 0);
0789     dm_writew(DM1105_SYSTEMCODE, 0);
0790 
0791     return 0;
0792 }
0793 
0794 static void dm1105_hw_exit(struct dm1105_dev *dev)
0795 {
0796     dm1105_disable_irqs(dev);
0797 
0798     /* IR disable */
0799     dm_writeb(DM1105_IRCTR, 0);
0800     dm_writeb(DM1105_INTMAK, INTMAK_NONEMASK);
0801 
0802     dm1105_dma_unmap(dev);
0803 }
0804 
0805 static const struct stv0299_config sharp_z0194a_config = {
0806     .demod_address = 0x68,
0807     .inittab = sharp_z0194a_inittab,
0808     .mclk = 88000000UL,
0809     .invert = 1,
0810     .skip_reinit = 0,
0811     .lock_output = STV0299_LOCKOUTPUT_1,
0812     .volt13_op0_op1 = STV0299_VOLT13_OP1,
0813     .min_delay_ms = 100,
0814     .set_symbol_rate = sharp_z0194a_set_symbol_rate,
0815 };
0816 
0817 static struct stv0288_config earda_config = {
0818     .demod_address = 0x68,
0819     .min_delay_ms = 100,
0820 };
0821 
0822 static struct si21xx_config serit_config = {
0823     .demod_address = 0x68,
0824     .min_delay_ms = 100,
0825 
0826 };
0827 
0828 static struct cx24116_config serit_sp2633_config = {
0829     .demod_address = 0x55,
0830 };
0831 
0832 static struct ds3000_config dvbworld_ds3000_config = {
0833     .demod_address = 0x68,
0834 };
0835 
0836 static struct ts2020_config dvbworld_ts2020_config  = {
0837     .tuner_address = 0x60,
0838     .clk_out_div = 1,
0839 };
0840 
0841 static int frontend_init(struct dm1105_dev *dev)
0842 {
0843     int ret;
0844 
0845     switch (dev->boardnr) {
0846     case DM1105_BOARD_UNBRANDED_I2C_ON_GPIO:
0847         dm1105_gpio_enable(dev, GPIO15, 1);
0848         dm1105_gpio_clear(dev, GPIO15);
0849         msleep(100);
0850         dm1105_gpio_set(dev, GPIO15);
0851         msleep(200);
0852         dev->fe = dvb_attach(
0853             stv0299_attach, &sharp_z0194a_config,
0854             &dev->i2c_bb_adap);
0855         if (dev->fe) {
0856             dev->fe->ops.set_voltage = dm1105_set_voltage;
0857             dvb_attach(dvb_pll_attach, dev->fe, 0x60,
0858                     &dev->i2c_bb_adap, DVB_PLL_OPERA1);
0859             break;
0860         }
0861 
0862         dev->fe = dvb_attach(
0863             stv0288_attach, &earda_config,
0864             &dev->i2c_bb_adap);
0865         if (dev->fe) {
0866             dev->fe->ops.set_voltage = dm1105_set_voltage;
0867             dvb_attach(stb6000_attach, dev->fe, 0x61,
0868                     &dev->i2c_bb_adap);
0869             break;
0870         }
0871 
0872         dev->fe = dvb_attach(
0873             si21xx_attach, &serit_config,
0874             &dev->i2c_bb_adap);
0875         if (dev->fe)
0876             dev->fe->ops.set_voltage = dm1105_set_voltage;
0877         break;
0878     case DM1105_BOARD_DVBWORLD_2004:
0879         dev->fe = dvb_attach(
0880             cx24116_attach, &serit_sp2633_config,
0881             &dev->i2c_adap);
0882         if (dev->fe) {
0883             dev->fe->ops.set_voltage = dm1105_set_voltage;
0884             break;
0885         }
0886 
0887         dev->fe = dvb_attach(
0888             ds3000_attach, &dvbworld_ds3000_config,
0889             &dev->i2c_adap);
0890         if (dev->fe) {
0891             dvb_attach(ts2020_attach, dev->fe,
0892                 &dvbworld_ts2020_config, &dev->i2c_adap);
0893             dev->fe->ops.set_voltage = dm1105_set_voltage;
0894         }
0895 
0896         break;
0897     case DM1105_BOARD_DVBWORLD_2002:
0898     case DM1105_BOARD_AXESS_DM05:
0899     default:
0900         dev->fe = dvb_attach(
0901             stv0299_attach, &sharp_z0194a_config,
0902             &dev->i2c_adap);
0903         if (dev->fe) {
0904             dev->fe->ops.set_voltage = dm1105_set_voltage;
0905             dvb_attach(dvb_pll_attach, dev->fe, 0x60,
0906                     &dev->i2c_adap, DVB_PLL_OPERA1);
0907             break;
0908         }
0909 
0910         dev->fe = dvb_attach(
0911             stv0288_attach, &earda_config,
0912             &dev->i2c_adap);
0913         if (dev->fe) {
0914             dev->fe->ops.set_voltage = dm1105_set_voltage;
0915             dvb_attach(stb6000_attach, dev->fe, 0x61,
0916                     &dev->i2c_adap);
0917             break;
0918         }
0919 
0920         dev->fe = dvb_attach(
0921             si21xx_attach, &serit_config,
0922             &dev->i2c_adap);
0923         if (dev->fe)
0924             dev->fe->ops.set_voltage = dm1105_set_voltage;
0925 
0926     }
0927 
0928     if (!dev->fe) {
0929         dev_err(&dev->pdev->dev, "could not attach frontend\n");
0930         return -ENODEV;
0931     }
0932 
0933     ret = dvb_register_frontend(&dev->dvb_adapter, dev->fe);
0934     if (ret < 0) {
0935         if (dev->fe->ops.release)
0936             dev->fe->ops.release(dev->fe);
0937         dev->fe = NULL;
0938         return ret;
0939     }
0940 
0941     return 0;
0942 }
0943 
0944 static void dm1105_read_mac(struct dm1105_dev *dev, u8 *mac)
0945 {
0946     static u8 command[1] = { 0x28 };
0947 
0948     struct i2c_msg msg[] = {
0949         {
0950             .addr = IIC_24C01_addr >> 1,
0951             .flags = 0,
0952             .buf = command,
0953             .len = 1
0954         }, {
0955             .addr = IIC_24C01_addr >> 1,
0956             .flags = I2C_M_RD,
0957             .buf = mac,
0958             .len = 6
0959         },
0960     };
0961 
0962     dm1105_i2c_xfer(&dev->i2c_adap, msg , 2);
0963     dev_info(&dev->pdev->dev, "MAC %pM\n", mac);
0964 }
0965 
0966 static int dm1105_probe(struct pci_dev *pdev,
0967                   const struct pci_device_id *ent)
0968 {
0969     struct dm1105_dev *dev;
0970     struct dvb_adapter *dvb_adapter;
0971     struct dvb_demux *dvbdemux;
0972     struct dmx_demux *dmx;
0973     int ret = -ENOMEM;
0974     int i;
0975 
0976     if (dm1105_devcount >= ARRAY_SIZE(card))
0977         return -ENODEV;
0978 
0979     dev = kzalloc(sizeof(struct dm1105_dev), GFP_KERNEL);
0980     if (!dev)
0981         return -ENOMEM;
0982 
0983     /* board config */
0984     dev->nr = dm1105_devcount;
0985     dev->boardnr = UNSET;
0986     if (card[dev->nr] < ARRAY_SIZE(dm1105_boards))
0987         dev->boardnr = card[dev->nr];
0988     for (i = 0; UNSET == dev->boardnr &&
0989                 i < ARRAY_SIZE(dm1105_subids); i++)
0990         if (pdev->subsystem_vendor ==
0991             dm1105_subids[i].subvendor &&
0992                 pdev->subsystem_device ==
0993                     dm1105_subids[i].subdevice)
0994             dev->boardnr = dm1105_subids[i].card;
0995 
0996     if (UNSET == dev->boardnr) {
0997         dev->boardnr = DM1105_BOARD_UNKNOWN;
0998         dm1105_card_list(pdev);
0999     }
1000 
1001     dm1105_devcount++;
1002     dev->pdev = pdev;
1003     dev->buffer_size = 5 * DM1105_DMA_BYTES;
1004     dev->PacketErrorCount = 0;
1005     dev->dmarst = 0;
1006 
1007     ret = pci_enable_device(pdev);
1008     if (ret < 0)
1009         goto err_kfree;
1010 
1011     ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
1012     if (ret < 0)
1013         goto err_pci_disable_device;
1014 
1015     pci_set_master(pdev);
1016 
1017     ret = pci_request_regions(pdev, DRIVER_NAME);
1018     if (ret < 0)
1019         goto err_pci_disable_device;
1020 
1021     dev->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
1022     if (!dev->io_mem) {
1023         ret = -EIO;
1024         goto err_pci_release_regions;
1025     }
1026 
1027     spin_lock_init(&dev->lock);
1028     pci_set_drvdata(pdev, dev);
1029 
1030     ret = dm1105_hw_init(dev);
1031     if (ret < 0)
1032         goto err_pci_iounmap;
1033 
1034     /* i2c */
1035     i2c_set_adapdata(&dev->i2c_adap, dev);
1036     strscpy(dev->i2c_adap.name, DRIVER_NAME, sizeof(dev->i2c_adap.name));
1037     dev->i2c_adap.owner = THIS_MODULE;
1038     dev->i2c_adap.dev.parent = &pdev->dev;
1039     dev->i2c_adap.algo = &dm1105_algo;
1040     dev->i2c_adap.algo_data = dev;
1041     ret = i2c_add_adapter(&dev->i2c_adap);
1042 
1043     if (ret < 0)
1044         goto err_dm1105_hw_exit;
1045 
1046     i2c_set_adapdata(&dev->i2c_bb_adap, dev);
1047     strscpy(dev->i2c_bb_adap.name, DM1105_I2C_GPIO_NAME,
1048         sizeof(dev->i2c_bb_adap.name));
1049     dev->i2c_bb_adap.owner = THIS_MODULE;
1050     dev->i2c_bb_adap.dev.parent = &pdev->dev;
1051     dev->i2c_bb_adap.algo_data = &dev->i2c_bit;
1052     dev->i2c_bit.data = dev;
1053     dev->i2c_bit.setsda = dm1105_setsda;
1054     dev->i2c_bit.setscl = dm1105_setscl;
1055     dev->i2c_bit.getsda = dm1105_getsda;
1056     dev->i2c_bit.getscl = dm1105_getscl;
1057     dev->i2c_bit.udelay = 10;
1058     dev->i2c_bit.timeout = 10;
1059 
1060     /* Raise SCL and SDA */
1061     dm1105_setsda(dev, 1);
1062     dm1105_setscl(dev, 1);
1063 
1064     ret = i2c_bit_add_bus(&dev->i2c_bb_adap);
1065     if (ret < 0)
1066         goto err_i2c_del_adapter;
1067 
1068     /* dvb */
1069     ret = dvb_register_adapter(&dev->dvb_adapter, DRIVER_NAME,
1070                     THIS_MODULE, &pdev->dev, adapter_nr);
1071     if (ret < 0)
1072         goto err_i2c_del_adapters;
1073 
1074     dvb_adapter = &dev->dvb_adapter;
1075 
1076     dm1105_read_mac(dev, dvb_adapter->proposed_mac);
1077 
1078     dvbdemux = &dev->demux;
1079     dvbdemux->filternum = 256;
1080     dvbdemux->feednum = 256;
1081     dvbdemux->start_feed = dm1105_start_feed;
1082     dvbdemux->stop_feed = dm1105_stop_feed;
1083     dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
1084             DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
1085     ret = dvb_dmx_init(dvbdemux);
1086     if (ret < 0)
1087         goto err_dvb_unregister_adapter;
1088 
1089     dmx = &dvbdemux->dmx;
1090     dev->dmxdev.filternum = 256;
1091     dev->dmxdev.demux = dmx;
1092     dev->dmxdev.capabilities = 0;
1093 
1094     ret = dvb_dmxdev_init(&dev->dmxdev, dvb_adapter);
1095     if (ret < 0)
1096         goto err_dvb_dmx_release;
1097 
1098     dev->hw_frontend.source = DMX_FRONTEND_0;
1099 
1100     ret = dmx->add_frontend(dmx, &dev->hw_frontend);
1101     if (ret < 0)
1102         goto err_dvb_dmxdev_release;
1103 
1104     dev->mem_frontend.source = DMX_MEMORY_FE;
1105 
1106     ret = dmx->add_frontend(dmx, &dev->mem_frontend);
1107     if (ret < 0)
1108         goto err_remove_hw_frontend;
1109 
1110     ret = dmx->connect_frontend(dmx, &dev->hw_frontend);
1111     if (ret < 0)
1112         goto err_remove_mem_frontend;
1113 
1114     ret = dvb_net_init(dvb_adapter, &dev->dvbnet, dmx);
1115     if (ret < 0)
1116         goto err_disconnect_frontend;
1117 
1118     ret = frontend_init(dev);
1119     if (ret < 0)
1120         goto err_dvb_net;
1121 
1122     dm1105_ir_init(dev);
1123 
1124     INIT_WORK(&dev->work, dm1105_dmx_buffer);
1125     sprintf(dev->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num);
1126     dev->wq = create_singlethread_workqueue(dev->wqn);
1127     if (!dev->wq) {
1128         ret = -ENOMEM;
1129         goto err_dvb_net;
1130     }
1131 
1132     ret = request_irq(pdev->irq, dm1105_irq, IRQF_SHARED,
1133                         DRIVER_NAME, dev);
1134     if (ret < 0)
1135         goto err_workqueue;
1136 
1137     return 0;
1138 
1139 err_workqueue:
1140     destroy_workqueue(dev->wq);
1141 err_dvb_net:
1142     dvb_net_release(&dev->dvbnet);
1143 err_disconnect_frontend:
1144     dmx->disconnect_frontend(dmx);
1145 err_remove_mem_frontend:
1146     dmx->remove_frontend(dmx, &dev->mem_frontend);
1147 err_remove_hw_frontend:
1148     dmx->remove_frontend(dmx, &dev->hw_frontend);
1149 err_dvb_dmxdev_release:
1150     dvb_dmxdev_release(&dev->dmxdev);
1151 err_dvb_dmx_release:
1152     dvb_dmx_release(dvbdemux);
1153 err_dvb_unregister_adapter:
1154     dvb_unregister_adapter(dvb_adapter);
1155 err_i2c_del_adapters:
1156     i2c_del_adapter(&dev->i2c_bb_adap);
1157 err_i2c_del_adapter:
1158     i2c_del_adapter(&dev->i2c_adap);
1159 err_dm1105_hw_exit:
1160     dm1105_hw_exit(dev);
1161 err_pci_iounmap:
1162     pci_iounmap(pdev, dev->io_mem);
1163 err_pci_release_regions:
1164     pci_release_regions(pdev);
1165 err_pci_disable_device:
1166     pci_disable_device(pdev);
1167 err_kfree:
1168     kfree(dev);
1169     return ret;
1170 }
1171 
1172 static void dm1105_remove(struct pci_dev *pdev)
1173 {
1174     struct dm1105_dev *dev = pci_get_drvdata(pdev);
1175     struct dvb_adapter *dvb_adapter = &dev->dvb_adapter;
1176     struct dvb_demux *dvbdemux = &dev->demux;
1177     struct dmx_demux *dmx = &dvbdemux->dmx;
1178 
1179     dm1105_ir_exit(dev);
1180     dmx->close(dmx);
1181     dvb_net_release(&dev->dvbnet);
1182     if (dev->fe)
1183         dvb_unregister_frontend(dev->fe);
1184 
1185     dmx->disconnect_frontend(dmx);
1186     dmx->remove_frontend(dmx, &dev->mem_frontend);
1187     dmx->remove_frontend(dmx, &dev->hw_frontend);
1188     dvb_dmxdev_release(&dev->dmxdev);
1189     dvb_dmx_release(dvbdemux);
1190     dvb_unregister_adapter(dvb_adapter);
1191     i2c_del_adapter(&dev->i2c_adap);
1192 
1193     dm1105_hw_exit(dev);
1194     free_irq(pdev->irq, dev);
1195     pci_iounmap(pdev, dev->io_mem);
1196     pci_release_regions(pdev);
1197     pci_disable_device(pdev);
1198     dm1105_devcount--;
1199     kfree(dev);
1200 }
1201 
1202 static const struct pci_device_id dm1105_id_table[] = {
1203     {
1204         .vendor = PCI_VENDOR_ID_TRIGEM,
1205         .device = PCI_DEVICE_ID_DM1105,
1206         .subvendor = PCI_ANY_ID,
1207         .subdevice = PCI_ANY_ID,
1208     }, {
1209         .vendor = PCI_VENDOR_ID_AXESS,
1210         .device = PCI_DEVICE_ID_DM05,
1211         .subvendor = PCI_ANY_ID,
1212         .subdevice = PCI_ANY_ID,
1213     }, {
1214         /* empty */
1215     },
1216 };
1217 
1218 MODULE_DEVICE_TABLE(pci, dm1105_id_table);
1219 
1220 static struct pci_driver dm1105_driver = {
1221     .name = DRIVER_NAME,
1222     .id_table = dm1105_id_table,
1223     .probe = dm1105_probe,
1224     .remove = dm1105_remove,
1225 };
1226 
1227 module_pci_driver(dm1105_driver);
1228 
1229 MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
1230 MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
1231 MODULE_LICENSE("GPL");
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