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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *
0004  * device driver for Conexant 2388x based TV cards
0005  * video4linux video interface
0006  *
0007  * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
0008  *
0009  * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@kernel.org>
0010  *  - Multituner support
0011  *  - video_ioctl2 conversion
0012  *  - PAL/M fixes
0013  */
0014 
0015 #include "cx88.h"
0016 
0017 #include <linux/init.h>
0018 #include <linux/list.h>
0019 #include <linux/module.h>
0020 #include <linux/kmod.h>
0021 #include <linux/kernel.h>
0022 #include <linux/slab.h>
0023 #include <linux/interrupt.h>
0024 #include <linux/dma-mapping.h>
0025 #include <linux/delay.h>
0026 #include <linux/kthread.h>
0027 #include <asm/div64.h>
0028 
0029 #include <media/v4l2-common.h>
0030 #include <media/v4l2-ioctl.h>
0031 #include <media/v4l2-event.h>
0032 #include <media/i2c/wm8775.h>
0033 
0034 MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
0035 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
0036 MODULE_LICENSE("GPL v2");
0037 MODULE_VERSION(CX88_VERSION);
0038 
0039 /* ------------------------------------------------------------------ */
0040 
0041 static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
0042 static unsigned int vbi_nr[]   = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
0043 static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
0044 
0045 module_param_array(video_nr, int, NULL, 0444);
0046 module_param_array(vbi_nr,   int, NULL, 0444);
0047 module_param_array(radio_nr, int, NULL, 0444);
0048 
0049 MODULE_PARM_DESC(video_nr, "video device numbers");
0050 MODULE_PARM_DESC(vbi_nr, "vbi device numbers");
0051 MODULE_PARM_DESC(radio_nr, "radio device numbers");
0052 
0053 static unsigned int video_debug;
0054 module_param(video_debug, int, 0644);
0055 MODULE_PARM_DESC(video_debug, "enable debug messages [video]");
0056 
0057 static unsigned int irq_debug;
0058 module_param(irq_debug, int, 0644);
0059 MODULE_PARM_DESC(irq_debug, "enable debug messages [IRQ handler]");
0060 
0061 #define dprintk(level, fmt, arg...) do {            \
0062     if (video_debug >= level)               \
0063         printk(KERN_DEBUG pr_fmt("%s: video:" fmt), \
0064             __func__, ##arg);           \
0065 } while (0)
0066 
0067 /* ------------------------------------------------------------------- */
0068 /* static data                                                         */
0069 
0070 static const struct cx8800_fmt formats[] = {
0071     {
0072         .fourcc   = V4L2_PIX_FMT_GREY,
0073         .cxformat = ColorFormatY8,
0074         .depth    = 8,
0075         .flags    = FORMAT_FLAGS_PACKED,
0076     }, {
0077         .fourcc   = V4L2_PIX_FMT_RGB555,
0078         .cxformat = ColorFormatRGB15,
0079         .depth    = 16,
0080         .flags    = FORMAT_FLAGS_PACKED,
0081     }, {
0082         .fourcc   = V4L2_PIX_FMT_RGB555X,
0083         .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
0084         .depth    = 16,
0085         .flags    = FORMAT_FLAGS_PACKED,
0086     }, {
0087         .fourcc   = V4L2_PIX_FMT_RGB565,
0088         .cxformat = ColorFormatRGB16,
0089         .depth    = 16,
0090         .flags    = FORMAT_FLAGS_PACKED,
0091     }, {
0092         .fourcc   = V4L2_PIX_FMT_RGB565X,
0093         .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
0094         .depth    = 16,
0095         .flags    = FORMAT_FLAGS_PACKED,
0096     }, {
0097         .fourcc   = V4L2_PIX_FMT_BGR24,
0098         .cxformat = ColorFormatRGB24,
0099         .depth    = 24,
0100         .flags    = FORMAT_FLAGS_PACKED,
0101     }, {
0102         .fourcc   = V4L2_PIX_FMT_BGR32,
0103         .cxformat = ColorFormatRGB32,
0104         .depth    = 32,
0105         .flags    = FORMAT_FLAGS_PACKED,
0106     }, {
0107         .fourcc   = V4L2_PIX_FMT_RGB32,
0108         .cxformat = ColorFormatRGB32 | ColorFormatBSWAP |
0109                 ColorFormatWSWAP,
0110         .depth    = 32,
0111         .flags    = FORMAT_FLAGS_PACKED,
0112     }, {
0113         .fourcc   = V4L2_PIX_FMT_YUYV,
0114         .cxformat = ColorFormatYUY2,
0115         .depth    = 16,
0116         .flags    = FORMAT_FLAGS_PACKED,
0117     }, {
0118         .fourcc   = V4L2_PIX_FMT_UYVY,
0119         .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
0120         .depth    = 16,
0121         .flags    = FORMAT_FLAGS_PACKED,
0122     },
0123 };
0124 
0125 static const struct cx8800_fmt *format_by_fourcc(unsigned int fourcc)
0126 {
0127     unsigned int i;
0128 
0129     for (i = 0; i < ARRAY_SIZE(formats); i++)
0130         if (formats[i].fourcc == fourcc)
0131             return formats + i;
0132     return NULL;
0133 }
0134 
0135 /* ------------------------------------------------------------------- */
0136 
0137 struct cx88_ctrl {
0138     /* control information */
0139     u32 id;
0140     s32 minimum;
0141     s32 maximum;
0142     u32 step;
0143     s32 default_value;
0144 
0145     /* control register information */
0146     u32 off;
0147     u32 reg;
0148     u32 sreg;
0149     u32 mask;
0150     u32 shift;
0151 };
0152 
0153 static const struct cx88_ctrl cx8800_vid_ctls[] = {
0154     /* --- video --- */
0155     {
0156         .id            = V4L2_CID_BRIGHTNESS,
0157         .minimum       = 0x00,
0158         .maximum       = 0xff,
0159         .step          = 1,
0160         .default_value = 0x7f,
0161         .off           = 128,
0162         .reg           = MO_CONTR_BRIGHT,
0163         .mask          = 0x00ff,
0164         .shift         = 0,
0165     }, {
0166         .id            = V4L2_CID_CONTRAST,
0167         .minimum       = 0,
0168         .maximum       = 0xff,
0169         .step          = 1,
0170         .default_value = 0x3f,
0171         .off           = 0,
0172         .reg           = MO_CONTR_BRIGHT,
0173         .mask          = 0xff00,
0174         .shift         = 8,
0175     }, {
0176         .id            = V4L2_CID_HUE,
0177         .minimum       = 0,
0178         .maximum       = 0xff,
0179         .step          = 1,
0180         .default_value = 0x7f,
0181         .off           = 128,
0182         .reg           = MO_HUE,
0183         .mask          = 0x00ff,
0184         .shift         = 0,
0185     }, {
0186         /* strictly, this only describes only U saturation.
0187          * V saturation is handled specially through code.
0188          */
0189         .id            = V4L2_CID_SATURATION,
0190         .minimum       = 0,
0191         .maximum       = 0xff,
0192         .step          = 1,
0193         .default_value = 0x7f,
0194         .off           = 0,
0195         .reg           = MO_UV_SATURATION,
0196         .mask          = 0x00ff,
0197         .shift         = 0,
0198     }, {
0199         .id            = V4L2_CID_SHARPNESS,
0200         .minimum       = 0,
0201         .maximum       = 4,
0202         .step          = 1,
0203         .default_value = 0x0,
0204         .off           = 0,
0205         /*
0206          * NOTE: the value is converted and written to both even
0207          * and odd registers in the code
0208          */
0209         .reg           = MO_FILTER_ODD,
0210         .mask          = 7 << 7,
0211         .shift         = 7,
0212     }, {
0213         .id            = V4L2_CID_CHROMA_AGC,
0214         .minimum       = 0,
0215         .maximum       = 1,
0216         .default_value = 0x1,
0217         .reg           = MO_INPUT_FORMAT,
0218         .mask          = 1 << 10,
0219         .shift         = 10,
0220     }, {
0221         .id            = V4L2_CID_COLOR_KILLER,
0222         .minimum       = 0,
0223         .maximum       = 1,
0224         .default_value = 0x1,
0225         .reg           = MO_INPUT_FORMAT,
0226         .mask          = 1 << 9,
0227         .shift         = 9,
0228     }, {
0229         .id            = V4L2_CID_BAND_STOP_FILTER,
0230         .minimum       = 0,
0231         .maximum       = 1,
0232         .step          = 1,
0233         .default_value = 0x0,
0234         .off           = 0,
0235         .reg           = MO_HTOTAL,
0236         .mask          = 3 << 11,
0237         .shift         = 11,
0238     }
0239 };
0240 
0241 static const struct cx88_ctrl cx8800_aud_ctls[] = {
0242     {
0243         /* --- audio --- */
0244         .id            = V4L2_CID_AUDIO_MUTE,
0245         .minimum       = 0,
0246         .maximum       = 1,
0247         .default_value = 1,
0248         .reg           = AUD_VOL_CTL,
0249         .sreg          = SHADOW_AUD_VOL_CTL,
0250         .mask          = (1 << 6),
0251         .shift         = 6,
0252     }, {
0253         .id            = V4L2_CID_AUDIO_VOLUME,
0254         .minimum       = 0,
0255         .maximum       = 0x3f,
0256         .step          = 1,
0257         .default_value = 0x3f,
0258         .reg           = AUD_VOL_CTL,
0259         .sreg          = SHADOW_AUD_VOL_CTL,
0260         .mask          = 0x3f,
0261         .shift         = 0,
0262     }, {
0263         .id            = V4L2_CID_AUDIO_BALANCE,
0264         .minimum       = 0,
0265         .maximum       = 0x7f,
0266         .step          = 1,
0267         .default_value = 0x40,
0268         .reg           = AUD_BAL_CTL,
0269         .sreg          = SHADOW_AUD_BAL_CTL,
0270         .mask          = 0x7f,
0271         .shift         = 0,
0272     }
0273 };
0274 
0275 enum {
0276     CX8800_VID_CTLS = ARRAY_SIZE(cx8800_vid_ctls),
0277     CX8800_AUD_CTLS = ARRAY_SIZE(cx8800_aud_ctls),
0278 };
0279 
0280 /* ------------------------------------------------------------------ */
0281 
0282 int cx88_video_mux(struct cx88_core *core, unsigned int input)
0283 {
0284     /* struct cx88_core *core = dev->core; */
0285 
0286     dprintk(1, "video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
0287         input, INPUT(input).vmux,
0288         INPUT(input).gpio0, INPUT(input).gpio1,
0289         INPUT(input).gpio2, INPUT(input).gpio3);
0290     core->input = input;
0291     cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
0292     cx_write(MO_GP3_IO, INPUT(input).gpio3);
0293     cx_write(MO_GP0_IO, INPUT(input).gpio0);
0294     cx_write(MO_GP1_IO, INPUT(input).gpio1);
0295     cx_write(MO_GP2_IO, INPUT(input).gpio2);
0296 
0297     switch (INPUT(input).type) {
0298     case CX88_VMUX_SVIDEO:
0299         cx_set(MO_AFECFG_IO,    0x00000001);
0300         cx_set(MO_INPUT_FORMAT, 0x00010010);
0301         cx_set(MO_FILTER_EVEN,  0x00002020);
0302         cx_set(MO_FILTER_ODD,   0x00002020);
0303         break;
0304     default:
0305         cx_clear(MO_AFECFG_IO,    0x00000001);
0306         cx_clear(MO_INPUT_FORMAT, 0x00010010);
0307         cx_clear(MO_FILTER_EVEN,  0x00002020);
0308         cx_clear(MO_FILTER_ODD,   0x00002020);
0309         break;
0310     }
0311 
0312     /*
0313      * if there are audioroutes defined, we have an external
0314      * ADC to deal with audio
0315      */
0316     if (INPUT(input).audioroute) {
0317         /*
0318          * The wm8775 module has the "2" route hardwired into
0319          * the initialization. Some boards may use different
0320          * routes for different inputs. HVR-1300 surely does
0321          */
0322         if (core->sd_wm8775) {
0323             call_all(core, audio, s_routing,
0324                  INPUT(input).audioroute, 0, 0);
0325         }
0326         /*
0327          * cx2388's C-ADC is connected to the tuner only.
0328          * When used with S-Video, that ADC is busy dealing with
0329          * chroma, so an external must be used for baseband audio
0330          */
0331         if (INPUT(input).type != CX88_VMUX_TELEVISION &&
0332             INPUT(input).type != CX88_VMUX_CABLE) {
0333             /* "I2S ADC mode" */
0334             core->tvaudio = WW_I2SADC;
0335             cx88_set_tvaudio(core);
0336         } else {
0337             /* Normal mode */
0338             cx_write(AUD_I2SCNTL, 0x0);
0339             cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
0340         }
0341     }
0342 
0343     return 0;
0344 }
0345 EXPORT_SYMBOL(cx88_video_mux);
0346 
0347 /* ------------------------------------------------------------------ */
0348 
0349 static int start_video_dma(struct cx8800_dev    *dev,
0350                struct cx88_dmaqueue *q,
0351                struct cx88_buffer   *buf)
0352 {
0353     struct cx88_core *core = dev->core;
0354 
0355     /* setup fifo + format */
0356     cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
0357                 buf->bpl, buf->risc.dma);
0358     cx88_set_scale(core, core->width, core->height, core->field);
0359     cx_write(MO_COLOR_CTRL, dev->fmt->cxformat | ColorFormatGamma);
0360 
0361     /* reset counter */
0362     cx_write(MO_VIDY_GPCNTRL, GP_COUNT_CONTROL_RESET);
0363     q->count = 0;
0364 
0365     /* enable irqs */
0366     cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
0367 
0368     /*
0369      * Enables corresponding bits at PCI_INT_STAT:
0370      *  bits 0 to 4: video, audio, transport stream, VIP, Host
0371      *  bit 7: timer
0372      *  bits 8 and 9: DMA complete for: SRC, DST
0373      *  bits 10 and 11: BERR signal asserted for RISC: RD, WR
0374      *  bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
0375      */
0376     cx_set(MO_VID_INTMSK, 0x0f0011);
0377 
0378     /* enable capture */
0379     cx_set(VID_CAPTURE_CONTROL, 0x06);
0380 
0381     /* start dma */
0382     cx_set(MO_DEV_CNTRL2, (1 << 5));
0383     cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
0384 
0385     return 0;
0386 }
0387 
0388 static int __maybe_unused stop_video_dma(struct cx8800_dev    *dev)
0389 {
0390     struct cx88_core *core = dev->core;
0391 
0392     /* stop dma */
0393     cx_clear(MO_VID_DMACNTRL, 0x11);
0394 
0395     /* disable capture */
0396     cx_clear(VID_CAPTURE_CONTROL, 0x06);
0397 
0398     /* disable irqs */
0399     cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
0400     cx_clear(MO_VID_INTMSK, 0x0f0011);
0401     return 0;
0402 }
0403 
0404 static int __maybe_unused restart_video_queue(struct cx8800_dev *dev,
0405                           struct cx88_dmaqueue *q)
0406 {
0407     struct cx88_buffer *buf;
0408 
0409     if (!list_empty(&q->active)) {
0410         buf = list_entry(q->active.next, struct cx88_buffer, list);
0411         dprintk(2, "restart_queue [%p/%d]: restart dma\n",
0412             buf, buf->vb.vb2_buf.index);
0413         start_video_dma(dev, q, buf);
0414     }
0415     return 0;
0416 }
0417 
0418 /* ------------------------------------------------------------------ */
0419 
0420 static int queue_setup(struct vb2_queue *q,
0421                unsigned int *num_buffers, unsigned int *num_planes,
0422                unsigned int sizes[], struct device *alloc_devs[])
0423 {
0424     struct cx8800_dev *dev = q->drv_priv;
0425     struct cx88_core *core = dev->core;
0426 
0427     *num_planes = 1;
0428     sizes[0] = (dev->fmt->depth * core->width * core->height) >> 3;
0429     return 0;
0430 }
0431 
0432 static int buffer_prepare(struct vb2_buffer *vb)
0433 {
0434     struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
0435     struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
0436     struct cx88_core *core = dev->core;
0437     struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
0438     struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
0439 
0440     buf->bpl = core->width * dev->fmt->depth >> 3;
0441 
0442     if (vb2_plane_size(vb, 0) < core->height * buf->bpl)
0443         return -EINVAL;
0444     vb2_set_plane_payload(vb, 0, core->height * buf->bpl);
0445 
0446     switch (core->field) {
0447     case V4L2_FIELD_TOP:
0448         cx88_risc_buffer(dev->pci, &buf->risc,
0449                  sgt->sgl, 0, UNSET,
0450                  buf->bpl, 0, core->height);
0451         break;
0452     case V4L2_FIELD_BOTTOM:
0453         cx88_risc_buffer(dev->pci, &buf->risc,
0454                  sgt->sgl, UNSET, 0,
0455                  buf->bpl, 0, core->height);
0456         break;
0457     case V4L2_FIELD_SEQ_TB:
0458         cx88_risc_buffer(dev->pci, &buf->risc,
0459                  sgt->sgl,
0460                  0, buf->bpl * (core->height >> 1),
0461                  buf->bpl, 0,
0462                  core->height >> 1);
0463         break;
0464     case V4L2_FIELD_SEQ_BT:
0465         cx88_risc_buffer(dev->pci, &buf->risc,
0466                  sgt->sgl,
0467                  buf->bpl * (core->height >> 1), 0,
0468                  buf->bpl, 0,
0469                  core->height >> 1);
0470         break;
0471     case V4L2_FIELD_INTERLACED:
0472     default:
0473         cx88_risc_buffer(dev->pci, &buf->risc,
0474                  sgt->sgl, 0, buf->bpl,
0475                  buf->bpl, buf->bpl,
0476                  core->height >> 1);
0477         break;
0478     }
0479     dprintk(2,
0480         "[%p/%d] %s - %dx%d %dbpp 0x%08x - dma=0x%08lx\n",
0481         buf, buf->vb.vb2_buf.index, __func__,
0482         core->width, core->height, dev->fmt->depth, dev->fmt->fourcc,
0483         (unsigned long)buf->risc.dma);
0484     return 0;
0485 }
0486 
0487 static void buffer_finish(struct vb2_buffer *vb)
0488 {
0489     struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
0490     struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
0491     struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
0492     struct cx88_riscmem *risc = &buf->risc;
0493 
0494     if (risc->cpu)
0495         dma_free_coherent(&dev->pci->dev, risc->size, risc->cpu,
0496                   risc->dma);
0497     memset(risc, 0, sizeof(*risc));
0498 }
0499 
0500 static void buffer_queue(struct vb2_buffer *vb)
0501 {
0502     struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
0503     struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
0504     struct cx88_buffer    *buf = container_of(vbuf, struct cx88_buffer, vb);
0505     struct cx88_buffer    *prev;
0506     struct cx88_dmaqueue  *q    = &dev->vidq;
0507 
0508     /* add jump to start */
0509     buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 8);
0510     buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC);
0511     buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 8);
0512 
0513     if (list_empty(&q->active)) {
0514         list_add_tail(&buf->list, &q->active);
0515         dprintk(2, "[%p/%d] buffer_queue - first active\n",
0516             buf, buf->vb.vb2_buf.index);
0517 
0518     } else {
0519         buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1);
0520         prev = list_entry(q->active.prev, struct cx88_buffer, list);
0521         list_add_tail(&buf->list, &q->active);
0522         prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
0523         dprintk(2, "[%p/%d] buffer_queue - append to active\n",
0524             buf, buf->vb.vb2_buf.index);
0525     }
0526 }
0527 
0528 static int start_streaming(struct vb2_queue *q, unsigned int count)
0529 {
0530     struct cx8800_dev *dev = q->drv_priv;
0531     struct cx88_dmaqueue *dmaq = &dev->vidq;
0532     struct cx88_buffer *buf = list_entry(dmaq->active.next,
0533             struct cx88_buffer, list);
0534 
0535     start_video_dma(dev, dmaq, buf);
0536     return 0;
0537 }
0538 
0539 static void stop_streaming(struct vb2_queue *q)
0540 {
0541     struct cx8800_dev *dev = q->drv_priv;
0542     struct cx88_core *core = dev->core;
0543     struct cx88_dmaqueue *dmaq = &dev->vidq;
0544     unsigned long flags;
0545 
0546     cx_clear(MO_VID_DMACNTRL, 0x11);
0547     cx_clear(VID_CAPTURE_CONTROL, 0x06);
0548     spin_lock_irqsave(&dev->slock, flags);
0549     while (!list_empty(&dmaq->active)) {
0550         struct cx88_buffer *buf = list_entry(dmaq->active.next,
0551             struct cx88_buffer, list);
0552 
0553         list_del(&buf->list);
0554         vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
0555     }
0556     spin_unlock_irqrestore(&dev->slock, flags);
0557 }
0558 
0559 static const struct vb2_ops cx8800_video_qops = {
0560     .queue_setup    = queue_setup,
0561     .buf_prepare  = buffer_prepare,
0562     .buf_finish = buffer_finish,
0563     .buf_queue    = buffer_queue,
0564     .wait_prepare = vb2_ops_wait_prepare,
0565     .wait_finish = vb2_ops_wait_finish,
0566     .start_streaming = start_streaming,
0567     .stop_streaming = stop_streaming,
0568 };
0569 
0570 /* ------------------------------------------------------------------ */
0571 
0572 static int radio_open(struct file *file)
0573 {
0574     struct cx8800_dev *dev = video_drvdata(file);
0575     struct cx88_core *core = dev->core;
0576     int ret = v4l2_fh_open(file);
0577 
0578     if (ret)
0579         return ret;
0580 
0581     cx_write(MO_GP3_IO, core->board.radio.gpio3);
0582     cx_write(MO_GP0_IO, core->board.radio.gpio0);
0583     cx_write(MO_GP1_IO, core->board.radio.gpio1);
0584     cx_write(MO_GP2_IO, core->board.radio.gpio2);
0585     if (core->board.radio.audioroute) {
0586         if (core->sd_wm8775) {
0587             call_all(core, audio, s_routing,
0588                  core->board.radio.audioroute, 0, 0);
0589         }
0590         /* "I2S ADC mode" */
0591         core->tvaudio = WW_I2SADC;
0592         cx88_set_tvaudio(core);
0593     } else {
0594         /* FM Mode */
0595         core->tvaudio = WW_FM;
0596         cx88_set_tvaudio(core);
0597         cx88_set_stereo(core, V4L2_TUNER_MODE_STEREO, 1);
0598     }
0599     call_all(core, tuner, s_radio);
0600     return 0;
0601 }
0602 
0603 /* ------------------------------------------------------------------ */
0604 /* VIDEO CTRL IOCTLS                                                  */
0605 
0606 static int cx8800_s_vid_ctrl(struct v4l2_ctrl *ctrl)
0607 {
0608     struct cx88_core *core =
0609         container_of(ctrl->handler, struct cx88_core, video_hdl);
0610     const struct cx88_ctrl *cc = ctrl->priv;
0611     u32 value, mask;
0612 
0613     mask = cc->mask;
0614     switch (ctrl->id) {
0615     case V4L2_CID_SATURATION:
0616         /* special v_sat handling */
0617 
0618         value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
0619 
0620         if (core->tvnorm & V4L2_STD_SECAM) {
0621             /* For SECAM, both U and V sat should be equal */
0622             value = value << 8 | value;
0623         } else {
0624             /* Keeps U Saturation proportional to V Sat */
0625             value = (value * 0x5a) / 0x7f << 8 | value;
0626         }
0627         mask = 0xffff;
0628         break;
0629     case V4L2_CID_SHARPNESS:
0630         /* 0b000, 0b100, 0b101, 0b110, or 0b111 */
0631         value = (ctrl->val < 1 ? 0 : ((ctrl->val + 3) << 7));
0632         /* needs to be set for both fields */
0633         cx_andor(MO_FILTER_EVEN, mask, value);
0634         break;
0635     case V4L2_CID_CHROMA_AGC:
0636         value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
0637         break;
0638     default:
0639         value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
0640         break;
0641     }
0642     dprintk(1,
0643         "set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
0644         ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
0645         mask, cc->sreg ? " [shadowed]" : "");
0646     if (cc->sreg)
0647         cx_sandor(cc->sreg, cc->reg, mask, value);
0648     else
0649         cx_andor(cc->reg, mask, value);
0650     return 0;
0651 }
0652 
0653 static int cx8800_s_aud_ctrl(struct v4l2_ctrl *ctrl)
0654 {
0655     struct cx88_core *core =
0656         container_of(ctrl->handler, struct cx88_core, audio_hdl);
0657     const struct cx88_ctrl *cc = ctrl->priv;
0658     u32 value, mask;
0659 
0660     /* Pass changes onto any WM8775 */
0661     if (core->sd_wm8775) {
0662         switch (ctrl->id) {
0663         case V4L2_CID_AUDIO_MUTE:
0664             wm8775_s_ctrl(core, ctrl->id, ctrl->val);
0665             break;
0666         case V4L2_CID_AUDIO_VOLUME:
0667             wm8775_s_ctrl(core, ctrl->id, (ctrl->val) ?
0668                         (0x90 + ctrl->val) << 8 : 0);
0669             break;
0670         case V4L2_CID_AUDIO_BALANCE:
0671             wm8775_s_ctrl(core, ctrl->id, ctrl->val << 9);
0672             break;
0673         default:
0674             break;
0675         }
0676     }
0677 
0678     mask = cc->mask;
0679     switch (ctrl->id) {
0680     case V4L2_CID_AUDIO_BALANCE:
0681         value = (ctrl->val < 0x40) ?
0682             (0x7f - ctrl->val) : (ctrl->val - 0x40);
0683         break;
0684     case V4L2_CID_AUDIO_VOLUME:
0685         value = 0x3f - (ctrl->val & 0x3f);
0686         break;
0687     default:
0688         value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
0689         break;
0690     }
0691     dprintk(1,
0692         "set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
0693         ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
0694         mask, cc->sreg ? " [shadowed]" : "");
0695     if (cc->sreg)
0696         cx_sandor(cc->sreg, cc->reg, mask, value);
0697     else
0698         cx_andor(cc->reg, mask, value);
0699     return 0;
0700 }
0701 
0702 /* ------------------------------------------------------------------ */
0703 /* VIDEO IOCTLS                                                       */
0704 
0705 static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
0706                 struct v4l2_format *f)
0707 {
0708     struct cx8800_dev *dev = video_drvdata(file);
0709     struct cx88_core *core = dev->core;
0710 
0711     f->fmt.pix.width        = core->width;
0712     f->fmt.pix.height       = core->height;
0713     f->fmt.pix.field        = core->field;
0714     f->fmt.pix.pixelformat  = dev->fmt->fourcc;
0715     f->fmt.pix.bytesperline =
0716         (f->fmt.pix.width * dev->fmt->depth) >> 3;
0717     f->fmt.pix.sizeimage =
0718         f->fmt.pix.height * f->fmt.pix.bytesperline;
0719     f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
0720     return 0;
0721 }
0722 
0723 static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
0724                   struct v4l2_format *f)
0725 {
0726     struct cx8800_dev *dev = video_drvdata(file);
0727     struct cx88_core *core = dev->core;
0728     const struct cx8800_fmt *fmt;
0729     enum v4l2_field   field;
0730     unsigned int      maxw, maxh;
0731 
0732     fmt = format_by_fourcc(f->fmt.pix.pixelformat);
0733     if (!fmt)
0734         return -EINVAL;
0735 
0736     maxw = norm_maxw(core->tvnorm);
0737     maxh = norm_maxh(core->tvnorm);
0738 
0739     field = f->fmt.pix.field;
0740 
0741     switch (field) {
0742     case V4L2_FIELD_TOP:
0743     case V4L2_FIELD_BOTTOM:
0744     case V4L2_FIELD_INTERLACED:
0745     case V4L2_FIELD_SEQ_BT:
0746     case V4L2_FIELD_SEQ_TB:
0747         break;
0748     default:
0749         field = (f->fmt.pix.height > maxh / 2)
0750             ? V4L2_FIELD_INTERLACED
0751             : V4L2_FIELD_BOTTOM;
0752         break;
0753     }
0754     if (V4L2_FIELD_HAS_T_OR_B(field))
0755         maxh /= 2;
0756 
0757     v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
0758                   &f->fmt.pix.height, 32, maxh, 0, 0);
0759     f->fmt.pix.field = field;
0760     f->fmt.pix.bytesperline =
0761         (f->fmt.pix.width * fmt->depth) >> 3;
0762     f->fmt.pix.sizeimage =
0763         f->fmt.pix.height * f->fmt.pix.bytesperline;
0764     f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
0765 
0766     return 0;
0767 }
0768 
0769 static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
0770                 struct v4l2_format *f)
0771 {
0772     struct cx8800_dev *dev = video_drvdata(file);
0773     struct cx88_core *core = dev->core;
0774     int err = vidioc_try_fmt_vid_cap(file, priv, f);
0775 
0776     if (err != 0)
0777         return err;
0778     if (vb2_is_busy(&dev->vb2_vidq) || vb2_is_busy(&dev->vb2_vbiq))
0779         return -EBUSY;
0780     if (core->dvbdev && vb2_is_busy(&core->dvbdev->vb2_mpegq))
0781         return -EBUSY;
0782     dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
0783     core->width = f->fmt.pix.width;
0784     core->height = f->fmt.pix.height;
0785     core->field = f->fmt.pix.field;
0786     return 0;
0787 }
0788 
0789 int cx88_querycap(struct file *file, struct cx88_core *core,
0790           struct v4l2_capability *cap)
0791 {
0792     strscpy(cap->card, core->board.name, sizeof(cap->card));
0793     cap->capabilities = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
0794                 V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VBI_CAPTURE |
0795                 V4L2_CAP_DEVICE_CAPS;
0796     if (core->board.tuner_type != UNSET)
0797         cap->capabilities |= V4L2_CAP_TUNER;
0798     if (core->board.radio.type == CX88_RADIO)
0799         cap->capabilities |= V4L2_CAP_RADIO;
0800     return 0;
0801 }
0802 EXPORT_SYMBOL(cx88_querycap);
0803 
0804 static int vidioc_querycap(struct file *file, void  *priv,
0805                struct v4l2_capability *cap)
0806 {
0807     struct cx8800_dev *dev = video_drvdata(file);
0808     struct cx88_core *core = dev->core;
0809 
0810     strscpy(cap->driver, "cx8800", sizeof(cap->driver));
0811     return cx88_querycap(file, core, cap);
0812 }
0813 
0814 static int vidioc_enum_fmt_vid_cap(struct file *file, void  *priv,
0815                    struct v4l2_fmtdesc *f)
0816 {
0817     if (unlikely(f->index >= ARRAY_SIZE(formats)))
0818         return -EINVAL;
0819 
0820     f->pixelformat = formats[f->index].fourcc;
0821 
0822     return 0;
0823 }
0824 
0825 static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *tvnorm)
0826 {
0827     struct cx8800_dev *dev = video_drvdata(file);
0828     struct cx88_core *core = dev->core;
0829 
0830     *tvnorm = core->tvnorm;
0831     return 0;
0832 }
0833 
0834 static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id tvnorms)
0835 {
0836     struct cx8800_dev *dev = video_drvdata(file);
0837     struct cx88_core *core = dev->core;
0838 
0839     return cx88_set_tvnorm(core, tvnorms);
0840 }
0841 
0842 /* only one input in this sample driver */
0843 int cx88_enum_input(struct cx88_core  *core, struct v4l2_input *i)
0844 {
0845     static const char * const iname[] = {
0846         [CX88_VMUX_COMPOSITE1] = "Composite1",
0847         [CX88_VMUX_COMPOSITE2] = "Composite2",
0848         [CX88_VMUX_COMPOSITE3] = "Composite3",
0849         [CX88_VMUX_COMPOSITE4] = "Composite4",
0850         [CX88_VMUX_SVIDEO] = "S-Video",
0851         [CX88_VMUX_TELEVISION] = "Television",
0852         [CX88_VMUX_CABLE] = "Cable TV",
0853         [CX88_VMUX_DVB] = "DVB",
0854         [CX88_VMUX_DEBUG] = "for debug only",
0855     };
0856     unsigned int n = i->index;
0857 
0858     if (n >= 4)
0859         return -EINVAL;
0860     if (!INPUT(n).type)
0861         return -EINVAL;
0862     i->type  = V4L2_INPUT_TYPE_CAMERA;
0863     strscpy(i->name, iname[INPUT(n).type], sizeof(i->name));
0864     if ((INPUT(n).type == CX88_VMUX_TELEVISION) ||
0865         (INPUT(n).type == CX88_VMUX_CABLE))
0866         i->type = V4L2_INPUT_TYPE_TUNER;
0867 
0868     i->std = CX88_NORMS;
0869     return 0;
0870 }
0871 EXPORT_SYMBOL(cx88_enum_input);
0872 
0873 static int vidioc_enum_input(struct file *file, void *priv,
0874                  struct v4l2_input *i)
0875 {
0876     struct cx8800_dev *dev = video_drvdata(file);
0877     struct cx88_core *core = dev->core;
0878 
0879     return cx88_enum_input(core, i);
0880 }
0881 
0882 static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
0883 {
0884     struct cx8800_dev *dev = video_drvdata(file);
0885     struct cx88_core *core = dev->core;
0886 
0887     *i = core->input;
0888     return 0;
0889 }
0890 
0891 static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
0892 {
0893     struct cx8800_dev *dev = video_drvdata(file);
0894     struct cx88_core *core = dev->core;
0895 
0896     if (i >= 4)
0897         return -EINVAL;
0898     if (!INPUT(i).type)
0899         return -EINVAL;
0900 
0901     cx88_newstation(core);
0902     cx88_video_mux(core, i);
0903     return 0;
0904 }
0905 
0906 static int vidioc_g_tuner(struct file *file, void *priv,
0907               struct v4l2_tuner *t)
0908 {
0909     struct cx8800_dev *dev = video_drvdata(file);
0910     struct cx88_core *core = dev->core;
0911     u32 reg;
0912 
0913     if (unlikely(core->board.tuner_type == UNSET))
0914         return -EINVAL;
0915     if (t->index != 0)
0916         return -EINVAL;
0917 
0918     strscpy(t->name, "Television", sizeof(t->name));
0919     t->capability = V4L2_TUNER_CAP_NORM;
0920     t->rangehigh  = 0xffffffffUL;
0921     call_all(core, tuner, g_tuner, t);
0922 
0923     cx88_get_stereo(core, t);
0924     reg = cx_read(MO_DEVICE_STATUS);
0925     t->signal = (reg & (1 << 5)) ? 0xffff : 0x0000;
0926     return 0;
0927 }
0928 
0929 static int vidioc_s_tuner(struct file *file, void *priv,
0930               const struct v4l2_tuner *t)
0931 {
0932     struct cx8800_dev *dev = video_drvdata(file);
0933     struct cx88_core *core = dev->core;
0934 
0935     if (core->board.tuner_type == UNSET)
0936         return -EINVAL;
0937     if (t->index != 0)
0938         return -EINVAL;
0939 
0940     cx88_set_stereo(core, t->audmode, 1);
0941     return 0;
0942 }
0943 
0944 static int vidioc_g_frequency(struct file *file, void *priv,
0945                   struct v4l2_frequency *f)
0946 {
0947     struct cx8800_dev *dev = video_drvdata(file);
0948     struct cx88_core *core = dev->core;
0949 
0950     if (unlikely(core->board.tuner_type == UNSET))
0951         return -EINVAL;
0952     if (f->tuner)
0953         return -EINVAL;
0954 
0955     f->frequency = core->freq;
0956 
0957     call_all(core, tuner, g_frequency, f);
0958 
0959     return 0;
0960 }
0961 
0962 int cx88_set_freq(struct cx88_core  *core,
0963           const struct v4l2_frequency *f)
0964 {
0965     struct v4l2_frequency new_freq = *f;
0966 
0967     if (unlikely(core->board.tuner_type == UNSET))
0968         return -EINVAL;
0969     if (unlikely(f->tuner != 0))
0970         return -EINVAL;
0971 
0972     cx88_newstation(core);
0973     call_all(core, tuner, s_frequency, f);
0974     call_all(core, tuner, g_frequency, &new_freq);
0975     core->freq = new_freq.frequency;
0976 
0977     /* When changing channels it is required to reset TVAUDIO */
0978     usleep_range(10000, 20000);
0979     cx88_set_tvaudio(core);
0980 
0981     return 0;
0982 }
0983 EXPORT_SYMBOL(cx88_set_freq);
0984 
0985 static int vidioc_s_frequency(struct file *file, void *priv,
0986                   const struct v4l2_frequency *f)
0987 {
0988     struct cx8800_dev *dev = video_drvdata(file);
0989     struct cx88_core *core = dev->core;
0990 
0991     return cx88_set_freq(core, f);
0992 }
0993 
0994 #ifdef CONFIG_VIDEO_ADV_DEBUG
0995 static int vidioc_g_register(struct file *file, void *fh,
0996                  struct v4l2_dbg_register *reg)
0997 {
0998     struct cx8800_dev *dev = video_drvdata(file);
0999     struct cx88_core *core = dev->core;
1000 
1001     /* cx2388x has a 24-bit register space */
1002     reg->val = cx_read(reg->reg & 0xfffffc);
1003     reg->size = 4;
1004     return 0;
1005 }
1006 
1007 static int vidioc_s_register(struct file *file, void *fh,
1008                  const struct v4l2_dbg_register *reg)
1009 {
1010     struct cx8800_dev *dev = video_drvdata(file);
1011     struct cx88_core *core = dev->core;
1012 
1013     cx_write(reg->reg & 0xfffffc, reg->val);
1014     return 0;
1015 }
1016 #endif
1017 
1018 /* ----------------------------------------------------------- */
1019 /* RADIO ESPECIFIC IOCTLS                                      */
1020 /* ----------------------------------------------------------- */
1021 
1022 static int radio_g_tuner(struct file *file, void *priv,
1023              struct v4l2_tuner *t)
1024 {
1025     struct cx8800_dev *dev = video_drvdata(file);
1026     struct cx88_core *core = dev->core;
1027 
1028     if (unlikely(t->index > 0))
1029         return -EINVAL;
1030 
1031     strscpy(t->name, "Radio", sizeof(t->name));
1032 
1033     call_all(core, tuner, g_tuner, t);
1034     return 0;
1035 }
1036 
1037 static int radio_s_tuner(struct file *file, void *priv,
1038              const struct v4l2_tuner *t)
1039 {
1040     struct cx8800_dev *dev = video_drvdata(file);
1041     struct cx88_core *core = dev->core;
1042 
1043     if (t->index != 0)
1044         return -EINVAL;
1045 
1046     call_all(core, tuner, s_tuner, t);
1047     return 0;
1048 }
1049 
1050 /* ----------------------------------------------------------- */
1051 
1052 static const char *cx88_vid_irqs[32] = {
1053     "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1054     "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1055     "y_oflow",  "u_oflow",  "v_oflow",  "vbi_oflow",
1056     "y_sync",   "u_sync",   "v_sync",   "vbi_sync",
1057     "opc_err",  "par_err",  "rip_err",  "pci_abort",
1058 };
1059 
1060 static void cx8800_vid_irq(struct cx8800_dev *dev)
1061 {
1062     struct cx88_core *core = dev->core;
1063     u32 status, mask, count;
1064 
1065     status = cx_read(MO_VID_INTSTAT);
1066     mask   = cx_read(MO_VID_INTMSK);
1067     if (0 == (status & mask))
1068         return;
1069     cx_write(MO_VID_INTSTAT, status);
1070     if (irq_debug  ||  (status & mask & ~0xff))
1071         cx88_print_irqbits("irq vid",
1072                    cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
1073                    status, mask);
1074 
1075     /* risc op code error */
1076     if (status & (1 << 16)) {
1077         pr_warn("video risc op code error\n");
1078         cx_clear(MO_VID_DMACNTRL, 0x11);
1079         cx_clear(VID_CAPTURE_CONTROL, 0x06);
1080         cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1081     }
1082 
1083     /* risc1 y */
1084     if (status & 0x01) {
1085         spin_lock(&dev->slock);
1086         count = cx_read(MO_VIDY_GPCNT);
1087         cx88_wakeup(core, &dev->vidq, count);
1088         spin_unlock(&dev->slock);
1089     }
1090 
1091     /* risc1 vbi */
1092     if (status & 0x08) {
1093         spin_lock(&dev->slock);
1094         count = cx_read(MO_VBI_GPCNT);
1095         cx88_wakeup(core, &dev->vbiq, count);
1096         spin_unlock(&dev->slock);
1097     }
1098 }
1099 
1100 static irqreturn_t cx8800_irq(int irq, void *dev_id)
1101 {
1102     struct cx8800_dev *dev = dev_id;
1103     struct cx88_core *core = dev->core;
1104     u32 status;
1105     int loop, handled = 0;
1106 
1107     for (loop = 0; loop < 10; loop++) {
1108         status = cx_read(MO_PCI_INTSTAT) &
1109             (core->pci_irqmask | PCI_INT_VIDINT);
1110         if (status == 0)
1111             goto out;
1112         cx_write(MO_PCI_INTSTAT, status);
1113         handled = 1;
1114 
1115         if (status & core->pci_irqmask)
1116             cx88_core_irq(core, status);
1117         if (status & PCI_INT_VIDINT)
1118             cx8800_vid_irq(dev);
1119     }
1120     if (loop == 10) {
1121         pr_warn("irq loop -- clearing mask\n");
1122         cx_write(MO_PCI_INTMSK, 0);
1123     }
1124 
1125  out:
1126     return IRQ_RETVAL(handled);
1127 }
1128 
1129 /* ----------------------------------------------------------- */
1130 /* exported stuff                                              */
1131 
1132 static const struct v4l2_file_operations video_fops = {
1133     .owner         = THIS_MODULE,
1134     .open          = v4l2_fh_open,
1135     .release       = vb2_fop_release,
1136     .read          = vb2_fop_read,
1137     .poll          = vb2_fop_poll,
1138     .mmap          = vb2_fop_mmap,
1139     .unlocked_ioctl = video_ioctl2,
1140 };
1141 
1142 static const struct v4l2_ioctl_ops video_ioctl_ops = {
1143     .vidioc_querycap      = vidioc_querycap,
1144     .vidioc_enum_fmt_vid_cap  = vidioc_enum_fmt_vid_cap,
1145     .vidioc_g_fmt_vid_cap     = vidioc_g_fmt_vid_cap,
1146     .vidioc_try_fmt_vid_cap   = vidioc_try_fmt_vid_cap,
1147     .vidioc_s_fmt_vid_cap     = vidioc_s_fmt_vid_cap,
1148     .vidioc_reqbufs       = vb2_ioctl_reqbufs,
1149     .vidioc_querybuf      = vb2_ioctl_querybuf,
1150     .vidioc_qbuf          = vb2_ioctl_qbuf,
1151     .vidioc_dqbuf         = vb2_ioctl_dqbuf,
1152     .vidioc_g_std         = vidioc_g_std,
1153     .vidioc_s_std         = vidioc_s_std,
1154     .vidioc_enum_input    = vidioc_enum_input,
1155     .vidioc_g_input       = vidioc_g_input,
1156     .vidioc_s_input       = vidioc_s_input,
1157     .vidioc_streamon      = vb2_ioctl_streamon,
1158     .vidioc_streamoff     = vb2_ioctl_streamoff,
1159     .vidioc_g_tuner       = vidioc_g_tuner,
1160     .vidioc_s_tuner       = vidioc_s_tuner,
1161     .vidioc_g_frequency   = vidioc_g_frequency,
1162     .vidioc_s_frequency   = vidioc_s_frequency,
1163     .vidioc_subscribe_event      = v4l2_ctrl_subscribe_event,
1164     .vidioc_unsubscribe_event    = v4l2_event_unsubscribe,
1165 #ifdef CONFIG_VIDEO_ADV_DEBUG
1166     .vidioc_g_register    = vidioc_g_register,
1167     .vidioc_s_register    = vidioc_s_register,
1168 #endif
1169 };
1170 
1171 static const struct video_device cx8800_video_template = {
1172     .name                 = "cx8800-video",
1173     .fops                 = &video_fops,
1174     .ioctl_ops        = &video_ioctl_ops,
1175     .tvnorms              = CX88_NORMS,
1176 };
1177 
1178 static const struct v4l2_ioctl_ops vbi_ioctl_ops = {
1179     .vidioc_querycap      = vidioc_querycap,
1180     .vidioc_g_fmt_vbi_cap     = cx8800_vbi_fmt,
1181     .vidioc_try_fmt_vbi_cap   = cx8800_vbi_fmt,
1182     .vidioc_s_fmt_vbi_cap     = cx8800_vbi_fmt,
1183     .vidioc_reqbufs       = vb2_ioctl_reqbufs,
1184     .vidioc_querybuf      = vb2_ioctl_querybuf,
1185     .vidioc_qbuf          = vb2_ioctl_qbuf,
1186     .vidioc_dqbuf         = vb2_ioctl_dqbuf,
1187     .vidioc_g_std         = vidioc_g_std,
1188     .vidioc_s_std         = vidioc_s_std,
1189     .vidioc_enum_input    = vidioc_enum_input,
1190     .vidioc_g_input       = vidioc_g_input,
1191     .vidioc_s_input       = vidioc_s_input,
1192     .vidioc_streamon      = vb2_ioctl_streamon,
1193     .vidioc_streamoff     = vb2_ioctl_streamoff,
1194     .vidioc_g_tuner       = vidioc_g_tuner,
1195     .vidioc_s_tuner       = vidioc_s_tuner,
1196     .vidioc_g_frequency   = vidioc_g_frequency,
1197     .vidioc_s_frequency   = vidioc_s_frequency,
1198 #ifdef CONFIG_VIDEO_ADV_DEBUG
1199     .vidioc_g_register    = vidioc_g_register,
1200     .vidioc_s_register    = vidioc_s_register,
1201 #endif
1202 };
1203 
1204 static const struct video_device cx8800_vbi_template = {
1205     .name                 = "cx8800-vbi",
1206     .fops                 = &video_fops,
1207     .ioctl_ops        = &vbi_ioctl_ops,
1208     .tvnorms              = CX88_NORMS,
1209 };
1210 
1211 static const struct v4l2_file_operations radio_fops = {
1212     .owner         = THIS_MODULE,
1213     .open          = radio_open,
1214     .poll          = v4l2_ctrl_poll,
1215     .release       = v4l2_fh_release,
1216     .unlocked_ioctl = video_ioctl2,
1217 };
1218 
1219 static const struct v4l2_ioctl_ops radio_ioctl_ops = {
1220     .vidioc_querycap      = vidioc_querycap,
1221     .vidioc_g_tuner       = radio_g_tuner,
1222     .vidioc_s_tuner       = radio_s_tuner,
1223     .vidioc_g_frequency   = vidioc_g_frequency,
1224     .vidioc_s_frequency   = vidioc_s_frequency,
1225     .vidioc_subscribe_event      = v4l2_ctrl_subscribe_event,
1226     .vidioc_unsubscribe_event    = v4l2_event_unsubscribe,
1227 #ifdef CONFIG_VIDEO_ADV_DEBUG
1228     .vidioc_g_register    = vidioc_g_register,
1229     .vidioc_s_register    = vidioc_s_register,
1230 #endif
1231 };
1232 
1233 static const struct video_device cx8800_radio_template = {
1234     .name                 = "cx8800-radio",
1235     .fops                 = &radio_fops,
1236     .ioctl_ops        = &radio_ioctl_ops,
1237 };
1238 
1239 static const struct v4l2_ctrl_ops cx8800_ctrl_vid_ops = {
1240     .s_ctrl = cx8800_s_vid_ctrl,
1241 };
1242 
1243 static const struct v4l2_ctrl_ops cx8800_ctrl_aud_ops = {
1244     .s_ctrl = cx8800_s_aud_ctrl,
1245 };
1246 
1247 /* ----------------------------------------------------------- */
1248 
1249 static void cx8800_unregister_video(struct cx8800_dev *dev)
1250 {
1251     video_unregister_device(&dev->radio_dev);
1252     video_unregister_device(&dev->vbi_dev);
1253     video_unregister_device(&dev->video_dev);
1254 }
1255 
1256 static int cx8800_initdev(struct pci_dev *pci_dev,
1257               const struct pci_device_id *pci_id)
1258 {
1259     struct cx8800_dev *dev;
1260     struct cx88_core *core;
1261     struct vb2_queue *q;
1262     int err;
1263     int i;
1264 
1265     dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1266     if (!dev)
1267         return -ENOMEM;
1268 
1269     /* pci init */
1270     dev->pci = pci_dev;
1271     if (pci_enable_device(pci_dev)) {
1272         err = -EIO;
1273         goto fail_free;
1274     }
1275     core = cx88_core_get(dev->pci);
1276     if (!core) {
1277         err = -EINVAL;
1278         goto fail_disable;
1279     }
1280     dev->core = core;
1281 
1282     /* print pci info */
1283     dev->pci_rev = pci_dev->revision;
1284     pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER,  &dev->pci_lat);
1285     pr_info("found at %s, rev: %d, irq: %d, latency: %d, mmio: 0x%llx\n",
1286         pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
1287         dev->pci_lat,
1288         (unsigned long long)pci_resource_start(pci_dev, 0));
1289 
1290     pci_set_master(pci_dev);
1291     err = dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32));
1292     if (err) {
1293         pr_err("Oops: no 32bit PCI DMA ???\n");
1294         goto fail_core;
1295     }
1296 
1297     /* initialize driver struct */
1298     spin_lock_init(&dev->slock);
1299 
1300     /* init video dma queues */
1301     INIT_LIST_HEAD(&dev->vidq.active);
1302 
1303     /* init vbi dma queues */
1304     INIT_LIST_HEAD(&dev->vbiq.active);
1305 
1306     /* get irq */
1307     err = request_irq(pci_dev->irq, cx8800_irq,
1308               IRQF_SHARED, core->name, dev);
1309     if (err < 0) {
1310         pr_err("can't get IRQ %d\n", pci_dev->irq);
1311         goto fail_core;
1312     }
1313     cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1314 
1315     for (i = 0; i < CX8800_AUD_CTLS; i++) {
1316         const struct cx88_ctrl *cc = &cx8800_aud_ctls[i];
1317         struct v4l2_ctrl *vc;
1318 
1319         vc = v4l2_ctrl_new_std(&core->audio_hdl, &cx8800_ctrl_aud_ops,
1320                        cc->id, cc->minimum, cc->maximum,
1321                        cc->step, cc->default_value);
1322         if (!vc) {
1323             err = core->audio_hdl.error;
1324             goto fail_irq;
1325         }
1326         vc->priv = (void *)cc;
1327     }
1328 
1329     for (i = 0; i < CX8800_VID_CTLS; i++) {
1330         const struct cx88_ctrl *cc = &cx8800_vid_ctls[i];
1331         struct v4l2_ctrl *vc;
1332 
1333         vc = v4l2_ctrl_new_std(&core->video_hdl, &cx8800_ctrl_vid_ops,
1334                        cc->id, cc->minimum, cc->maximum,
1335                        cc->step, cc->default_value);
1336         if (!vc) {
1337             err = core->video_hdl.error;
1338             goto fail_irq;
1339         }
1340         vc->priv = (void *)cc;
1341         if (vc->id == V4L2_CID_CHROMA_AGC)
1342             core->chroma_agc = vc;
1343     }
1344     v4l2_ctrl_add_handler(&core->video_hdl, &core->audio_hdl, NULL, false);
1345 
1346     /* load and configure helper modules */
1347 
1348     if (core->board.audio_chip == CX88_AUDIO_WM8775) {
1349         struct i2c_board_info wm8775_info = {
1350             .type = "wm8775",
1351             .addr = 0x36 >> 1,
1352             .platform_data = &core->wm8775_data,
1353         };
1354         struct v4l2_subdev *sd;
1355 
1356         if (core->boardnr == CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1)
1357             core->wm8775_data.is_nova_s = true;
1358         else
1359             core->wm8775_data.is_nova_s = false;
1360 
1361         sd = v4l2_i2c_new_subdev_board(&core->v4l2_dev, &core->i2c_adap,
1362                            &wm8775_info, NULL);
1363         if (sd) {
1364             core->sd_wm8775 = sd;
1365             sd->grp_id = WM8775_GID;
1366         }
1367     }
1368 
1369     if (core->board.audio_chip == CX88_AUDIO_TVAUDIO) {
1370         /*
1371          * This probes for a tda9874 as is used on some
1372          * Pixelview Ultra boards.
1373          */
1374         v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
1375                     "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
1376     }
1377 
1378     switch (core->boardnr) {
1379     case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1380     case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
1381         static const struct i2c_board_info rtc_info = {
1382             I2C_BOARD_INFO("isl1208", 0x6f)
1383         };
1384 
1385         request_module("rtc-isl1208");
1386         core->i2c_rtc = i2c_new_client_device(&core->i2c_adap, &rtc_info);
1387     }
1388         fallthrough;
1389     case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1390         request_module("ir-kbd-i2c");
1391     }
1392 
1393     /* Sets device info at pci_dev */
1394     pci_set_drvdata(pci_dev, dev);
1395 
1396     dev->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
1397 
1398     /* Maintain a reference so cx88-blackbird can query the 8800 device. */
1399     core->v4ldev = dev;
1400 
1401     /* initial device configuration */
1402     mutex_lock(&core->lock);
1403     cx88_set_tvnorm(core, V4L2_STD_NTSC_M);
1404     v4l2_ctrl_handler_setup(&core->video_hdl);
1405     v4l2_ctrl_handler_setup(&core->audio_hdl);
1406     cx88_video_mux(core, 0);
1407 
1408     q = &dev->vb2_vidq;
1409     q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1410     q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1411     q->gfp_flags = GFP_DMA32;
1412     q->min_buffers_needed = 2;
1413     q->drv_priv = dev;
1414     q->buf_struct_size = sizeof(struct cx88_buffer);
1415     q->ops = &cx8800_video_qops;
1416     q->mem_ops = &vb2_dma_sg_memops;
1417     q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1418     q->lock = &core->lock;
1419     q->dev = &dev->pci->dev;
1420 
1421     err = vb2_queue_init(q);
1422     if (err < 0)
1423         goto fail_unreg;
1424 
1425     q = &dev->vb2_vbiq;
1426     q->type = V4L2_BUF_TYPE_VBI_CAPTURE;
1427     q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1428     q->gfp_flags = GFP_DMA32;
1429     q->min_buffers_needed = 2;
1430     q->drv_priv = dev;
1431     q->buf_struct_size = sizeof(struct cx88_buffer);
1432     q->ops = &cx8800_vbi_qops;
1433     q->mem_ops = &vb2_dma_sg_memops;
1434     q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1435     q->lock = &core->lock;
1436     q->dev = &dev->pci->dev;
1437 
1438     err = vb2_queue_init(q);
1439     if (err < 0)
1440         goto fail_unreg;
1441 
1442     /* register v4l devices */
1443     cx88_vdev_init(core, dev->pci, &dev->video_dev,
1444                &cx8800_video_template, "video");
1445     video_set_drvdata(&dev->video_dev, dev);
1446     dev->video_dev.ctrl_handler = &core->video_hdl;
1447     dev->video_dev.queue = &dev->vb2_vidq;
1448     dev->video_dev.device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
1449                      V4L2_CAP_VIDEO_CAPTURE;
1450     if (core->board.tuner_type != UNSET)
1451         dev->video_dev.device_caps |= V4L2_CAP_TUNER;
1452     err = video_register_device(&dev->video_dev, VFL_TYPE_VIDEO,
1453                     video_nr[core->nr]);
1454     if (err < 0) {
1455         pr_err("can't register video device\n");
1456         goto fail_unreg;
1457     }
1458     pr_info("registered device %s [v4l2]\n",
1459         video_device_node_name(&dev->video_dev));
1460 
1461     cx88_vdev_init(core, dev->pci, &dev->vbi_dev,
1462                &cx8800_vbi_template, "vbi");
1463     video_set_drvdata(&dev->vbi_dev, dev);
1464     dev->vbi_dev.queue = &dev->vb2_vbiq;
1465     dev->vbi_dev.device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
1466                    V4L2_CAP_VBI_CAPTURE;
1467     if (core->board.tuner_type != UNSET)
1468         dev->vbi_dev.device_caps |= V4L2_CAP_TUNER;
1469     err = video_register_device(&dev->vbi_dev, VFL_TYPE_VBI,
1470                     vbi_nr[core->nr]);
1471     if (err < 0) {
1472         pr_err("can't register vbi device\n");
1473         goto fail_unreg;
1474     }
1475     pr_info("registered device %s\n",
1476         video_device_node_name(&dev->vbi_dev));
1477 
1478     if (core->board.radio.type == CX88_RADIO) {
1479         cx88_vdev_init(core, dev->pci, &dev->radio_dev,
1480                    &cx8800_radio_template, "radio");
1481         video_set_drvdata(&dev->radio_dev, dev);
1482         dev->radio_dev.ctrl_handler = &core->audio_hdl;
1483         dev->radio_dev.device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER;
1484         err = video_register_device(&dev->radio_dev, VFL_TYPE_RADIO,
1485                         radio_nr[core->nr]);
1486         if (err < 0) {
1487             pr_err("can't register radio device\n");
1488             goto fail_unreg;
1489         }
1490         pr_info("registered device %s\n",
1491             video_device_node_name(&dev->radio_dev));
1492     }
1493 
1494     /* start tvaudio thread */
1495     if (core->board.tuner_type != UNSET) {
1496         core->kthread = kthread_run(cx88_audio_thread,
1497                         core, "cx88 tvaudio");
1498         if (IS_ERR(core->kthread)) {
1499             err = PTR_ERR(core->kthread);
1500             pr_err("failed to create cx88 audio thread, err=%d\n",
1501                    err);
1502         }
1503     }
1504     mutex_unlock(&core->lock);
1505 
1506     return 0;
1507 
1508 fail_unreg:
1509     cx8800_unregister_video(dev);
1510     mutex_unlock(&core->lock);
1511 fail_irq:
1512     free_irq(pci_dev->irq, dev);
1513 fail_core:
1514     core->v4ldev = NULL;
1515     cx88_core_put(core, dev->pci);
1516 fail_disable:
1517     pci_disable_device(pci_dev);
1518 fail_free:
1519     kfree(dev);
1520     return err;
1521 }
1522 
1523 static void cx8800_finidev(struct pci_dev *pci_dev)
1524 {
1525     struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1526     struct cx88_core *core = dev->core;
1527 
1528     /* stop thread */
1529     if (core->kthread) {
1530         kthread_stop(core->kthread);
1531         core->kthread = NULL;
1532     }
1533 
1534     if (core->ir)
1535         cx88_ir_stop(core);
1536 
1537     cx88_shutdown(core); /* FIXME */
1538 
1539     /* unregister stuff */
1540 
1541     free_irq(pci_dev->irq, dev);
1542     cx8800_unregister_video(dev);
1543     pci_disable_device(pci_dev);
1544 
1545     core->v4ldev = NULL;
1546 
1547     /* free memory */
1548     cx88_core_put(core, dev->pci);
1549     kfree(dev);
1550 }
1551 
1552 static int __maybe_unused cx8800_suspend(struct device *dev_d)
1553 {
1554     struct cx8800_dev *dev = dev_get_drvdata(dev_d);
1555     struct cx88_core *core = dev->core;
1556     unsigned long flags;
1557 
1558     /* stop video+vbi capture */
1559     spin_lock_irqsave(&dev->slock, flags);
1560     if (!list_empty(&dev->vidq.active)) {
1561         pr_info("suspend video\n");
1562         stop_video_dma(dev);
1563     }
1564     if (!list_empty(&dev->vbiq.active)) {
1565         pr_info("suspend vbi\n");
1566         cx8800_stop_vbi_dma(dev);
1567     }
1568     spin_unlock_irqrestore(&dev->slock, flags);
1569 
1570     if (core->ir)
1571         cx88_ir_stop(core);
1572     /* FIXME -- shutdown device */
1573     cx88_shutdown(core);
1574 
1575     dev->state.disabled = 1;
1576     return 0;
1577 }
1578 
1579 static int __maybe_unused cx8800_resume(struct device *dev_d)
1580 {
1581     struct cx8800_dev *dev = dev_get_drvdata(dev_d);
1582     struct cx88_core *core = dev->core;
1583     unsigned long flags;
1584 
1585     dev->state.disabled = 0;
1586 
1587     /* FIXME: re-initialize hardware */
1588     cx88_reset(core);
1589     if (core->ir)
1590         cx88_ir_start(core);
1591 
1592     cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1593 
1594     /* restart video+vbi capture */
1595     spin_lock_irqsave(&dev->slock, flags);
1596     if (!list_empty(&dev->vidq.active)) {
1597         pr_info("resume video\n");
1598         restart_video_queue(dev, &dev->vidq);
1599     }
1600     if (!list_empty(&dev->vbiq.active)) {
1601         pr_info("resume vbi\n");
1602         cx8800_restart_vbi_queue(dev, &dev->vbiq);
1603     }
1604     spin_unlock_irqrestore(&dev->slock, flags);
1605 
1606     return 0;
1607 }
1608 
1609 /* ----------------------------------------------------------- */
1610 
1611 static const struct pci_device_id cx8800_pci_tbl[] = {
1612     {
1613         .vendor       = 0x14f1,
1614         .device       = 0x8800,
1615         .subvendor    = PCI_ANY_ID,
1616         .subdevice    = PCI_ANY_ID,
1617     }, {
1618         /* --- end of list --- */
1619     }
1620 };
1621 MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
1622 
1623 static SIMPLE_DEV_PM_OPS(cx8800_pm_ops, cx8800_suspend, cx8800_resume);
1624 
1625 static struct pci_driver cx8800_pci_driver = {
1626     .name      = "cx8800",
1627     .id_table  = cx8800_pci_tbl,
1628     .probe     = cx8800_initdev,
1629     .remove    = cx8800_finidev,
1630     .driver.pm = &cx8800_pm_ops,
1631 };
1632 
1633 module_pci_driver(cx8800_pci_driver);
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