pci/cx88/cx88-vbi.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  */
0004
0005 #include "cx88.h"
0006
0007 #include <linux/kernel.h>
0008 #include <linux/module.h>
0009 #include <linux/init.h>
0010
0011 static unsigned int vbi_debug;
0012 module_param(vbi_debug, int, 0644);
0013 MODULE_PARM_DESC(vbi_debug, "enable debug messages [vbi]");
0014
0015 #define dprintk(level, fmt, arg...) do {            \
0016     if (vbi_debug >= level)                 \
0017         printk(KERN_DEBUG pr_fmt("%s: vbi:" fmt),   \
0018             __func__, ##arg);           \
0019 } while (0)
0020
0021 /* ------------------------------------------------------------------ */
0022
0023 int cx8800_vbi_fmt(struct file *file, void *priv,
0024            struct v4l2_format *f)
0025 {
0026     struct cx8800_dev *dev = video_drvdata(file);
0027
0028     f->fmt.vbi.samples_per_line = VBI_LINE_LENGTH;
0029     f->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY;
0030     f->fmt.vbi.offset = 244;
0031
0032     if (dev->core->tvnorm & V4L2_STD_525_60) {
0033         /* ntsc */
0034         f->fmt.vbi.sampling_rate = 28636363;
0035         f->fmt.vbi.start[0] = 10;
0036         f->fmt.vbi.start[1] = 273;
0037         f->fmt.vbi.count[0] = VBI_LINE_NTSC_COUNT;
0038         f->fmt.vbi.count[1] = VBI_LINE_NTSC_COUNT;
0039
0040     } else if (dev->core->tvnorm & V4L2_STD_625_50) {
0041         /* pal */
0042         f->fmt.vbi.sampling_rate = 35468950;
0043         f->fmt.vbi.start[0] = V4L2_VBI_ITU_625_F1_START + 5;
0044         f->fmt.vbi.start[1] = V4L2_VBI_ITU_625_F2_START + 5;
0045         f->fmt.vbi.count[0] = VBI_LINE_PAL_COUNT;
0046         f->fmt.vbi.count[1] = VBI_LINE_PAL_COUNT;
0047     }
0048     return 0;
0049 }
0050
0051 static int cx8800_start_vbi_dma(struct cx8800_dev    *dev,
0052                 struct cx88_dmaqueue *q,
0053                 struct cx88_buffer   *buf)
0054 {
0055     struct cx88_core *core = dev->core;
0056
0057     /* setup fifo + format */
0058     cx88_sram_channel_setup(dev->core, &cx88_sram_channels[SRAM_CH24],
0059                 VBI_LINE_LENGTH, buf->risc.dma);
0060
0061     cx_write(MO_VBOS_CONTROL, (1 << 18) |  /* comb filter delay fixup */
0062                   (1 << 15) |  /* enable vbi capture */
0063                   (1 << 11));
0064
0065     /* reset counter */
0066     cx_write(MO_VBI_GPCNTRL, GP_COUNT_CONTROL_RESET);
0067     q->count = 0;
0068
0069     /* enable irqs */
0070     cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
0071     cx_set(MO_VID_INTMSK, 0x0f0088);
0072
0073     /* enable capture */
0074     cx_set(VID_CAPTURE_CONTROL, 0x18);
0075
0076     /* start dma */
0077     cx_set(MO_DEV_CNTRL2, (1 << 5));
0078     cx_set(MO_VID_DMACNTRL, 0x88);
0079
0080     return 0;
0081 }
0082
0083 void cx8800_stop_vbi_dma(struct cx8800_dev *dev)
0084 {
0085     struct cx88_core *core = dev->core;
0086
0087     /* stop dma */
0088     cx_clear(MO_VID_DMACNTRL, 0x88);
0089
0090     /* disable capture */
0091     cx_clear(VID_CAPTURE_CONTROL, 0x18);
0092
0093     /* disable irqs */
0094     cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
0095     cx_clear(MO_VID_INTMSK, 0x0f0088);
0096 }
0097
0098 int cx8800_restart_vbi_queue(struct cx8800_dev    *dev,
0099                  struct cx88_dmaqueue *q)
0100 {
0101     struct cx88_buffer *buf;
0102
0103     if (list_empty(&q->active))
0104         return 0;
0105
0106     buf = list_entry(q->active.next, struct cx88_buffer, list);
0107     dprintk(2, "restart_queue [%p/%d]: restart dma\n",
0108         buf, buf->vb.vb2_buf.index);
0109     cx8800_start_vbi_dma(dev, q, buf);
0110     return 0;
0111 }
0112
0113 /* ------------------------------------------------------------------ */
0114
0115 static int queue_setup(struct vb2_queue *q,
0116                unsigned int *num_buffers, unsigned int *num_planes,
0117                unsigned int sizes[], struct device *alloc_devs[])
0118 {
0119     struct cx8800_dev *dev = q->drv_priv;
0120
0121     *num_planes = 1;
0122     if (dev->core->tvnorm & V4L2_STD_525_60)
0123         sizes[0] = VBI_LINE_NTSC_COUNT * VBI_LINE_LENGTH * 2;
0124     else
0125         sizes[0] = VBI_LINE_PAL_COUNT * VBI_LINE_LENGTH * 2;
0126     return 0;
0127 }
0128
0129 static int buffer_prepare(struct vb2_buffer *vb)
0130 {
0131     struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
0132     struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
0133     struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
0134     struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
0135     unsigned int lines;
0136     unsigned int size;
0137
0138     if (dev->core->tvnorm & V4L2_STD_525_60)
0139         lines = VBI_LINE_NTSC_COUNT;
0140     else
0141         lines = VBI_LINE_PAL_COUNT;
0142     size = lines * VBI_LINE_LENGTH * 2;
0143     if (vb2_plane_size(vb, 0) < size)
0144         return -EINVAL;
0145     vb2_set_plane_payload(vb, 0, size);
0146
0147     cx88_risc_buffer(dev->pci, &buf->risc, sgt->sgl,
0148              0, VBI_LINE_LENGTH * lines,
0149              VBI_LINE_LENGTH, 0,
0150              lines);
0151     return 0;
0152 }
0153
0154 static void buffer_finish(struct vb2_buffer *vb)
0155 {
0156     struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
0157     struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
0158     struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
0159     struct cx88_riscmem *risc = &buf->risc;
0160
0161     if (risc->cpu)
0162         dma_free_coherent(&dev->pci->dev, risc->size, risc->cpu,
0163                   risc->dma);
0164     memset(risc, 0, sizeof(*risc));
0165 }
0166
0167 static void buffer_queue(struct vb2_buffer *vb)
0168 {
0169     struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
0170     struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
0171     struct cx88_buffer    *buf = container_of(vbuf, struct cx88_buffer, vb);
0172     struct cx88_buffer    *prev;
0173     struct cx88_dmaqueue  *q    = &dev->vbiq;
0174
0175     /* add jump to start */
0176     buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 8);
0177     buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC);
0178     buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 8);
0179
0180     if (list_empty(&q->active)) {
0181         list_add_tail(&buf->list, &q->active);
0182         dprintk(2, "[%p/%d] vbi_queue - first active\n",
0183             buf, buf->vb.vb2_buf.index);
0184
0185     } else {
0186         buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1);
0187         prev = list_entry(q->active.prev, struct cx88_buffer, list);
0188         list_add_tail(&buf->list, &q->active);
0189         prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
0190         dprintk(2, "[%p/%d] buffer_queue - append to active\n",
0191             buf, buf->vb.vb2_buf.index);
0192     }
0193 }
0194
0195 static int start_streaming(struct vb2_queue *q, unsigned int count)
0196 {
0197     struct cx8800_dev *dev = q->drv_priv;
0198     struct cx88_dmaqueue *dmaq = &dev->vbiq;
0199     struct cx88_buffer *buf = list_entry(dmaq->active.next,
0200             struct cx88_buffer, list);
0201
0202     cx8800_start_vbi_dma(dev, dmaq, buf);
0203     return 0;
0204 }
0205
0206 static void stop_streaming(struct vb2_queue *q)
0207 {
0208     struct cx8800_dev *dev = q->drv_priv;
0209     struct cx88_core *core = dev->core;
0210     struct cx88_dmaqueue *dmaq = &dev->vbiq;
0211     unsigned long flags;
0212
0213     cx_clear(MO_VID_DMACNTRL, 0x11);
0214     cx_clear(VID_CAPTURE_CONTROL, 0x06);
0215     cx8800_stop_vbi_dma(dev);
0216     spin_lock_irqsave(&dev->slock, flags);
0217     while (!list_empty(&dmaq->active)) {
0218         struct cx88_buffer *buf = list_entry(dmaq->active.next,
0219             struct cx88_buffer, list);
0220
0221         list_del(&buf->list);
0222         vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
0223     }
0224     spin_unlock_irqrestore(&dev->slock, flags);
0225 }
0226
0227 const struct vb2_ops cx8800_vbi_qops = {
0228     .queue_setup    = queue_setup,
0229     .buf_prepare  = buffer_prepare,
0230     .buf_finish = buffer_finish,
0231     .buf_queue    = buffer_queue,
0232     .wait_prepare = vb2_ops_wait_prepare,
0233     .wait_finish = vb2_ops_wait_finish,
0234     .start_streaming = start_streaming,
0235     .stop_streaming = stop_streaming,
0236 };