pci/cobalt/m00479_clk_loss_detector_memmap_package.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  *  Copyright 2014-2015 Cisco Systems, Inc. and/or its affiliates.
0004  *  All rights reserved.
0005  */
0006
0007 #ifndef M00479_CLK_LOSS_DETECTOR_MEMMAP_PACKAGE_H
0008 #define M00479_CLK_LOSS_DETECTOR_MEMMAP_PACKAGE_H
0009
0010 /*******************************************************************
0011  * Register Block
0012  * M00479_CLK_LOSS_DETECTOR_MEMMAP_PACKAGE_VHD_REGMAP
0013  *******************************************************************/
0014 struct m00479_clk_loss_detector_regmap {
0015     /* Control module */
0016     uint32_t ctrl;             /* Reg 0x0000, Default=0x0 */
0017     uint32_t status;           /* Reg 0x0004 */
0018     /* Number of ref clk cycles before checking the clock under test */
0019     uint32_t ref_clk_cnt_val;  /* Reg 0x0008, Default=0xc4 */
0020     /* Number of test clk cycles required in the ref_clk_cnt_val period
0021      * to ensure that the test clock is performing as expected */
0022     uint32_t test_clk_cnt_val; /* Reg 0x000c, Default=0xa */
0023 };
0024
0025 #define M00479_CLK_LOSS_DETECTOR_REG_CTRL_OFST 0
0026 #define M00479_CLK_LOSS_DETECTOR_REG_STATUS_OFST 4
0027 #define M00479_CLK_LOSS_DETECTOR_REG_REF_CLK_CNT_VAL_OFST 8
0028 #define M00479_CLK_LOSS_DETECTOR_REG_TEST_CLK_CNT_VAL_OFST 12
0029
0030 /*******************************************************************
0031  * Bit Mask for register
0032  * M00479_CLK_LOSS_DETECTOR_MEMMAP_PACKAGE_VHD_BITMAP
0033  *******************************************************************/
0034 /* ctrl [0:0] */
0035 #define M00479_CTRL_BITMAP_ENABLE_OFST          (0)
0036 #define M00479_CTRL_BITMAP_ENABLE_MSK           (0x1 << M00479_CTRL_BITMAP_ENABLE_OFST)
0037 /* status [0:0] */
0038 #define M00479_STATUS_BITMAP_CLOCK_MISSING_OFST (0)
0039 #define M00479_STATUS_BITMAP_CLOCK_MISSING_MSK  (0x1 << M00479_STATUS_BITMAP_CLOCK_MISSING_OFST)
0040
0041 #endif /*M00479_CLK_LOSS_DETECTOR_MEMMAP_PACKAGE_H*/