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0019 #include <linux/i2c.h>
0020 #include <linux/slab.h>
0021 #include <linux/delay.h>
0022 #include <linux/videodev2.h>
0023 #include <linux/module.h>
0024 #include <linux/v4l2-mediabus.h>
0025 #include <linux/of.h>
0026 #include <linux/of_graph.h>
0027
0028 #include <media/v4l2-async.h>
0029 #include <media/v4l2-device.h>
0030 #include <media/v4l2-common.h>
0031 #include <media/v4l2-mediabus.h>
0032 #include <media/v4l2-fwnode.h>
0033 #include <media/v4l2-ctrls.h>
0034 #include <media/i2c/tvp514x.h>
0035 #include <media/media-entity.h>
0036
0037 #include "tvp514x_regs.h"
0038
0039
0040 #define I2C_RETRY_COUNT (5)
0041 #define LOCK_RETRY_COUNT (5)
0042 #define LOCK_RETRY_DELAY (200)
0043
0044
0045 static bool debug;
0046 module_param(debug, bool, 0644);
0047 MODULE_PARM_DESC(debug, "Debug level (0-1)");
0048
0049 MODULE_AUTHOR("Texas Instruments");
0050 MODULE_DESCRIPTION("TVP514X linux decoder driver");
0051 MODULE_LICENSE("GPL");
0052
0053
0054 enum tvp514x_std {
0055 STD_NTSC_MJ = 0,
0056 STD_PAL_BDGHIN,
0057 STD_INVALID
0058 };
0059
0060
0061
0062
0063
0064
0065
0066
0067 struct tvp514x_std_info {
0068 unsigned long width;
0069 unsigned long height;
0070 u8 video_std;
0071 struct v4l2_standard standard;
0072 };
0073
0074 static struct tvp514x_reg tvp514x_reg_list_default[0x40];
0075
0076 static int tvp514x_s_stream(struct v4l2_subdev *sd, int enable);
0077
0078
0079
0080
0081
0082
0083
0084
0085
0086
0087
0088
0089
0090
0091
0092
0093
0094
0095
0096
0097 struct tvp514x_decoder {
0098 struct v4l2_subdev sd;
0099 struct v4l2_ctrl_handler hdl;
0100 struct tvp514x_reg tvp514x_regs[ARRAY_SIZE(tvp514x_reg_list_default)];
0101 const struct tvp514x_platform_data *pdata;
0102
0103 int ver;
0104 int streaming;
0105
0106 struct v4l2_pix_format pix;
0107 int num_fmts;
0108 const struct v4l2_fmtdesc *fmt_list;
0109
0110 enum tvp514x_std current_std;
0111 int num_stds;
0112 const struct tvp514x_std_info *std_list;
0113
0114 u32 input;
0115 u32 output;
0116
0117
0118 struct media_pad pad;
0119 struct v4l2_mbus_framefmt format;
0120
0121 struct tvp514x_reg *int_seq;
0122 };
0123
0124
0125 static struct tvp514x_reg tvp514x_reg_list_default[] = {
0126
0127 {TOK_WRITE, REG_INPUT_SEL, 0x05},
0128 {TOK_WRITE, REG_AFE_GAIN_CTRL, 0x0F},
0129
0130 {TOK_WRITE, REG_VIDEO_STD, 0x00},
0131 {TOK_WRITE, REG_OPERATION_MODE, 0x00},
0132 {TOK_SKIP, REG_AUTOSWITCH_MASK, 0x3F},
0133 {TOK_WRITE, REG_COLOR_KILLER, 0x10},
0134 {TOK_WRITE, REG_LUMA_CONTROL1, 0x00},
0135 {TOK_WRITE, REG_LUMA_CONTROL2, 0x00},
0136 {TOK_WRITE, REG_LUMA_CONTROL3, 0x02},
0137 {TOK_WRITE, REG_BRIGHTNESS, 0x80},
0138 {TOK_WRITE, REG_CONTRAST, 0x80},
0139 {TOK_WRITE, REG_SATURATION, 0x80},
0140 {TOK_WRITE, REG_HUE, 0x00},
0141 {TOK_WRITE, REG_CHROMA_CONTROL1, 0x00},
0142 {TOK_WRITE, REG_CHROMA_CONTROL2, 0x0E},
0143
0144 {TOK_SKIP, 0x0F, 0x00},
0145 {TOK_WRITE, REG_COMP_PR_SATURATION, 0x80},
0146 {TOK_WRITE, REG_COMP_Y_CONTRAST, 0x80},
0147 {TOK_WRITE, REG_COMP_PB_SATURATION, 0x80},
0148
0149 {TOK_SKIP, 0x13, 0x00},
0150 {TOK_WRITE, REG_COMP_Y_BRIGHTNESS, 0x80},
0151
0152 {TOK_SKIP, 0x15, 0x00},
0153
0154 {TOK_SKIP, REG_AVID_START_PIXEL_LSB, 0x55},
0155 {TOK_SKIP, REG_AVID_START_PIXEL_MSB, 0x00},
0156 {TOK_SKIP, REG_AVID_STOP_PIXEL_LSB, 0x25},
0157 {TOK_SKIP, REG_AVID_STOP_PIXEL_MSB, 0x03},
0158
0159 {TOK_SKIP, REG_HSYNC_START_PIXEL_LSB, 0x00},
0160 {TOK_SKIP, REG_HSYNC_START_PIXEL_MSB, 0x00},
0161 {TOK_SKIP, REG_HSYNC_STOP_PIXEL_LSB, 0x40},
0162 {TOK_SKIP, REG_HSYNC_STOP_PIXEL_MSB, 0x00},
0163
0164 {TOK_SKIP, REG_VSYNC_START_LINE_LSB, 0x04},
0165 {TOK_SKIP, REG_VSYNC_START_LINE_MSB, 0x00},
0166 {TOK_SKIP, REG_VSYNC_STOP_LINE_LSB, 0x07},
0167 {TOK_SKIP, REG_VSYNC_STOP_LINE_MSB, 0x00},
0168
0169 {TOK_SKIP, REG_VBLK_START_LINE_LSB, 0x01},
0170 {TOK_SKIP, REG_VBLK_START_LINE_MSB, 0x00},
0171 {TOK_SKIP, REG_VBLK_STOP_LINE_LSB, 0x15},
0172 {TOK_SKIP, REG_VBLK_STOP_LINE_MSB, 0x00},
0173
0174 {TOK_SKIP, 0x26, 0x00},
0175
0176 {TOK_SKIP, 0x27, 0x00},
0177 {TOK_SKIP, REG_FAST_SWTICH_CONTROL, 0xCC},
0178
0179 {TOK_SKIP, 0x29, 0x00},
0180 {TOK_SKIP, REG_FAST_SWTICH_SCART_DELAY, 0x00},
0181
0182 {TOK_SKIP, 0x2B, 0x00},
0183 {TOK_SKIP, REG_SCART_DELAY, 0x00},
0184 {TOK_SKIP, REG_CTI_DELAY, 0x00},
0185 {TOK_SKIP, REG_CTI_CONTROL, 0x00},
0186
0187 {TOK_SKIP, 0x2F, 0x00},
0188
0189 {TOK_SKIP, 0x30, 0x00},
0190
0191 {TOK_SKIP, 0x31, 0x00},
0192
0193 {TOK_WRITE, REG_SYNC_CONTROL, 0x00},
0194
0195 {TOK_WRITE, REG_OUTPUT_FORMATTER1, 0x00},
0196
0197 {TOK_WRITE, REG_OUTPUT_FORMATTER2, 0x11},
0198
0199 {TOK_WRITE, REG_OUTPUT_FORMATTER3, 0xEE},
0200
0201 {TOK_WRITE, REG_OUTPUT_FORMATTER4, 0xAF},
0202 {TOK_WRITE, REG_OUTPUT_FORMATTER5, 0xFF},
0203 {TOK_WRITE, REG_OUTPUT_FORMATTER6, 0xFF},
0204
0205 {TOK_WRITE, REG_CLEAR_LOST_LOCK, 0x01},
0206 {TOK_TERM, 0, 0},
0207 };
0208
0209
0210
0211
0212
0213
0214 static const struct v4l2_fmtdesc tvp514x_fmt_list[] = {
0215 {
0216 .index = 0,
0217 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
0218 .flags = 0,
0219 .description = "8-bit UYVY 4:2:2 Format",
0220 .pixelformat = V4L2_PIX_FMT_UYVY,
0221 },
0222 };
0223
0224
0225
0226
0227
0228
0229
0230 static const struct tvp514x_std_info tvp514x_std_list[] = {
0231
0232 [STD_NTSC_MJ] = {
0233 .width = NTSC_NUM_ACTIVE_PIXELS,
0234 .height = NTSC_NUM_ACTIVE_LINES,
0235 .video_std = VIDEO_STD_NTSC_MJ_BIT,
0236 .standard = {
0237 .index = 0,
0238 .id = V4L2_STD_NTSC,
0239 .name = "NTSC",
0240 .frameperiod = {1001, 30000},
0241 .framelines = 525
0242 },
0243
0244 },
0245 [STD_PAL_BDGHIN] = {
0246 .width = PAL_NUM_ACTIVE_PIXELS,
0247 .height = PAL_NUM_ACTIVE_LINES,
0248 .video_std = VIDEO_STD_PAL_BDGHIN_BIT,
0249 .standard = {
0250 .index = 1,
0251 .id = V4L2_STD_PAL,
0252 .name = "PAL",
0253 .frameperiod = {1, 25},
0254 .framelines = 625
0255 },
0256 },
0257
0258 };
0259
0260
0261 static inline struct tvp514x_decoder *to_decoder(struct v4l2_subdev *sd)
0262 {
0263 return container_of(sd, struct tvp514x_decoder, sd);
0264 }
0265
0266 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
0267 {
0268 return &container_of(ctrl->handler, struct tvp514x_decoder, hdl)->sd;
0269 }
0270
0271
0272
0273
0274
0275
0276
0277
0278
0279 static int tvp514x_read_reg(struct v4l2_subdev *sd, u8 reg)
0280 {
0281 int err, retry = 0;
0282 struct i2c_client *client = v4l2_get_subdevdata(sd);
0283
0284 read_again:
0285
0286 err = i2c_smbus_read_byte_data(client, reg);
0287 if (err < 0) {
0288 if (retry <= I2C_RETRY_COUNT) {
0289 v4l2_warn(sd, "Read: retry ... %d\n", retry);
0290 retry++;
0291 msleep_interruptible(10);
0292 goto read_again;
0293 }
0294 }
0295
0296 return err;
0297 }
0298
0299
0300
0301
0302
0303
0304 static void dump_reg(struct v4l2_subdev *sd, u8 reg)
0305 {
0306 u32 val;
0307
0308 val = tvp514x_read_reg(sd, reg);
0309 v4l2_info(sd, "Reg(0x%.2X): 0x%.2X\n", reg, val);
0310 }
0311
0312
0313
0314
0315
0316
0317
0318
0319
0320
0321 static int tvp514x_write_reg(struct v4l2_subdev *sd, u8 reg, u8 val)
0322 {
0323 int err, retry = 0;
0324 struct i2c_client *client = v4l2_get_subdevdata(sd);
0325
0326 write_again:
0327
0328 err = i2c_smbus_write_byte_data(client, reg, val);
0329 if (err) {
0330 if (retry <= I2C_RETRY_COUNT) {
0331 v4l2_warn(sd, "Write: retry ... %d\n", retry);
0332 retry++;
0333 msleep_interruptible(10);
0334 goto write_again;
0335 }
0336 }
0337
0338 return err;
0339 }
0340
0341
0342
0343
0344
0345
0346
0347
0348
0349
0350
0351
0352
0353 static int tvp514x_write_regs(struct v4l2_subdev *sd,
0354 const struct tvp514x_reg reglist[])
0355 {
0356 int err;
0357 const struct tvp514x_reg *next = reglist;
0358
0359 for (; next->token != TOK_TERM; next++) {
0360 if (next->token == TOK_DELAY) {
0361 msleep(next->val);
0362 continue;
0363 }
0364
0365 if (next->token == TOK_SKIP)
0366 continue;
0367
0368 err = tvp514x_write_reg(sd, next->reg, (u8) next->val);
0369 if (err) {
0370 v4l2_err(sd, "Write failed. Err[%d]\n", err);
0371 return err;
0372 }
0373 }
0374 return 0;
0375 }
0376
0377
0378
0379
0380
0381
0382
0383
0384 static enum tvp514x_std tvp514x_query_current_std(struct v4l2_subdev *sd)
0385 {
0386 u8 std, std_status;
0387
0388 std = tvp514x_read_reg(sd, REG_VIDEO_STD);
0389 if ((std & VIDEO_STD_MASK) == VIDEO_STD_AUTO_SWITCH_BIT)
0390
0391 std_status = tvp514x_read_reg(sd, REG_VIDEO_STD_STATUS);
0392 else
0393
0394 std_status = std;
0395
0396 switch (std_status & VIDEO_STD_MASK) {
0397 case VIDEO_STD_NTSC_MJ_BIT:
0398 return STD_NTSC_MJ;
0399
0400 case VIDEO_STD_PAL_BDGHIN_BIT:
0401 return STD_PAL_BDGHIN;
0402
0403 default:
0404 return STD_INVALID;
0405 }
0406
0407 return STD_INVALID;
0408 }
0409
0410
0411 static void tvp514x_reg_dump(struct v4l2_subdev *sd)
0412 {
0413 dump_reg(sd, REG_INPUT_SEL);
0414 dump_reg(sd, REG_AFE_GAIN_CTRL);
0415 dump_reg(sd, REG_VIDEO_STD);
0416 dump_reg(sd, REG_OPERATION_MODE);
0417 dump_reg(sd, REG_COLOR_KILLER);
0418 dump_reg(sd, REG_LUMA_CONTROL1);
0419 dump_reg(sd, REG_LUMA_CONTROL2);
0420 dump_reg(sd, REG_LUMA_CONTROL3);
0421 dump_reg(sd, REG_BRIGHTNESS);
0422 dump_reg(sd, REG_CONTRAST);
0423 dump_reg(sd, REG_SATURATION);
0424 dump_reg(sd, REG_HUE);
0425 dump_reg(sd, REG_CHROMA_CONTROL1);
0426 dump_reg(sd, REG_CHROMA_CONTROL2);
0427 dump_reg(sd, REG_COMP_PR_SATURATION);
0428 dump_reg(sd, REG_COMP_Y_CONTRAST);
0429 dump_reg(sd, REG_COMP_PB_SATURATION);
0430 dump_reg(sd, REG_COMP_Y_BRIGHTNESS);
0431 dump_reg(sd, REG_AVID_START_PIXEL_LSB);
0432 dump_reg(sd, REG_AVID_START_PIXEL_MSB);
0433 dump_reg(sd, REG_AVID_STOP_PIXEL_LSB);
0434 dump_reg(sd, REG_AVID_STOP_PIXEL_MSB);
0435 dump_reg(sd, REG_HSYNC_START_PIXEL_LSB);
0436 dump_reg(sd, REG_HSYNC_START_PIXEL_MSB);
0437 dump_reg(sd, REG_HSYNC_STOP_PIXEL_LSB);
0438 dump_reg(sd, REG_HSYNC_STOP_PIXEL_MSB);
0439 dump_reg(sd, REG_VSYNC_START_LINE_LSB);
0440 dump_reg(sd, REG_VSYNC_START_LINE_MSB);
0441 dump_reg(sd, REG_VSYNC_STOP_LINE_LSB);
0442 dump_reg(sd, REG_VSYNC_STOP_LINE_MSB);
0443 dump_reg(sd, REG_VBLK_START_LINE_LSB);
0444 dump_reg(sd, REG_VBLK_START_LINE_MSB);
0445 dump_reg(sd, REG_VBLK_STOP_LINE_LSB);
0446 dump_reg(sd, REG_VBLK_STOP_LINE_MSB);
0447 dump_reg(sd, REG_SYNC_CONTROL);
0448 dump_reg(sd, REG_OUTPUT_FORMATTER1);
0449 dump_reg(sd, REG_OUTPUT_FORMATTER2);
0450 dump_reg(sd, REG_OUTPUT_FORMATTER3);
0451 dump_reg(sd, REG_OUTPUT_FORMATTER4);
0452 dump_reg(sd, REG_OUTPUT_FORMATTER5);
0453 dump_reg(sd, REG_OUTPUT_FORMATTER6);
0454 dump_reg(sd, REG_CLEAR_LOST_LOCK);
0455 }
0456
0457
0458
0459
0460
0461
0462
0463
0464 static int tvp514x_configure(struct v4l2_subdev *sd,
0465 struct tvp514x_decoder *decoder)
0466 {
0467 int err;
0468
0469
0470 err =
0471 tvp514x_write_regs(sd, decoder->tvp514x_regs);
0472 if (err)
0473 return err;
0474
0475 if (debug)
0476 tvp514x_reg_dump(sd);
0477
0478 return 0;
0479 }
0480
0481
0482
0483
0484
0485
0486
0487
0488
0489
0490
0491
0492 static int tvp514x_detect(struct v4l2_subdev *sd,
0493 struct tvp514x_decoder *decoder)
0494 {
0495 u8 chip_id_msb, chip_id_lsb, rom_ver;
0496 struct i2c_client *client = v4l2_get_subdevdata(sd);
0497
0498 chip_id_msb = tvp514x_read_reg(sd, REG_CHIP_ID_MSB);
0499 chip_id_lsb = tvp514x_read_reg(sd, REG_CHIP_ID_LSB);
0500 rom_ver = tvp514x_read_reg(sd, REG_ROM_VERSION);
0501
0502 v4l2_dbg(1, debug, sd,
0503 "chip id detected msb:0x%x lsb:0x%x rom version:0x%x\n",
0504 chip_id_msb, chip_id_lsb, rom_ver);
0505 if ((chip_id_msb != TVP514X_CHIP_ID_MSB)
0506 || ((chip_id_lsb != TVP5146_CHIP_ID_LSB)
0507 && (chip_id_lsb != TVP5147_CHIP_ID_LSB))) {
0508
0509
0510
0511 v4l2_err(sd, "chip id mismatch msb:0x%x lsb:0x%x\n",
0512 chip_id_msb, chip_id_lsb);
0513 return -ENODEV;
0514 }
0515
0516 decoder->ver = rom_ver;
0517
0518 v4l2_info(sd, "%s (Version - 0x%.2x) found at 0x%x (%s)\n",
0519 client->name, decoder->ver,
0520 client->addr << 1, client->adapter->name);
0521 return 0;
0522 }
0523
0524
0525
0526
0527
0528
0529
0530
0531
0532 static int tvp514x_querystd(struct v4l2_subdev *sd, v4l2_std_id *std_id)
0533 {
0534 struct tvp514x_decoder *decoder = to_decoder(sd);
0535 enum tvp514x_std current_std;
0536 enum tvp514x_input input_sel;
0537 u8 sync_lock_status, lock_mask;
0538
0539 if (std_id == NULL)
0540 return -EINVAL;
0541
0542
0543 if (!decoder->streaming) {
0544 tvp514x_s_stream(sd, 1);
0545 msleep(LOCK_RETRY_DELAY);
0546 }
0547
0548
0549 current_std = tvp514x_query_current_std(sd);
0550 if (current_std == STD_INVALID) {
0551 *std_id = V4L2_STD_UNKNOWN;
0552 return 0;
0553 }
0554
0555 input_sel = decoder->input;
0556
0557 switch (input_sel) {
0558 case INPUT_CVBS_VI1A:
0559 case INPUT_CVBS_VI1B:
0560 case INPUT_CVBS_VI1C:
0561 case INPUT_CVBS_VI2A:
0562 case INPUT_CVBS_VI2B:
0563 case INPUT_CVBS_VI2C:
0564 case INPUT_CVBS_VI3A:
0565 case INPUT_CVBS_VI3B:
0566 case INPUT_CVBS_VI3C:
0567 case INPUT_CVBS_VI4A:
0568 lock_mask = STATUS_CLR_SUBCAR_LOCK_BIT |
0569 STATUS_HORZ_SYNC_LOCK_BIT |
0570 STATUS_VIRT_SYNC_LOCK_BIT;
0571 break;
0572
0573 case INPUT_SVIDEO_VI2A_VI1A:
0574 case INPUT_SVIDEO_VI2B_VI1B:
0575 case INPUT_SVIDEO_VI2C_VI1C:
0576 case INPUT_SVIDEO_VI2A_VI3A:
0577 case INPUT_SVIDEO_VI2B_VI3B:
0578 case INPUT_SVIDEO_VI2C_VI3C:
0579 case INPUT_SVIDEO_VI4A_VI1A:
0580 case INPUT_SVIDEO_VI4A_VI1B:
0581 case INPUT_SVIDEO_VI4A_VI1C:
0582 case INPUT_SVIDEO_VI4A_VI3A:
0583 case INPUT_SVIDEO_VI4A_VI3B:
0584 case INPUT_SVIDEO_VI4A_VI3C:
0585 lock_mask = STATUS_HORZ_SYNC_LOCK_BIT |
0586 STATUS_VIRT_SYNC_LOCK_BIT;
0587 break;
0588
0589 default:
0590 return -EINVAL;
0591 }
0592
0593 sync_lock_status = tvp514x_read_reg(sd, REG_STATUS1);
0594 if (lock_mask != (sync_lock_status & lock_mask)) {
0595 *std_id = V4L2_STD_UNKNOWN;
0596 return 0;
0597 }
0598
0599 *std_id &= decoder->std_list[current_std].standard.id;
0600
0601 v4l2_dbg(1, debug, sd, "Current STD: %s\n",
0602 decoder->std_list[current_std].standard.name);
0603 return 0;
0604 }
0605
0606
0607
0608
0609
0610
0611
0612
0613
0614 static int tvp514x_s_std(struct v4l2_subdev *sd, v4l2_std_id std_id)
0615 {
0616 struct tvp514x_decoder *decoder = to_decoder(sd);
0617 int err, i;
0618
0619 for (i = 0; i < decoder->num_stds; i++)
0620 if (std_id & decoder->std_list[i].standard.id)
0621 break;
0622
0623 if ((i == decoder->num_stds) || (i == STD_INVALID))
0624 return -EINVAL;
0625
0626 err = tvp514x_write_reg(sd, REG_VIDEO_STD,
0627 decoder->std_list[i].video_std);
0628 if (err)
0629 return err;
0630
0631 decoder->current_std = i;
0632 decoder->tvp514x_regs[REG_VIDEO_STD].val =
0633 decoder->std_list[i].video_std;
0634
0635 v4l2_dbg(1, debug, sd, "Standard set to: %s\n",
0636 decoder->std_list[i].standard.name);
0637 return 0;
0638 }
0639
0640
0641
0642
0643
0644
0645
0646
0647
0648
0649
0650
0651 static int tvp514x_s_routing(struct v4l2_subdev *sd,
0652 u32 input, u32 output, u32 config)
0653 {
0654 struct tvp514x_decoder *decoder = to_decoder(sd);
0655 int err;
0656 enum tvp514x_input input_sel;
0657 enum tvp514x_output output_sel;
0658
0659 if ((input >= INPUT_INVALID) ||
0660 (output >= OUTPUT_INVALID))
0661
0662 return -EINVAL;
0663
0664 input_sel = input;
0665 output_sel = output;
0666
0667 err = tvp514x_write_reg(sd, REG_INPUT_SEL, input_sel);
0668 if (err)
0669 return err;
0670
0671 output_sel |= tvp514x_read_reg(sd,
0672 REG_OUTPUT_FORMATTER1) & 0x7;
0673 err = tvp514x_write_reg(sd, REG_OUTPUT_FORMATTER1,
0674 output_sel);
0675 if (err)
0676 return err;
0677
0678 decoder->tvp514x_regs[REG_INPUT_SEL].val = input_sel;
0679 decoder->tvp514x_regs[REG_OUTPUT_FORMATTER1].val = output_sel;
0680 decoder->input = input;
0681 decoder->output = output;
0682
0683 v4l2_dbg(1, debug, sd, "Input set to: %d\n", input_sel);
0684
0685 return 0;
0686 }
0687
0688
0689
0690
0691
0692
0693
0694
0695 static int tvp514x_s_ctrl(struct v4l2_ctrl *ctrl)
0696 {
0697 struct v4l2_subdev *sd = to_sd(ctrl);
0698 struct tvp514x_decoder *decoder = to_decoder(sd);
0699 int err = -EINVAL, value;
0700
0701 value = ctrl->val;
0702
0703 switch (ctrl->id) {
0704 case V4L2_CID_BRIGHTNESS:
0705 err = tvp514x_write_reg(sd, REG_BRIGHTNESS, value);
0706 if (!err)
0707 decoder->tvp514x_regs[REG_BRIGHTNESS].val = value;
0708 break;
0709 case V4L2_CID_CONTRAST:
0710 err = tvp514x_write_reg(sd, REG_CONTRAST, value);
0711 if (!err)
0712 decoder->tvp514x_regs[REG_CONTRAST].val = value;
0713 break;
0714 case V4L2_CID_SATURATION:
0715 err = tvp514x_write_reg(sd, REG_SATURATION, value);
0716 if (!err)
0717 decoder->tvp514x_regs[REG_SATURATION].val = value;
0718 break;
0719 case V4L2_CID_HUE:
0720 if (value == 180)
0721 value = 0x7F;
0722 else if (value == -180)
0723 value = 0x80;
0724 err = tvp514x_write_reg(sd, REG_HUE, value);
0725 if (!err)
0726 decoder->tvp514x_regs[REG_HUE].val = value;
0727 break;
0728 case V4L2_CID_AUTOGAIN:
0729 err = tvp514x_write_reg(sd, REG_AFE_GAIN_CTRL, value ? 0x0f : 0x0c);
0730 if (!err)
0731 decoder->tvp514x_regs[REG_AFE_GAIN_CTRL].val = value;
0732 break;
0733 }
0734
0735 v4l2_dbg(1, debug, sd, "Set Control: ID - %d - %d\n",
0736 ctrl->id, ctrl->val);
0737 return err;
0738 }
0739
0740
0741
0742
0743
0744
0745
0746
0747 static int
0748 tvp514x_g_frame_interval(struct v4l2_subdev *sd,
0749 struct v4l2_subdev_frame_interval *ival)
0750 {
0751 struct tvp514x_decoder *decoder = to_decoder(sd);
0752 enum tvp514x_std current_std;
0753
0754
0755
0756 current_std = decoder->current_std;
0757
0758 ival->interval =
0759 decoder->std_list[current_std].standard.frameperiod;
0760
0761 return 0;
0762 }
0763
0764
0765
0766
0767
0768
0769
0770
0771
0772 static int
0773 tvp514x_s_frame_interval(struct v4l2_subdev *sd,
0774 struct v4l2_subdev_frame_interval *ival)
0775 {
0776 struct tvp514x_decoder *decoder = to_decoder(sd);
0777 struct v4l2_fract *timeperframe;
0778 enum tvp514x_std current_std;
0779
0780
0781 timeperframe = &ival->interval;
0782
0783
0784 current_std = decoder->current_std;
0785
0786 *timeperframe =
0787 decoder->std_list[current_std].standard.frameperiod;
0788
0789 return 0;
0790 }
0791
0792
0793
0794
0795
0796
0797
0798
0799 static int tvp514x_s_stream(struct v4l2_subdev *sd, int enable)
0800 {
0801 int err = 0;
0802 struct tvp514x_decoder *decoder = to_decoder(sd);
0803
0804 if (decoder->streaming == enable)
0805 return 0;
0806
0807 switch (enable) {
0808 case 0:
0809 {
0810
0811 err = tvp514x_write_reg(sd, REG_OPERATION_MODE, 0x01);
0812 if (err) {
0813 v4l2_err(sd, "Unable to turn off decoder\n");
0814 return err;
0815 }
0816 decoder->streaming = enable;
0817 break;
0818 }
0819 case 1:
0820 {
0821
0822 err = tvp514x_write_regs(sd, decoder->int_seq);
0823 if (err) {
0824 v4l2_err(sd, "Unable to turn on decoder\n");
0825 return err;
0826 }
0827
0828 err = tvp514x_detect(sd, decoder);
0829 if (err) {
0830 v4l2_err(sd, "Unable to detect decoder\n");
0831 return err;
0832 }
0833 err = tvp514x_configure(sd, decoder);
0834 if (err) {
0835 v4l2_err(sd, "Unable to configure decoder\n");
0836 return err;
0837 }
0838 decoder->streaming = enable;
0839 break;
0840 }
0841 default:
0842 err = -ENODEV;
0843 break;
0844 }
0845
0846 return err;
0847 }
0848
0849 static const struct v4l2_ctrl_ops tvp514x_ctrl_ops = {
0850 .s_ctrl = tvp514x_s_ctrl,
0851 };
0852
0853
0854
0855
0856
0857
0858
0859
0860
0861 static int tvp514x_enum_mbus_code(struct v4l2_subdev *sd,
0862 struct v4l2_subdev_state *sd_state,
0863 struct v4l2_subdev_mbus_code_enum *code)
0864 {
0865 u32 pad = code->pad;
0866 u32 index = code->index;
0867
0868 memset(code, 0, sizeof(*code));
0869 code->index = index;
0870 code->pad = pad;
0871
0872 if (index != 0)
0873 return -EINVAL;
0874
0875 code->code = MEDIA_BUS_FMT_UYVY8_2X8;
0876
0877 return 0;
0878 }
0879
0880
0881
0882
0883
0884
0885
0886
0887
0888 static int tvp514x_get_pad_format(struct v4l2_subdev *sd,
0889 struct v4l2_subdev_state *sd_state,
0890 struct v4l2_subdev_format *format)
0891 {
0892 struct tvp514x_decoder *decoder = to_decoder(sd);
0893 __u32 which = format->which;
0894
0895 if (format->pad)
0896 return -EINVAL;
0897
0898 if (which == V4L2_SUBDEV_FORMAT_ACTIVE) {
0899 format->format = decoder->format;
0900 return 0;
0901 }
0902
0903 format->format.code = MEDIA_BUS_FMT_UYVY8_2X8;
0904 format->format.width = tvp514x_std_list[decoder->current_std].width;
0905 format->format.height = tvp514x_std_list[decoder->current_std].height;
0906 format->format.colorspace = V4L2_COLORSPACE_SMPTE170M;
0907 format->format.field = V4L2_FIELD_INTERLACED;
0908
0909 return 0;
0910 }
0911
0912
0913
0914
0915
0916
0917
0918
0919
0920 static int tvp514x_set_pad_format(struct v4l2_subdev *sd,
0921 struct v4l2_subdev_state *sd_state,
0922 struct v4l2_subdev_format *fmt)
0923 {
0924 struct tvp514x_decoder *decoder = to_decoder(sd);
0925
0926 if (fmt->format.field != V4L2_FIELD_INTERLACED ||
0927 fmt->format.code != MEDIA_BUS_FMT_UYVY8_2X8 ||
0928 fmt->format.colorspace != V4L2_COLORSPACE_SMPTE170M ||
0929 fmt->format.width != tvp514x_std_list[decoder->current_std].width ||
0930 fmt->format.height != tvp514x_std_list[decoder->current_std].height)
0931 return -EINVAL;
0932
0933 decoder->format = fmt->format;
0934
0935 return 0;
0936 }
0937
0938 static const struct v4l2_subdev_video_ops tvp514x_video_ops = {
0939 .s_std = tvp514x_s_std,
0940 .s_routing = tvp514x_s_routing,
0941 .querystd = tvp514x_querystd,
0942 .g_frame_interval = tvp514x_g_frame_interval,
0943 .s_frame_interval = tvp514x_s_frame_interval,
0944 .s_stream = tvp514x_s_stream,
0945 };
0946
0947 static const struct v4l2_subdev_pad_ops tvp514x_pad_ops = {
0948 .enum_mbus_code = tvp514x_enum_mbus_code,
0949 .get_fmt = tvp514x_get_pad_format,
0950 .set_fmt = tvp514x_set_pad_format,
0951 };
0952
0953 static const struct v4l2_subdev_ops tvp514x_ops = {
0954 .video = &tvp514x_video_ops,
0955 .pad = &tvp514x_pad_ops,
0956 };
0957
0958 static const struct tvp514x_decoder tvp514x_dev = {
0959 .streaming = 0,
0960 .fmt_list = tvp514x_fmt_list,
0961 .num_fmts = ARRAY_SIZE(tvp514x_fmt_list),
0962 .pix = {
0963
0964 .width = NTSC_NUM_ACTIVE_PIXELS,
0965 .height = NTSC_NUM_ACTIVE_LINES,
0966 .pixelformat = V4L2_PIX_FMT_UYVY,
0967 .field = V4L2_FIELD_INTERLACED,
0968 .bytesperline = NTSC_NUM_ACTIVE_PIXELS * 2,
0969 .sizeimage = NTSC_NUM_ACTIVE_PIXELS * 2 *
0970 NTSC_NUM_ACTIVE_LINES,
0971 .colorspace = V4L2_COLORSPACE_SMPTE170M,
0972 },
0973 .current_std = STD_NTSC_MJ,
0974 .std_list = tvp514x_std_list,
0975 .num_stds = ARRAY_SIZE(tvp514x_std_list),
0976
0977 };
0978
0979 static struct tvp514x_platform_data *
0980 tvp514x_get_pdata(struct i2c_client *client)
0981 {
0982 struct tvp514x_platform_data *pdata = NULL;
0983 struct v4l2_fwnode_endpoint bus_cfg = { .bus_type = 0 };
0984 struct device_node *endpoint;
0985 unsigned int flags;
0986
0987 if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node)
0988 return client->dev.platform_data;
0989
0990 endpoint = of_graph_get_next_endpoint(client->dev.of_node, NULL);
0991 if (!endpoint)
0992 return NULL;
0993
0994 if (v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint), &bus_cfg))
0995 goto done;
0996
0997 pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
0998 if (!pdata)
0999 goto done;
1000
1001 flags = bus_cfg.bus.parallel.flags;
1002
1003 if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
1004 pdata->hs_polarity = 1;
1005
1006 if (flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
1007 pdata->vs_polarity = 1;
1008
1009 if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
1010 pdata->clk_polarity = 1;
1011
1012 done:
1013 of_node_put(endpoint);
1014 return pdata;
1015 }
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025 static int
1026 tvp514x_probe(struct i2c_client *client, const struct i2c_device_id *id)
1027 {
1028 struct tvp514x_platform_data *pdata = tvp514x_get_pdata(client);
1029 struct tvp514x_decoder *decoder;
1030 struct v4l2_subdev *sd;
1031 int ret;
1032
1033 if (pdata == NULL) {
1034 dev_err(&client->dev, "No platform data\n");
1035 return -EINVAL;
1036 }
1037
1038
1039 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1040 return -EIO;
1041
1042 decoder = devm_kzalloc(&client->dev, sizeof(*decoder), GFP_KERNEL);
1043 if (!decoder)
1044 return -ENOMEM;
1045
1046
1047 *decoder = tvp514x_dev;
1048
1049 memcpy(decoder->tvp514x_regs, tvp514x_reg_list_default,
1050 sizeof(tvp514x_reg_list_default));
1051
1052 decoder->int_seq = (struct tvp514x_reg *)id->driver_data;
1053
1054
1055 decoder->pdata = pdata;
1056
1057
1058
1059
1060
1061
1062 decoder->tvp514x_regs[REG_OUTPUT_FORMATTER2].val |=
1063 (decoder->pdata->clk_polarity << 1);
1064 decoder->tvp514x_regs[REG_SYNC_CONTROL].val |=
1065 ((decoder->pdata->hs_polarity << 2) |
1066 (decoder->pdata->vs_polarity << 3));
1067
1068 decoder->tvp514x_regs[REG_VIDEO_STD].val =
1069 VIDEO_STD_AUTO_SWITCH_BIT;
1070
1071
1072 sd = &decoder->sd;
1073 v4l2_i2c_subdev_init(sd, client, &tvp514x_ops);
1074
1075 #if defined(CONFIG_MEDIA_CONTROLLER)
1076 decoder->pad.flags = MEDIA_PAD_FL_SOURCE;
1077 decoder->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1078 decoder->sd.entity.function = MEDIA_ENT_F_ATV_DECODER;
1079
1080 ret = media_entity_pads_init(&decoder->sd.entity, 1, &decoder->pad);
1081 if (ret < 0) {
1082 v4l2_err(sd, "%s decoder driver failed to register !!\n",
1083 sd->name);
1084 return ret;
1085 }
1086 #endif
1087 v4l2_ctrl_handler_init(&decoder->hdl, 5);
1088 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1089 V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);
1090 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1091 V4L2_CID_CONTRAST, 0, 255, 1, 128);
1092 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1093 V4L2_CID_SATURATION, 0, 255, 1, 128);
1094 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1095 V4L2_CID_HUE, -180, 180, 180, 0);
1096 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1097 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
1098 sd->ctrl_handler = &decoder->hdl;
1099 if (decoder->hdl.error) {
1100 ret = decoder->hdl.error;
1101 goto done;
1102 }
1103 v4l2_ctrl_handler_setup(&decoder->hdl);
1104
1105 ret = v4l2_async_register_subdev(&decoder->sd);
1106 if (!ret)
1107 v4l2_info(sd, "%s decoder driver registered !!\n", sd->name);
1108
1109 done:
1110 if (ret < 0) {
1111 v4l2_ctrl_handler_free(&decoder->hdl);
1112 media_entity_cleanup(&decoder->sd.entity);
1113 }
1114 return ret;
1115 }
1116
1117
1118
1119
1120
1121
1122
1123
1124 static int tvp514x_remove(struct i2c_client *client)
1125 {
1126 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1127 struct tvp514x_decoder *decoder = to_decoder(sd);
1128
1129 v4l2_async_unregister_subdev(&decoder->sd);
1130 media_entity_cleanup(&decoder->sd.entity);
1131 v4l2_ctrl_handler_free(&decoder->hdl);
1132 return 0;
1133 }
1134
1135 static const struct tvp514x_reg tvp5146_init_reg_seq[] = {
1136 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x02},
1137 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1138 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0x80},
1139 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1140 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x60},
1141 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1142 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xB0},
1143 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1144 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x00},
1145 {TOK_WRITE, REG_OPERATION_MODE, 0x01},
1146 {TOK_WRITE, REG_OPERATION_MODE, 0x00},
1147 {TOK_TERM, 0, 0},
1148 };
1149
1150
1151 static const struct tvp514x_reg tvp5147_init_reg_seq[] = {
1152 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x02},
1153 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1154 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0x80},
1155 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1156 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x60},
1157 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1158 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xB0},
1159 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1160 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x16},
1161 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1162 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xA0},
1163 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x16},
1164 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x60},
1165 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1166 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xB0},
1167 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x00},
1168 {TOK_WRITE, REG_OPERATION_MODE, 0x01},
1169 {TOK_WRITE, REG_OPERATION_MODE, 0x00},
1170 {TOK_TERM, 0, 0},
1171 };
1172
1173
1174 static const struct tvp514x_reg tvp514xm_init_reg_seq[] = {
1175 {TOK_WRITE, REG_OPERATION_MODE, 0x01},
1176 {TOK_WRITE, REG_OPERATION_MODE, 0x00},
1177 {TOK_TERM, 0, 0},
1178 };
1179
1180
1181
1182
1183
1184
1185
1186 static const struct i2c_device_id tvp514x_id[] = {
1187 {"tvp5146", (unsigned long)tvp5146_init_reg_seq},
1188 {"tvp5146m2", (unsigned long)tvp514xm_init_reg_seq},
1189 {"tvp5147", (unsigned long)tvp5147_init_reg_seq},
1190 {"tvp5147m1", (unsigned long)tvp514xm_init_reg_seq},
1191 {},
1192 };
1193
1194 MODULE_DEVICE_TABLE(i2c, tvp514x_id);
1195
1196 #if IS_ENABLED(CONFIG_OF)
1197 static const struct of_device_id tvp514x_of_match[] = {
1198 { .compatible = "ti,tvp5146", },
1199 { .compatible = "ti,tvp5146m2", },
1200 { .compatible = "ti,tvp5147", },
1201 { .compatible = "ti,tvp5147m1", },
1202 { },
1203 };
1204 MODULE_DEVICE_TABLE(of, tvp514x_of_match);
1205 #endif
1206
1207 static struct i2c_driver tvp514x_driver = {
1208 .driver = {
1209 .of_match_table = of_match_ptr(tvp514x_of_match),
1210 .name = TVP514X_MODULE_NAME,
1211 },
1212 .probe = tvp514x_probe,
1213 .remove = tvp514x_remove,
1214 .id_table = tvp514x_id,
1215 };
1216
1217 module_i2c_driver(tvp514x_driver);