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0001 // SPDX-License-Identifier: GPL-2.0
0002 // Copyright (c) 2020 Intel Corporation.
0003 
0004 #include <asm/unaligned.h>
0005 #include <linux/acpi.h>
0006 #include <linux/delay.h>
0007 #include <linux/i2c.h>
0008 #include <linux/module.h>
0009 #include <linux/pm_runtime.h>
0010 #include <media/v4l2-ctrls.h>
0011 #include <media/v4l2-device.h>
0012 #include <media/v4l2-fwnode.h>
0013 
0014 #define OV9734_LINK_FREQ_180MHZ     180000000ULL
0015 #define OV9734_SCLK         36000000LL
0016 #define OV9734_MCLK         19200000
0017 /* ov9734 only support 1-lane mipi output */
0018 #define OV9734_DATA_LANES       1
0019 #define OV9734_RGB_DEPTH        10
0020 
0021 #define OV9734_REG_CHIP_ID      0x300a
0022 #define OV9734_CHIP_ID          0x9734
0023 
0024 #define OV9734_REG_MODE_SELECT      0x0100
0025 #define OV9734_MODE_STANDBY     0x00
0026 #define OV9734_MODE_STREAMING       0x01
0027 
0028 /* vertical-timings from sensor */
0029 #define OV9734_REG_VTS          0x380e
0030 #define OV9734_VTS_30FPS        0x0322
0031 #define OV9734_VTS_30FPS_MIN        0x0322
0032 #define OV9734_VTS_MAX          0x7fff
0033 
0034 /* horizontal-timings from sensor */
0035 #define OV9734_REG_HTS          0x380c
0036 
0037 /* Exposure controls from sensor */
0038 #define OV9734_REG_EXPOSURE     0x3500
0039 #define OV9734_EXPOSURE_MIN     4
0040 #define OV9734_EXPOSURE_MAX_MARGIN  4
0041 #define OV9734_EXPOSURE_STEP        1
0042 
0043 /* Analog gain controls from sensor */
0044 #define OV9734_REG_ANALOG_GAIN      0x350a
0045 #define OV9734_ANAL_GAIN_MIN        16
0046 #define OV9734_ANAL_GAIN_MAX        248
0047 #define OV9734_ANAL_GAIN_STEP       1
0048 
0049 /* Digital gain controls from sensor */
0050 #define OV9734_REG_MWB_R_GAIN       0x5180
0051 #define OV9734_REG_MWB_G_GAIN       0x5182
0052 #define OV9734_REG_MWB_B_GAIN       0x5184
0053 #define OV9734_DGTL_GAIN_MIN        256
0054 #define OV9734_DGTL_GAIN_MAX        1023
0055 #define OV9734_DGTL_GAIN_STEP       1
0056 #define OV9734_DGTL_GAIN_DEFAULT    256
0057 
0058 /* Test Pattern Control */
0059 #define OV9734_REG_TEST_PATTERN     0x5080
0060 #define OV9734_TEST_PATTERN_ENABLE  BIT(7)
0061 #define OV9734_TEST_PATTERN_BAR_SHIFT   2
0062 
0063 /* Group Access */
0064 #define OV9734_REG_GROUP_ACCESS     0x3208
0065 #define OV9734_GROUP_HOLD_START     0x0
0066 #define OV9734_GROUP_HOLD_END       0x10
0067 #define OV9734_GROUP_HOLD_LAUNCH    0xa0
0068 
0069 enum {
0070     OV9734_LINK_FREQ_180MHZ_INDEX,
0071 };
0072 
0073 struct ov9734_reg {
0074     u16 address;
0075     u8 val;
0076 };
0077 
0078 struct ov9734_reg_list {
0079     u32 num_of_regs;
0080     const struct ov9734_reg *regs;
0081 };
0082 
0083 struct ov9734_link_freq_config {
0084     const struct ov9734_reg_list reg_list;
0085 };
0086 
0087 struct ov9734_mode {
0088     /* Frame width in pixels */
0089     u32 width;
0090 
0091     /* Frame height in pixels */
0092     u32 height;
0093 
0094     /* Horizontal timining size */
0095     u32 hts;
0096 
0097     /* Default vertical timining size */
0098     u32 vts_def;
0099 
0100     /* Min vertical timining size */
0101     u32 vts_min;
0102 
0103     /* Link frequency needed for this resolution */
0104     u32 link_freq_index;
0105 
0106     /* Sensor register settings for this resolution */
0107     const struct ov9734_reg_list reg_list;
0108 };
0109 
0110 static const struct ov9734_reg mipi_data_rate_360mbps[] = {
0111     {0x3030, 0x19},
0112     {0x3080, 0x02},
0113     {0x3081, 0x4b},
0114     {0x3082, 0x04},
0115     {0x3083, 0x00},
0116     {0x3084, 0x02},
0117     {0x3085, 0x01},
0118     {0x3086, 0x01},
0119     {0x3089, 0x01},
0120     {0x308a, 0x00},
0121     {0x301e, 0x15},
0122     {0x3103, 0x01},
0123 };
0124 
0125 static const struct ov9734_reg mode_1296x734_regs[] = {
0126     {0x3001, 0x00},
0127     {0x3002, 0x00},
0128     {0x3007, 0x00},
0129     {0x3010, 0x00},
0130     {0x3011, 0x08},
0131     {0x3014, 0x22},
0132     {0x3600, 0x55},
0133     {0x3601, 0x02},
0134     {0x3605, 0x22},
0135     {0x3611, 0xe7},
0136     {0x3654, 0x10},
0137     {0x3655, 0x77},
0138     {0x3656, 0x77},
0139     {0x3657, 0x07},
0140     {0x3658, 0x22},
0141     {0x3659, 0x22},
0142     {0x365a, 0x02},
0143     {0x3784, 0x05},
0144     {0x3785, 0x55},
0145     {0x37c0, 0x07},
0146     {0x3800, 0x00},
0147     {0x3801, 0x04},
0148     {0x3802, 0x00},
0149     {0x3803, 0x04},
0150     {0x3804, 0x05},
0151     {0x3805, 0x0b},
0152     {0x3806, 0x02},
0153     {0x3807, 0xdb},
0154     {0x3808, 0x05},
0155     {0x3809, 0x00},
0156     {0x380a, 0x02},
0157     {0x380b, 0xd0},
0158     {0x380c, 0x05},
0159     {0x380d, 0xc6},
0160     {0x380e, 0x03},
0161     {0x380f, 0x22},
0162     {0x3810, 0x00},
0163     {0x3811, 0x04},
0164     {0x3812, 0x00},
0165     {0x3813, 0x04},
0166     {0x3816, 0x00},
0167     {0x3817, 0x00},
0168     {0x3818, 0x00},
0169     {0x3819, 0x04},
0170     {0x3820, 0x18},
0171     {0x3821, 0x00},
0172     {0x382c, 0x06},
0173     {0x3500, 0x00},
0174     {0x3501, 0x31},
0175     {0x3502, 0x00},
0176     {0x3503, 0x03},
0177     {0x3504, 0x00},
0178     {0x3505, 0x00},
0179     {0x3509, 0x10},
0180     {0x350a, 0x00},
0181     {0x350b, 0x40},
0182     {0x3d00, 0x00},
0183     {0x3d01, 0x00},
0184     {0x3d02, 0x00},
0185     {0x3d03, 0x00},
0186     {0x3d04, 0x00},
0187     {0x3d05, 0x00},
0188     {0x3d06, 0x00},
0189     {0x3d07, 0x00},
0190     {0x3d08, 0x00},
0191     {0x3d09, 0x00},
0192     {0x3d0a, 0x00},
0193     {0x3d0b, 0x00},
0194     {0x3d0c, 0x00},
0195     {0x3d0d, 0x00},
0196     {0x3d0e, 0x00},
0197     {0x3d0f, 0x00},
0198     {0x3d80, 0x00},
0199     {0x3d81, 0x00},
0200     {0x3d82, 0x38},
0201     {0x3d83, 0xa4},
0202     {0x3d84, 0x00},
0203     {0x3d85, 0x00},
0204     {0x3d86, 0x1f},
0205     {0x3d87, 0x03},
0206     {0x3d8b, 0x00},
0207     {0x3d8f, 0x00},
0208     {0x4001, 0xe0},
0209     {0x4009, 0x0b},
0210     {0x4300, 0x03},
0211     {0x4301, 0xff},
0212     {0x4304, 0x00},
0213     {0x4305, 0x00},
0214     {0x4309, 0x00},
0215     {0x4600, 0x00},
0216     {0x4601, 0x80},
0217     {0x4800, 0x00},
0218     {0x4805, 0x00},
0219     {0x4821, 0x50},
0220     {0x4823, 0x50},
0221     {0x4837, 0x2d},
0222     {0x4a00, 0x00},
0223     {0x4f00, 0x80},
0224     {0x4f01, 0x10},
0225     {0x4f02, 0x00},
0226     {0x4f03, 0x00},
0227     {0x4f04, 0x00},
0228     {0x4f05, 0x00},
0229     {0x4f06, 0x00},
0230     {0x4f07, 0x00},
0231     {0x4f08, 0x00},
0232     {0x4f09, 0x00},
0233     {0x5000, 0x2f},
0234     {0x500c, 0x00},
0235     {0x500d, 0x00},
0236     {0x500e, 0x00},
0237     {0x500f, 0x00},
0238     {0x5010, 0x00},
0239     {0x5011, 0x00},
0240     {0x5012, 0x00},
0241     {0x5013, 0x00},
0242     {0x5014, 0x00},
0243     {0x5015, 0x00},
0244     {0x5016, 0x00},
0245     {0x5017, 0x00},
0246     {0x5080, 0x00},
0247     {0x5180, 0x01},
0248     {0x5181, 0x00},
0249     {0x5182, 0x01},
0250     {0x5183, 0x00},
0251     {0x5184, 0x01},
0252     {0x5185, 0x00},
0253     {0x5708, 0x06},
0254     {0x380f, 0x2a},
0255     {0x5780, 0x3e},
0256     {0x5781, 0x0f},
0257     {0x5782, 0x44},
0258     {0x5783, 0x02},
0259     {0x5784, 0x01},
0260     {0x5785, 0x01},
0261     {0x5786, 0x00},
0262     {0x5787, 0x04},
0263     {0x5788, 0x02},
0264     {0x5789, 0x0f},
0265     {0x578a, 0xfd},
0266     {0x578b, 0xf5},
0267     {0x578c, 0xf5},
0268     {0x578d, 0x03},
0269     {0x578e, 0x08},
0270     {0x578f, 0x0c},
0271     {0x5790, 0x08},
0272     {0x5791, 0x04},
0273     {0x5792, 0x00},
0274     {0x5793, 0x52},
0275     {0x5794, 0xa3},
0276     {0x5000, 0x3f},
0277     {0x3801, 0x00},
0278     {0x3803, 0x00},
0279     {0x3805, 0x0f},
0280     {0x3807, 0xdf},
0281     {0x3809, 0x10},
0282     {0x380b, 0xde},
0283     {0x3811, 0x00},
0284     {0x3813, 0x01},
0285 };
0286 
0287 static const char * const ov9734_test_pattern_menu[] = {
0288     "Disabled",
0289     "Standard Color Bar",
0290     "Top-Bottom Darker Color Bar",
0291     "Right-Left Darker Color Bar",
0292     "Bottom-Top Darker Color Bar",
0293 };
0294 
0295 static const s64 link_freq_menu_items[] = {
0296     OV9734_LINK_FREQ_180MHZ,
0297 };
0298 
0299 static const struct ov9734_link_freq_config link_freq_configs[] = {
0300     [OV9734_LINK_FREQ_180MHZ_INDEX] = {
0301         .reg_list = {
0302             .num_of_regs = ARRAY_SIZE(mipi_data_rate_360mbps),
0303             .regs = mipi_data_rate_360mbps,
0304         }
0305     },
0306 };
0307 
0308 static const struct ov9734_mode supported_modes[] = {
0309     {
0310         .width = 1296,
0311         .height = 734,
0312         .hts = 0x5c6,
0313         .vts_def = OV9734_VTS_30FPS,
0314         .vts_min = OV9734_VTS_30FPS_MIN,
0315         .reg_list = {
0316             .num_of_regs = ARRAY_SIZE(mode_1296x734_regs),
0317             .regs = mode_1296x734_regs,
0318         },
0319         .link_freq_index = OV9734_LINK_FREQ_180MHZ_INDEX,
0320     },
0321 };
0322 
0323 struct ov9734 {
0324     struct v4l2_subdev sd;
0325     struct media_pad pad;
0326     struct v4l2_ctrl_handler ctrl_handler;
0327 
0328     /* V4L2 Controls */
0329     struct v4l2_ctrl *link_freq;
0330     struct v4l2_ctrl *pixel_rate;
0331     struct v4l2_ctrl *vblank;
0332     struct v4l2_ctrl *hblank;
0333     struct v4l2_ctrl *exposure;
0334 
0335     /* Current mode */
0336     const struct ov9734_mode *cur_mode;
0337 
0338     /* To serialize asynchronus callbacks */
0339     struct mutex mutex;
0340 
0341     /* Streaming on/off */
0342     bool streaming;
0343 };
0344 
0345 static inline struct ov9734 *to_ov9734(struct v4l2_subdev *subdev)
0346 {
0347     return container_of(subdev, struct ov9734, sd);
0348 }
0349 
0350 static u64 to_pixel_rate(u32 f_index)
0351 {
0352     u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV9734_DATA_LANES;
0353 
0354     do_div(pixel_rate, OV9734_RGB_DEPTH);
0355 
0356     return pixel_rate;
0357 }
0358 
0359 static u64 to_pixels_per_line(u32 hts, u32 f_index)
0360 {
0361     u64 ppl = hts * to_pixel_rate(f_index);
0362 
0363     do_div(ppl, OV9734_SCLK);
0364 
0365     return ppl;
0366 }
0367 
0368 static int ov9734_read_reg(struct ov9734 *ov9734, u16 reg, u16 len, u32 *val)
0369 {
0370     struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
0371     struct i2c_msg msgs[2];
0372     u8 addr_buf[2];
0373     u8 data_buf[4] = {0};
0374     int ret;
0375 
0376     if (len > sizeof(data_buf))
0377         return -EINVAL;
0378 
0379     put_unaligned_be16(reg, addr_buf);
0380     msgs[0].addr = client->addr;
0381     msgs[0].flags = 0;
0382     msgs[0].len = sizeof(addr_buf);
0383     msgs[0].buf = addr_buf;
0384     msgs[1].addr = client->addr;
0385     msgs[1].flags = I2C_M_RD;
0386     msgs[1].len = len;
0387     msgs[1].buf = &data_buf[sizeof(data_buf) - len];
0388 
0389     ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
0390     if (ret != ARRAY_SIZE(msgs))
0391         return ret < 0 ? ret : -EIO;
0392 
0393     *val = get_unaligned_be32(data_buf);
0394 
0395     return 0;
0396 }
0397 
0398 static int ov9734_write_reg(struct ov9734 *ov9734, u16 reg, u16 len, u32 val)
0399 {
0400     struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
0401     u8 buf[6];
0402     int ret = 0;
0403 
0404     if (len > 4)
0405         return -EINVAL;
0406 
0407     put_unaligned_be16(reg, buf);
0408     put_unaligned_be32(val << 8 * (4 - len), buf + 2);
0409 
0410     ret = i2c_master_send(client, buf, len + 2);
0411     if (ret != len + 2)
0412         return ret < 0 ? ret : -EIO;
0413 
0414     return 0;
0415 }
0416 
0417 static int ov9734_write_reg_list(struct ov9734 *ov9734,
0418                  const struct ov9734_reg_list *r_list)
0419 {
0420     struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
0421     unsigned int i;
0422     int ret;
0423 
0424     for (i = 0; i < r_list->num_of_regs; i++) {
0425         ret = ov9734_write_reg(ov9734, r_list->regs[i].address, 1,
0426                        r_list->regs[i].val);
0427         if (ret) {
0428             dev_err_ratelimited(&client->dev,
0429                         "write reg 0x%4.4x return err = %d",
0430                         r_list->regs[i].address, ret);
0431             return ret;
0432         }
0433     }
0434 
0435     return 0;
0436 }
0437 
0438 static int ov9734_update_digital_gain(struct ov9734 *ov9734, u32 d_gain)
0439 {
0440     int ret;
0441 
0442     ret = ov9734_write_reg(ov9734, OV9734_REG_GROUP_ACCESS, 1,
0443                    OV9734_GROUP_HOLD_START);
0444     if (ret)
0445         return ret;
0446 
0447     ret = ov9734_write_reg(ov9734, OV9734_REG_MWB_R_GAIN, 2, d_gain);
0448     if (ret)
0449         return ret;
0450 
0451     ret = ov9734_write_reg(ov9734, OV9734_REG_MWB_G_GAIN, 2, d_gain);
0452     if (ret)
0453         return ret;
0454 
0455     ret = ov9734_write_reg(ov9734, OV9734_REG_MWB_B_GAIN, 2, d_gain);
0456     if (ret)
0457         return ret;
0458 
0459     ret = ov9734_write_reg(ov9734, OV9734_REG_GROUP_ACCESS, 1,
0460                    OV9734_GROUP_HOLD_END);
0461     if (ret)
0462         return ret;
0463 
0464     ret = ov9734_write_reg(ov9734, OV9734_REG_GROUP_ACCESS, 1,
0465                    OV9734_GROUP_HOLD_LAUNCH);
0466     return ret;
0467 }
0468 
0469 static int ov9734_test_pattern(struct ov9734 *ov9734, u32 pattern)
0470 {
0471     if (pattern)
0472         pattern = (pattern - 1) << OV9734_TEST_PATTERN_BAR_SHIFT |
0473             OV9734_TEST_PATTERN_ENABLE;
0474 
0475     return ov9734_write_reg(ov9734, OV9734_REG_TEST_PATTERN, 1, pattern);
0476 }
0477 
0478 static int ov9734_set_ctrl(struct v4l2_ctrl *ctrl)
0479 {
0480     struct ov9734 *ov9734 = container_of(ctrl->handler,
0481                          struct ov9734, ctrl_handler);
0482     struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
0483     s64 exposure_max;
0484     int ret = 0;
0485 
0486     /* Propagate change of current control to all related controls */
0487     if (ctrl->id == V4L2_CID_VBLANK) {
0488         /* Update max exposure while meeting expected vblanking */
0489         exposure_max = ov9734->cur_mode->height + ctrl->val -
0490             OV9734_EXPOSURE_MAX_MARGIN;
0491         __v4l2_ctrl_modify_range(ov9734->exposure,
0492                      ov9734->exposure->minimum,
0493                      exposure_max, ov9734->exposure->step,
0494                      exposure_max);
0495     }
0496 
0497     /* V4L2 controls values will be applied only when power is already up */
0498     if (!pm_runtime_get_if_in_use(&client->dev))
0499         return 0;
0500 
0501     switch (ctrl->id) {
0502     case V4L2_CID_ANALOGUE_GAIN:
0503         ret = ov9734_write_reg(ov9734, OV9734_REG_ANALOG_GAIN,
0504                        2, ctrl->val);
0505         break;
0506 
0507     case V4L2_CID_DIGITAL_GAIN:
0508         ret = ov9734_update_digital_gain(ov9734, ctrl->val);
0509         break;
0510 
0511     case V4L2_CID_EXPOSURE:
0512         /* 4 least significant bits of expsoure are fractional part */
0513         ret = ov9734_write_reg(ov9734, OV9734_REG_EXPOSURE,
0514                        3, ctrl->val << 4);
0515         break;
0516 
0517     case V4L2_CID_VBLANK:
0518         ret = ov9734_write_reg(ov9734, OV9734_REG_VTS, 2,
0519                        ov9734->cur_mode->height + ctrl->val);
0520         break;
0521 
0522     case V4L2_CID_TEST_PATTERN:
0523         ret = ov9734_test_pattern(ov9734, ctrl->val);
0524         break;
0525 
0526     default:
0527         ret = -EINVAL;
0528         break;
0529     }
0530 
0531     pm_runtime_put(&client->dev);
0532 
0533     return ret;
0534 }
0535 
0536 static const struct v4l2_ctrl_ops ov9734_ctrl_ops = {
0537     .s_ctrl = ov9734_set_ctrl,
0538 };
0539 
0540 static int ov9734_init_controls(struct ov9734 *ov9734)
0541 {
0542     struct v4l2_ctrl_handler *ctrl_hdlr;
0543     const struct ov9734_mode *cur_mode;
0544     s64 exposure_max, h_blank, pixel_rate;
0545     u32 vblank_min, vblank_max, vblank_default;
0546     int ret, size;
0547 
0548     ctrl_hdlr = &ov9734->ctrl_handler;
0549     ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
0550     if (ret)
0551         return ret;
0552 
0553     ctrl_hdlr->lock = &ov9734->mutex;
0554     cur_mode = ov9734->cur_mode;
0555     size = ARRAY_SIZE(link_freq_menu_items);
0556     ov9734->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov9734_ctrl_ops,
0557                            V4L2_CID_LINK_FREQ,
0558                            size - 1, 0,
0559                            link_freq_menu_items);
0560     if (ov9734->link_freq)
0561         ov9734->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
0562 
0563     pixel_rate = to_pixel_rate(OV9734_LINK_FREQ_180MHZ_INDEX);
0564     ov9734->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops,
0565                            V4L2_CID_PIXEL_RATE, 0,
0566                            pixel_rate, 1, pixel_rate);
0567     vblank_min = cur_mode->vts_min - cur_mode->height;
0568     vblank_max = OV9734_VTS_MAX - cur_mode->height;
0569     vblank_default = cur_mode->vts_def - cur_mode->height;
0570     ov9734->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops,
0571                        V4L2_CID_VBLANK, vblank_min,
0572                        vblank_max, 1, vblank_default);
0573     h_blank = to_pixels_per_line(cur_mode->hts, cur_mode->link_freq_index);
0574     h_blank -= cur_mode->width;
0575     ov9734->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops,
0576                        V4L2_CID_HBLANK, h_blank, h_blank, 1,
0577                        h_blank);
0578     if (ov9734->hblank)
0579         ov9734->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
0580 
0581     v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
0582               OV9734_ANAL_GAIN_MIN, OV9734_ANAL_GAIN_MAX,
0583               OV9734_ANAL_GAIN_STEP, OV9734_ANAL_GAIN_MIN);
0584     v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
0585               OV9734_DGTL_GAIN_MIN, OV9734_DGTL_GAIN_MAX,
0586               OV9734_DGTL_GAIN_STEP, OV9734_DGTL_GAIN_DEFAULT);
0587     exposure_max = ov9734->cur_mode->vts_def - OV9734_EXPOSURE_MAX_MARGIN;
0588     ov9734->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops,
0589                          V4L2_CID_EXPOSURE,
0590                          OV9734_EXPOSURE_MIN, exposure_max,
0591                          OV9734_EXPOSURE_STEP,
0592                          exposure_max);
0593     v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov9734_ctrl_ops,
0594                      V4L2_CID_TEST_PATTERN,
0595                      ARRAY_SIZE(ov9734_test_pattern_menu) - 1,
0596                      0, 0, ov9734_test_pattern_menu);
0597     if (ctrl_hdlr->error)
0598         return ctrl_hdlr->error;
0599 
0600     ov9734->sd.ctrl_handler = ctrl_hdlr;
0601 
0602     return 0;
0603 }
0604 
0605 static void ov9734_update_pad_format(const struct ov9734_mode *mode,
0606                      struct v4l2_mbus_framefmt *fmt)
0607 {
0608     fmt->width = mode->width;
0609     fmt->height = mode->height;
0610     fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
0611     fmt->field = V4L2_FIELD_NONE;
0612 }
0613 
0614 static int ov9734_start_streaming(struct ov9734 *ov9734)
0615 {
0616     struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
0617     const struct ov9734_reg_list *reg_list;
0618     int link_freq_index, ret;
0619 
0620     link_freq_index = ov9734->cur_mode->link_freq_index;
0621     reg_list = &link_freq_configs[link_freq_index].reg_list;
0622     ret = ov9734_write_reg_list(ov9734, reg_list);
0623     if (ret) {
0624         dev_err(&client->dev, "failed to set plls");
0625         return ret;
0626     }
0627 
0628     reg_list = &ov9734->cur_mode->reg_list;
0629     ret = ov9734_write_reg_list(ov9734, reg_list);
0630     if (ret) {
0631         dev_err(&client->dev, "failed to set mode");
0632         return ret;
0633     }
0634 
0635     ret = __v4l2_ctrl_handler_setup(ov9734->sd.ctrl_handler);
0636     if (ret)
0637         return ret;
0638 
0639     ret = ov9734_write_reg(ov9734, OV9734_REG_MODE_SELECT,
0640                    1, OV9734_MODE_STREAMING);
0641     if (ret)
0642         dev_err(&client->dev, "failed to start stream");
0643 
0644     return ret;
0645 }
0646 
0647 static void ov9734_stop_streaming(struct ov9734 *ov9734)
0648 {
0649     struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
0650 
0651     if (ov9734_write_reg(ov9734, OV9734_REG_MODE_SELECT,
0652                  1, OV9734_MODE_STANDBY))
0653         dev_err(&client->dev, "failed to stop stream");
0654 }
0655 
0656 static int ov9734_set_stream(struct v4l2_subdev *sd, int enable)
0657 {
0658     struct ov9734 *ov9734 = to_ov9734(sd);
0659     struct i2c_client *client = v4l2_get_subdevdata(sd);
0660     int ret = 0;
0661 
0662     mutex_lock(&ov9734->mutex);
0663     if (ov9734->streaming == enable) {
0664         mutex_unlock(&ov9734->mutex);
0665         return 0;
0666     }
0667 
0668     if (enable) {
0669         ret = pm_runtime_resume_and_get(&client->dev);
0670         if (ret < 0) {
0671             mutex_unlock(&ov9734->mutex);
0672             return ret;
0673         }
0674 
0675         ret = ov9734_start_streaming(ov9734);
0676         if (ret) {
0677             enable = 0;
0678             ov9734_stop_streaming(ov9734);
0679             pm_runtime_put(&client->dev);
0680         }
0681     } else {
0682         ov9734_stop_streaming(ov9734);
0683         pm_runtime_put(&client->dev);
0684     }
0685 
0686     ov9734->streaming = enable;
0687     mutex_unlock(&ov9734->mutex);
0688 
0689     return ret;
0690 }
0691 
0692 static int __maybe_unused ov9734_suspend(struct device *dev)
0693 {
0694     struct i2c_client *client = to_i2c_client(dev);
0695     struct v4l2_subdev *sd = i2c_get_clientdata(client);
0696     struct ov9734 *ov9734 = to_ov9734(sd);
0697 
0698     mutex_lock(&ov9734->mutex);
0699     if (ov9734->streaming)
0700         ov9734_stop_streaming(ov9734);
0701 
0702     mutex_unlock(&ov9734->mutex);
0703 
0704     return 0;
0705 }
0706 
0707 static int __maybe_unused ov9734_resume(struct device *dev)
0708 {
0709     struct i2c_client *client = to_i2c_client(dev);
0710     struct v4l2_subdev *sd = i2c_get_clientdata(client);
0711     struct ov9734 *ov9734 = to_ov9734(sd);
0712     int ret = 0;
0713 
0714     mutex_lock(&ov9734->mutex);
0715     if (!ov9734->streaming)
0716         goto exit;
0717 
0718     ret = ov9734_start_streaming(ov9734);
0719     if (ret) {
0720         ov9734->streaming = false;
0721         ov9734_stop_streaming(ov9734);
0722     }
0723 
0724 exit:
0725     mutex_unlock(&ov9734->mutex);
0726     return ret;
0727 }
0728 
0729 static int ov9734_set_format(struct v4l2_subdev *sd,
0730                  struct v4l2_subdev_state *sd_state,
0731                  struct v4l2_subdev_format *fmt)
0732 {
0733     struct ov9734 *ov9734 = to_ov9734(sd);
0734     const struct ov9734_mode *mode;
0735     s32 vblank_def, h_blank;
0736 
0737     mode = v4l2_find_nearest_size(supported_modes,
0738                       ARRAY_SIZE(supported_modes), width,
0739                       height, fmt->format.width,
0740                       fmt->format.height);
0741 
0742     mutex_lock(&ov9734->mutex);
0743     ov9734_update_pad_format(mode, &fmt->format);
0744     if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
0745         *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
0746     } else {
0747         ov9734->cur_mode = mode;
0748         __v4l2_ctrl_s_ctrl(ov9734->link_freq, mode->link_freq_index);
0749         __v4l2_ctrl_s_ctrl_int64(ov9734->pixel_rate,
0750                      to_pixel_rate(mode->link_freq_index));
0751 
0752         /* Update limits and set FPS to default */
0753         vblank_def = mode->vts_def - mode->height;
0754         __v4l2_ctrl_modify_range(ov9734->vblank,
0755                      mode->vts_min - mode->height,
0756                      OV9734_VTS_MAX - mode->height, 1,
0757                      vblank_def);
0758         __v4l2_ctrl_s_ctrl(ov9734->vblank, vblank_def);
0759         h_blank = to_pixels_per_line(mode->hts, mode->link_freq_index) -
0760             mode->width;
0761         __v4l2_ctrl_modify_range(ov9734->hblank, h_blank, h_blank, 1,
0762                      h_blank);
0763     }
0764 
0765     mutex_unlock(&ov9734->mutex);
0766 
0767     return 0;
0768 }
0769 
0770 static int ov9734_get_format(struct v4l2_subdev *sd,
0771                  struct v4l2_subdev_state *sd_state,
0772                  struct v4l2_subdev_format *fmt)
0773 {
0774     struct ov9734 *ov9734 = to_ov9734(sd);
0775 
0776     mutex_lock(&ov9734->mutex);
0777     if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
0778         fmt->format = *v4l2_subdev_get_try_format(&ov9734->sd,
0779                               sd_state,
0780                               fmt->pad);
0781     else
0782         ov9734_update_pad_format(ov9734->cur_mode, &fmt->format);
0783 
0784     mutex_unlock(&ov9734->mutex);
0785 
0786     return 0;
0787 }
0788 
0789 static int ov9734_enum_mbus_code(struct v4l2_subdev *sd,
0790                  struct v4l2_subdev_state *sd_state,
0791                  struct v4l2_subdev_mbus_code_enum *code)
0792 {
0793     if (code->index > 0)
0794         return -EINVAL;
0795 
0796     code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
0797 
0798     return 0;
0799 }
0800 
0801 static int ov9734_enum_frame_size(struct v4l2_subdev *sd,
0802                   struct v4l2_subdev_state *sd_state,
0803                   struct v4l2_subdev_frame_size_enum *fse)
0804 {
0805     if (fse->index >= ARRAY_SIZE(supported_modes))
0806         return -EINVAL;
0807 
0808     if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
0809         return -EINVAL;
0810 
0811     fse->min_width = supported_modes[fse->index].width;
0812     fse->max_width = fse->min_width;
0813     fse->min_height = supported_modes[fse->index].height;
0814     fse->max_height = fse->min_height;
0815 
0816     return 0;
0817 }
0818 
0819 static int ov9734_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
0820 {
0821     struct ov9734 *ov9734 = to_ov9734(sd);
0822 
0823     mutex_lock(&ov9734->mutex);
0824     ov9734_update_pad_format(&supported_modes[0],
0825                  v4l2_subdev_get_try_format(sd, fh->state, 0));
0826     mutex_unlock(&ov9734->mutex);
0827 
0828     return 0;
0829 }
0830 
0831 static const struct v4l2_subdev_video_ops ov9734_video_ops = {
0832     .s_stream = ov9734_set_stream,
0833 };
0834 
0835 static const struct v4l2_subdev_pad_ops ov9734_pad_ops = {
0836     .set_fmt = ov9734_set_format,
0837     .get_fmt = ov9734_get_format,
0838     .enum_mbus_code = ov9734_enum_mbus_code,
0839     .enum_frame_size = ov9734_enum_frame_size,
0840 };
0841 
0842 static const struct v4l2_subdev_ops ov9734_subdev_ops = {
0843     .video = &ov9734_video_ops,
0844     .pad = &ov9734_pad_ops,
0845 };
0846 
0847 static const struct media_entity_operations ov9734_subdev_entity_ops = {
0848     .link_validate = v4l2_subdev_link_validate,
0849 };
0850 
0851 static const struct v4l2_subdev_internal_ops ov9734_internal_ops = {
0852     .open = ov9734_open,
0853 };
0854 
0855 static int ov9734_identify_module(struct ov9734 *ov9734)
0856 {
0857     struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
0858     int ret;
0859     u32 val;
0860 
0861     ret = ov9734_read_reg(ov9734, OV9734_REG_CHIP_ID, 2, &val);
0862     if (ret)
0863         return ret;
0864 
0865     if (val != OV9734_CHIP_ID) {
0866         dev_err(&client->dev, "chip id mismatch: %x!=%x",
0867             OV9734_CHIP_ID, val);
0868         return -ENXIO;
0869     }
0870 
0871     return 0;
0872 }
0873 
0874 static int ov9734_check_hwcfg(struct device *dev)
0875 {
0876     struct fwnode_handle *ep;
0877     struct fwnode_handle *fwnode = dev_fwnode(dev);
0878     struct v4l2_fwnode_endpoint bus_cfg = {
0879         .bus_type = V4L2_MBUS_CSI2_DPHY
0880     };
0881     u32 mclk;
0882     int ret;
0883     unsigned int i, j;
0884 
0885     if (!fwnode)
0886         return -ENXIO;
0887 
0888     ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk);
0889     if (ret)
0890         return ret;
0891 
0892     if (mclk != OV9734_MCLK) {
0893         dev_err(dev, "external clock %d is not supported", mclk);
0894         return -EINVAL;
0895     }
0896 
0897     ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
0898     if (!ep)
0899         return -ENXIO;
0900 
0901     ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
0902     fwnode_handle_put(ep);
0903     if (ret)
0904         return ret;
0905 
0906     if (!bus_cfg.nr_of_link_frequencies) {
0907         dev_err(dev, "no link frequencies defined");
0908         ret = -EINVAL;
0909         goto check_hwcfg_error;
0910     }
0911 
0912     for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
0913         for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
0914             if (link_freq_menu_items[i] ==
0915                 bus_cfg.link_frequencies[j])
0916                 break;
0917         }
0918 
0919         if (j == bus_cfg.nr_of_link_frequencies) {
0920             dev_err(dev, "no link frequency %lld supported",
0921                 link_freq_menu_items[i]);
0922             ret = -EINVAL;
0923             goto check_hwcfg_error;
0924         }
0925     }
0926 
0927 check_hwcfg_error:
0928     v4l2_fwnode_endpoint_free(&bus_cfg);
0929 
0930     return ret;
0931 }
0932 
0933 static int ov9734_remove(struct i2c_client *client)
0934 {
0935     struct v4l2_subdev *sd = i2c_get_clientdata(client);
0936     struct ov9734 *ov9734 = to_ov9734(sd);
0937 
0938     v4l2_async_unregister_subdev(sd);
0939     media_entity_cleanup(&sd->entity);
0940     v4l2_ctrl_handler_free(sd->ctrl_handler);
0941     pm_runtime_disable(&client->dev);
0942     mutex_destroy(&ov9734->mutex);
0943 
0944     return 0;
0945 }
0946 
0947 static int ov9734_probe(struct i2c_client *client)
0948 {
0949     struct ov9734 *ov9734;
0950     int ret;
0951 
0952     ret = ov9734_check_hwcfg(&client->dev);
0953     if (ret) {
0954         dev_err(&client->dev, "failed to check HW configuration: %d",
0955             ret);
0956         return ret;
0957     }
0958 
0959     ov9734 = devm_kzalloc(&client->dev, sizeof(*ov9734), GFP_KERNEL);
0960     if (!ov9734)
0961         return -ENOMEM;
0962 
0963     v4l2_i2c_subdev_init(&ov9734->sd, client, &ov9734_subdev_ops);
0964     ret = ov9734_identify_module(ov9734);
0965     if (ret) {
0966         dev_err(&client->dev, "failed to find sensor: %d", ret);
0967         return ret;
0968     }
0969 
0970     mutex_init(&ov9734->mutex);
0971     ov9734->cur_mode = &supported_modes[0];
0972     ret = ov9734_init_controls(ov9734);
0973     if (ret) {
0974         dev_err(&client->dev, "failed to init controls: %d", ret);
0975         goto probe_error_v4l2_ctrl_handler_free;
0976     }
0977 
0978     ov9734->sd.internal_ops = &ov9734_internal_ops;
0979     ov9734->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
0980     ov9734->sd.entity.ops = &ov9734_subdev_entity_ops;
0981     ov9734->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
0982     ov9734->pad.flags = MEDIA_PAD_FL_SOURCE;
0983     ret = media_entity_pads_init(&ov9734->sd.entity, 1, &ov9734->pad);
0984     if (ret) {
0985         dev_err(&client->dev, "failed to init entity pads: %d", ret);
0986         goto probe_error_v4l2_ctrl_handler_free;
0987     }
0988 
0989     ret = v4l2_async_register_subdev_sensor(&ov9734->sd);
0990     if (ret < 0) {
0991         dev_err(&client->dev, "failed to register V4L2 subdev: %d",
0992             ret);
0993         goto probe_error_media_entity_cleanup;
0994     }
0995 
0996     /*
0997      * Device is already turned on by i2c-core with ACPI domain PM.
0998      * Enable runtime PM and turn off the device.
0999      */
1000     pm_runtime_set_active(&client->dev);
1001     pm_runtime_enable(&client->dev);
1002     pm_runtime_idle(&client->dev);
1003 
1004     return 0;
1005 
1006 probe_error_media_entity_cleanup:
1007     media_entity_cleanup(&ov9734->sd.entity);
1008 
1009 probe_error_v4l2_ctrl_handler_free:
1010     v4l2_ctrl_handler_free(ov9734->sd.ctrl_handler);
1011     mutex_destroy(&ov9734->mutex);
1012 
1013     return ret;
1014 }
1015 
1016 static const struct dev_pm_ops ov9734_pm_ops = {
1017     SET_SYSTEM_SLEEP_PM_OPS(ov9734_suspend, ov9734_resume)
1018 };
1019 
1020 static const struct acpi_device_id ov9734_acpi_ids[] = {
1021     { "OVTI9734", },
1022     {}
1023 };
1024 
1025 MODULE_DEVICE_TABLE(acpi, ov9734_acpi_ids);
1026 
1027 static struct i2c_driver ov9734_i2c_driver = {
1028     .driver = {
1029         .name = "ov9734",
1030         .pm = &ov9734_pm_ops,
1031         .acpi_match_table = ov9734_acpi_ids,
1032     },
1033     .probe_new = ov9734_probe,
1034     .remove = ov9734_remove,
1035 };
1036 
1037 module_i2c_driver(ov9734_i2c_driver);
1038 
1039 MODULE_AUTHOR("Qiu, Tianshu <tian.shu.qiu@intel.com>");
1040 MODULE_AUTHOR("Bingbu Cao <bingbu.cao@intel.com>");
1041 MODULE_DESCRIPTION("OmniVision OV9734 sensor driver");
1042 MODULE_LICENSE("GPL v2");
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