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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * ov5695 driver
0004  *
0005  * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
0006  */
0007 
0008 #include <linux/clk.h>
0009 #include <linux/device.h>
0010 #include <linux/delay.h>
0011 #include <linux/gpio/consumer.h>
0012 #include <linux/i2c.h>
0013 #include <linux/module.h>
0014 #include <linux/pm_runtime.h>
0015 #include <linux/regulator/consumer.h>
0016 #include <linux/sysfs.h>
0017 #include <media/media-entity.h>
0018 #include <media/v4l2-async.h>
0019 #include <media/v4l2-ctrls.h>
0020 #include <media/v4l2-subdev.h>
0021 
0022 #ifndef V4L2_CID_DIGITAL_GAIN
0023 #define V4L2_CID_DIGITAL_GAIN       V4L2_CID_GAIN
0024 #endif
0025 
0026 /* 45Mhz * 4 Binning */
0027 #define OV5695_PIXEL_RATE       (45 * 1000 * 1000 * 4)
0028 #define OV5695_XVCLK_FREQ       24000000
0029 
0030 #define CHIP_ID             0x005695
0031 #define OV5695_REG_CHIP_ID      0x300a
0032 
0033 #define OV5695_REG_CTRL_MODE        0x0100
0034 #define OV5695_MODE_SW_STANDBY      0x0
0035 #define OV5695_MODE_STREAMING       BIT(0)
0036 
0037 #define OV5695_REG_EXPOSURE     0x3500
0038 #define OV5695_EXPOSURE_MIN     4
0039 #define OV5695_EXPOSURE_STEP        1
0040 #define OV5695_VTS_MAX          0x7fff
0041 
0042 #define OV5695_REG_ANALOG_GAIN      0x3509
0043 #define ANALOG_GAIN_MIN         0x10
0044 #define ANALOG_GAIN_MAX         0xf8
0045 #define ANALOG_GAIN_STEP        1
0046 #define ANALOG_GAIN_DEFAULT     0xf8
0047 
0048 #define OV5695_REG_DIGI_GAIN_H      0x350a
0049 #define OV5695_REG_DIGI_GAIN_L      0x350b
0050 #define OV5695_DIGI_GAIN_L_MASK     0x3f
0051 #define OV5695_DIGI_GAIN_H_SHIFT    6
0052 #define OV5695_DIGI_GAIN_MIN        0
0053 #define OV5695_DIGI_GAIN_MAX        (0x4000 - 1)
0054 #define OV5695_DIGI_GAIN_STEP       1
0055 #define OV5695_DIGI_GAIN_DEFAULT    1024
0056 
0057 #define OV5695_REG_TEST_PATTERN     0x4503
0058 #define OV5695_TEST_PATTERN_ENABLE  0x80
0059 #define OV5695_TEST_PATTERN_DISABLE 0x0
0060 
0061 #define OV5695_REG_VTS          0x380e
0062 
0063 #define REG_NULL            0xFFFF
0064 
0065 #define OV5695_REG_VALUE_08BIT      1
0066 #define OV5695_REG_VALUE_16BIT      2
0067 #define OV5695_REG_VALUE_24BIT      3
0068 
0069 #define OV5695_LANES            2
0070 #define OV5695_BITS_PER_SAMPLE      10
0071 
0072 static const char * const ov5695_supply_names[] = {
0073     "avdd",     /* Analog power */
0074     "dovdd",    /* Digital I/O power */
0075     "dvdd",     /* Digital core power */
0076 };
0077 
0078 #define OV5695_NUM_SUPPLIES ARRAY_SIZE(ov5695_supply_names)
0079 
0080 struct regval {
0081     u16 addr;
0082     u8 val;
0083 };
0084 
0085 struct ov5695_mode {
0086     u32 width;
0087     u32 height;
0088     u32 max_fps;
0089     u32 hts_def;
0090     u32 vts_def;
0091     u32 exp_def;
0092     const struct regval *reg_list;
0093 };
0094 
0095 struct ov5695 {
0096     struct i2c_client   *client;
0097     struct clk      *xvclk;
0098     struct gpio_desc    *reset_gpio;
0099     struct regulator_bulk_data supplies[OV5695_NUM_SUPPLIES];
0100 
0101     struct v4l2_subdev  subdev;
0102     struct media_pad    pad;
0103     struct v4l2_ctrl_handler ctrl_handler;
0104     struct v4l2_ctrl    *exposure;
0105     struct v4l2_ctrl    *anal_gain;
0106     struct v4l2_ctrl    *digi_gain;
0107     struct v4l2_ctrl    *hblank;
0108     struct v4l2_ctrl    *vblank;
0109     struct v4l2_ctrl    *test_pattern;
0110     struct mutex        mutex;
0111     bool            streaming;
0112     const struct ov5695_mode *cur_mode;
0113 };
0114 
0115 #define to_ov5695(sd) container_of(sd, struct ov5695, subdev)
0116 
0117 /*
0118  * Xclk 24Mhz
0119  * Pclk 45Mhz
0120  * linelength 672(0x2a0)
0121  * framelength 2232(0x8b8)
0122  * grabwindow_width 1296
0123  * grabwindow_height 972
0124  * max_framerate 30fps
0125  * mipi_datarate per lane 840Mbps
0126  */
0127 static const struct regval ov5695_global_regs[] = {
0128     {0x0103, 0x01},
0129     {0x0100, 0x00},
0130     {0x0300, 0x04},
0131     {0x0301, 0x00},
0132     {0x0302, 0x69},
0133     {0x0303, 0x00},
0134     {0x0304, 0x00},
0135     {0x0305, 0x01},
0136     {0x0307, 0x00},
0137     {0x030b, 0x00},
0138     {0x030c, 0x00},
0139     {0x030d, 0x1e},
0140     {0x030e, 0x04},
0141     {0x030f, 0x03},
0142     {0x0312, 0x01},
0143     {0x3000, 0x00},
0144     {0x3002, 0xa1},
0145     {0x3008, 0x00},
0146     {0x3010, 0x00},
0147     {0x3022, 0x51},
0148     {0x3106, 0x15},
0149     {0x3107, 0x01},
0150     {0x3108, 0x05},
0151     {0x3500, 0x00},
0152     {0x3501, 0x45},
0153     {0x3502, 0x00},
0154     {0x3503, 0x08},
0155     {0x3504, 0x03},
0156     {0x3505, 0x8c},
0157     {0x3507, 0x03},
0158     {0x3508, 0x00},
0159     {0x3509, 0x10},
0160     {0x350c, 0x00},
0161     {0x350d, 0x80},
0162     {0x3510, 0x00},
0163     {0x3511, 0x02},
0164     {0x3512, 0x00},
0165     {0x3601, 0x55},
0166     {0x3602, 0x58},
0167     {0x3614, 0x30},
0168     {0x3615, 0x77},
0169     {0x3621, 0x08},
0170     {0x3624, 0x40},
0171     {0x3633, 0x0c},
0172     {0x3634, 0x0c},
0173     {0x3635, 0x0c},
0174     {0x3636, 0x0c},
0175     {0x3638, 0x00},
0176     {0x3639, 0x00},
0177     {0x363a, 0x00},
0178     {0x363b, 0x00},
0179     {0x363c, 0xff},
0180     {0x363d, 0xfa},
0181     {0x3650, 0x44},
0182     {0x3651, 0x44},
0183     {0x3652, 0x44},
0184     {0x3653, 0x44},
0185     {0x3654, 0x44},
0186     {0x3655, 0x44},
0187     {0x3656, 0x44},
0188     {0x3657, 0x44},
0189     {0x3660, 0x00},
0190     {0x3661, 0x00},
0191     {0x3662, 0x00},
0192     {0x366a, 0x00},
0193     {0x366e, 0x0c},
0194     {0x3673, 0x04},
0195     {0x3700, 0x14},
0196     {0x3703, 0x0c},
0197     {0x3715, 0x01},
0198     {0x3733, 0x10},
0199     {0x3734, 0x40},
0200     {0x373f, 0xa0},
0201     {0x3765, 0x20},
0202     {0x37a1, 0x1d},
0203     {0x37a8, 0x26},
0204     {0x37ab, 0x14},
0205     {0x37c2, 0x04},
0206     {0x37cb, 0x09},
0207     {0x37cc, 0x13},
0208     {0x37cd, 0x1f},
0209     {0x37ce, 0x1f},
0210     {0x3800, 0x00},
0211     {0x3801, 0x00},
0212     {0x3802, 0x00},
0213     {0x3803, 0x00},
0214     {0x3804, 0x0a},
0215     {0x3805, 0x3f},
0216     {0x3806, 0x07},
0217     {0x3807, 0xaf},
0218     {0x3808, 0x05},
0219     {0x3809, 0x10},
0220     {0x380a, 0x03},
0221     {0x380b, 0xcc},
0222     {0x380c, 0x02},
0223     {0x380d, 0xa0},
0224     {0x380e, 0x08},
0225     {0x380f, 0xb8},
0226     {0x3810, 0x00},
0227     {0x3811, 0x06},
0228     {0x3812, 0x00},
0229     {0x3813, 0x06},
0230     {0x3814, 0x03},
0231     {0x3815, 0x01},
0232     {0x3816, 0x03},
0233     {0x3817, 0x01},
0234     {0x3818, 0x00},
0235     {0x3819, 0x00},
0236     {0x381a, 0x00},
0237     {0x381b, 0x01},
0238     {0x3820, 0x8b},
0239     {0x3821, 0x01},
0240     {0x3c80, 0x08},
0241     {0x3c82, 0x00},
0242     {0x3c83, 0x00},
0243     {0x3c88, 0x00},
0244     {0x3d85, 0x14},
0245     {0x3f02, 0x08},
0246     {0x3f03, 0x10},
0247     {0x4008, 0x02},
0248     {0x4009, 0x09},
0249     {0x404e, 0x20},
0250     {0x4501, 0x00},
0251     {0x4502, 0x10},
0252     {0x4800, 0x00},
0253     {0x481f, 0x2a},
0254     {0x4837, 0x13},
0255     {0x5000, 0x17},
0256     {0x5780, 0x3e},
0257     {0x5781, 0x0f},
0258     {0x5782, 0x44},
0259     {0x5783, 0x02},
0260     {0x5784, 0x01},
0261     {0x5785, 0x01},
0262     {0x5786, 0x00},
0263     {0x5787, 0x04},
0264     {0x5788, 0x02},
0265     {0x5789, 0x0f},
0266     {0x578a, 0xfd},
0267     {0x578b, 0xf5},
0268     {0x578c, 0xf5},
0269     {0x578d, 0x03},
0270     {0x578e, 0x08},
0271     {0x578f, 0x0c},
0272     {0x5790, 0x08},
0273     {0x5791, 0x06},
0274     {0x5792, 0x00},
0275     {0x5793, 0x52},
0276     {0x5794, 0xa3},
0277     {0x5b00, 0x00},
0278     {0x5b01, 0x1c},
0279     {0x5b02, 0x00},
0280     {0x5b03, 0x7f},
0281     {0x5b05, 0x6c},
0282     {0x5e10, 0xfc},
0283     {0x4010, 0xf1},
0284     {0x3503, 0x08},
0285     {0x3505, 0x8c},
0286     {0x3507, 0x03},
0287     {0x3508, 0x00},
0288     {0x3509, 0xf8},
0289     {REG_NULL, 0x00},
0290 };
0291 
0292 /*
0293  * Xclk 24Mhz
0294  * Pclk 45Mhz
0295  * linelength 740(0x2e4)
0296  * framelength 2024(0x7e8)
0297  * grabwindow_width 2592
0298  * grabwindow_height 1944
0299  * max_framerate 30fps
0300  * mipi_datarate per lane 840Mbps
0301  */
0302 static const struct regval ov5695_2592x1944_regs[] = {
0303     {0x3501, 0x7e},
0304     {0x366e, 0x18},
0305     {0x3800, 0x00},
0306     {0x3801, 0x00},
0307     {0x3802, 0x00},
0308     {0x3803, 0x04},
0309     {0x3804, 0x0a},
0310     {0x3805, 0x3f},
0311     {0x3806, 0x07},
0312     {0x3807, 0xab},
0313     {0x3808, 0x0a},
0314     {0x3809, 0x20},
0315     {0x380a, 0x07},
0316     {0x380b, 0x98},
0317     {0x380c, 0x02},
0318     {0x380d, 0xe4},
0319     {0x380e, 0x07},
0320     {0x380f, 0xe8},
0321     {0x3811, 0x06},
0322     {0x3813, 0x08},
0323     {0x3814, 0x01},
0324     {0x3816, 0x01},
0325     {0x3817, 0x01},
0326     {0x3820, 0x88},
0327     {0x3821, 0x00},
0328     {0x4501, 0x00},
0329     {0x4008, 0x04},
0330     {0x4009, 0x13},
0331     {REG_NULL, 0x00},
0332 };
0333 
0334 /*
0335  * Xclk 24Mhz
0336  * Pclk 45Mhz
0337  * linelength 672(0x2a0)
0338  * framelength 2232(0x8b8)
0339  * grabwindow_width 1920
0340  * grabwindow_height 1080
0341  * max_framerate 30fps
0342  * mipi_datarate per lane 840Mbps
0343  */
0344 static const struct regval ov5695_1920x1080_regs[] = {
0345     {0x3501, 0x45},
0346     {0x366e, 0x18},
0347     {0x3800, 0x01},
0348     {0x3801, 0x50},
0349     {0x3802, 0x01},
0350     {0x3803, 0xb8},
0351     {0x3804, 0x08},
0352     {0x3805, 0xef},
0353     {0x3806, 0x05},
0354     {0x3807, 0xf7},
0355     {0x3808, 0x07},
0356     {0x3809, 0x80},
0357     {0x380a, 0x04},
0358     {0x380b, 0x38},
0359     {0x380c, 0x02},
0360     {0x380d, 0xa0},
0361     {0x380e, 0x08},
0362     {0x380f, 0xb8},
0363     {0x3811, 0x06},
0364     {0x3813, 0x04},
0365     {0x3814, 0x01},
0366     {0x3816, 0x01},
0367     {0x3817, 0x01},
0368     {0x3820, 0x88},
0369     {0x3821, 0x00},
0370     {0x4501, 0x00},
0371     {0x4008, 0x04},
0372     {0x4009, 0x13},
0373     {REG_NULL, 0x00}
0374 };
0375 
0376 /*
0377  * Xclk 24Mhz
0378  * Pclk 45Mhz
0379  * linelength 740(0x02e4)
0380  * framelength 1012(0x03f4)
0381  * grabwindow_width 1296
0382  * grabwindow_height 972
0383  * max_framerate 60fps
0384  * mipi_datarate per lane 840Mbps
0385  */
0386 static const struct regval ov5695_1296x972_regs[] = {
0387     {0x0103, 0x01},
0388     {0x0100, 0x00},
0389     {0x0300, 0x04},
0390     {0x0301, 0x00},
0391     {0x0302, 0x69},
0392     {0x0303, 0x00},
0393     {0x0304, 0x00},
0394     {0x0305, 0x01},
0395     {0x0307, 0x00},
0396     {0x030b, 0x00},
0397     {0x030c, 0x00},
0398     {0x030d, 0x1e},
0399     {0x030e, 0x04},
0400     {0x030f, 0x03},
0401     {0x0312, 0x01},
0402     {0x3000, 0x00},
0403     {0x3002, 0xa1},
0404     {0x3008, 0x00},
0405     {0x3010, 0x00},
0406     {0x3016, 0x32},
0407     {0x3022, 0x51},
0408     {0x3106, 0x15},
0409     {0x3107, 0x01},
0410     {0x3108, 0x05},
0411     {0x3500, 0x00},
0412     {0x3501, 0x3e},
0413     {0x3502, 0x00},
0414     {0x3503, 0x08},
0415     {0x3504, 0x03},
0416     {0x3505, 0x8c},
0417     {0x3507, 0x03},
0418     {0x3508, 0x00},
0419     {0x3509, 0x10},
0420     {0x350c, 0x00},
0421     {0x350d, 0x80},
0422     {0x3510, 0x00},
0423     {0x3511, 0x02},
0424     {0x3512, 0x00},
0425     {0x3601, 0x55},
0426     {0x3602, 0x58},
0427     {0x3611, 0x58},
0428     {0x3614, 0x30},
0429     {0x3615, 0x77},
0430     {0x3621, 0x08},
0431     {0x3624, 0x40},
0432     {0x3633, 0x0c},
0433     {0x3634, 0x0c},
0434     {0x3635, 0x0c},
0435     {0x3636, 0x0c},
0436     {0x3638, 0x00},
0437     {0x3639, 0x00},
0438     {0x363a, 0x00},
0439     {0x363b, 0x00},
0440     {0x363c, 0xff},
0441     {0x363d, 0xfa},
0442     {0x3650, 0x44},
0443     {0x3651, 0x44},
0444     {0x3652, 0x44},
0445     {0x3653, 0x44},
0446     {0x3654, 0x44},
0447     {0x3655, 0x44},
0448     {0x3656, 0x44},
0449     {0x3657, 0x44},
0450     {0x3660, 0x00},
0451     {0x3661, 0x00},
0452     {0x3662, 0x00},
0453     {0x366a, 0x00},
0454     {0x366e, 0x0c},
0455     {0x3673, 0x04},
0456     {0x3700, 0x14},
0457     {0x3703, 0x0c},
0458     {0x3706, 0x24},
0459     {0x3714, 0x27},
0460     {0x3715, 0x01},
0461     {0x3716, 0x00},
0462     {0x3717, 0x02},
0463     {0x3733, 0x10},
0464     {0x3734, 0x40},
0465     {0x373f, 0xa0},
0466     {0x3765, 0x20},
0467     {0x37a1, 0x1d},
0468     {0x37a8, 0x26},
0469     {0x37ab, 0x14},
0470     {0x37c2, 0x04},
0471     {0x37c3, 0xf0},
0472     {0x37cb, 0x09},
0473     {0x37cc, 0x13},
0474     {0x37cd, 0x1f},
0475     {0x37ce, 0x1f},
0476     {0x3800, 0x00},
0477     {0x3801, 0x00},
0478     {0x3802, 0x00},
0479     {0x3803, 0x00},
0480     {0x3804, 0x0a},
0481     {0x3805, 0x3f},
0482     {0x3806, 0x07},
0483     {0x3807, 0xaf},
0484     {0x3808, 0x05},
0485     {0x3809, 0x10},
0486     {0x380a, 0x03},
0487     {0x380b, 0xcc},
0488     {0x380c, 0x02},
0489     {0x380d, 0xe4},
0490     {0x380e, 0x03},
0491     {0x380f, 0xf4},
0492     {0x3810, 0x00},
0493     {0x3811, 0x00},
0494     {0x3812, 0x00},
0495     {0x3813, 0x06},
0496     {0x3814, 0x03},
0497     {0x3815, 0x01},
0498     {0x3816, 0x03},
0499     {0x3817, 0x01},
0500     {0x3818, 0x00},
0501     {0x3819, 0x00},
0502     {0x381a, 0x00},
0503     {0x381b, 0x01},
0504     {0x3820, 0x8b},
0505     {0x3821, 0x01},
0506     {0x3c80, 0x08},
0507     {0x3c82, 0x00},
0508     {0x3c83, 0x00},
0509     {0x3c88, 0x00},
0510     {0x3d85, 0x14},
0511     {0x3f02, 0x08},
0512     {0x3f03, 0x10},
0513     {0x4008, 0x02},
0514     {0x4009, 0x09},
0515     {0x404e, 0x20},
0516     {0x4501, 0x00},
0517     {0x4502, 0x10},
0518     {0x4800, 0x00},
0519     {0x481f, 0x2a},
0520     {0x4837, 0x13},
0521     {0x5000, 0x13},
0522     {0x5780, 0x3e},
0523     {0x5781, 0x0f},
0524     {0x5782, 0x44},
0525     {0x5783, 0x02},
0526     {0x5784, 0x01},
0527     {0x5785, 0x01},
0528     {0x5786, 0x00},
0529     {0x5787, 0x04},
0530     {0x5788, 0x02},
0531     {0x5789, 0x0f},
0532     {0x578a, 0xfd},
0533     {0x578b, 0xf5},
0534     {0x578c, 0xf5},
0535     {0x578d, 0x03},
0536     {0x578e, 0x08},
0537     {0x578f, 0x0c},
0538     {0x5790, 0x08},
0539     {0x5791, 0x06},
0540     {0x5792, 0x00},
0541     {0x5793, 0x52},
0542     {0x5794, 0xa3},
0543     {0x5b00, 0x00},
0544     {0x5b01, 0x1c},
0545     {0x5b02, 0x00},
0546     {0x5b03, 0x7f},
0547     {0x5b05, 0x6c},
0548     {0x5e10, 0xfc},
0549     {0x4010, 0xf1},
0550     {0x3503, 0x08},
0551     {0x3505, 0x8c},
0552     {0x3507, 0x03},
0553     {0x3508, 0x00},
0554     {0x3509, 0xf8},
0555     {0x0100, 0x01},
0556     {REG_NULL, 0x00}
0557 };
0558 
0559 /*
0560  * Xclk 24Mhz
0561  * Pclk 45Mhz
0562  * linelength 672(0x2a0)
0563  * framelength 2232(0x8b8)
0564  * grabwindow_width 1280
0565  * grabwindow_height 720
0566  * max_framerate 30fps
0567  * mipi_datarate per lane 840Mbps
0568  */
0569 static const struct regval ov5695_1280x720_regs[] = {
0570     {0x3501, 0x45},
0571     {0x366e, 0x0c},
0572     {0x3800, 0x00},
0573     {0x3801, 0x00},
0574     {0x3802, 0x01},
0575     {0x3803, 0x00},
0576     {0x3804, 0x0a},
0577     {0x3805, 0x3f},
0578     {0x3806, 0x06},
0579     {0x3807, 0xaf},
0580     {0x3808, 0x05},
0581     {0x3809, 0x00},
0582     {0x380a, 0x02},
0583     {0x380b, 0xd0},
0584     {0x380c, 0x02},
0585     {0x380d, 0xa0},
0586     {0x380e, 0x08},
0587     {0x380f, 0xb8},
0588     {0x3811, 0x06},
0589     {0x3813, 0x02},
0590     {0x3814, 0x03},
0591     {0x3816, 0x03},
0592     {0x3817, 0x01},
0593     {0x3820, 0x8b},
0594     {0x3821, 0x01},
0595     {0x4501, 0x00},
0596     {0x4008, 0x02},
0597     {0x4009, 0x09},
0598     {REG_NULL, 0x00}
0599 };
0600 
0601 /*
0602  * Xclk 24Mhz
0603  * Pclk 45Mhz
0604  * linelength 672(0x2a0)
0605  * framelength 558(0x22e)
0606  * grabwindow_width 640
0607  * grabwindow_height 480
0608  * max_framerate 120fps
0609  * mipi_datarate per lane 840Mbps
0610  */
0611 static const struct regval ov5695_640x480_regs[] = {
0612     {0x3501, 0x22},
0613     {0x366e, 0x0c},
0614     {0x3800, 0x00},
0615     {0x3801, 0x00},
0616     {0x3802, 0x00},
0617     {0x3803, 0x08},
0618     {0x3804, 0x0a},
0619     {0x3805, 0x3f},
0620     {0x3806, 0x07},
0621     {0x3807, 0xa7},
0622     {0x3808, 0x02},
0623     {0x3809, 0x80},
0624     {0x380a, 0x01},
0625     {0x380b, 0xe0},
0626     {0x380c, 0x02},
0627     {0x380d, 0xa0},
0628     {0x380e, 0x02},
0629     {0x380f, 0x2e},
0630     {0x3811, 0x06},
0631     {0x3813, 0x04},
0632     {0x3814, 0x07},
0633     {0x3816, 0x05},
0634     {0x3817, 0x03},
0635     {0x3820, 0x8d},
0636     {0x3821, 0x01},
0637     {0x4501, 0x00},
0638     {0x4008, 0x02},
0639     {0x4009, 0x09},
0640     {REG_NULL, 0x00}
0641 };
0642 
0643 static const struct ov5695_mode supported_modes[] = {
0644     {
0645         .width = 2592,
0646         .height = 1944,
0647         .max_fps = 30,
0648         .exp_def = 0x0450,
0649         .hts_def = 0x02e4 * 4,
0650         .vts_def = 0x07e8,
0651         .reg_list = ov5695_2592x1944_regs,
0652     },
0653     {
0654         .width = 1920,
0655         .height = 1080,
0656         .max_fps = 30,
0657         .exp_def = 0x0450,
0658         .hts_def = 0x02a0 * 4,
0659         .vts_def = 0x08b8,
0660         .reg_list = ov5695_1920x1080_regs,
0661     },
0662     {
0663         .width = 1296,
0664         .height = 972,
0665         .max_fps = 60,
0666         .exp_def = 0x03e0,
0667         .hts_def = 0x02e4 * 4,
0668         .vts_def = 0x03f4,
0669         .reg_list = ov5695_1296x972_regs,
0670     },
0671     {
0672         .width = 1280,
0673         .height = 720,
0674         .max_fps = 30,
0675         .exp_def = 0x0450,
0676         .hts_def = 0x02a0 * 4,
0677         .vts_def = 0x08b8,
0678         .reg_list = ov5695_1280x720_regs,
0679     },
0680     {
0681         .width = 640,
0682         .height = 480,
0683         .max_fps = 120,
0684         .exp_def = 0x0450,
0685         .hts_def = 0x02a0 * 4,
0686         .vts_def = 0x022e,
0687         .reg_list = ov5695_640x480_regs,
0688     },
0689 };
0690 
0691 #define OV5695_LINK_FREQ_420MHZ     420000000
0692 static const s64 link_freq_menu_items[] = {
0693     OV5695_LINK_FREQ_420MHZ
0694 };
0695 
0696 static const char * const ov5695_test_pattern_menu[] = {
0697     "Disabled",
0698     "Vertical Color Bar Type 1",
0699     "Vertical Color Bar Type 2",
0700     "Vertical Color Bar Type 3",
0701     "Vertical Color Bar Type 4"
0702 };
0703 
0704 /* Write registers up to 4 at a time */
0705 static int ov5695_write_reg(struct i2c_client *client, u16 reg,
0706                 u32 len, u32 val)
0707 {
0708     u32 buf_i, val_i;
0709     u8 buf[6];
0710     u8 *val_p;
0711     __be32 val_be;
0712 
0713     if (len > 4)
0714         return -EINVAL;
0715 
0716     buf[0] = reg >> 8;
0717     buf[1] = reg & 0xff;
0718 
0719     val_be = cpu_to_be32(val);
0720     val_p = (u8 *)&val_be;
0721     buf_i = 2;
0722     val_i = 4 - len;
0723 
0724     while (val_i < 4)
0725         buf[buf_i++] = val_p[val_i++];
0726 
0727     if (i2c_master_send(client, buf, len + 2) != len + 2)
0728         return -EIO;
0729 
0730     return 0;
0731 }
0732 
0733 static int ov5695_write_array(struct i2c_client *client,
0734                   const struct regval *regs)
0735 {
0736     u32 i;
0737     int ret = 0;
0738 
0739     for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
0740         ret = ov5695_write_reg(client, regs[i].addr,
0741                        OV5695_REG_VALUE_08BIT, regs[i].val);
0742 
0743     return ret;
0744 }
0745 
0746 /* Read registers up to 4 at a time */
0747 static int ov5695_read_reg(struct i2c_client *client, u16 reg, unsigned int len,
0748                u32 *val)
0749 {
0750     struct i2c_msg msgs[2];
0751     u8 *data_be_p;
0752     __be32 data_be = 0;
0753     __be16 reg_addr_be = cpu_to_be16(reg);
0754     int ret;
0755 
0756     if (len > 4)
0757         return -EINVAL;
0758 
0759     data_be_p = (u8 *)&data_be;
0760     /* Write register address */
0761     msgs[0].addr = client->addr;
0762     msgs[0].flags = 0;
0763     msgs[0].len = 2;
0764     msgs[0].buf = (u8 *)&reg_addr_be;
0765 
0766     /* Read data from register */
0767     msgs[1].addr = client->addr;
0768     msgs[1].flags = I2C_M_RD;
0769     msgs[1].len = len;
0770     msgs[1].buf = &data_be_p[4 - len];
0771 
0772     ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
0773     if (ret != ARRAY_SIZE(msgs))
0774         return -EIO;
0775 
0776     *val = be32_to_cpu(data_be);
0777 
0778     return 0;
0779 }
0780 
0781 static int ov5695_get_reso_dist(const struct ov5695_mode *mode,
0782                 struct v4l2_mbus_framefmt *framefmt)
0783 {
0784     return abs(mode->width - framefmt->width) +
0785            abs(mode->height - framefmt->height);
0786 }
0787 
0788 static const struct ov5695_mode *
0789 ov5695_find_best_fit(struct v4l2_subdev_format *fmt)
0790 {
0791     struct v4l2_mbus_framefmt *framefmt = &fmt->format;
0792     int dist;
0793     int cur_best_fit = 0;
0794     int cur_best_fit_dist = -1;
0795     int i;
0796 
0797     for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
0798         dist = ov5695_get_reso_dist(&supported_modes[i], framefmt);
0799         if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
0800             cur_best_fit_dist = dist;
0801             cur_best_fit = i;
0802         }
0803     }
0804 
0805     return &supported_modes[cur_best_fit];
0806 }
0807 
0808 static int ov5695_set_fmt(struct v4l2_subdev *sd,
0809               struct v4l2_subdev_state *sd_state,
0810               struct v4l2_subdev_format *fmt)
0811 {
0812     struct ov5695 *ov5695 = to_ov5695(sd);
0813     const struct ov5695_mode *mode;
0814     s64 h_blank, vblank_def;
0815 
0816     mutex_lock(&ov5695->mutex);
0817 
0818     mode = ov5695_find_best_fit(fmt);
0819     fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
0820     fmt->format.width = mode->width;
0821     fmt->format.height = mode->height;
0822     fmt->format.field = V4L2_FIELD_NONE;
0823     if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
0824 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
0825         *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
0826 #endif
0827     } else {
0828         ov5695->cur_mode = mode;
0829         h_blank = mode->hts_def - mode->width;
0830         __v4l2_ctrl_modify_range(ov5695->hblank, h_blank,
0831                      h_blank, 1, h_blank);
0832         vblank_def = mode->vts_def - mode->height;
0833         __v4l2_ctrl_modify_range(ov5695->vblank, vblank_def,
0834                      OV5695_VTS_MAX - mode->height,
0835                      1, vblank_def);
0836     }
0837 
0838     mutex_unlock(&ov5695->mutex);
0839 
0840     return 0;
0841 }
0842 
0843 static int ov5695_get_fmt(struct v4l2_subdev *sd,
0844               struct v4l2_subdev_state *sd_state,
0845               struct v4l2_subdev_format *fmt)
0846 {
0847     struct ov5695 *ov5695 = to_ov5695(sd);
0848     const struct ov5695_mode *mode = ov5695->cur_mode;
0849 
0850     mutex_lock(&ov5695->mutex);
0851     if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
0852 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
0853         fmt->format = *v4l2_subdev_get_try_format(sd, sd_state,
0854                               fmt->pad);
0855 #else
0856         mutex_unlock(&ov5695->mutex);
0857         return -EINVAL;
0858 #endif
0859     } else {
0860         fmt->format.width = mode->width;
0861         fmt->format.height = mode->height;
0862         fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
0863         fmt->format.field = V4L2_FIELD_NONE;
0864     }
0865     mutex_unlock(&ov5695->mutex);
0866 
0867     return 0;
0868 }
0869 
0870 static int ov5695_enum_mbus_code(struct v4l2_subdev *sd,
0871                  struct v4l2_subdev_state *sd_state,
0872                  struct v4l2_subdev_mbus_code_enum *code)
0873 {
0874     if (code->index != 0)
0875         return -EINVAL;
0876     code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
0877 
0878     return 0;
0879 }
0880 
0881 static int ov5695_enum_frame_sizes(struct v4l2_subdev *sd,
0882                    struct v4l2_subdev_state *sd_state,
0883                    struct v4l2_subdev_frame_size_enum *fse)
0884 {
0885     if (fse->index >= ARRAY_SIZE(supported_modes))
0886         return -EINVAL;
0887 
0888     if (fse->code != MEDIA_BUS_FMT_SBGGR10_1X10)
0889         return -EINVAL;
0890 
0891     fse->min_width  = supported_modes[fse->index].width;
0892     fse->max_width  = supported_modes[fse->index].width;
0893     fse->max_height = supported_modes[fse->index].height;
0894     fse->min_height = supported_modes[fse->index].height;
0895 
0896     return 0;
0897 }
0898 
0899 static int ov5695_enable_test_pattern(struct ov5695 *ov5695, u32 pattern)
0900 {
0901     u32 val;
0902 
0903     if (pattern)
0904         val = (pattern - 1) | OV5695_TEST_PATTERN_ENABLE;
0905     else
0906         val = OV5695_TEST_PATTERN_DISABLE;
0907 
0908     return ov5695_write_reg(ov5695->client, OV5695_REG_TEST_PATTERN,
0909                 OV5695_REG_VALUE_08BIT, val);
0910 }
0911 
0912 static int __ov5695_start_stream(struct ov5695 *ov5695)
0913 {
0914     int ret;
0915 
0916     ret = ov5695_write_array(ov5695->client, ov5695_global_regs);
0917     if (ret)
0918         return ret;
0919     ret = ov5695_write_array(ov5695->client, ov5695->cur_mode->reg_list);
0920     if (ret)
0921         return ret;
0922 
0923     /* In case these controls are set before streaming */
0924     ret = __v4l2_ctrl_handler_setup(&ov5695->ctrl_handler);
0925     if (ret)
0926         return ret;
0927 
0928     return ov5695_write_reg(ov5695->client, OV5695_REG_CTRL_MODE,
0929                 OV5695_REG_VALUE_08BIT, OV5695_MODE_STREAMING);
0930 }
0931 
0932 static int __ov5695_stop_stream(struct ov5695 *ov5695)
0933 {
0934     return ov5695_write_reg(ov5695->client, OV5695_REG_CTRL_MODE,
0935                 OV5695_REG_VALUE_08BIT, OV5695_MODE_SW_STANDBY);
0936 }
0937 
0938 static int ov5695_s_stream(struct v4l2_subdev *sd, int on)
0939 {
0940     struct ov5695 *ov5695 = to_ov5695(sd);
0941     struct i2c_client *client = ov5695->client;
0942     int ret = 0;
0943 
0944     mutex_lock(&ov5695->mutex);
0945     on = !!on;
0946     if (on == ov5695->streaming)
0947         goto unlock_and_return;
0948 
0949     if (on) {
0950         ret = pm_runtime_resume_and_get(&client->dev);
0951         if (ret < 0)
0952             goto unlock_and_return;
0953 
0954         ret = __ov5695_start_stream(ov5695);
0955         if (ret) {
0956             v4l2_err(sd, "start stream failed while write regs\n");
0957             pm_runtime_put(&client->dev);
0958             goto unlock_and_return;
0959         }
0960     } else {
0961         __ov5695_stop_stream(ov5695);
0962         pm_runtime_put(&client->dev);
0963     }
0964 
0965     ov5695->streaming = on;
0966 
0967 unlock_and_return:
0968     mutex_unlock(&ov5695->mutex);
0969 
0970     return ret;
0971 }
0972 
0973 static int __ov5695_power_on(struct ov5695 *ov5695)
0974 {
0975     int i, ret;
0976     struct device *dev = &ov5695->client->dev;
0977 
0978     ret = clk_prepare_enable(ov5695->xvclk);
0979     if (ret < 0) {
0980         dev_err(dev, "Failed to enable xvclk\n");
0981         return ret;
0982     }
0983 
0984     gpiod_set_value_cansleep(ov5695->reset_gpio, 1);
0985 
0986     /*
0987      * The hardware requires the regulators to be powered on in order,
0988      * so enable them one by one.
0989      */
0990     for (i = 0; i < OV5695_NUM_SUPPLIES; i++) {
0991         ret = regulator_enable(ov5695->supplies[i].consumer);
0992         if (ret) {
0993             dev_err(dev, "Failed to enable %s: %d\n",
0994                 ov5695->supplies[i].supply, ret);
0995             goto disable_reg_clk;
0996         }
0997     }
0998 
0999     gpiod_set_value_cansleep(ov5695->reset_gpio, 0);
1000 
1001     usleep_range(1000, 1200);
1002 
1003     return 0;
1004 
1005 disable_reg_clk:
1006     for (--i; i >= 0; i--)
1007         regulator_disable(ov5695->supplies[i].consumer);
1008     clk_disable_unprepare(ov5695->xvclk);
1009 
1010     return ret;
1011 }
1012 
1013 static void __ov5695_power_off(struct ov5695 *ov5695)
1014 {
1015     struct device *dev = &ov5695->client->dev;
1016     int i, ret;
1017 
1018     clk_disable_unprepare(ov5695->xvclk);
1019     gpiod_set_value_cansleep(ov5695->reset_gpio, 1);
1020 
1021     /*
1022      * The hardware requires the regulators to be powered off in order,
1023      * so disable them one by one.
1024      */
1025     for (i = OV5695_NUM_SUPPLIES - 1; i >= 0; i--) {
1026         ret = regulator_disable(ov5695->supplies[i].consumer);
1027         if (ret)
1028             dev_err(dev, "Failed to disable %s: %d\n",
1029                 ov5695->supplies[i].supply, ret);
1030     }
1031 }
1032 
1033 static int __maybe_unused ov5695_runtime_resume(struct device *dev)
1034 {
1035     struct v4l2_subdev *sd = dev_get_drvdata(dev);
1036     struct ov5695 *ov5695 = to_ov5695(sd);
1037 
1038     return __ov5695_power_on(ov5695);
1039 }
1040 
1041 static int __maybe_unused ov5695_runtime_suspend(struct device *dev)
1042 {
1043     struct v4l2_subdev *sd = dev_get_drvdata(dev);
1044     struct ov5695 *ov5695 = to_ov5695(sd);
1045 
1046     __ov5695_power_off(ov5695);
1047 
1048     return 0;
1049 }
1050 
1051 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1052 static int ov5695_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1053 {
1054     struct ov5695 *ov5695 = to_ov5695(sd);
1055     struct v4l2_mbus_framefmt *try_fmt =
1056                 v4l2_subdev_get_try_format(sd, fh->state, 0);
1057     const struct ov5695_mode *def_mode = &supported_modes[0];
1058 
1059     mutex_lock(&ov5695->mutex);
1060     /* Initialize try_fmt */
1061     try_fmt->width = def_mode->width;
1062     try_fmt->height = def_mode->height;
1063     try_fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
1064     try_fmt->field = V4L2_FIELD_NONE;
1065 
1066     mutex_unlock(&ov5695->mutex);
1067     /* No crop or compose */
1068 
1069     return 0;
1070 }
1071 #endif
1072 
1073 static const struct dev_pm_ops ov5695_pm_ops = {
1074     SET_RUNTIME_PM_OPS(ov5695_runtime_suspend,
1075                ov5695_runtime_resume, NULL)
1076 };
1077 
1078 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1079 static const struct v4l2_subdev_internal_ops ov5695_internal_ops = {
1080     .open = ov5695_open,
1081 };
1082 #endif
1083 
1084 static const struct v4l2_subdev_video_ops ov5695_video_ops = {
1085     .s_stream = ov5695_s_stream,
1086 };
1087 
1088 static const struct v4l2_subdev_pad_ops ov5695_pad_ops = {
1089     .enum_mbus_code = ov5695_enum_mbus_code,
1090     .enum_frame_size = ov5695_enum_frame_sizes,
1091     .get_fmt = ov5695_get_fmt,
1092     .set_fmt = ov5695_set_fmt,
1093 };
1094 
1095 static const struct v4l2_subdev_ops ov5695_subdev_ops = {
1096     .video  = &ov5695_video_ops,
1097     .pad    = &ov5695_pad_ops,
1098 };
1099 
1100 static int ov5695_set_ctrl(struct v4l2_ctrl *ctrl)
1101 {
1102     struct ov5695 *ov5695 = container_of(ctrl->handler,
1103                          struct ov5695, ctrl_handler);
1104     struct i2c_client *client = ov5695->client;
1105     s64 max;
1106     int ret = 0;
1107 
1108     /* Propagate change of current control to all related controls */
1109     switch (ctrl->id) {
1110     case V4L2_CID_VBLANK:
1111         /* Update max exposure while meeting expected vblanking */
1112         max = ov5695->cur_mode->height + ctrl->val - 4;
1113         __v4l2_ctrl_modify_range(ov5695->exposure,
1114                      ov5695->exposure->minimum, max,
1115                      ov5695->exposure->step,
1116                      ov5695->exposure->default_value);
1117         break;
1118     }
1119 
1120     if (!pm_runtime_get_if_in_use(&client->dev))
1121         return 0;
1122 
1123     switch (ctrl->id) {
1124     case V4L2_CID_EXPOSURE:
1125         /* 4 least significant bits of exposure are fractional part */
1126         ret = ov5695_write_reg(ov5695->client, OV5695_REG_EXPOSURE,
1127                        OV5695_REG_VALUE_24BIT, ctrl->val << 4);
1128         break;
1129     case V4L2_CID_ANALOGUE_GAIN:
1130         ret = ov5695_write_reg(ov5695->client, OV5695_REG_ANALOG_GAIN,
1131                        OV5695_REG_VALUE_08BIT, ctrl->val);
1132         break;
1133     case V4L2_CID_DIGITAL_GAIN:
1134         ret = ov5695_write_reg(ov5695->client, OV5695_REG_DIGI_GAIN_L,
1135                        OV5695_REG_VALUE_08BIT,
1136                        ctrl->val & OV5695_DIGI_GAIN_L_MASK);
1137         ret = ov5695_write_reg(ov5695->client, OV5695_REG_DIGI_GAIN_H,
1138                        OV5695_REG_VALUE_08BIT,
1139                        ctrl->val >> OV5695_DIGI_GAIN_H_SHIFT);
1140         break;
1141     case V4L2_CID_VBLANK:
1142         ret = ov5695_write_reg(ov5695->client, OV5695_REG_VTS,
1143                        OV5695_REG_VALUE_16BIT,
1144                        ctrl->val + ov5695->cur_mode->height);
1145         break;
1146     case V4L2_CID_TEST_PATTERN:
1147         ret = ov5695_enable_test_pattern(ov5695, ctrl->val);
1148         break;
1149     default:
1150         dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
1151              __func__, ctrl->id, ctrl->val);
1152         break;
1153     }
1154 
1155     pm_runtime_put(&client->dev);
1156 
1157     return ret;
1158 }
1159 
1160 static const struct v4l2_ctrl_ops ov5695_ctrl_ops = {
1161     .s_ctrl = ov5695_set_ctrl,
1162 };
1163 
1164 static int ov5695_initialize_controls(struct ov5695 *ov5695)
1165 {
1166     const struct ov5695_mode *mode;
1167     struct v4l2_ctrl_handler *handler;
1168     struct v4l2_ctrl *ctrl;
1169     s64 exposure_max, vblank_def;
1170     u32 h_blank;
1171     int ret;
1172 
1173     handler = &ov5695->ctrl_handler;
1174     mode = ov5695->cur_mode;
1175     ret = v4l2_ctrl_handler_init(handler, 8);
1176     if (ret)
1177         return ret;
1178     handler->lock = &ov5695->mutex;
1179 
1180     ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
1181                       0, 0, link_freq_menu_items);
1182     if (ctrl)
1183         ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1184 
1185     v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
1186               0, OV5695_PIXEL_RATE, 1, OV5695_PIXEL_RATE);
1187 
1188     h_blank = mode->hts_def - mode->width;
1189     ov5695->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
1190                 h_blank, h_blank, 1, h_blank);
1191     if (ov5695->hblank)
1192         ov5695->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1193 
1194     vblank_def = mode->vts_def - mode->height;
1195     ov5695->vblank = v4l2_ctrl_new_std(handler, &ov5695_ctrl_ops,
1196                 V4L2_CID_VBLANK, vblank_def,
1197                 OV5695_VTS_MAX - mode->height,
1198                 1, vblank_def);
1199 
1200     exposure_max = mode->vts_def - 4;
1201     ov5695->exposure = v4l2_ctrl_new_std(handler, &ov5695_ctrl_ops,
1202                 V4L2_CID_EXPOSURE, OV5695_EXPOSURE_MIN,
1203                 exposure_max, OV5695_EXPOSURE_STEP,
1204                 mode->exp_def);
1205 
1206     ov5695->anal_gain = v4l2_ctrl_new_std(handler, &ov5695_ctrl_ops,
1207                 V4L2_CID_ANALOGUE_GAIN, ANALOG_GAIN_MIN,
1208                 ANALOG_GAIN_MAX, ANALOG_GAIN_STEP,
1209                 ANALOG_GAIN_DEFAULT);
1210 
1211     /* Digital gain */
1212     ov5695->digi_gain = v4l2_ctrl_new_std(handler, &ov5695_ctrl_ops,
1213                 V4L2_CID_DIGITAL_GAIN, OV5695_DIGI_GAIN_MIN,
1214                 OV5695_DIGI_GAIN_MAX, OV5695_DIGI_GAIN_STEP,
1215                 OV5695_DIGI_GAIN_DEFAULT);
1216 
1217     ov5695->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
1218                 &ov5695_ctrl_ops, V4L2_CID_TEST_PATTERN,
1219                 ARRAY_SIZE(ov5695_test_pattern_menu) - 1,
1220                 0, 0, ov5695_test_pattern_menu);
1221 
1222     if (handler->error) {
1223         ret = handler->error;
1224         dev_err(&ov5695->client->dev,
1225             "Failed to init controls(%d)\n", ret);
1226         goto err_free_handler;
1227     }
1228 
1229     ov5695->subdev.ctrl_handler = handler;
1230 
1231     return 0;
1232 
1233 err_free_handler:
1234     v4l2_ctrl_handler_free(handler);
1235 
1236     return ret;
1237 }
1238 
1239 static int ov5695_check_sensor_id(struct ov5695 *ov5695,
1240                   struct i2c_client *client)
1241 {
1242     struct device *dev = &ov5695->client->dev;
1243     u32 id = 0;
1244     int ret;
1245 
1246     ret = ov5695_read_reg(client, OV5695_REG_CHIP_ID,
1247                   OV5695_REG_VALUE_24BIT, &id);
1248     if (id != CHIP_ID) {
1249         dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
1250         return ret;
1251     }
1252 
1253     dev_info(dev, "Detected OV%06x sensor\n", CHIP_ID);
1254 
1255     return 0;
1256 }
1257 
1258 static int ov5695_configure_regulators(struct ov5695 *ov5695)
1259 {
1260     int i;
1261 
1262     for (i = 0; i < OV5695_NUM_SUPPLIES; i++)
1263         ov5695->supplies[i].supply = ov5695_supply_names[i];
1264 
1265     return devm_regulator_bulk_get(&ov5695->client->dev,
1266                        OV5695_NUM_SUPPLIES,
1267                        ov5695->supplies);
1268 }
1269 
1270 static int ov5695_probe(struct i2c_client *client,
1271             const struct i2c_device_id *id)
1272 {
1273     struct device *dev = &client->dev;
1274     struct ov5695 *ov5695;
1275     struct v4l2_subdev *sd;
1276     int ret;
1277 
1278     ov5695 = devm_kzalloc(dev, sizeof(*ov5695), GFP_KERNEL);
1279     if (!ov5695)
1280         return -ENOMEM;
1281 
1282     ov5695->client = client;
1283     ov5695->cur_mode = &supported_modes[0];
1284 
1285     ov5695->xvclk = devm_clk_get(dev, "xvclk");
1286     if (IS_ERR(ov5695->xvclk)) {
1287         dev_err(dev, "Failed to get xvclk\n");
1288         return -EINVAL;
1289     }
1290     ret = clk_set_rate(ov5695->xvclk, OV5695_XVCLK_FREQ);
1291     if (ret < 0) {
1292         dev_err(dev, "Failed to set xvclk rate (24MHz)\n");
1293         return ret;
1294     }
1295     if (clk_get_rate(ov5695->xvclk) != OV5695_XVCLK_FREQ)
1296         dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
1297 
1298     ov5695->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
1299     if (IS_ERR(ov5695->reset_gpio)) {
1300         dev_err(dev, "Failed to get reset-gpios\n");
1301         return -EINVAL;
1302     }
1303 
1304     ret = ov5695_configure_regulators(ov5695);
1305     if (ret) {
1306         dev_err(dev, "Failed to get power regulators\n");
1307         return ret;
1308     }
1309 
1310     mutex_init(&ov5695->mutex);
1311 
1312     sd = &ov5695->subdev;
1313     v4l2_i2c_subdev_init(sd, client, &ov5695_subdev_ops);
1314     ret = ov5695_initialize_controls(ov5695);
1315     if (ret)
1316         goto err_destroy_mutex;
1317 
1318     ret = __ov5695_power_on(ov5695);
1319     if (ret)
1320         goto err_free_handler;
1321 
1322     ret = ov5695_check_sensor_id(ov5695, client);
1323     if (ret)
1324         goto err_power_off;
1325 
1326 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1327     sd->internal_ops = &ov5695_internal_ops;
1328     sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1329 #endif
1330 #if defined(CONFIG_MEDIA_CONTROLLER)
1331     ov5695->pad.flags = MEDIA_PAD_FL_SOURCE;
1332     sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1333     ret = media_entity_pads_init(&sd->entity, 1, &ov5695->pad);
1334     if (ret < 0)
1335         goto err_power_off;
1336 #endif
1337 
1338     ret = v4l2_async_register_subdev_sensor(sd);
1339     if (ret) {
1340         dev_err(dev, "v4l2 async register subdev failed\n");
1341         goto err_clean_entity;
1342     }
1343 
1344     pm_runtime_set_active(dev);
1345     pm_runtime_enable(dev);
1346     pm_runtime_idle(dev);
1347 
1348     return 0;
1349 
1350 err_clean_entity:
1351 #if defined(CONFIG_MEDIA_CONTROLLER)
1352     media_entity_cleanup(&sd->entity);
1353 #endif
1354 err_power_off:
1355     __ov5695_power_off(ov5695);
1356 err_free_handler:
1357     v4l2_ctrl_handler_free(&ov5695->ctrl_handler);
1358 err_destroy_mutex:
1359     mutex_destroy(&ov5695->mutex);
1360 
1361     return ret;
1362 }
1363 
1364 static int ov5695_remove(struct i2c_client *client)
1365 {
1366     struct v4l2_subdev *sd = i2c_get_clientdata(client);
1367     struct ov5695 *ov5695 = to_ov5695(sd);
1368 
1369     v4l2_async_unregister_subdev(sd);
1370 #if defined(CONFIG_MEDIA_CONTROLLER)
1371     media_entity_cleanup(&sd->entity);
1372 #endif
1373     v4l2_ctrl_handler_free(&ov5695->ctrl_handler);
1374     mutex_destroy(&ov5695->mutex);
1375 
1376     pm_runtime_disable(&client->dev);
1377     if (!pm_runtime_status_suspended(&client->dev))
1378         __ov5695_power_off(ov5695);
1379     pm_runtime_set_suspended(&client->dev);
1380 
1381     return 0;
1382 }
1383 
1384 #if IS_ENABLED(CONFIG_OF)
1385 static const struct of_device_id ov5695_of_match[] = {
1386     { .compatible = "ovti,ov5695" },
1387     {},
1388 };
1389 MODULE_DEVICE_TABLE(of, ov5695_of_match);
1390 #endif
1391 
1392 static struct i2c_driver ov5695_i2c_driver = {
1393     .driver = {
1394         .name = "ov5695",
1395         .pm = &ov5695_pm_ops,
1396         .of_match_table = of_match_ptr(ov5695_of_match),
1397     },
1398     .probe      = &ov5695_probe,
1399     .remove     = &ov5695_remove,
1400 };
1401 
1402 module_i2c_driver(ov5695_i2c_driver);
1403 
1404 MODULE_DESCRIPTION("OmniVision ov5695 sensor driver");
1405 MODULE_LICENSE("GPL v2");
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