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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (c) 2013 Intel Corporation. All Rights Reserved.
0004  *
0005  * Adapted from the atomisp-ov5693 driver, with contributions from:
0006  *
0007  * Daniel Scally
0008  * Jean-Michel Hautbois
0009  * Fabian Wuthrich
0010  * Tsuchiya Yuto
0011  * Jordan Hand
0012  * Jake Day
0013  */
0014 
0015 #include <asm/unaligned.h>
0016 #include <linux/acpi.h>
0017 #include <linux/clk.h>
0018 #include <linux/delay.h>
0019 #include <linux/device.h>
0020 #include <linux/i2c.h>
0021 #include <linux/module.h>
0022 #include <linux/pm_runtime.h>
0023 #include <linux/regulator/consumer.h>
0024 #include <linux/slab.h>
0025 #include <linux/types.h>
0026 #include <media/v4l2-ctrls.h>
0027 #include <media/v4l2-device.h>
0028 #include <media/v4l2-fwnode.h>
0029 
0030 #define OV5693_REG_8BIT(n)          ((1 << 16) | (n))
0031 #define OV5693_REG_16BIT(n)         ((2 << 16) | (n))
0032 #define OV5693_REG_24BIT(n)         ((3 << 16) | (n))
0033 #define OV5693_REG_SIZE_SHIFT           16
0034 #define OV5693_REG_ADDR_MASK            0xffff
0035 
0036 /* System Control */
0037 #define OV5693_SW_RESET_REG         OV5693_REG_8BIT(0x0103)
0038 #define OV5693_SW_STREAM_REG            OV5693_REG_8BIT(0x0100)
0039 #define OV5693_START_STREAMING          0x01
0040 #define OV5693_STOP_STREAMING           0x00
0041 #define OV5693_SW_RESET             0x01
0042 
0043 #define OV5693_REG_CHIP_ID          OV5693_REG_16BIT(0x300a)
0044 /* Yes, this is right. The datasheet for the OV5693 gives its ID as 0x5690 */
0045 #define OV5693_CHIP_ID              0x5690
0046 
0047 /* Exposure */
0048 #define OV5693_EXPOSURE_CTRL_REG        OV5693_REG_24BIT(0x3500)
0049 #define OV5693_EXPOSURE_CTRL_MASK       GENMASK(19, 4)
0050 #define OV5693_INTEGRATION_TIME_MARGIN      8
0051 #define OV5693_EXPOSURE_MIN         1
0052 #define OV5693_EXPOSURE_STEP            1
0053 
0054 /* Analogue Gain */
0055 #define OV5693_GAIN_CTRL_REG            OV5693_REG_16BIT(0x350a)
0056 #define OV5693_GAIN_CTRL_MASK           GENMASK(10, 4)
0057 #define OV5693_GAIN_MIN             1
0058 #define OV5693_GAIN_MAX             127
0059 #define OV5693_GAIN_DEF             8
0060 #define OV5693_GAIN_STEP            1
0061 
0062 /* Digital Gain */
0063 #define OV5693_MWB_RED_GAIN_REG         OV5693_REG_16BIT(0x3400)
0064 #define OV5693_MWB_GREEN_GAIN_REG       OV5693_REG_16BIT(0x3402)
0065 #define OV5693_MWB_BLUE_GAIN_REG        OV5693_REG_16BIT(0x3404)
0066 #define OV5693_MWB_GAIN_MASK            GENMASK(11, 0)
0067 #define OV5693_MWB_GAIN_MAX         0x0fff
0068 #define OV5693_DIGITAL_GAIN_MIN         1
0069 #define OV5693_DIGITAL_GAIN_MAX         4095
0070 #define OV5693_DIGITAL_GAIN_DEF         1024
0071 #define OV5693_DIGITAL_GAIN_STEP        1
0072 
0073 /* Timing and Format */
0074 #define OV5693_CROP_START_X_REG         OV5693_REG_16BIT(0x3800)
0075 #define OV5693_CROP_START_Y_REG         OV5693_REG_16BIT(0x3802)
0076 #define OV5693_CROP_END_X_REG           OV5693_REG_16BIT(0x3804)
0077 #define OV5693_CROP_END_Y_REG           OV5693_REG_16BIT(0x3806)
0078 #define OV5693_OUTPUT_SIZE_X_REG        OV5693_REG_16BIT(0x3808)
0079 #define OV5693_OUTPUT_SIZE_Y_REG        OV5693_REG_16BIT(0x380a)
0080 
0081 #define OV5693_TIMING_HTS_REG           OV5693_REG_16BIT(0x380c)
0082 #define OV5693_FIXED_PPL            2688U
0083 #define OV5693_TIMING_VTS_REG           OV5693_REG_16BIT(0x380e)
0084 #define OV5693_TIMING_MAX_VTS           0xffff
0085 #define OV5693_TIMING_MIN_VTS           0x04
0086 
0087 #define OV5693_OFFSET_START_X_REG       OV5693_REG_16BIT(0x3810)
0088 #define OV5693_OFFSET_START_Y_REG       OV5693_REG_16BIT(0x3812)
0089 
0090 #define OV5693_SUB_INC_X_REG            OV5693_REG_8BIT(0x3814)
0091 #define OV5693_SUB_INC_Y_REG            OV5693_REG_8BIT(0x3815)
0092 
0093 #define OV5693_FORMAT1_REG          OV5693_REG_8BIT(0x3820)
0094 #define OV5693_FORMAT1_FLIP_VERT_ISP_EN     BIT(6)
0095 #define OV5693_FORMAT1_FLIP_VERT_SENSOR_EN  BIT(1)
0096 #define OV5693_FORMAT1_VBIN_EN          BIT(0)
0097 #define OV5693_FORMAT2_REG          OV5693_REG_8BIT(0x3821)
0098 #define OV5693_FORMAT2_HDR_EN           BIT(7)
0099 #define OV5693_FORMAT2_FLIP_HORZ_ISP_EN     BIT(2)
0100 #define OV5693_FORMAT2_FLIP_HORZ_SENSOR_EN  BIT(1)
0101 #define OV5693_FORMAT2_HBIN_EN          BIT(0)
0102 
0103 #define OV5693_ISP_CTRL2_REG            OV5693_REG_8BIT(0x5002)
0104 #define OV5693_ISP_SCALE_ENABLE         BIT(7)
0105 
0106 /* Pixel Array */
0107 #define OV5693_NATIVE_WIDTH         2624
0108 #define OV5693_NATIVE_HEIGHT            1956
0109 #define OV5693_NATIVE_START_LEFT        0
0110 #define OV5693_NATIVE_START_TOP         0
0111 #define OV5693_ACTIVE_WIDTH         2592
0112 #define OV5693_ACTIVE_HEIGHT            1944
0113 #define OV5693_ACTIVE_START_LEFT        16
0114 #define OV5693_ACTIVE_START_TOP         6
0115 #define OV5693_MIN_CROP_WIDTH           2
0116 #define OV5693_MIN_CROP_HEIGHT          2
0117 
0118 /* Test Pattern */
0119 #define OV5693_TEST_PATTERN_REG         OV5693_REG_8BIT(0x5e00)
0120 #define OV5693_TEST_PATTERN_ENABLE      BIT(7)
0121 #define OV5693_TEST_PATTERN_ROLLING     BIT(6)
0122 #define OV5693_TEST_PATTERN_RANDOM      0x01
0123 #define OV5693_TEST_PATTERN_BARS        0x00
0124 
0125 /* System Frequencies */
0126 #define OV5693_XVCLK_FREQ           19200000
0127 #define OV5693_LINK_FREQ_419_2MHZ       419200000
0128 #define OV5693_PIXEL_RATE           167680000
0129 
0130 #define to_ov5693_sensor(x) container_of(x, struct ov5693_device, sd)
0131 
0132 static const char * const ov5693_supply_names[] = {
0133     "avdd",     /* Analog power */
0134     "dovdd",    /* Digital I/O power */
0135     "dvdd",     /* Digital circuit power */
0136 };
0137 
0138 #define OV5693_NUM_SUPPLIES ARRAY_SIZE(ov5693_supply_names)
0139 
0140 struct ov5693_reg {
0141     u32 reg;
0142     u8 val;
0143 };
0144 
0145 struct ov5693_reg_list {
0146     u32 num_regs;
0147     const struct ov5693_reg *regs;
0148 };
0149 
0150 struct ov5693_device {
0151     struct i2c_client *client;
0152     struct device *dev;
0153 
0154     /* Protect against concurrent changes to controls */
0155     struct mutex lock;
0156 
0157     struct gpio_desc *reset;
0158     struct gpio_desc *powerdown;
0159     struct regulator_bulk_data supplies[OV5693_NUM_SUPPLIES];
0160     struct clk *xvclk;
0161 
0162     struct ov5693_mode {
0163         struct v4l2_rect crop;
0164         struct v4l2_mbus_framefmt format;
0165         bool binning_x;
0166         bool binning_y;
0167         unsigned int inc_x_odd;
0168         unsigned int inc_y_odd;
0169         unsigned int vts;
0170     } mode;
0171     bool streaming;
0172 
0173     struct v4l2_subdev sd;
0174     struct media_pad pad;
0175 
0176     struct ov5693_v4l2_ctrls {
0177         struct v4l2_ctrl_handler handler;
0178         struct v4l2_ctrl *link_freq;
0179         struct v4l2_ctrl *pixel_rate;
0180         struct v4l2_ctrl *exposure;
0181         struct v4l2_ctrl *analogue_gain;
0182         struct v4l2_ctrl *digital_gain;
0183         struct v4l2_ctrl *hflip;
0184         struct v4l2_ctrl *vflip;
0185         struct v4l2_ctrl *hblank;
0186         struct v4l2_ctrl *vblank;
0187         struct v4l2_ctrl *test_pattern;
0188     } ctrls;
0189 };
0190 
0191 static const struct ov5693_reg ov5693_global_regs[] = {
0192     {OV5693_REG_8BIT(0x3016), 0xf0},
0193     {OV5693_REG_8BIT(0x3017), 0xf0},
0194     {OV5693_REG_8BIT(0x3018), 0xf0},
0195     {OV5693_REG_8BIT(0x3022), 0x01},
0196     {OV5693_REG_8BIT(0x3028), 0x44},
0197     {OV5693_REG_8BIT(0x3098), 0x02},
0198     {OV5693_REG_8BIT(0x3099), 0x19},
0199     {OV5693_REG_8BIT(0x309a), 0x02},
0200     {OV5693_REG_8BIT(0x309b), 0x01},
0201     {OV5693_REG_8BIT(0x309c), 0x00},
0202     {OV5693_REG_8BIT(0x30a0), 0xd2},
0203     {OV5693_REG_8BIT(0x30a2), 0x01},
0204     {OV5693_REG_8BIT(0x30b2), 0x00},
0205     {OV5693_REG_8BIT(0x30b3), 0x83},
0206     {OV5693_REG_8BIT(0x30b4), 0x03},
0207     {OV5693_REG_8BIT(0x30b5), 0x04},
0208     {OV5693_REG_8BIT(0x30b6), 0x01},
0209     {OV5693_REG_8BIT(0x3080), 0x01},
0210     {OV5693_REG_8BIT(0x3104), 0x21},
0211     {OV5693_REG_8BIT(0x3106), 0x00},
0212     {OV5693_REG_8BIT(0x3406), 0x01},
0213     {OV5693_REG_8BIT(0x3503), 0x07},
0214     {OV5693_REG_8BIT(0x350b), 0x40},
0215     {OV5693_REG_8BIT(0x3601), 0x0a},
0216     {OV5693_REG_8BIT(0x3602), 0x38},
0217     {OV5693_REG_8BIT(0x3612), 0x80},
0218     {OV5693_REG_8BIT(0x3620), 0x54},
0219     {OV5693_REG_8BIT(0x3621), 0xc7},
0220     {OV5693_REG_8BIT(0x3622), 0x0f},
0221     {OV5693_REG_8BIT(0x3625), 0x10},
0222     {OV5693_REG_8BIT(0x3630), 0x55},
0223     {OV5693_REG_8BIT(0x3631), 0xf4},
0224     {OV5693_REG_8BIT(0x3632), 0x00},
0225     {OV5693_REG_8BIT(0x3633), 0x34},
0226     {OV5693_REG_8BIT(0x3634), 0x02},
0227     {OV5693_REG_8BIT(0x364d), 0x0d},
0228     {OV5693_REG_8BIT(0x364f), 0xdd},
0229     {OV5693_REG_8BIT(0x3660), 0x04},
0230     {OV5693_REG_8BIT(0x3662), 0x10},
0231     {OV5693_REG_8BIT(0x3663), 0xf1},
0232     {OV5693_REG_8BIT(0x3665), 0x00},
0233     {OV5693_REG_8BIT(0x3666), 0x20},
0234     {OV5693_REG_8BIT(0x3667), 0x00},
0235     {OV5693_REG_8BIT(0x366a), 0x80},
0236     {OV5693_REG_8BIT(0x3680), 0xe0},
0237     {OV5693_REG_8BIT(0x3681), 0x00},
0238     {OV5693_REG_8BIT(0x3700), 0x42},
0239     {OV5693_REG_8BIT(0x3701), 0x14},
0240     {OV5693_REG_8BIT(0x3702), 0xa0},
0241     {OV5693_REG_8BIT(0x3703), 0xd8},
0242     {OV5693_REG_8BIT(0x3704), 0x78},
0243     {OV5693_REG_8BIT(0x3705), 0x02},
0244     {OV5693_REG_8BIT(0x370a), 0x00},
0245     {OV5693_REG_8BIT(0x370b), 0x20},
0246     {OV5693_REG_8BIT(0x370c), 0x0c},
0247     {OV5693_REG_8BIT(0x370d), 0x11},
0248     {OV5693_REG_8BIT(0x370e), 0x00},
0249     {OV5693_REG_8BIT(0x370f), 0x40},
0250     {OV5693_REG_8BIT(0x3710), 0x00},
0251     {OV5693_REG_8BIT(0x371a), 0x1c},
0252     {OV5693_REG_8BIT(0x371b), 0x05},
0253     {OV5693_REG_8BIT(0x371c), 0x01},
0254     {OV5693_REG_8BIT(0x371e), 0xa1},
0255     {OV5693_REG_8BIT(0x371f), 0x0c},
0256     {OV5693_REG_8BIT(0x3721), 0x00},
0257     {OV5693_REG_8BIT(0x3724), 0x10},
0258     {OV5693_REG_8BIT(0x3726), 0x00},
0259     {OV5693_REG_8BIT(0x372a), 0x01},
0260     {OV5693_REG_8BIT(0x3730), 0x10},
0261     {OV5693_REG_8BIT(0x3738), 0x22},
0262     {OV5693_REG_8BIT(0x3739), 0xe5},
0263     {OV5693_REG_8BIT(0x373a), 0x50},
0264     {OV5693_REG_8BIT(0x373b), 0x02},
0265     {OV5693_REG_8BIT(0x373c), 0x41},
0266     {OV5693_REG_8BIT(0x373f), 0x02},
0267     {OV5693_REG_8BIT(0x3740), 0x42},
0268     {OV5693_REG_8BIT(0x3741), 0x02},
0269     {OV5693_REG_8BIT(0x3742), 0x18},
0270     {OV5693_REG_8BIT(0x3743), 0x01},
0271     {OV5693_REG_8BIT(0x3744), 0x02},
0272     {OV5693_REG_8BIT(0x3747), 0x10},
0273     {OV5693_REG_8BIT(0x374c), 0x04},
0274     {OV5693_REG_8BIT(0x3751), 0xf0},
0275     {OV5693_REG_8BIT(0x3752), 0x00},
0276     {OV5693_REG_8BIT(0x3753), 0x00},
0277     {OV5693_REG_8BIT(0x3754), 0xc0},
0278     {OV5693_REG_8BIT(0x3755), 0x00},
0279     {OV5693_REG_8BIT(0x3756), 0x1a},
0280     {OV5693_REG_8BIT(0x3758), 0x00},
0281     {OV5693_REG_8BIT(0x3759), 0x0f},
0282     {OV5693_REG_8BIT(0x376b), 0x44},
0283     {OV5693_REG_8BIT(0x375c), 0x04},
0284     {OV5693_REG_8BIT(0x3774), 0x10},
0285     {OV5693_REG_8BIT(0x3776), 0x00},
0286     {OV5693_REG_8BIT(0x377f), 0x08},
0287     {OV5693_REG_8BIT(0x3780), 0x22},
0288     {OV5693_REG_8BIT(0x3781), 0x0c},
0289     {OV5693_REG_8BIT(0x3784), 0x2c},
0290     {OV5693_REG_8BIT(0x3785), 0x1e},
0291     {OV5693_REG_8BIT(0x378f), 0xf5},
0292     {OV5693_REG_8BIT(0x3791), 0xb0},
0293     {OV5693_REG_8BIT(0x3795), 0x00},
0294     {OV5693_REG_8BIT(0x3796), 0x64},
0295     {OV5693_REG_8BIT(0x3797), 0x11},
0296     {OV5693_REG_8BIT(0x3798), 0x30},
0297     {OV5693_REG_8BIT(0x3799), 0x41},
0298     {OV5693_REG_8BIT(0x379a), 0x07},
0299     {OV5693_REG_8BIT(0x379b), 0xb0},
0300     {OV5693_REG_8BIT(0x379c), 0x0c},
0301     {OV5693_REG_8BIT(0x3a04), 0x06},
0302     {OV5693_REG_8BIT(0x3a05), 0x14},
0303     {OV5693_REG_8BIT(0x3e07), 0x20},
0304     {OV5693_REG_8BIT(0x4000), 0x08},
0305     {OV5693_REG_8BIT(0x4001), 0x04},
0306     {OV5693_REG_8BIT(0x4004), 0x08},
0307     {OV5693_REG_8BIT(0x4006), 0x20},
0308     {OV5693_REG_8BIT(0x4008), 0x24},
0309     {OV5693_REG_8BIT(0x4009), 0x10},
0310     {OV5693_REG_8BIT(0x4058), 0x00},
0311     {OV5693_REG_8BIT(0x4101), 0xb2},
0312     {OV5693_REG_8BIT(0x4307), 0x31},
0313     {OV5693_REG_8BIT(0x4511), 0x05},
0314     {OV5693_REG_8BIT(0x4512), 0x01},
0315     {OV5693_REG_8BIT(0x481f), 0x30},
0316     {OV5693_REG_8BIT(0x4826), 0x2c},
0317     {OV5693_REG_8BIT(0x4d02), 0xfd},
0318     {OV5693_REG_8BIT(0x4d03), 0xf5},
0319     {OV5693_REG_8BIT(0x4d04), 0x0c},
0320     {OV5693_REG_8BIT(0x4d05), 0xcc},
0321     {OV5693_REG_8BIT(0x4837), 0x0a},
0322     {OV5693_REG_8BIT(0x5003), 0x20},
0323     {OV5693_REG_8BIT(0x5013), 0x00},
0324     {OV5693_REG_8BIT(0x5842), 0x01},
0325     {OV5693_REG_8BIT(0x5843), 0x2b},
0326     {OV5693_REG_8BIT(0x5844), 0x01},
0327     {OV5693_REG_8BIT(0x5845), 0x92},
0328     {OV5693_REG_8BIT(0x5846), 0x01},
0329     {OV5693_REG_8BIT(0x5847), 0x8f},
0330     {OV5693_REG_8BIT(0x5848), 0x01},
0331     {OV5693_REG_8BIT(0x5849), 0x0c},
0332     {OV5693_REG_8BIT(0x5e10), 0x0c},
0333     {OV5693_REG_8BIT(0x3820), 0x00},
0334     {OV5693_REG_8BIT(0x3821), 0x1e},
0335     {OV5693_REG_8BIT(0x5041), 0x14}
0336 };
0337 
0338 static const struct ov5693_reg_list ov5693_global_setting = {
0339     .num_regs = ARRAY_SIZE(ov5693_global_regs),
0340     .regs = ov5693_global_regs,
0341 };
0342 
0343 static const struct v4l2_rect ov5693_default_crop = {
0344     .left = OV5693_ACTIVE_START_LEFT,
0345     .top = OV5693_ACTIVE_START_TOP,
0346     .width = OV5693_ACTIVE_WIDTH,
0347     .height = OV5693_ACTIVE_HEIGHT,
0348 };
0349 
0350 static const struct v4l2_mbus_framefmt ov5693_default_fmt = {
0351     .width = OV5693_ACTIVE_WIDTH,
0352     .height = OV5693_ACTIVE_HEIGHT,
0353     .code = MEDIA_BUS_FMT_SBGGR10_1X10,
0354 };
0355 
0356 static const s64 link_freq_menu_items[] = {
0357     OV5693_LINK_FREQ_419_2MHZ
0358 };
0359 
0360 static const char * const ov5693_test_pattern_menu[] = {
0361     "Disabled",
0362     "Random Data",
0363     "Colour Bars",
0364     "Colour Bars with Rolling Bar"
0365 };
0366 
0367 static const u8 ov5693_test_pattern_bits[] = {
0368     0,
0369     OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_RANDOM,
0370     OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_BARS,
0371     OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_BARS |
0372     OV5693_TEST_PATTERN_ROLLING,
0373 };
0374 
0375 /* I2C I/O Operations */
0376 
0377 static int ov5693_read_reg(struct ov5693_device *ov5693, u32 addr, u32 *value)
0378 {
0379     struct i2c_client *client = ov5693->client;
0380     __be16 reg;
0381     u8 val[4];
0382     struct i2c_msg msg[] = {
0383         {
0384             .addr   = client->addr,
0385             .flags  = 0,
0386             .len    = 2,
0387             .buf    = (u8 *)&reg,
0388         },
0389         {
0390             .addr   = client->addr,
0391             .flags  = I2C_M_RD,
0392             .buf    = (u8 *)&val,
0393         },
0394     };
0395     unsigned int len = ((addr >> OV5693_REG_SIZE_SHIFT) & 3);
0396     unsigned int i;
0397     int ret;
0398 
0399     reg = cpu_to_be16(addr & OV5693_REG_ADDR_MASK);
0400 
0401     msg[1].len = len;
0402 
0403     ret = i2c_transfer(client->adapter, msg, 2);
0404     if (ret < 0)
0405         return dev_err_probe(&client->dev, ret,
0406                      "Failed to read register 0x%04x: %d\n",
0407                      addr & OV5693_REG_ADDR_MASK, ret);
0408 
0409     *value = 0;
0410     for (i = 0; i < len; ++i) {
0411         *value <<= 8;
0412         *value |= val[i];
0413     }
0414 
0415     return 0;
0416 }
0417 
0418 static void ov5693_write_reg(struct ov5693_device *ov5693, u32 addr, u32 value,
0419                  int *error)
0420 {
0421     struct i2c_client *client = ov5693->client;
0422     struct {
0423         __be16 reg;
0424         u8 val[4];
0425     } __packed buf;
0426     struct i2c_msg msg = {
0427         .addr   = client->addr,
0428         .buf    = (u8 *)&buf,
0429     };
0430     unsigned int len = ((addr >> OV5693_REG_SIZE_SHIFT) & 3);
0431     unsigned int i;
0432     int ret;
0433 
0434     if (*error < 0)
0435         return;
0436 
0437     buf.reg = cpu_to_be16(addr & OV5693_REG_ADDR_MASK);
0438     for (i = 0; i < len; ++i) {
0439         buf.val[len - i - 1] = value & 0xff;
0440         value >>= 8;
0441     }
0442 
0443     msg.len = len + 2;
0444 
0445     ret = i2c_transfer(client->adapter, &msg, 1);
0446     if (ret < 0) {
0447         dev_err(&client->dev, "Failed to write register 0x%04x: %d\n",
0448             addr & OV5693_REG_ADDR_MASK, ret);
0449         *error = ret;
0450     }
0451 }
0452 
0453 static int ov5693_write_reg_array(struct ov5693_device *ov5693,
0454                   const struct ov5693_reg_list *reglist)
0455 {
0456     unsigned int i;
0457     int ret = 0;
0458 
0459     for (i = 0; i < reglist->num_regs; i++)
0460         ov5693_write_reg(ov5693, reglist->regs[i].reg,
0461                  reglist->regs[i].val, &ret);
0462 
0463     return ret;
0464 }
0465 
0466 static int ov5693_update_bits(struct ov5693_device *ov5693, u32 address,
0467                   u32 mask, u32 bits)
0468 {
0469     u32 value = 0;
0470     int ret;
0471 
0472     ret = ov5693_read_reg(ov5693, address, &value);
0473     if (ret)
0474         return ret;
0475 
0476     value &= ~mask;
0477     value |= bits;
0478 
0479     ov5693_write_reg(ov5693, address, value, &ret);
0480 
0481     return ret;
0482 }
0483 
0484 /* V4L2 Controls Functions */
0485 
0486 static int ov5693_flip_vert_configure(struct ov5693_device *ov5693,
0487                       bool enable)
0488 {
0489     u8 bits = OV5693_FORMAT1_FLIP_VERT_ISP_EN |
0490           OV5693_FORMAT1_FLIP_VERT_SENSOR_EN;
0491     int ret;
0492 
0493     ret = ov5693_update_bits(ov5693, OV5693_FORMAT1_REG, bits,
0494                  enable ? bits : 0);
0495     if (ret)
0496         return ret;
0497 
0498     return 0;
0499 }
0500 
0501 static int ov5693_flip_horz_configure(struct ov5693_device *ov5693,
0502                       bool enable)
0503 {
0504     u8 bits = OV5693_FORMAT2_FLIP_HORZ_ISP_EN |
0505           OV5693_FORMAT2_FLIP_HORZ_SENSOR_EN;
0506     int ret;
0507 
0508     ret = ov5693_update_bits(ov5693, OV5693_FORMAT2_REG, bits,
0509                  enable ? bits : 0);
0510     if (ret)
0511         return ret;
0512 
0513     return 0;
0514 }
0515 
0516 static int ov5693_get_exposure(struct ov5693_device *ov5693, s32 *value)
0517 {
0518     u32 exposure;
0519     int ret;
0520 
0521     ret = ov5693_read_reg(ov5693, OV5693_EXPOSURE_CTRL_REG, &exposure);
0522     if (ret)
0523         return ret;
0524 
0525     /* The lowest 4 bits are unsupported fractional bits */
0526     *value = exposure >> 4;
0527 
0528     return 0;
0529 }
0530 
0531 static int ov5693_exposure_configure(struct ov5693_device *ov5693,
0532                      u32 exposure)
0533 {
0534     int ret = 0;
0535 
0536     exposure = (exposure << 4) & OV5693_EXPOSURE_CTRL_MASK;
0537 
0538     ov5693_write_reg(ov5693, OV5693_EXPOSURE_CTRL_REG, exposure, &ret);
0539 
0540     return ret;
0541 }
0542 
0543 static int ov5693_get_gain(struct ov5693_device *ov5693, u32 *gain)
0544 {
0545     u32 value;
0546     int ret;
0547 
0548     ret = ov5693_read_reg(ov5693, OV5693_GAIN_CTRL_REG, &value);
0549     if (ret)
0550         return ret;
0551 
0552     /* As with exposure, the lowest 4 bits are fractional bits. */
0553     *gain = value >> 4;
0554 
0555     return ret;
0556 }
0557 
0558 static int ov5693_digital_gain_configure(struct ov5693_device *ov5693,
0559                      u32 gain)
0560 {
0561     int ret = 0;
0562 
0563     gain &= OV5693_MWB_GAIN_MASK;
0564 
0565     ov5693_write_reg(ov5693, OV5693_MWB_RED_GAIN_REG, gain, &ret);
0566     ov5693_write_reg(ov5693, OV5693_MWB_GREEN_GAIN_REG, gain, &ret);
0567     ov5693_write_reg(ov5693, OV5693_MWB_BLUE_GAIN_REG, gain, &ret);
0568 
0569     return ret;
0570 }
0571 
0572 static int ov5693_analog_gain_configure(struct ov5693_device *ov5693, u32 gain)
0573 {
0574     int ret = 0;
0575 
0576     gain = (gain << 4) & OV5693_GAIN_CTRL_MASK;
0577 
0578     ov5693_write_reg(ov5693, OV5693_GAIN_CTRL_REG, gain, &ret);
0579 
0580     return ret;
0581 }
0582 
0583 static int ov5693_vts_configure(struct ov5693_device *ov5693, u32 vblank)
0584 {
0585     u16 vts = ov5693->mode.format.height + vblank;
0586     int ret = 0;
0587 
0588     ov5693_write_reg(ov5693, OV5693_TIMING_VTS_REG, vts, &ret);
0589 
0590     return ret;
0591 }
0592 
0593 static int ov5693_test_pattern_configure(struct ov5693_device *ov5693, u32 idx)
0594 {
0595     int ret = 0;
0596 
0597     ov5693_write_reg(ov5693, OV5693_TEST_PATTERN_REG,
0598              ov5693_test_pattern_bits[idx], &ret);
0599 
0600     return ret;
0601 }
0602 
0603 static int ov5693_s_ctrl(struct v4l2_ctrl *ctrl)
0604 {
0605     struct ov5693_device *ov5693 =
0606         container_of(ctrl->handler, struct ov5693_device, ctrls.handler);
0607     int ret = 0;
0608 
0609     /* If VBLANK is altered we need to update exposure to compensate */
0610     if (ctrl->id == V4L2_CID_VBLANK) {
0611         int exposure_max;
0612 
0613         exposure_max = ov5693->mode.format.height + ctrl->val -
0614                    OV5693_INTEGRATION_TIME_MARGIN;
0615         __v4l2_ctrl_modify_range(ov5693->ctrls.exposure,
0616                      ov5693->ctrls.exposure->minimum,
0617                      exposure_max,
0618                      ov5693->ctrls.exposure->step,
0619                      min(ov5693->ctrls.exposure->val,
0620                          exposure_max));
0621     }
0622 
0623     /* Only apply changes to the controls if the device is powered up */
0624     if (!pm_runtime_get_if_in_use(ov5693->dev))
0625         return 0;
0626 
0627     switch (ctrl->id) {
0628     case V4L2_CID_EXPOSURE:
0629         ret = ov5693_exposure_configure(ov5693, ctrl->val);
0630         break;
0631     case V4L2_CID_ANALOGUE_GAIN:
0632         ret = ov5693_analog_gain_configure(ov5693, ctrl->val);
0633         break;
0634     case V4L2_CID_DIGITAL_GAIN:
0635         ret = ov5693_digital_gain_configure(ov5693, ctrl->val);
0636         break;
0637     case V4L2_CID_HFLIP:
0638         ret = ov5693_flip_horz_configure(ov5693, !!ctrl->val);
0639         break;
0640     case V4L2_CID_VFLIP:
0641         ret = ov5693_flip_vert_configure(ov5693, !!ctrl->val);
0642         break;
0643     case V4L2_CID_VBLANK:
0644         ret = ov5693_vts_configure(ov5693, ctrl->val);
0645         break;
0646     case V4L2_CID_TEST_PATTERN:
0647         ret = ov5693_test_pattern_configure(ov5693, ctrl->val);
0648         break;
0649     default:
0650         ret = -EINVAL;
0651     }
0652 
0653     pm_runtime_put(ov5693->dev);
0654 
0655     return ret;
0656 }
0657 
0658 static int ov5693_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
0659 {
0660     struct ov5693_device *ov5693 = container_of(ctrl->handler,
0661                             struct ov5693_device,
0662                             ctrls.handler);
0663 
0664     switch (ctrl->id) {
0665     case V4L2_CID_EXPOSURE_ABSOLUTE:
0666         return ov5693_get_exposure(ov5693, &ctrl->val);
0667     case V4L2_CID_AUTOGAIN:
0668         return ov5693_get_gain(ov5693, &ctrl->val);
0669     default:
0670         return -EINVAL;
0671     }
0672 }
0673 
0674 static const struct v4l2_ctrl_ops ov5693_ctrl_ops = {
0675     .s_ctrl = ov5693_s_ctrl,
0676     .g_volatile_ctrl = ov5693_g_volatile_ctrl
0677 };
0678 
0679 /* System Control Functions */
0680 
0681 static int ov5693_mode_configure(struct ov5693_device *ov5693)
0682 {
0683     const struct ov5693_mode *mode = &ov5693->mode;
0684     int ret = 0;
0685 
0686     /* Crop Start X */
0687     ov5693_write_reg(ov5693, OV5693_CROP_START_X_REG, mode->crop.left,
0688              &ret);
0689 
0690     /* Offset X */
0691     ov5693_write_reg(ov5693, OV5693_OFFSET_START_X_REG, 0, &ret);
0692 
0693     /* Output Size X */
0694     ov5693_write_reg(ov5693, OV5693_OUTPUT_SIZE_X_REG, mode->format.width,
0695              &ret);
0696 
0697     /* Crop End X */
0698     ov5693_write_reg(ov5693, OV5693_CROP_END_X_REG,
0699              mode->crop.left + mode->crop.width, &ret);
0700 
0701     /* Horizontal Total Size */
0702     ov5693_write_reg(ov5693, OV5693_TIMING_HTS_REG, OV5693_FIXED_PPL,
0703              &ret);
0704 
0705     /* Crop Start Y */
0706     ov5693_write_reg(ov5693, OV5693_CROP_START_Y_REG, mode->crop.top,
0707              &ret);
0708 
0709     /* Offset Y */
0710     ov5693_write_reg(ov5693, OV5693_OFFSET_START_Y_REG, 0, &ret);
0711 
0712     /* Output Size Y */
0713     ov5693_write_reg(ov5693, OV5693_OUTPUT_SIZE_Y_REG, mode->format.height,
0714              &ret);
0715 
0716     /* Crop End Y */
0717     ov5693_write_reg(ov5693, OV5693_CROP_END_Y_REG,
0718              mode->crop.top + mode->crop.height, &ret);
0719 
0720     /* Subsample X increase */
0721     ov5693_write_reg(ov5693, OV5693_SUB_INC_X_REG,
0722              ((mode->inc_x_odd << 4) & 0xf0) | 0x01, &ret);
0723     /* Subsample Y increase */
0724     ov5693_write_reg(ov5693, OV5693_SUB_INC_Y_REG,
0725              ((mode->inc_y_odd << 4) & 0xf0) | 0x01, &ret);
0726 
0727     if (ret)
0728         return ret;
0729 
0730     /* Binning */
0731     ret = ov5693_update_bits(ov5693, OV5693_FORMAT1_REG,
0732                  OV5693_FORMAT1_VBIN_EN,
0733                  mode->binning_y ? OV5693_FORMAT1_VBIN_EN : 0);
0734     if (ret)
0735         return ret;
0736 
0737     ret = ov5693_update_bits(ov5693, OV5693_FORMAT2_REG,
0738                  OV5693_FORMAT2_HBIN_EN,
0739                  mode->binning_x ? OV5693_FORMAT2_HBIN_EN : 0);
0740 
0741     return ret;
0742 }
0743 
0744 static int ov5693_enable_streaming(struct ov5693_device *ov5693, bool enable)
0745 {
0746     int ret = 0;
0747 
0748     ov5693_write_reg(ov5693, OV5693_SW_STREAM_REG,
0749              enable ? OV5693_START_STREAMING :
0750                   OV5693_STOP_STREAMING, &ret);
0751 
0752     return ret;
0753 }
0754 
0755 static int ov5693_sw_reset(struct ov5693_device *ov5693)
0756 {
0757     int ret = 0;
0758 
0759     ov5693_write_reg(ov5693, OV5693_SW_RESET_REG, OV5693_SW_RESET, &ret);
0760 
0761     return ret;
0762 }
0763 
0764 static int ov5693_sensor_init(struct ov5693_device *ov5693)
0765 {
0766     int ret;
0767 
0768     ret = ov5693_sw_reset(ov5693);
0769     if (ret)
0770         return dev_err_probe(ov5693->dev, ret,
0771                      "software reset error\n");
0772 
0773     ret = ov5693_write_reg_array(ov5693, &ov5693_global_setting);
0774     if (ret)
0775         return dev_err_probe(ov5693->dev, ret,
0776                      "global settings error\n");
0777 
0778     ret = ov5693_mode_configure(ov5693);
0779     if (ret)
0780         return dev_err_probe(ov5693->dev, ret,
0781                      "mode configure error\n");
0782 
0783     ret = ov5693_enable_streaming(ov5693, false);
0784     if (ret)
0785         dev_err(ov5693->dev, "stop streaming error\n");
0786 
0787     return ret;
0788 }
0789 
0790 static void ov5693_sensor_powerdown(struct ov5693_device *ov5693)
0791 {
0792     gpiod_set_value_cansleep(ov5693->reset, 1);
0793     gpiod_set_value_cansleep(ov5693->powerdown, 1);
0794 
0795     regulator_bulk_disable(OV5693_NUM_SUPPLIES, ov5693->supplies);
0796 
0797     clk_disable_unprepare(ov5693->xvclk);
0798 }
0799 
0800 static int ov5693_sensor_powerup(struct ov5693_device *ov5693)
0801 {
0802     int ret;
0803 
0804     gpiod_set_value_cansleep(ov5693->reset, 1);
0805     gpiod_set_value_cansleep(ov5693->powerdown, 1);
0806 
0807     ret = clk_prepare_enable(ov5693->xvclk);
0808     if (ret) {
0809         dev_err(ov5693->dev, "Failed to enable clk\n");
0810         goto fail_power;
0811     }
0812 
0813     ret = regulator_bulk_enable(OV5693_NUM_SUPPLIES, ov5693->supplies);
0814     if (ret) {
0815         dev_err(ov5693->dev, "Failed to enable regulators\n");
0816         goto fail_power;
0817     }
0818 
0819     gpiod_set_value_cansleep(ov5693->powerdown, 0);
0820     gpiod_set_value_cansleep(ov5693->reset, 0);
0821 
0822     usleep_range(5000, 7500);
0823 
0824     return 0;
0825 
0826 fail_power:
0827     ov5693_sensor_powerdown(ov5693);
0828     return ret;
0829 }
0830 
0831 static int __maybe_unused ov5693_sensor_suspend(struct device *dev)
0832 {
0833     struct v4l2_subdev *sd = dev_get_drvdata(dev);
0834     struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
0835 
0836     ov5693_sensor_powerdown(ov5693);
0837 
0838     return 0;
0839 }
0840 
0841 static int __maybe_unused ov5693_sensor_resume(struct device *dev)
0842 {
0843     struct v4l2_subdev *sd = dev_get_drvdata(dev);
0844     struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
0845     int ret;
0846 
0847     mutex_lock(&ov5693->lock);
0848 
0849     ret = ov5693_sensor_powerup(ov5693);
0850     if (ret)
0851         goto out_unlock;
0852 
0853     ret = ov5693_sensor_init(ov5693);
0854     if (ret) {
0855         dev_err(dev, "ov5693 sensor init failure\n");
0856         goto err_power;
0857     }
0858 
0859     goto out_unlock;
0860 
0861 err_power:
0862     ov5693_sensor_powerdown(ov5693);
0863 out_unlock:
0864     mutex_unlock(&ov5693->lock);
0865     return ret;
0866 }
0867 
0868 static int ov5693_detect(struct ov5693_device *ov5693)
0869 {
0870     int ret;
0871     u32 id;
0872 
0873     ret = ov5693_read_reg(ov5693, OV5693_REG_CHIP_ID, &id);
0874     if (ret)
0875         return ret;
0876 
0877     if (id != OV5693_CHIP_ID)
0878         return dev_err_probe(ov5693->dev, -ENODEV,
0879                      "sensor ID mismatch. Found 0x%04x\n", id);
0880 
0881     return 0;
0882 }
0883 
0884 /* V4L2 Framework callbacks */
0885 
0886 static unsigned int __ov5693_calc_vts(u32 height)
0887 {
0888     /*
0889      * We need to set a sensible default VTS for whatever format height we
0890      * happen to be given from set_fmt(). This function just targets
0891      * an even multiple of 30fps.
0892      */
0893 
0894     unsigned int tgt_fps;
0895 
0896     tgt_fps = rounddown(OV5693_PIXEL_RATE / OV5693_FIXED_PPL / height, 30);
0897 
0898     return ALIGN_DOWN(OV5693_PIXEL_RATE / OV5693_FIXED_PPL / tgt_fps, 2);
0899 }
0900 
0901 static struct v4l2_mbus_framefmt *
0902 __ov5693_get_pad_format(struct ov5693_device *ov5693,
0903             struct v4l2_subdev_state *state,
0904             unsigned int pad, enum v4l2_subdev_format_whence which)
0905 {
0906     switch (which) {
0907     case V4L2_SUBDEV_FORMAT_TRY:
0908         return v4l2_subdev_get_try_format(&ov5693->sd, state, pad);
0909     case V4L2_SUBDEV_FORMAT_ACTIVE:
0910         return &ov5693->mode.format;
0911     default:
0912         return NULL;
0913     }
0914 }
0915 
0916 static struct v4l2_rect *
0917 __ov5693_get_pad_crop(struct ov5693_device *ov5693,
0918               struct v4l2_subdev_state *state,
0919               unsigned int pad, enum v4l2_subdev_format_whence which)
0920 {
0921     switch (which) {
0922     case V4L2_SUBDEV_FORMAT_TRY:
0923         return v4l2_subdev_get_try_crop(&ov5693->sd, state, pad);
0924     case V4L2_SUBDEV_FORMAT_ACTIVE:
0925         return &ov5693->mode.crop;
0926     }
0927 
0928     return NULL;
0929 }
0930 
0931 static int ov5693_get_fmt(struct v4l2_subdev *sd,
0932               struct v4l2_subdev_state *state,
0933               struct v4l2_subdev_format *format)
0934 {
0935     struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
0936 
0937     format->format = ov5693->mode.format;
0938 
0939     return 0;
0940 }
0941 
0942 static int ov5693_set_fmt(struct v4l2_subdev *sd,
0943               struct v4l2_subdev_state *state,
0944               struct v4l2_subdev_format *format)
0945 {
0946     struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
0947     const struct v4l2_rect *crop;
0948     struct v4l2_mbus_framefmt *fmt;
0949     unsigned int hratio, vratio;
0950     unsigned int width, height;
0951     unsigned int hblank;
0952     int exposure_max;
0953 
0954     crop = __ov5693_get_pad_crop(ov5693, state, format->pad, format->which);
0955 
0956     /*
0957      * Align to two to simplify the binning calculations below, and clamp
0958      * the requested format at the crop rectangle
0959      */
0960     width = clamp_t(unsigned int, ALIGN(format->format.width, 2),
0961             OV5693_MIN_CROP_WIDTH, crop->width);
0962     height = clamp_t(unsigned int, ALIGN(format->format.height, 2),
0963              OV5693_MIN_CROP_HEIGHT, crop->height);
0964 
0965     /*
0966      * We can only support setting either the dimensions of the crop rect
0967      * or those dimensions binned (separately) by a factor of two.
0968      */
0969     hratio = clamp_t(unsigned int,
0970              DIV_ROUND_CLOSEST(crop->width, width), 1, 2);
0971     vratio = clamp_t(unsigned int,
0972              DIV_ROUND_CLOSEST(crop->height, height), 1, 2);
0973 
0974     fmt = __ov5693_get_pad_format(ov5693, state, format->pad,
0975                       format->which);
0976 
0977     fmt->width = crop->width / hratio;
0978     fmt->height = crop->height / vratio;
0979     fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
0980 
0981     format->format = *fmt;
0982 
0983     if (format->which == V4L2_SUBDEV_FORMAT_TRY)
0984         return 0;
0985 
0986     mutex_lock(&ov5693->lock);
0987 
0988     ov5693->mode.binning_x = hratio > 1;
0989     ov5693->mode.inc_x_odd = hratio > 1 ? 3 : 1;
0990     ov5693->mode.binning_y = vratio > 1;
0991     ov5693->mode.inc_y_odd = vratio > 1 ? 3 : 1;
0992 
0993     ov5693->mode.vts = __ov5693_calc_vts(fmt->height);
0994 
0995     __v4l2_ctrl_modify_range(ov5693->ctrls.vblank,
0996                  OV5693_TIMING_MIN_VTS,
0997                  OV5693_TIMING_MAX_VTS - fmt->height,
0998                  1, ov5693->mode.vts - fmt->height);
0999     __v4l2_ctrl_s_ctrl(ov5693->ctrls.vblank,
1000                ov5693->mode.vts - fmt->height);
1001 
1002     hblank = OV5693_FIXED_PPL - fmt->width;
1003     __v4l2_ctrl_modify_range(ov5693->ctrls.hblank, hblank, hblank, 1,
1004                  hblank);
1005 
1006     exposure_max = ov5693->mode.vts - OV5693_INTEGRATION_TIME_MARGIN;
1007     __v4l2_ctrl_modify_range(ov5693->ctrls.exposure,
1008                  ov5693->ctrls.exposure->minimum, exposure_max,
1009                  ov5693->ctrls.exposure->step,
1010                  min(ov5693->ctrls.exposure->val,
1011                      exposure_max));
1012 
1013     mutex_unlock(&ov5693->lock);
1014     return 0;
1015 }
1016 
1017 static int ov5693_get_selection(struct v4l2_subdev *sd,
1018                 struct v4l2_subdev_state *state,
1019                 struct v4l2_subdev_selection *sel)
1020 {
1021     struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
1022 
1023     switch (sel->target) {
1024     case V4L2_SEL_TGT_CROP:
1025         mutex_lock(&ov5693->lock);
1026         sel->r = *__ov5693_get_pad_crop(ov5693, state, sel->pad,
1027                         sel->which);
1028         mutex_unlock(&ov5693->lock);
1029         break;
1030     case V4L2_SEL_TGT_NATIVE_SIZE:
1031         sel->r.top = 0;
1032         sel->r.left = 0;
1033         sel->r.width = OV5693_NATIVE_WIDTH;
1034         sel->r.height = OV5693_NATIVE_HEIGHT;
1035         break;
1036     case V4L2_SEL_TGT_CROP_BOUNDS:
1037     case V4L2_SEL_TGT_CROP_DEFAULT:
1038         sel->r.top = OV5693_ACTIVE_START_TOP;
1039         sel->r.left = OV5693_ACTIVE_START_LEFT;
1040         sel->r.width = OV5693_ACTIVE_WIDTH;
1041         sel->r.height = OV5693_ACTIVE_HEIGHT;
1042         break;
1043     default:
1044         return -EINVAL;
1045     }
1046 
1047     return 0;
1048 }
1049 
1050 static int ov5693_set_selection(struct v4l2_subdev *sd,
1051                 struct v4l2_subdev_state *state,
1052                 struct v4l2_subdev_selection *sel)
1053 {
1054     struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
1055     struct v4l2_mbus_framefmt *format;
1056     struct v4l2_rect *__crop;
1057     struct v4l2_rect rect;
1058 
1059     if (sel->target != V4L2_SEL_TGT_CROP)
1060         return -EINVAL;
1061 
1062     /*
1063      * Clamp the boundaries of the crop rectangle to the size of the sensor
1064      * pixel array. Align to multiples of 2 to ensure Bayer pattern isn't
1065      * disrupted.
1066      */
1067     rect.left = clamp(ALIGN(sel->r.left, 2), OV5693_NATIVE_START_LEFT,
1068               OV5693_NATIVE_WIDTH);
1069     rect.top = clamp(ALIGN(sel->r.top, 2), OV5693_NATIVE_START_TOP,
1070              OV5693_NATIVE_HEIGHT);
1071     rect.width = clamp_t(unsigned int, ALIGN(sel->r.width, 2),
1072                  OV5693_MIN_CROP_WIDTH, OV5693_NATIVE_WIDTH);
1073     rect.height = clamp_t(unsigned int, ALIGN(sel->r.height, 2),
1074                   OV5693_MIN_CROP_HEIGHT, OV5693_NATIVE_HEIGHT);
1075 
1076     /* Make sure the crop rectangle isn't outside the bounds of the array */
1077     rect.width = min_t(unsigned int, rect.width,
1078                OV5693_NATIVE_WIDTH - rect.left);
1079     rect.height = min_t(unsigned int, rect.height,
1080                 OV5693_NATIVE_HEIGHT - rect.top);
1081 
1082     __crop = __ov5693_get_pad_crop(ov5693, state, sel->pad, sel->which);
1083 
1084     if (rect.width != __crop->width || rect.height != __crop->height) {
1085         /*
1086          * Reset the output image size if the crop rectangle size has
1087          * been modified.
1088          */
1089         format = __ov5693_get_pad_format(ov5693, state, sel->pad,
1090                          sel->which);
1091         format->width = rect.width;
1092         format->height = rect.height;
1093     }
1094 
1095     *__crop = rect;
1096     sel->r = rect;
1097 
1098     return 0;
1099 }
1100 
1101 static int ov5693_s_stream(struct v4l2_subdev *sd, int enable)
1102 {
1103     struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
1104     int ret;
1105 
1106     if (enable) {
1107         ret = pm_runtime_get_sync(ov5693->dev);
1108         if (ret < 0)
1109             goto err_power_down;
1110 
1111         mutex_lock(&ov5693->lock);
1112         ret = __v4l2_ctrl_handler_setup(&ov5693->ctrls.handler);
1113         if (ret) {
1114             mutex_unlock(&ov5693->lock);
1115             goto err_power_down;
1116         }
1117 
1118         ret = ov5693_enable_streaming(ov5693, true);
1119         mutex_unlock(&ov5693->lock);
1120     } else {
1121         mutex_lock(&ov5693->lock);
1122         ret = ov5693_enable_streaming(ov5693, false);
1123         mutex_unlock(&ov5693->lock);
1124     }
1125     if (ret)
1126         goto err_power_down;
1127 
1128     ov5693->streaming = !!enable;
1129 
1130     if (!enable)
1131         pm_runtime_put(ov5693->dev);
1132 
1133     return 0;
1134 err_power_down:
1135     pm_runtime_put_noidle(ov5693->dev);
1136     return ret;
1137 }
1138 
1139 static int ov5693_g_frame_interval(struct v4l2_subdev *sd,
1140                    struct v4l2_subdev_frame_interval *interval)
1141 {
1142     struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
1143     unsigned int framesize = OV5693_FIXED_PPL * (ov5693->mode.format.height +
1144                  ov5693->ctrls.vblank->val);
1145     unsigned int fps = DIV_ROUND_CLOSEST(OV5693_PIXEL_RATE, framesize);
1146 
1147     interval->interval.numerator = 1;
1148     interval->interval.denominator = fps;
1149 
1150     return 0;
1151 }
1152 
1153 static int ov5693_enum_mbus_code(struct v4l2_subdev *sd,
1154                  struct v4l2_subdev_state *state,
1155                  struct v4l2_subdev_mbus_code_enum *code)
1156 {
1157     /* Only a single mbus format is supported */
1158     if (code->index > 0)
1159         return -EINVAL;
1160 
1161     code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
1162     return 0;
1163 }
1164 
1165 static int ov5693_enum_frame_size(struct v4l2_subdev *sd,
1166                   struct v4l2_subdev_state *state,
1167                   struct v4l2_subdev_frame_size_enum *fse)
1168 {
1169     struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
1170     struct v4l2_rect *__crop;
1171 
1172     if (fse->index > 1 || fse->code != MEDIA_BUS_FMT_SBGGR10_1X10)
1173         return -EINVAL;
1174 
1175     __crop = __ov5693_get_pad_crop(ov5693, state, fse->pad, fse->which);
1176     if (!__crop)
1177         return -EINVAL;
1178 
1179     fse->min_width = __crop->width / (fse->index + 1);
1180     fse->min_height = __crop->height / (fse->index + 1);
1181     fse->max_width = fse->min_width;
1182     fse->max_height = fse->min_height;
1183 
1184     return 0;
1185 }
1186 
1187 static const struct v4l2_subdev_video_ops ov5693_video_ops = {
1188     .s_stream = ov5693_s_stream,
1189     .g_frame_interval = ov5693_g_frame_interval,
1190 };
1191 
1192 static const struct v4l2_subdev_pad_ops ov5693_pad_ops = {
1193     .enum_mbus_code = ov5693_enum_mbus_code,
1194     .enum_frame_size = ov5693_enum_frame_size,
1195     .get_fmt = ov5693_get_fmt,
1196     .set_fmt = ov5693_set_fmt,
1197     .get_selection = ov5693_get_selection,
1198     .set_selection = ov5693_set_selection,
1199 };
1200 
1201 static const struct v4l2_subdev_ops ov5693_ops = {
1202     .video = &ov5693_video_ops,
1203     .pad = &ov5693_pad_ops,
1204 };
1205 
1206 /* Sensor and Driver Configuration Functions */
1207 
1208 static int ov5693_init_controls(struct ov5693_device *ov5693)
1209 {
1210     const struct v4l2_ctrl_ops *ops = &ov5693_ctrl_ops;
1211     struct ov5693_v4l2_ctrls *ctrls = &ov5693->ctrls;
1212     struct v4l2_fwnode_device_properties props;
1213     int vblank_max, vblank_def;
1214     int exposure_max;
1215     int hblank;
1216     int ret;
1217 
1218     ret = v4l2_ctrl_handler_init(&ctrls->handler, 12);
1219     if (ret)
1220         return ret;
1221 
1222     /* link freq */
1223     ctrls->link_freq = v4l2_ctrl_new_int_menu(&ctrls->handler,
1224                           NULL, V4L2_CID_LINK_FREQ,
1225                           0, 0, link_freq_menu_items);
1226     if (ctrls->link_freq)
1227         ctrls->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1228 
1229     /* pixel rate */
1230     ctrls->pixel_rate = v4l2_ctrl_new_std(&ctrls->handler, NULL,
1231                           V4L2_CID_PIXEL_RATE, 0,
1232                           OV5693_PIXEL_RATE, 1,
1233                           OV5693_PIXEL_RATE);
1234 
1235     /* Exposure */
1236     exposure_max = ov5693->mode.vts - OV5693_INTEGRATION_TIME_MARGIN;
1237     ctrls->exposure = v4l2_ctrl_new_std(&ctrls->handler, ops,
1238                         V4L2_CID_EXPOSURE,
1239                         OV5693_EXPOSURE_MIN, exposure_max,
1240                         OV5693_EXPOSURE_STEP, exposure_max);
1241 
1242     /* Gain */
1243     ctrls->analogue_gain = v4l2_ctrl_new_std(&ctrls->handler,
1244                          ops, V4L2_CID_ANALOGUE_GAIN,
1245                          OV5693_GAIN_MIN,
1246                          OV5693_GAIN_MAX,
1247                          OV5693_GAIN_STEP,
1248                          OV5693_GAIN_DEF);
1249 
1250     ctrls->digital_gain = v4l2_ctrl_new_std(&ctrls->handler, ops,
1251                         V4L2_CID_DIGITAL_GAIN,
1252                         OV5693_DIGITAL_GAIN_MIN,
1253                         OV5693_DIGITAL_GAIN_MAX,
1254                         OV5693_DIGITAL_GAIN_STEP,
1255                         OV5693_DIGITAL_GAIN_DEF);
1256 
1257     /* Flip */
1258     ctrls->hflip = v4l2_ctrl_new_std(&ctrls->handler, ops,
1259                      V4L2_CID_HFLIP, 0, 1, 1, 0);
1260 
1261     ctrls->vflip = v4l2_ctrl_new_std(&ctrls->handler, ops,
1262                      V4L2_CID_VFLIP, 0, 1, 1, 0);
1263 
1264     hblank = OV5693_FIXED_PPL - ov5693->mode.format.width;
1265     ctrls->hblank = v4l2_ctrl_new_std(&ctrls->handler, ops,
1266                       V4L2_CID_HBLANK, hblank,
1267                       hblank, 1, hblank);
1268 
1269     if (ctrls->hblank)
1270         ctrls->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1271 
1272     vblank_max = OV5693_TIMING_MAX_VTS - ov5693->mode.format.height;
1273     vblank_def = ov5693->mode.vts - ov5693->mode.format.height;
1274     ctrls->vblank = v4l2_ctrl_new_std(&ctrls->handler, ops,
1275                       V4L2_CID_VBLANK,
1276                       OV5693_TIMING_MIN_VTS,
1277                       vblank_max, 1, vblank_def);
1278 
1279     ctrls->test_pattern = v4l2_ctrl_new_std_menu_items(
1280                     &ctrls->handler, ops,
1281                     V4L2_CID_TEST_PATTERN,
1282                     ARRAY_SIZE(ov5693_test_pattern_menu) - 1,
1283                     0, 0, ov5693_test_pattern_menu);
1284 
1285     if (ctrls->handler.error) {
1286         dev_err(ov5693->dev, "Error initialising v4l2 ctrls\n");
1287         ret = ctrls->handler.error;
1288         goto err_free_handler;
1289     }
1290 
1291     /* set properties from fwnode (e.g. rotation, orientation) */
1292     ret = v4l2_fwnode_device_parse(ov5693->dev, &props);
1293     if (ret)
1294         goto err_free_handler;
1295 
1296     ret = v4l2_ctrl_new_fwnode_properties(&ctrls->handler, ops,
1297                           &props);
1298     if (ret)
1299         goto err_free_handler;
1300 
1301     /* Use same lock for controls as for everything else. */
1302     ctrls->handler.lock = &ov5693->lock;
1303     ov5693->sd.ctrl_handler = &ctrls->handler;
1304 
1305     return 0;
1306 
1307 err_free_handler:
1308     v4l2_ctrl_handler_free(&ctrls->handler);
1309     return ret;
1310 }
1311 
1312 static int ov5693_configure_gpios(struct ov5693_device *ov5693)
1313 {
1314     ov5693->reset = devm_gpiod_get_optional(ov5693->dev, "reset",
1315                         GPIOD_OUT_HIGH);
1316     if (IS_ERR(ov5693->reset)) {
1317         dev_err(ov5693->dev, "Error fetching reset GPIO\n");
1318         return PTR_ERR(ov5693->reset);
1319     }
1320 
1321     ov5693->powerdown = devm_gpiod_get_optional(ov5693->dev, "powerdown",
1322                             GPIOD_OUT_HIGH);
1323     if (IS_ERR(ov5693->powerdown)) {
1324         dev_err(ov5693->dev, "Error fetching powerdown GPIO\n");
1325         return PTR_ERR(ov5693->powerdown);
1326     }
1327 
1328     return 0;
1329 }
1330 
1331 static int ov5693_get_regulators(struct ov5693_device *ov5693)
1332 {
1333     unsigned int i;
1334 
1335     for (i = 0; i < OV5693_NUM_SUPPLIES; i++)
1336         ov5693->supplies[i].supply = ov5693_supply_names[i];
1337 
1338     return devm_regulator_bulk_get(ov5693->dev, OV5693_NUM_SUPPLIES,
1339                        ov5693->supplies);
1340 }
1341 
1342 static int ov5693_check_hwcfg(struct ov5693_device *ov5693)
1343 {
1344     struct fwnode_handle *fwnode = dev_fwnode(ov5693->dev);
1345     struct v4l2_fwnode_endpoint bus_cfg = {
1346         .bus_type = V4L2_MBUS_CSI2_DPHY,
1347     };
1348     struct fwnode_handle *endpoint;
1349     unsigned int i;
1350     int ret;
1351 
1352     endpoint = fwnode_graph_get_next_endpoint(fwnode, NULL);
1353     if (!endpoint)
1354         return -EPROBE_DEFER; /* Could be provided by cio2-bridge */
1355 
1356     ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &bus_cfg);
1357     fwnode_handle_put(endpoint);
1358     if (ret)
1359         return ret;
1360 
1361     if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2) {
1362         dev_err(ov5693->dev, "only a 2-lane CSI2 config is supported");
1363         ret = -EINVAL;
1364         goto out_free_bus_cfg;
1365     }
1366 
1367     if (!bus_cfg.nr_of_link_frequencies) {
1368         dev_err(ov5693->dev, "no link frequencies defined\n");
1369         ret = -EINVAL;
1370         goto out_free_bus_cfg;
1371     }
1372 
1373     for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++)
1374         if (bus_cfg.link_frequencies[i] == OV5693_LINK_FREQ_419_2MHZ)
1375             break;
1376 
1377     if (i == bus_cfg.nr_of_link_frequencies) {
1378         dev_err(ov5693->dev, "supported link freq %ull not found\n",
1379             OV5693_LINK_FREQ_419_2MHZ);
1380         ret = -EINVAL;
1381         goto out_free_bus_cfg;
1382     }
1383 
1384 out_free_bus_cfg:
1385     v4l2_fwnode_endpoint_free(&bus_cfg);
1386 
1387     return ret;
1388 }
1389 
1390 static int ov5693_probe(struct i2c_client *client)
1391 {
1392     struct ov5693_device *ov5693;
1393     u32 xvclk_rate;
1394     int ret = 0;
1395 
1396     ov5693 = devm_kzalloc(&client->dev, sizeof(*ov5693), GFP_KERNEL);
1397     if (!ov5693)
1398         return -ENOMEM;
1399 
1400     ov5693->client = client;
1401     ov5693->dev = &client->dev;
1402 
1403     ret = ov5693_check_hwcfg(ov5693);
1404     if (ret)
1405         return ret;
1406 
1407     mutex_init(&ov5693->lock);
1408 
1409     v4l2_i2c_subdev_init(&ov5693->sd, client, &ov5693_ops);
1410 
1411     ov5693->xvclk = devm_clk_get_optional(&client->dev, "xvclk");
1412     if (IS_ERR(ov5693->xvclk))
1413         return dev_err_probe(&client->dev, PTR_ERR(ov5693->xvclk),
1414                      "failed to get xvclk: %ld\n",
1415                      PTR_ERR(ov5693->xvclk));
1416 
1417     if (ov5693->xvclk) {
1418         xvclk_rate = clk_get_rate(ov5693->xvclk);
1419     } else {
1420         ret = fwnode_property_read_u32(dev_fwnode(&client->dev),
1421                      "clock-frequency",
1422                      &xvclk_rate);
1423 
1424         if (ret) {
1425             dev_err(&client->dev, "can't get clock frequency");
1426             return ret;
1427         }
1428     }
1429 
1430     if (xvclk_rate != OV5693_XVCLK_FREQ)
1431         dev_warn(&client->dev, "Found clk freq %u, expected %u\n",
1432              xvclk_rate, OV5693_XVCLK_FREQ);
1433 
1434     ret = ov5693_configure_gpios(ov5693);
1435     if (ret)
1436         return ret;
1437 
1438     ret = ov5693_get_regulators(ov5693);
1439     if (ret)
1440         return dev_err_probe(&client->dev, ret,
1441                      "Error fetching regulators\n");
1442 
1443     ov5693->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1444     ov5693->pad.flags = MEDIA_PAD_FL_SOURCE;
1445     ov5693->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1446 
1447     ov5693->mode.crop = ov5693_default_crop;
1448     ov5693->mode.format = ov5693_default_fmt;
1449     ov5693->mode.vts = __ov5693_calc_vts(ov5693->mode.format.height);
1450 
1451     ret = ov5693_init_controls(ov5693);
1452     if (ret)
1453         return ret;
1454 
1455     ret = media_entity_pads_init(&ov5693->sd.entity, 1, &ov5693->pad);
1456     if (ret)
1457         goto err_ctrl_handler_free;
1458 
1459     /*
1460      * We need the driver to work in the event that pm runtime is disable in
1461      * the kernel, so power up and verify the chip now. In the event that
1462      * runtime pm is disabled this will leave the chip on, so that streaming
1463      * will work.
1464      */
1465 
1466     ret = ov5693_sensor_powerup(ov5693);
1467     if (ret)
1468         goto err_media_entity_cleanup;
1469 
1470     ret = ov5693_detect(ov5693);
1471     if (ret)
1472         goto err_powerdown;
1473 
1474     pm_runtime_set_active(&client->dev);
1475     pm_runtime_get_noresume(&client->dev);
1476     pm_runtime_enable(&client->dev);
1477 
1478     ret = v4l2_async_register_subdev_sensor(&ov5693->sd);
1479     if (ret) {
1480         dev_err(&client->dev, "failed to register V4L2 subdev: %d",
1481             ret);
1482         goto err_pm_runtime;
1483     }
1484 
1485     pm_runtime_set_autosuspend_delay(&client->dev, 1000);
1486     pm_runtime_use_autosuspend(&client->dev);
1487     pm_runtime_put_autosuspend(&client->dev);
1488 
1489     return ret;
1490 
1491 err_pm_runtime:
1492     pm_runtime_disable(&client->dev);
1493     pm_runtime_put_noidle(&client->dev);
1494 err_powerdown:
1495     ov5693_sensor_powerdown(ov5693);
1496 err_media_entity_cleanup:
1497     media_entity_cleanup(&ov5693->sd.entity);
1498 err_ctrl_handler_free:
1499     v4l2_ctrl_handler_free(&ov5693->ctrls.handler);
1500 
1501     return ret;
1502 }
1503 
1504 static int ov5693_remove(struct i2c_client *client)
1505 {
1506     struct v4l2_subdev *sd = i2c_get_clientdata(client);
1507     struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
1508 
1509     v4l2_async_unregister_subdev(sd);
1510     media_entity_cleanup(&ov5693->sd.entity);
1511     v4l2_ctrl_handler_free(&ov5693->ctrls.handler);
1512     mutex_destroy(&ov5693->lock);
1513 
1514     /*
1515      * Disable runtime PM. In case runtime PM is disabled in the kernel,
1516      * make sure to turn power off manually.
1517      */
1518     pm_runtime_disable(&client->dev);
1519     if (!pm_runtime_status_suspended(&client->dev))
1520         ov5693_sensor_powerdown(ov5693);
1521     pm_runtime_set_suspended(&client->dev);
1522 
1523     return 0;
1524 }
1525 
1526 static const struct dev_pm_ops ov5693_pm_ops = {
1527     SET_RUNTIME_PM_OPS(ov5693_sensor_suspend, ov5693_sensor_resume, NULL)
1528 };
1529 
1530 static const struct acpi_device_id ov5693_acpi_match[] = {
1531     {"INT33BE"},
1532     {},
1533 };
1534 MODULE_DEVICE_TABLE(acpi, ov5693_acpi_match);
1535 
1536 static const struct of_device_id ov5693_of_match[] = {
1537     { .compatible = "ovti,ov5693", },
1538     { /* sentinel */ },
1539 };
1540 MODULE_DEVICE_TABLE(of, ov5693_of_match);
1541 
1542 static struct i2c_driver ov5693_driver = {
1543     .driver = {
1544         .name = "ov5693",
1545         .acpi_match_table = ov5693_acpi_match,
1546         .of_match_table = ov5693_of_match,
1547         .pm = &ov5693_pm_ops,
1548     },
1549     .probe_new = ov5693_probe,
1550     .remove = ov5693_remove,
1551 };
1552 module_i2c_driver(ov5693_driver);
1553 
1554 MODULE_DESCRIPTION("A low-level driver for OmniVision 5693 sensors");
1555 MODULE_LICENSE("GPL");
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