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0001 // SPDX-License-Identifier: GPL-2.0
0002 // Copyright (c) 2019 Intel Corporation.
0003 
0004 #include <asm/unaligned.h>
0005 #include <linux/acpi.h>
0006 #include <linux/delay.h>
0007 #include <linux/i2c.h>
0008 #include <linux/module.h>
0009 #include <linux/pm_runtime.h>
0010 #include <media/v4l2-ctrls.h>
0011 #include <media/v4l2-device.h>
0012 #include <media/v4l2-fwnode.h>
0013 
0014 #define OV5675_REG_VALUE_08BIT      1
0015 #define OV5675_REG_VALUE_16BIT      2
0016 #define OV5675_REG_VALUE_24BIT      3
0017 
0018 #define OV5675_LINK_FREQ_450MHZ     450000000ULL
0019 #define OV5675_SCLK         90000000LL
0020 #define OV5675_MCLK         19200000
0021 #define OV5675_DATA_LANES       2
0022 #define OV5675_RGB_DEPTH        10
0023 
0024 #define OV5675_REG_CHIP_ID      0x300a
0025 #define OV5675_CHIP_ID          0x5675
0026 
0027 #define OV5675_REG_MODE_SELECT      0x0100
0028 #define OV5675_MODE_STANDBY     0x00
0029 #define OV5675_MODE_STREAMING       0x01
0030 
0031 /* vertical-timings from sensor */
0032 #define OV5675_REG_VTS          0x380e
0033 #define OV5675_VTS_30FPS        0x07e4
0034 #define OV5675_VTS_30FPS_MIN        0x07e4
0035 #define OV5675_VTS_MAX          0x7fff
0036 
0037 /* horizontal-timings from sensor */
0038 #define OV5675_REG_HTS          0x380c
0039 
0040 /* Exposure controls from sensor */
0041 #define OV5675_REG_EXPOSURE     0x3500
0042 #define OV5675_EXPOSURE_MIN     4
0043 #define OV5675_EXPOSURE_MAX_MARGIN  4
0044 #define OV5675_EXPOSURE_STEP        1
0045 
0046 /* Analog gain controls from sensor */
0047 #define OV5675_REG_ANALOG_GAIN      0x3508
0048 #define OV5675_ANAL_GAIN_MIN        128
0049 #define OV5675_ANAL_GAIN_MAX        2047
0050 #define OV5675_ANAL_GAIN_STEP       1
0051 
0052 /* Digital gain controls from sensor */
0053 #define OV5675_REG_DIGITAL_GAIN     0x350a
0054 #define OV5675_REG_MWB_R_GAIN       0x5019
0055 #define OV5675_REG_MWB_G_GAIN       0x501b
0056 #define OV5675_REG_MWB_B_GAIN       0x501d
0057 #define OV5675_DGTL_GAIN_MIN        1024
0058 #define OV5675_DGTL_GAIN_MAX        4095
0059 #define OV5675_DGTL_GAIN_STEP       1
0060 #define OV5675_DGTL_GAIN_DEFAULT    1024
0061 
0062 /* Group Access */
0063 #define OV5675_REG_GROUP_ACCESS     0x3208
0064 #define OV5675_GROUP_HOLD_START     0x0
0065 #define OV5675_GROUP_HOLD_END       0x10
0066 #define OV5675_GROUP_HOLD_LAUNCH    0xa0
0067 
0068 /* Test Pattern Control */
0069 #define OV5675_REG_TEST_PATTERN     0x4503
0070 #define OV5675_TEST_PATTERN_ENABLE  BIT(7)
0071 #define OV5675_TEST_PATTERN_BAR_SHIFT   2
0072 
0073 /* Flip Mirror Controls from sensor */
0074 #define OV5675_REG_FORMAT1      0x3820
0075 #define OV5675_REG_FORMAT2      0x373d
0076 
0077 #define to_ov5675(_sd)          container_of(_sd, struct ov5675, sd)
0078 
0079 enum {
0080     OV5675_LINK_FREQ_900MBPS,
0081 };
0082 
0083 struct ov5675_reg {
0084     u16 address;
0085     u8 val;
0086 };
0087 
0088 struct ov5675_reg_list {
0089     u32 num_of_regs;
0090     const struct ov5675_reg *regs;
0091 };
0092 
0093 struct ov5675_link_freq_config {
0094     const struct ov5675_reg_list reg_list;
0095 };
0096 
0097 struct ov5675_mode {
0098     /* Frame width in pixels */
0099     u32 width;
0100 
0101     /* Frame height in pixels */
0102     u32 height;
0103 
0104     /* Horizontal timining size */
0105     u32 hts;
0106 
0107     /* Default vertical timining size */
0108     u32 vts_def;
0109 
0110     /* Min vertical timining size */
0111     u32 vts_min;
0112 
0113     /* Link frequency needed for this resolution */
0114     u32 link_freq_index;
0115 
0116     /* Sensor register settings for this resolution */
0117     const struct ov5675_reg_list reg_list;
0118 };
0119 
0120 static const struct ov5675_reg mipi_data_rate_900mbps[] = {
0121     {0x0103, 0x01},
0122     {0x0100, 0x00},
0123     {0x0300, 0x04},
0124     {0x0302, 0x8d},
0125     {0x0303, 0x00},
0126     {0x030d, 0x26},
0127 };
0128 
0129 static const struct ov5675_reg mode_2592x1944_regs[] = {
0130     {0x3002, 0x21},
0131     {0x3107, 0x23},
0132     {0x3501, 0x20},
0133     {0x3503, 0x0c},
0134     {0x3508, 0x03},
0135     {0x3509, 0x00},
0136     {0x3600, 0x66},
0137     {0x3602, 0x30},
0138     {0x3610, 0xa5},
0139     {0x3612, 0x93},
0140     {0x3620, 0x80},
0141     {0x3642, 0x0e},
0142     {0x3661, 0x00},
0143     {0x3662, 0x10},
0144     {0x3664, 0xf3},
0145     {0x3665, 0x9e},
0146     {0x3667, 0xa5},
0147     {0x366e, 0x55},
0148     {0x366f, 0x55},
0149     {0x3670, 0x11},
0150     {0x3671, 0x11},
0151     {0x3672, 0x11},
0152     {0x3673, 0x11},
0153     {0x3714, 0x24},
0154     {0x371a, 0x3e},
0155     {0x3733, 0x10},
0156     {0x3734, 0x00},
0157     {0x373d, 0x24},
0158     {0x3764, 0x20},
0159     {0x3765, 0x20},
0160     {0x3766, 0x12},
0161     {0x37a1, 0x14},
0162     {0x37a8, 0x1c},
0163     {0x37ab, 0x0f},
0164     {0x37c2, 0x04},
0165     {0x37cb, 0x00},
0166     {0x37cc, 0x00},
0167     {0x37cd, 0x00},
0168     {0x37ce, 0x00},
0169     {0x37d8, 0x02},
0170     {0x37d9, 0x08},
0171     {0x37dc, 0x04},
0172     {0x3800, 0x00},
0173     {0x3801, 0x00},
0174     {0x3802, 0x00},
0175     {0x3803, 0x04},
0176     {0x3804, 0x0a},
0177     {0x3805, 0x3f},
0178     {0x3806, 0x07},
0179     {0x3807, 0xb3},
0180     {0x3808, 0x0a},
0181     {0x3809, 0x20},
0182     {0x380a, 0x07},
0183     {0x380b, 0x98},
0184     {0x380c, 0x02},
0185     {0x380d, 0xee},
0186     {0x380e, 0x07},
0187     {0x380f, 0xe4},
0188     {0x3811, 0x10},
0189     {0x3813, 0x0d},
0190     {0x3814, 0x01},
0191     {0x3815, 0x01},
0192     {0x3816, 0x01},
0193     {0x3817, 0x01},
0194     {0x381e, 0x02},
0195     {0x3820, 0x88},
0196     {0x3821, 0x01},
0197     {0x3832, 0x04},
0198     {0x3c80, 0x01},
0199     {0x3c82, 0x00},
0200     {0x3c83, 0xc8},
0201     {0x3c8c, 0x0f},
0202     {0x3c8d, 0xa0},
0203     {0x3c90, 0x07},
0204     {0x3c91, 0x00},
0205     {0x3c92, 0x00},
0206     {0x3c93, 0x00},
0207     {0x3c94, 0xd0},
0208     {0x3c95, 0x50},
0209     {0x3c96, 0x35},
0210     {0x3c97, 0x00},
0211     {0x4001, 0xe0},
0212     {0x4008, 0x02},
0213     {0x4009, 0x0d},
0214     {0x400f, 0x80},
0215     {0x4013, 0x02},
0216     {0x4040, 0x00},
0217     {0x4041, 0x07},
0218     {0x404c, 0x50},
0219     {0x404e, 0x20},
0220     {0x4500, 0x06},
0221     {0x4503, 0x00},
0222     {0x450a, 0x04},
0223     {0x4809, 0x04},
0224     {0x480c, 0x12},
0225     {0x4819, 0x70},
0226     {0x4825, 0x32},
0227     {0x4826, 0x32},
0228     {0x482a, 0x06},
0229     {0x4833, 0x08},
0230     {0x4837, 0x0d},
0231     {0x5000, 0x77},
0232     {0x5b00, 0x01},
0233     {0x5b01, 0x10},
0234     {0x5b02, 0x01},
0235     {0x5b03, 0xdb},
0236     {0x5b05, 0x6c},
0237     {0x5e10, 0xfc},
0238     {0x3500, 0x00},
0239     {0x3501, 0x3E},
0240     {0x3502, 0x60},
0241     {0x3503, 0x08},
0242     {0x3508, 0x04},
0243     {0x3509, 0x00},
0244     {0x3832, 0x48},
0245     {0x5780, 0x3e},
0246     {0x5781, 0x0f},
0247     {0x5782, 0x44},
0248     {0x5783, 0x02},
0249     {0x5784, 0x01},
0250     {0x5785, 0x01},
0251     {0x5786, 0x00},
0252     {0x5787, 0x04},
0253     {0x5788, 0x02},
0254     {0x5789, 0x0f},
0255     {0x578a, 0xfd},
0256     {0x578b, 0xf5},
0257     {0x578c, 0xf5},
0258     {0x578d, 0x03},
0259     {0x578e, 0x08},
0260     {0x578f, 0x0c},
0261     {0x5790, 0x08},
0262     {0x5791, 0x06},
0263     {0x5792, 0x00},
0264     {0x5793, 0x52},
0265     {0x5794, 0xa3},
0266     {0x4003, 0x40},
0267     {0x3107, 0x01},
0268     {0x3c80, 0x08},
0269     {0x3c83, 0xb1},
0270     {0x3c8c, 0x10},
0271     {0x3c8d, 0x00},
0272     {0x3c90, 0x00},
0273     {0x3c94, 0x00},
0274     {0x3c95, 0x00},
0275     {0x3c96, 0x00},
0276     {0x37cb, 0x09},
0277     {0x37cc, 0x15},
0278     {0x37cd, 0x1f},
0279     {0x37ce, 0x1f},
0280 };
0281 
0282 static const struct ov5675_reg mode_1296x972_regs[] = {
0283     {0x3002, 0x21},
0284     {0x3107, 0x23},
0285     {0x3501, 0x20},
0286     {0x3503, 0x0c},
0287     {0x3508, 0x03},
0288     {0x3509, 0x00},
0289     {0x3600, 0x66},
0290     {0x3602, 0x30},
0291     {0x3610, 0xa5},
0292     {0x3612, 0x93},
0293     {0x3620, 0x80},
0294     {0x3642, 0x0e},
0295     {0x3661, 0x00},
0296     {0x3662, 0x08},
0297     {0x3664, 0xf3},
0298     {0x3665, 0x9e},
0299     {0x3667, 0xa5},
0300     {0x366e, 0x55},
0301     {0x366f, 0x55},
0302     {0x3670, 0x11},
0303     {0x3671, 0x11},
0304     {0x3672, 0x11},
0305     {0x3673, 0x11},
0306     {0x3714, 0x28},
0307     {0x371a, 0x3e},
0308     {0x3733, 0x10},
0309     {0x3734, 0x00},
0310     {0x373d, 0x24},
0311     {0x3764, 0x20},
0312     {0x3765, 0x20},
0313     {0x3766, 0x12},
0314     {0x37a1, 0x14},
0315     {0x37a8, 0x1c},
0316     {0x37ab, 0x0f},
0317     {0x37c2, 0x14},
0318     {0x37cb, 0x00},
0319     {0x37cc, 0x00},
0320     {0x37cd, 0x00},
0321     {0x37ce, 0x00},
0322     {0x37d8, 0x02},
0323     {0x37d9, 0x04},
0324     {0x37dc, 0x04},
0325     {0x3800, 0x00},
0326     {0x3801, 0x00},
0327     {0x3802, 0x00},
0328     {0x3803, 0x00},
0329     {0x3804, 0x0a},
0330     {0x3805, 0x3f},
0331     {0x3806, 0x07},
0332     {0x3807, 0xb7},
0333     {0x3808, 0x05},
0334     {0x3809, 0x10},
0335     {0x380a, 0x03},
0336     {0x380b, 0xcc},
0337     {0x380c, 0x02},
0338     {0x380d, 0xee},
0339     {0x380e, 0x07},
0340     {0x380f, 0xd0},
0341     {0x3811, 0x08},
0342     {0x3813, 0x0d},
0343     {0x3814, 0x03},
0344     {0x3815, 0x01},
0345     {0x3816, 0x03},
0346     {0x3817, 0x01},
0347     {0x381e, 0x02},
0348     {0x3820, 0x8b},
0349     {0x3821, 0x01},
0350     {0x3832, 0x04},
0351     {0x3c80, 0x01},
0352     {0x3c82, 0x00},
0353     {0x3c83, 0xc8},
0354     {0x3c8c, 0x0f},
0355     {0x3c8d, 0xa0},
0356     {0x3c90, 0x07},
0357     {0x3c91, 0x00},
0358     {0x3c92, 0x00},
0359     {0x3c93, 0x00},
0360     {0x3c94, 0xd0},
0361     {0x3c95, 0x50},
0362     {0x3c96, 0x35},
0363     {0x3c97, 0x00},
0364     {0x4001, 0xe0},
0365     {0x4008, 0x00},
0366     {0x4009, 0x07},
0367     {0x400f, 0x80},
0368     {0x4013, 0x02},
0369     {0x4040, 0x00},
0370     {0x4041, 0x03},
0371     {0x404c, 0x50},
0372     {0x404e, 0x20},
0373     {0x4500, 0x06},
0374     {0x4503, 0x00},
0375     {0x450a, 0x04},
0376     {0x4809, 0x04},
0377     {0x480c, 0x12},
0378     {0x4819, 0x70},
0379     {0x4825, 0x32},
0380     {0x4826, 0x32},
0381     {0x482a, 0x06},
0382     {0x4833, 0x08},
0383     {0x4837, 0x0d},
0384     {0x5000, 0x77},
0385     {0x5b00, 0x01},
0386     {0x5b01, 0x10},
0387     {0x5b02, 0x01},
0388     {0x5b03, 0xdb},
0389     {0x5b05, 0x6c},
0390     {0x5e10, 0xfc},
0391     {0x3500, 0x00},
0392     {0x3501, 0x1F},
0393     {0x3502, 0x20},
0394     {0x3503, 0x08},
0395     {0x3508, 0x04},
0396     {0x3509, 0x00},
0397     {0x3832, 0x48},
0398     {0x5780, 0x3e},
0399     {0x5781, 0x0f},
0400     {0x5782, 0x44},
0401     {0x5783, 0x02},
0402     {0x5784, 0x01},
0403     {0x5785, 0x01},
0404     {0x5786, 0x00},
0405     {0x5787, 0x04},
0406     {0x5788, 0x02},
0407     {0x5789, 0x0f},
0408     {0x578a, 0xfd},
0409     {0x578b, 0xf5},
0410     {0x578c, 0xf5},
0411     {0x578d, 0x03},
0412     {0x578e, 0x08},
0413     {0x578f, 0x0c},
0414     {0x5790, 0x08},
0415     {0x5791, 0x06},
0416     {0x5792, 0x00},
0417     {0x5793, 0x52},
0418     {0x5794, 0xa3},
0419     {0x4003, 0x40},
0420     {0x3107, 0x01},
0421     {0x3c80, 0x08},
0422     {0x3c83, 0xb1},
0423     {0x3c8c, 0x10},
0424     {0x3c8d, 0x00},
0425     {0x3c90, 0x00},
0426     {0x3c94, 0x00},
0427     {0x3c95, 0x00},
0428     {0x3c96, 0x00},
0429     {0x37cb, 0x09},
0430     {0x37cc, 0x15},
0431     {0x37cd, 0x1f},
0432     {0x37ce, 0x1f},
0433 };
0434 
0435 static const char * const ov5675_test_pattern_menu[] = {
0436     "Disabled",
0437     "Standard Color Bar",
0438     "Top-Bottom Darker Color Bar",
0439     "Right-Left Darker Color Bar",
0440     "Bottom-Top Darker Color Bar"
0441 };
0442 
0443 static const s64 link_freq_menu_items[] = {
0444     OV5675_LINK_FREQ_450MHZ,
0445 };
0446 
0447 static const struct ov5675_link_freq_config link_freq_configs[] = {
0448     [OV5675_LINK_FREQ_900MBPS] = {
0449         .reg_list = {
0450             .num_of_regs = ARRAY_SIZE(mipi_data_rate_900mbps),
0451             .regs = mipi_data_rate_900mbps,
0452         }
0453     }
0454 };
0455 
0456 static const struct ov5675_mode supported_modes[] = {
0457     {
0458         .width = 2592,
0459         .height = 1944,
0460         .hts = 1500,
0461         .vts_def = OV5675_VTS_30FPS,
0462         .vts_min = OV5675_VTS_30FPS_MIN,
0463         .reg_list = {
0464             .num_of_regs = ARRAY_SIZE(mode_2592x1944_regs),
0465             .regs = mode_2592x1944_regs,
0466         },
0467         .link_freq_index = OV5675_LINK_FREQ_900MBPS,
0468     },
0469     {
0470         .width = 1296,
0471         .height = 972,
0472         .hts = 1500,
0473         .vts_def = OV5675_VTS_30FPS,
0474         .vts_min = OV5675_VTS_30FPS_MIN,
0475         .reg_list = {
0476             .num_of_regs = ARRAY_SIZE(mode_1296x972_regs),
0477             .regs = mode_1296x972_regs,
0478         },
0479         .link_freq_index = OV5675_LINK_FREQ_900MBPS,
0480     }
0481 };
0482 
0483 struct ov5675 {
0484     struct v4l2_subdev sd;
0485     struct media_pad pad;
0486     struct v4l2_ctrl_handler ctrl_handler;
0487 
0488     /* V4L2 Controls */
0489     struct v4l2_ctrl *link_freq;
0490     struct v4l2_ctrl *pixel_rate;
0491     struct v4l2_ctrl *vblank;
0492     struct v4l2_ctrl *hblank;
0493     struct v4l2_ctrl *exposure;
0494 
0495     /* Current mode */
0496     const struct ov5675_mode *cur_mode;
0497 
0498     /* To serialize asynchronus callbacks */
0499     struct mutex mutex;
0500 
0501     /* Streaming on/off */
0502     bool streaming;
0503 
0504     /* True if the device has been identified */
0505     bool identified;
0506 };
0507 
0508 static u64 to_pixel_rate(u32 f_index)
0509 {
0510     u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV5675_DATA_LANES;
0511 
0512     do_div(pixel_rate, OV5675_RGB_DEPTH);
0513 
0514     return pixel_rate;
0515 }
0516 
0517 static u64 to_pixels_per_line(u32 hts, u32 f_index)
0518 {
0519     u64 ppl = hts * to_pixel_rate(f_index);
0520 
0521     do_div(ppl, OV5675_SCLK);
0522 
0523     return ppl;
0524 }
0525 
0526 static int ov5675_read_reg(struct ov5675 *ov5675, u16 reg, u16 len, u32 *val)
0527 {
0528     struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
0529     struct i2c_msg msgs[2];
0530     u8 addr_buf[2];
0531     u8 data_buf[4] = {0};
0532     int ret;
0533 
0534     if (len > 4)
0535         return -EINVAL;
0536 
0537     put_unaligned_be16(reg, addr_buf);
0538     msgs[0].addr = client->addr;
0539     msgs[0].flags = 0;
0540     msgs[0].len = sizeof(addr_buf);
0541     msgs[0].buf = addr_buf;
0542     msgs[1].addr = client->addr;
0543     msgs[1].flags = I2C_M_RD;
0544     msgs[1].len = len;
0545     msgs[1].buf = &data_buf[4 - len];
0546 
0547     ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
0548     if (ret != ARRAY_SIZE(msgs))
0549         return -EIO;
0550 
0551     *val = get_unaligned_be32(data_buf);
0552 
0553     return 0;
0554 }
0555 
0556 static int ov5675_write_reg(struct ov5675 *ov5675, u16 reg, u16 len, u32 val)
0557 {
0558     struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
0559     u8 buf[6];
0560 
0561     if (len > 4)
0562         return -EINVAL;
0563 
0564     put_unaligned_be16(reg, buf);
0565     put_unaligned_be32(val << 8 * (4 - len), buf + 2);
0566     if (i2c_master_send(client, buf, len + 2) != len + 2)
0567         return -EIO;
0568 
0569     return 0;
0570 }
0571 
0572 static int ov5675_write_reg_list(struct ov5675 *ov5675,
0573                  const struct ov5675_reg_list *r_list)
0574 {
0575     struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
0576     unsigned int i;
0577     int ret;
0578 
0579     for (i = 0; i < r_list->num_of_regs; i++) {
0580         ret = ov5675_write_reg(ov5675, r_list->regs[i].address, 1,
0581                        r_list->regs[i].val);
0582         if (ret) {
0583             dev_err_ratelimited(&client->dev,
0584                     "failed to write reg 0x%4.4x. error = %d",
0585                     r_list->regs[i].address, ret);
0586             return ret;
0587         }
0588     }
0589 
0590     return 0;
0591 }
0592 
0593 static int ov5675_update_digital_gain(struct ov5675 *ov5675, u32 d_gain)
0594 {
0595     int ret;
0596 
0597     ret = ov5675_write_reg(ov5675, OV5675_REG_GROUP_ACCESS,
0598                    OV5675_REG_VALUE_08BIT,
0599                    OV5675_GROUP_HOLD_START);
0600     if (ret)
0601         return ret;
0602 
0603     ret = ov5675_write_reg(ov5675, OV5675_REG_MWB_R_GAIN,
0604                    OV5675_REG_VALUE_16BIT, d_gain);
0605     if (ret)
0606         return ret;
0607 
0608     ret = ov5675_write_reg(ov5675, OV5675_REG_MWB_G_GAIN,
0609                    OV5675_REG_VALUE_16BIT, d_gain);
0610     if (ret)
0611         return ret;
0612 
0613     ret = ov5675_write_reg(ov5675, OV5675_REG_MWB_B_GAIN,
0614                    OV5675_REG_VALUE_16BIT, d_gain);
0615     if (ret)
0616         return ret;
0617 
0618     ret = ov5675_write_reg(ov5675, OV5675_REG_GROUP_ACCESS,
0619                    OV5675_REG_VALUE_08BIT,
0620                    OV5675_GROUP_HOLD_END);
0621     if (ret)
0622         return ret;
0623 
0624     ret = ov5675_write_reg(ov5675, OV5675_REG_GROUP_ACCESS,
0625                    OV5675_REG_VALUE_08BIT,
0626                    OV5675_GROUP_HOLD_LAUNCH);
0627     return ret;
0628 }
0629 
0630 static int ov5675_test_pattern(struct ov5675 *ov5675, u32 pattern)
0631 {
0632     if (pattern)
0633         pattern = (pattern - 1) << OV5675_TEST_PATTERN_BAR_SHIFT |
0634               OV5675_TEST_PATTERN_ENABLE;
0635 
0636     return ov5675_write_reg(ov5675, OV5675_REG_TEST_PATTERN,
0637                 OV5675_REG_VALUE_08BIT, pattern);
0638 }
0639 
0640 /*
0641  * OV5675 supports keeping the pixel order by mirror and flip function
0642  * The Bayer order isn't affected by the flip controls
0643  */
0644 static int ov5675_set_ctrl_hflip(struct ov5675 *ov5675, u32 ctrl_val)
0645 {
0646     int ret;
0647     u32 val;
0648 
0649     ret = ov5675_read_reg(ov5675, OV5675_REG_FORMAT1,
0650                   OV5675_REG_VALUE_08BIT, &val);
0651     if (ret)
0652         return ret;
0653 
0654     return ov5675_write_reg(ov5675, OV5675_REG_FORMAT1,
0655                 OV5675_REG_VALUE_08BIT,
0656                 ctrl_val ? val & ~BIT(3) : val | BIT(3));
0657 }
0658 
0659 static int ov5675_set_ctrl_vflip(struct ov5675 *ov5675, u8 ctrl_val)
0660 {
0661     int ret;
0662     u32 val;
0663 
0664     ret = ov5675_read_reg(ov5675, OV5675_REG_FORMAT1,
0665                   OV5675_REG_VALUE_08BIT, &val);
0666     if (ret)
0667         return ret;
0668 
0669     ret = ov5675_write_reg(ov5675, OV5675_REG_FORMAT1,
0670                    OV5675_REG_VALUE_08BIT,
0671                    ctrl_val ? val | BIT(4) | BIT(5)  : val & ~BIT(4) & ~BIT(5));
0672 
0673     if (ret)
0674         return ret;
0675 
0676     ret = ov5675_read_reg(ov5675, OV5675_REG_FORMAT2,
0677                   OV5675_REG_VALUE_08BIT, &val);
0678 
0679     if (ret)
0680         return ret;
0681 
0682     return ov5675_write_reg(ov5675, OV5675_REG_FORMAT2,
0683                 OV5675_REG_VALUE_08BIT,
0684                 ctrl_val ? val | BIT(1) : val & ~BIT(1));
0685 }
0686 
0687 static int ov5675_set_ctrl(struct v4l2_ctrl *ctrl)
0688 {
0689     struct ov5675 *ov5675 = container_of(ctrl->handler,
0690                          struct ov5675, ctrl_handler);
0691     struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
0692     s64 exposure_max;
0693     int ret = 0;
0694 
0695     /* Propagate change of current control to all related controls */
0696     if (ctrl->id == V4L2_CID_VBLANK) {
0697         /* Update max exposure while meeting expected vblanking */
0698         exposure_max = ov5675->cur_mode->height + ctrl->val -
0699             OV5675_EXPOSURE_MAX_MARGIN;
0700         __v4l2_ctrl_modify_range(ov5675->exposure,
0701                      ov5675->exposure->minimum,
0702                      exposure_max, ov5675->exposure->step,
0703                      exposure_max);
0704     }
0705 
0706     /* V4L2 controls values will be applied only when power is already up */
0707     if (!pm_runtime_get_if_in_use(&client->dev))
0708         return 0;
0709 
0710     switch (ctrl->id) {
0711     case V4L2_CID_ANALOGUE_GAIN:
0712         ret = ov5675_write_reg(ov5675, OV5675_REG_ANALOG_GAIN,
0713                        OV5675_REG_VALUE_16BIT, ctrl->val);
0714         break;
0715 
0716     case V4L2_CID_DIGITAL_GAIN:
0717         ret = ov5675_update_digital_gain(ov5675, ctrl->val);
0718         break;
0719 
0720     case V4L2_CID_EXPOSURE:
0721         /* 4 least significant bits of expsoure are fractional part
0722          * val = val << 4
0723          * for ov5675, the unit of exposure is differnt from other
0724          * OmniVision sensors, its exposure value is twice of the
0725          * register value, the exposure should be divided by 2 before
0726          * set register, e.g. val << 3.
0727          */
0728         ret = ov5675_write_reg(ov5675, OV5675_REG_EXPOSURE,
0729                        OV5675_REG_VALUE_24BIT, ctrl->val << 3);
0730         break;
0731 
0732     case V4L2_CID_VBLANK:
0733         ret = ov5675_write_reg(ov5675, OV5675_REG_VTS,
0734                        OV5675_REG_VALUE_16BIT,
0735                        ov5675->cur_mode->height + ctrl->val +
0736                        10);
0737         break;
0738 
0739     case V4L2_CID_TEST_PATTERN:
0740         ret = ov5675_test_pattern(ov5675, ctrl->val);
0741         break;
0742 
0743     case V4L2_CID_HFLIP:
0744         ov5675_set_ctrl_hflip(ov5675, ctrl->val);
0745         break;
0746 
0747     case V4L2_CID_VFLIP:
0748         ov5675_set_ctrl_vflip(ov5675, ctrl->val);
0749         break;
0750 
0751     default:
0752         ret = -EINVAL;
0753         break;
0754     }
0755 
0756     pm_runtime_put(&client->dev);
0757 
0758     return ret;
0759 }
0760 
0761 static const struct v4l2_ctrl_ops ov5675_ctrl_ops = {
0762     .s_ctrl = ov5675_set_ctrl,
0763 };
0764 
0765 static int ov5675_init_controls(struct ov5675 *ov5675)
0766 {
0767     struct v4l2_ctrl_handler *ctrl_hdlr;
0768     s64 exposure_max, h_blank;
0769     int ret;
0770 
0771     ctrl_hdlr = &ov5675->ctrl_handler;
0772     ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
0773     if (ret)
0774         return ret;
0775 
0776     ctrl_hdlr->lock = &ov5675->mutex;
0777     ov5675->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov5675_ctrl_ops,
0778                        V4L2_CID_LINK_FREQ,
0779                        ARRAY_SIZE(link_freq_menu_items) - 1,
0780                        0, link_freq_menu_items);
0781     if (ov5675->link_freq)
0782         ov5675->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
0783 
0784     ov5675->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
0785                        V4L2_CID_PIXEL_RATE, 0,
0786                        to_pixel_rate(OV5675_LINK_FREQ_900MBPS),
0787                        1,
0788                        to_pixel_rate(OV5675_LINK_FREQ_900MBPS));
0789     ov5675->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
0790               V4L2_CID_VBLANK,
0791               ov5675->cur_mode->vts_min - ov5675->cur_mode->height,
0792               OV5675_VTS_MAX - ov5675->cur_mode->height, 1,
0793               ov5675->cur_mode->vts_def - ov5675->cur_mode->height);
0794     h_blank = to_pixels_per_line(ov5675->cur_mode->hts,
0795           ov5675->cur_mode->link_freq_index) - ov5675->cur_mode->width;
0796     ov5675->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
0797                        V4L2_CID_HBLANK, h_blank, h_blank, 1,
0798                        h_blank);
0799     if (ov5675->hblank)
0800         ov5675->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
0801 
0802     v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
0803               OV5675_ANAL_GAIN_MIN, OV5675_ANAL_GAIN_MAX,
0804               OV5675_ANAL_GAIN_STEP, OV5675_ANAL_GAIN_MIN);
0805     v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
0806               OV5675_DGTL_GAIN_MIN, OV5675_DGTL_GAIN_MAX,
0807               OV5675_DGTL_GAIN_STEP, OV5675_DGTL_GAIN_DEFAULT);
0808     exposure_max = (ov5675->cur_mode->vts_def - OV5675_EXPOSURE_MAX_MARGIN);
0809     ov5675->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
0810                          V4L2_CID_EXPOSURE,
0811                          OV5675_EXPOSURE_MIN, exposure_max,
0812                          OV5675_EXPOSURE_STEP,
0813                          exposure_max);
0814     v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov5675_ctrl_ops,
0815                      V4L2_CID_TEST_PATTERN,
0816                      ARRAY_SIZE(ov5675_test_pattern_menu) - 1,
0817                      0, 0, ov5675_test_pattern_menu);
0818     v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
0819               V4L2_CID_HFLIP, 0, 1, 1, 0);
0820     v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
0821               V4L2_CID_VFLIP, 0, 1, 1, 0);
0822 
0823     if (ctrl_hdlr->error)
0824         return ctrl_hdlr->error;
0825 
0826     ov5675->sd.ctrl_handler = ctrl_hdlr;
0827 
0828     return 0;
0829 }
0830 
0831 static void ov5675_update_pad_format(const struct ov5675_mode *mode,
0832                      struct v4l2_mbus_framefmt *fmt)
0833 {
0834     fmt->width = mode->width;
0835     fmt->height = mode->height;
0836     fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
0837     fmt->field = V4L2_FIELD_NONE;
0838 }
0839 
0840 static int ov5675_identify_module(struct ov5675 *ov5675)
0841 {
0842     struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
0843     int ret;
0844     u32 val;
0845 
0846     if (ov5675->identified)
0847         return 0;
0848 
0849     ret = ov5675_read_reg(ov5675, OV5675_REG_CHIP_ID,
0850                   OV5675_REG_VALUE_24BIT, &val);
0851     if (ret)
0852         return ret;
0853 
0854     if (val != OV5675_CHIP_ID) {
0855         dev_err(&client->dev, "chip id mismatch: %x!=%x",
0856             OV5675_CHIP_ID, val);
0857         return -ENXIO;
0858     }
0859 
0860     ov5675->identified = true;
0861 
0862     return 0;
0863 }
0864 
0865 static int ov5675_start_streaming(struct ov5675 *ov5675)
0866 {
0867     struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
0868     const struct ov5675_reg_list *reg_list;
0869     int link_freq_index, ret;
0870 
0871     ret = ov5675_identify_module(ov5675);
0872     if (ret)
0873         return ret;
0874 
0875     link_freq_index = ov5675->cur_mode->link_freq_index;
0876     reg_list = &link_freq_configs[link_freq_index].reg_list;
0877     ret = ov5675_write_reg_list(ov5675, reg_list);
0878     if (ret) {
0879         dev_err(&client->dev, "failed to set plls");
0880         return ret;
0881     }
0882 
0883     reg_list = &ov5675->cur_mode->reg_list;
0884     ret = ov5675_write_reg_list(ov5675, reg_list);
0885     if (ret) {
0886         dev_err(&client->dev, "failed to set mode");
0887         return ret;
0888     }
0889 
0890     ret = __v4l2_ctrl_handler_setup(ov5675->sd.ctrl_handler);
0891     if (ret)
0892         return ret;
0893 
0894     ret = ov5675_write_reg(ov5675, OV5675_REG_MODE_SELECT,
0895                    OV5675_REG_VALUE_08BIT, OV5675_MODE_STREAMING);
0896     if (ret) {
0897         dev_err(&client->dev, "failed to set stream");
0898         return ret;
0899     }
0900 
0901     return 0;
0902 }
0903 
0904 static void ov5675_stop_streaming(struct ov5675 *ov5675)
0905 {
0906     struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
0907 
0908     if (ov5675_write_reg(ov5675, OV5675_REG_MODE_SELECT,
0909                  OV5675_REG_VALUE_08BIT, OV5675_MODE_STANDBY))
0910         dev_err(&client->dev, "failed to set stream");
0911 }
0912 
0913 static int ov5675_set_stream(struct v4l2_subdev *sd, int enable)
0914 {
0915     struct ov5675 *ov5675 = to_ov5675(sd);
0916     struct i2c_client *client = v4l2_get_subdevdata(sd);
0917     int ret = 0;
0918 
0919     if (ov5675->streaming == enable)
0920         return 0;
0921 
0922     mutex_lock(&ov5675->mutex);
0923     if (enable) {
0924         ret = pm_runtime_resume_and_get(&client->dev);
0925         if (ret < 0) {
0926             mutex_unlock(&ov5675->mutex);
0927             return ret;
0928         }
0929 
0930         ret = ov5675_start_streaming(ov5675);
0931         if (ret) {
0932             enable = 0;
0933             ov5675_stop_streaming(ov5675);
0934             pm_runtime_put(&client->dev);
0935         }
0936     } else {
0937         ov5675_stop_streaming(ov5675);
0938         pm_runtime_put(&client->dev);
0939     }
0940 
0941     ov5675->streaming = enable;
0942     mutex_unlock(&ov5675->mutex);
0943 
0944     return ret;
0945 }
0946 
0947 static int __maybe_unused ov5675_suspend(struct device *dev)
0948 {
0949     struct v4l2_subdev *sd = dev_get_drvdata(dev);
0950     struct ov5675 *ov5675 = to_ov5675(sd);
0951 
0952     mutex_lock(&ov5675->mutex);
0953     if (ov5675->streaming)
0954         ov5675_stop_streaming(ov5675);
0955 
0956     mutex_unlock(&ov5675->mutex);
0957 
0958     return 0;
0959 }
0960 
0961 static int __maybe_unused ov5675_resume(struct device *dev)
0962 {
0963     struct v4l2_subdev *sd = dev_get_drvdata(dev);
0964     struct ov5675 *ov5675 = to_ov5675(sd);
0965     int ret;
0966 
0967     mutex_lock(&ov5675->mutex);
0968     if (ov5675->streaming) {
0969         ret = ov5675_start_streaming(ov5675);
0970         if (ret) {
0971             ov5675->streaming = false;
0972             ov5675_stop_streaming(ov5675);
0973             mutex_unlock(&ov5675->mutex);
0974             return ret;
0975         }
0976     }
0977 
0978     mutex_unlock(&ov5675->mutex);
0979 
0980     return 0;
0981 }
0982 
0983 static int ov5675_set_format(struct v4l2_subdev *sd,
0984                  struct v4l2_subdev_state *sd_state,
0985                  struct v4l2_subdev_format *fmt)
0986 {
0987     struct ov5675 *ov5675 = to_ov5675(sd);
0988     const struct ov5675_mode *mode;
0989     s32 vblank_def, h_blank;
0990 
0991     mode = v4l2_find_nearest_size(supported_modes,
0992                       ARRAY_SIZE(supported_modes), width,
0993                       height, fmt->format.width,
0994                       fmt->format.height);
0995 
0996     mutex_lock(&ov5675->mutex);
0997     ov5675_update_pad_format(mode, &fmt->format);
0998     if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
0999         *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
1000     } else {
1001         ov5675->cur_mode = mode;
1002         __v4l2_ctrl_s_ctrl(ov5675->link_freq, mode->link_freq_index);
1003         __v4l2_ctrl_s_ctrl_int64(ov5675->pixel_rate,
1004                      to_pixel_rate(mode->link_freq_index));
1005 
1006         /* Update limits and set FPS to default */
1007         vblank_def = mode->vts_def - mode->height;
1008         __v4l2_ctrl_modify_range(ov5675->vblank,
1009                      mode->vts_min - mode->height,
1010                      OV5675_VTS_MAX - mode->height, 1,
1011                      vblank_def);
1012         __v4l2_ctrl_s_ctrl(ov5675->vblank, vblank_def);
1013         h_blank = to_pixels_per_line(mode->hts, mode->link_freq_index) -
1014               mode->width;
1015         __v4l2_ctrl_modify_range(ov5675->hblank, h_blank, h_blank, 1,
1016                      h_blank);
1017     }
1018 
1019     mutex_unlock(&ov5675->mutex);
1020 
1021     return 0;
1022 }
1023 
1024 static int ov5675_get_format(struct v4l2_subdev *sd,
1025                  struct v4l2_subdev_state *sd_state,
1026                  struct v4l2_subdev_format *fmt)
1027 {
1028     struct ov5675 *ov5675 = to_ov5675(sd);
1029 
1030     mutex_lock(&ov5675->mutex);
1031     if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
1032         fmt->format = *v4l2_subdev_get_try_format(&ov5675->sd,
1033                               sd_state,
1034                               fmt->pad);
1035     else
1036         ov5675_update_pad_format(ov5675->cur_mode, &fmt->format);
1037 
1038     mutex_unlock(&ov5675->mutex);
1039 
1040     return 0;
1041 }
1042 
1043 static int ov5675_enum_mbus_code(struct v4l2_subdev *sd,
1044                  struct v4l2_subdev_state *sd_state,
1045                  struct v4l2_subdev_mbus_code_enum *code)
1046 {
1047     if (code->index > 0)
1048         return -EINVAL;
1049 
1050     code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
1051 
1052     return 0;
1053 }
1054 
1055 static int ov5675_enum_frame_size(struct v4l2_subdev *sd,
1056                   struct v4l2_subdev_state *sd_state,
1057                   struct v4l2_subdev_frame_size_enum *fse)
1058 {
1059     if (fse->index >= ARRAY_SIZE(supported_modes))
1060         return -EINVAL;
1061 
1062     if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
1063         return -EINVAL;
1064 
1065     fse->min_width = supported_modes[fse->index].width;
1066     fse->max_width = fse->min_width;
1067     fse->min_height = supported_modes[fse->index].height;
1068     fse->max_height = fse->min_height;
1069 
1070     return 0;
1071 }
1072 
1073 static int ov5675_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1074 {
1075     struct ov5675 *ov5675 = to_ov5675(sd);
1076 
1077     mutex_lock(&ov5675->mutex);
1078     ov5675_update_pad_format(&supported_modes[0],
1079                  v4l2_subdev_get_try_format(sd, fh->state, 0));
1080     mutex_unlock(&ov5675->mutex);
1081 
1082     return 0;
1083 }
1084 
1085 static const struct v4l2_subdev_video_ops ov5675_video_ops = {
1086     .s_stream = ov5675_set_stream,
1087 };
1088 
1089 static const struct v4l2_subdev_pad_ops ov5675_pad_ops = {
1090     .set_fmt = ov5675_set_format,
1091     .get_fmt = ov5675_get_format,
1092     .enum_mbus_code = ov5675_enum_mbus_code,
1093     .enum_frame_size = ov5675_enum_frame_size,
1094 };
1095 
1096 static const struct v4l2_subdev_ops ov5675_subdev_ops = {
1097     .video = &ov5675_video_ops,
1098     .pad = &ov5675_pad_ops,
1099 };
1100 
1101 static const struct media_entity_operations ov5675_subdev_entity_ops = {
1102     .link_validate = v4l2_subdev_link_validate,
1103 };
1104 
1105 static const struct v4l2_subdev_internal_ops ov5675_internal_ops = {
1106     .open = ov5675_open,
1107 };
1108 
1109 static int ov5675_check_hwcfg(struct device *dev)
1110 {
1111     struct fwnode_handle *ep;
1112     struct fwnode_handle *fwnode = dev_fwnode(dev);
1113     struct v4l2_fwnode_endpoint bus_cfg = {
1114         .bus_type = V4L2_MBUS_CSI2_DPHY
1115     };
1116     u32 mclk;
1117     int ret;
1118     unsigned int i, j;
1119 
1120     if (!fwnode)
1121         return -ENXIO;
1122 
1123     ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk);
1124 
1125     if (ret) {
1126         dev_err(dev, "can't get clock frequency");
1127         return ret;
1128     }
1129 
1130     if (mclk != OV5675_MCLK) {
1131         dev_err(dev, "external clock %d is not supported", mclk);
1132         return -EINVAL;
1133     }
1134 
1135     ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
1136     if (!ep)
1137         return -ENXIO;
1138 
1139     ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
1140     fwnode_handle_put(ep);
1141     if (ret)
1142         return ret;
1143 
1144     if (bus_cfg.bus.mipi_csi2.num_data_lanes != OV5675_DATA_LANES) {
1145         dev_err(dev, "number of CSI2 data lanes %d is not supported",
1146             bus_cfg.bus.mipi_csi2.num_data_lanes);
1147         ret = -EINVAL;
1148         goto check_hwcfg_error;
1149     }
1150 
1151     if (!bus_cfg.nr_of_link_frequencies) {
1152         dev_err(dev, "no link frequencies defined");
1153         ret = -EINVAL;
1154         goto check_hwcfg_error;
1155     }
1156 
1157     for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
1158         for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
1159             if (link_freq_menu_items[i] ==
1160                 bus_cfg.link_frequencies[j])
1161                 break;
1162         }
1163 
1164         if (j == bus_cfg.nr_of_link_frequencies) {
1165             dev_err(dev, "no link frequency %lld supported",
1166                 link_freq_menu_items[i]);
1167             ret = -EINVAL;
1168             goto check_hwcfg_error;
1169         }
1170     }
1171 
1172 check_hwcfg_error:
1173     v4l2_fwnode_endpoint_free(&bus_cfg);
1174 
1175     return ret;
1176 }
1177 
1178 static int ov5675_remove(struct i2c_client *client)
1179 {
1180     struct v4l2_subdev *sd = i2c_get_clientdata(client);
1181     struct ov5675 *ov5675 = to_ov5675(sd);
1182 
1183     v4l2_async_unregister_subdev(sd);
1184     media_entity_cleanup(&sd->entity);
1185     v4l2_ctrl_handler_free(sd->ctrl_handler);
1186     pm_runtime_disable(&client->dev);
1187     mutex_destroy(&ov5675->mutex);
1188 
1189     return 0;
1190 }
1191 
1192 static int ov5675_probe(struct i2c_client *client)
1193 {
1194     struct ov5675 *ov5675;
1195     bool full_power;
1196     int ret;
1197 
1198     ret = ov5675_check_hwcfg(&client->dev);
1199     if (ret) {
1200         dev_err(&client->dev, "failed to check HW configuration: %d",
1201             ret);
1202         return ret;
1203     }
1204 
1205     ov5675 = devm_kzalloc(&client->dev, sizeof(*ov5675), GFP_KERNEL);
1206     if (!ov5675)
1207         return -ENOMEM;
1208 
1209     v4l2_i2c_subdev_init(&ov5675->sd, client, &ov5675_subdev_ops);
1210 
1211     full_power = acpi_dev_state_d0(&client->dev);
1212     if (full_power) {
1213         ret = ov5675_identify_module(ov5675);
1214         if (ret) {
1215             dev_err(&client->dev, "failed to find sensor: %d", ret);
1216             return ret;
1217         }
1218     }
1219 
1220     mutex_init(&ov5675->mutex);
1221     ov5675->cur_mode = &supported_modes[0];
1222     ret = ov5675_init_controls(ov5675);
1223     if (ret) {
1224         dev_err(&client->dev, "failed to init controls: %d", ret);
1225         goto probe_error_v4l2_ctrl_handler_free;
1226     }
1227 
1228     ov5675->sd.internal_ops = &ov5675_internal_ops;
1229     ov5675->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1230     ov5675->sd.entity.ops = &ov5675_subdev_entity_ops;
1231     ov5675->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1232     ov5675->pad.flags = MEDIA_PAD_FL_SOURCE;
1233     ret = media_entity_pads_init(&ov5675->sd.entity, 1, &ov5675->pad);
1234     if (ret) {
1235         dev_err(&client->dev, "failed to init entity pads: %d", ret);
1236         goto probe_error_v4l2_ctrl_handler_free;
1237     }
1238 
1239     ret = v4l2_async_register_subdev_sensor(&ov5675->sd);
1240     if (ret < 0) {
1241         dev_err(&client->dev, "failed to register V4L2 subdev: %d",
1242             ret);
1243         goto probe_error_media_entity_cleanup;
1244     }
1245 
1246     /*
1247      * Device is already turned on by i2c-core with ACPI domain PM.
1248      * Enable runtime PM and turn off the device.
1249      */
1250 
1251     /* Set the device's state to active if it's in D0 state. */
1252     if (full_power)
1253         pm_runtime_set_active(&client->dev);
1254     pm_runtime_enable(&client->dev);
1255     pm_runtime_idle(&client->dev);
1256 
1257     return 0;
1258 
1259 probe_error_media_entity_cleanup:
1260     media_entity_cleanup(&ov5675->sd.entity);
1261 
1262 probe_error_v4l2_ctrl_handler_free:
1263     v4l2_ctrl_handler_free(ov5675->sd.ctrl_handler);
1264     mutex_destroy(&ov5675->mutex);
1265 
1266     return ret;
1267 }
1268 
1269 static const struct dev_pm_ops ov5675_pm_ops = {
1270     SET_SYSTEM_SLEEP_PM_OPS(ov5675_suspend, ov5675_resume)
1271 };
1272 
1273 #ifdef CONFIG_ACPI
1274 static const struct acpi_device_id ov5675_acpi_ids[] = {
1275     {"OVTI5675"},
1276     {}
1277 };
1278 
1279 MODULE_DEVICE_TABLE(acpi, ov5675_acpi_ids);
1280 #endif
1281 
1282 static struct i2c_driver ov5675_i2c_driver = {
1283     .driver = {
1284         .name = "ov5675",
1285         .pm = &ov5675_pm_ops,
1286         .acpi_match_table = ACPI_PTR(ov5675_acpi_ids),
1287     },
1288     .probe_new = ov5675_probe,
1289     .remove = ov5675_remove,
1290     .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
1291 };
1292 
1293 module_i2c_driver(ov5675_i2c_driver);
1294 
1295 MODULE_AUTHOR("Shawn Tu <shawnx.tu@intel.com>");
1296 MODULE_DESCRIPTION("OmniVision OV5675 sensor driver");
1297 MODULE_LICENSE("GPL v2");
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