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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Driver for SiliconFile NOON010PC30 CIF (1/11") Image Sensor with ISP
0004  *
0005  * Copyright (C) 2010 - 2011 Samsung Electronics Co., Ltd.
0006  * Contact: Sylwester Nawrocki, <s.nawrocki@samsung.com>
0007  *
0008  * Initial register configuration based on a driver authored by
0009  * HeungJun Kim <riverful.kim@samsung.com>.
0010  */
0011 
0012 #include <linux/delay.h>
0013 #include <linux/gpio/consumer.h>
0014 #include <linux/i2c.h>
0015 #include <linux/slab.h>
0016 #include <linux/regulator/consumer.h>
0017 #include <media/i2c/noon010pc30.h>
0018 #include <linux/videodev2.h>
0019 #include <linux/module.h>
0020 #include <media/v4l2-ctrls.h>
0021 #include <media/v4l2-device.h>
0022 #include <media/v4l2-mediabus.h>
0023 #include <media/v4l2-subdev.h>
0024 
0025 static int debug;
0026 module_param(debug, int, 0644);
0027 MODULE_PARM_DESC(debug, "Enable module debug trace. Set to 1 to enable.");
0028 
0029 #define MODULE_NAME     "NOON010PC30"
0030 
0031 /*
0032  * Register offsets within a page
0033  * b15..b8 - page id, b7..b0 - register address
0034  */
0035 #define POWER_CTRL_REG      0x0001
0036 #define PAGEMODE_REG        0x03
0037 #define DEVICE_ID_REG       0x0004
0038 #define NOON010PC30_ID      0x86
0039 #define VDO_CTL_REG(n)      (0x0010 + (n))
0040 #define SYNC_CTL_REG        0x0012
0041 /* Window size and position */
0042 #define WIN_ROWH_REG        0x0013
0043 #define WIN_ROWL_REG        0x0014
0044 #define WIN_COLH_REG        0x0015
0045 #define WIN_COLL_REG        0x0016
0046 #define WIN_HEIGHTH_REG     0x0017
0047 #define WIN_HEIGHTL_REG     0x0018
0048 #define WIN_WIDTHH_REG      0x0019
0049 #define WIN_WIDTHL_REG      0x001A
0050 #define HBLANKH_REG     0x001B
0051 #define HBLANKL_REG     0x001C
0052 #define VSYNCH_REG      0x001D
0053 #define VSYNCL_REG      0x001E
0054 /* VSYNC control */
0055 #define VS_CTL_REG(n)       (0x00A1 + (n))
0056 /* page 1 */
0057 #define ISP_CTL_REG(n)      (0x0110 + (n))
0058 #define YOFS_REG        0x0119
0059 #define DARK_YOFS_REG       0x011A
0060 #define SAT_CTL_REG     0x0120
0061 #define BSAT_REG        0x0121
0062 #define RSAT_REG        0x0122
0063 /* Color correction */
0064 #define CMC_CTL_REG     0x0130
0065 #define CMC_OFSGH_REG       0x0133
0066 #define CMC_OFSGL_REG       0x0135
0067 #define CMC_SIGN_REG        0x0136
0068 #define CMC_GOFS_REG        0x0137
0069 #define CMC_COEF_REG(n)     (0x0138 + (n))
0070 #define CMC_OFS_REG(n)      (0x0141 + (n))
0071 /* Gamma correction */
0072 #define GMA_CTL_REG     0x0160
0073 #define GMA_COEF_REG(n)     (0x0161 + (n))
0074 /* Lens Shading */
0075 #define LENS_CTRL_REG       0x01D0
0076 #define LENS_XCEN_REG       0x01D1
0077 #define LENS_YCEN_REG       0x01D2
0078 #define LENS_RC_REG     0x01D3
0079 #define LENS_GC_REG     0x01D4
0080 #define LENS_BC_REG     0x01D5
0081 #define L_AGON_REG      0x01D6
0082 #define L_AGOFF_REG     0x01D7
0083 /* Page 3 - Auto Exposure */
0084 #define AE_CTL_REG(n)       (0x0310 + (n))
0085 #define AE_CTL9_REG     0x032C
0086 #define AE_CTL10_REG        0x032D
0087 #define AE_YLVL_REG     0x031C
0088 #define AE_YTH_REG(n)       (0x031D + (n))
0089 #define AE_WGT_REG      0x0326
0090 #define EXP_TIMEH_REG       0x0333
0091 #define EXP_TIMEM_REG       0x0334
0092 #define EXP_TIMEL_REG       0x0335
0093 #define EXP_MMINH_REG       0x0336
0094 #define EXP_MMINL_REG       0x0337
0095 #define EXP_MMAXH_REG       0x0338
0096 #define EXP_MMAXM_REG       0x0339
0097 #define EXP_MMAXL_REG       0x033A
0098 /* Page 4 - Auto White Balance */
0099 #define AWB_CTL_REG(n)      (0x0410 + (n))
0100 #define AWB_ENABE       0x80
0101 #define AWB_WGHT_REG        0x0419
0102 #define BGAIN_PAR_REG(n)    (0x044F + (n))
0103 /* Manual white balance, when AWB_CTL2[0]=1 */
0104 #define MWB_RGAIN_REG       0x0466
0105 #define MWB_BGAIN_REG       0x0467
0106 
0107 /* The token to mark an array end */
0108 #define REG_TERM        0xFFFF
0109 
0110 struct noon010_format {
0111     u32 code;
0112     enum v4l2_colorspace colorspace;
0113     u16 ispctl1_reg;
0114 };
0115 
0116 struct noon010_frmsize {
0117     u16 width;
0118     u16 height;
0119     int vid_ctl1;
0120 };
0121 
0122 static const char * const noon010_supply_name[] = {
0123     "vdd_core", "vddio", "vdda"
0124 };
0125 
0126 #define NOON010_NUM_SUPPLIES ARRAY_SIZE(noon010_supply_name)
0127 
0128 struct noon010_info {
0129     struct v4l2_subdev sd;
0130     struct media_pad pad;
0131     struct v4l2_ctrl_handler hdl;
0132     struct regulator_bulk_data supply[NOON010_NUM_SUPPLIES];
0133     struct gpio_desc *reset;
0134     struct gpio_desc *stby;
0135 
0136     /* Protects the struct members below */
0137     struct mutex lock;
0138 
0139     const struct noon010_format *curr_fmt;
0140     const struct noon010_frmsize *curr_win;
0141     unsigned int apply_new_cfg:1;
0142     unsigned int streaming:1;
0143     unsigned int hflip:1;
0144     unsigned int vflip:1;
0145     unsigned int power:1;
0146     u8 i2c_reg_page;
0147 };
0148 
0149 struct i2c_regval {
0150     u16 addr;
0151     u16 val;
0152 };
0153 
0154 /* Supported resolutions. */
0155 static const struct noon010_frmsize noon010_sizes[] = {
0156     {
0157         .width      = 352,
0158         .height     = 288,
0159         .vid_ctl1   = 0,
0160     }, {
0161         .width      = 176,
0162         .height     = 144,
0163         .vid_ctl1   = 0x10,
0164     }, {
0165         .width      = 88,
0166         .height     = 72,
0167         .vid_ctl1   = 0x20,
0168     },
0169 };
0170 
0171 /* Supported pixel formats. */
0172 static const struct noon010_format noon010_formats[] = {
0173     {
0174         .code       = MEDIA_BUS_FMT_YUYV8_2X8,
0175         .colorspace = V4L2_COLORSPACE_JPEG,
0176         .ispctl1_reg    = 0x03,
0177     }, {
0178         .code       = MEDIA_BUS_FMT_YVYU8_2X8,
0179         .colorspace = V4L2_COLORSPACE_JPEG,
0180         .ispctl1_reg    = 0x02,
0181     }, {
0182         .code       = MEDIA_BUS_FMT_VYUY8_2X8,
0183         .colorspace = V4L2_COLORSPACE_JPEG,
0184         .ispctl1_reg    = 0,
0185     }, {
0186         .code       = MEDIA_BUS_FMT_UYVY8_2X8,
0187         .colorspace = V4L2_COLORSPACE_JPEG,
0188         .ispctl1_reg    = 0x01,
0189     }, {
0190         .code       = MEDIA_BUS_FMT_RGB565_2X8_BE,
0191         .colorspace = V4L2_COLORSPACE_JPEG,
0192         .ispctl1_reg    = 0x40,
0193     },
0194 };
0195 
0196 static const struct i2c_regval noon010_base_regs[] = {
0197     { WIN_COLL_REG,     0x06 }, { HBLANKL_REG,      0x7C },
0198     /* Color corection and saturation */
0199     { ISP_CTL_REG(0),   0x30 }, { ISP_CTL_REG(2),   0x30 },
0200     { YOFS_REG,     0x80 }, { DARK_YOFS_REG,    0x04 },
0201     { SAT_CTL_REG,      0x1F }, { BSAT_REG,     0x90 },
0202     { CMC_CTL_REG,      0x0F }, { CMC_OFSGH_REG,    0x3C },
0203     { CMC_OFSGL_REG,    0x2C }, { CMC_SIGN_REG,     0x3F },
0204     { CMC_COEF_REG(0),  0x79 }, { CMC_OFS_REG(0),   0x00 },
0205     { CMC_COEF_REG(1),  0x39 }, { CMC_OFS_REG(1),   0x00 },
0206     { CMC_COEF_REG(2),  0x00 }, { CMC_OFS_REG(2),   0x00 },
0207     { CMC_COEF_REG(3),  0x11 }, { CMC_OFS_REG(3),   0x8B },
0208     { CMC_COEF_REG(4),  0x65 }, { CMC_OFS_REG(4),   0x07 },
0209     { CMC_COEF_REG(5),  0x14 }, { CMC_OFS_REG(5),   0x04 },
0210     { CMC_COEF_REG(6),  0x01 }, { CMC_OFS_REG(6),   0x9C },
0211     { CMC_COEF_REG(7),  0x33 }, { CMC_OFS_REG(7),   0x89 },
0212     { CMC_COEF_REG(8),  0x74 }, { CMC_OFS_REG(8),   0x25 },
0213     /* Automatic white balance */
0214     { AWB_CTL_REG(0),   0x78 }, { AWB_CTL_REG(1),   0x2E },
0215     { AWB_CTL_REG(2),   0x20 }, { AWB_CTL_REG(3),   0x85 },
0216     /* Auto exposure */
0217     { AE_CTL_REG(0),    0xDC }, { AE_CTL_REG(1),    0x81 },
0218     { AE_CTL_REG(2),    0x30 }, { AE_CTL_REG(3),    0xA5 },
0219     { AE_CTL_REG(4),    0x40 }, { AE_CTL_REG(5),    0x51 },
0220     { AE_CTL_REG(6),    0x33 }, { AE_CTL_REG(7),    0x7E },
0221     { AE_CTL9_REG,      0x00 }, { AE_CTL10_REG,     0x02 },
0222     { AE_YLVL_REG,      0x44 }, { AE_YTH_REG(0),    0x34 },
0223     { AE_YTH_REG(1),    0x30 }, { AE_WGT_REG,       0xD5 },
0224     /* Lens shading compensation */
0225     { LENS_CTRL_REG,    0x01 }, { LENS_XCEN_REG,    0x80 },
0226     { LENS_YCEN_REG,    0x70 }, { LENS_RC_REG,      0x53 },
0227     { LENS_GC_REG,      0x40 }, { LENS_BC_REG,      0x3E },
0228     { REG_TERM,     0 },
0229 };
0230 
0231 static inline struct noon010_info *to_noon010(struct v4l2_subdev *sd)
0232 {
0233     return container_of(sd, struct noon010_info, sd);
0234 }
0235 
0236 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
0237 {
0238     return &container_of(ctrl->handler, struct noon010_info, hdl)->sd;
0239 }
0240 
0241 static inline int set_i2c_page(struct noon010_info *info,
0242                    struct i2c_client *client, unsigned int reg)
0243 {
0244     u32 page = reg >> 8 & 0xFF;
0245     int ret = 0;
0246 
0247     if (info->i2c_reg_page != page && (reg & 0xFF) != 0x03) {
0248         ret = i2c_smbus_write_byte_data(client, PAGEMODE_REG, page);
0249         if (!ret)
0250             info->i2c_reg_page = page;
0251     }
0252     return ret;
0253 }
0254 
0255 static int cam_i2c_read(struct v4l2_subdev *sd, u32 reg_addr)
0256 {
0257     struct i2c_client *client = v4l2_get_subdevdata(sd);
0258     struct noon010_info *info = to_noon010(sd);
0259     int ret = set_i2c_page(info, client, reg_addr);
0260 
0261     if (ret)
0262         return ret;
0263     return i2c_smbus_read_byte_data(client, reg_addr & 0xFF);
0264 }
0265 
0266 static int cam_i2c_write(struct v4l2_subdev *sd, u32 reg_addr, u32 val)
0267 {
0268     struct i2c_client *client = v4l2_get_subdevdata(sd);
0269     struct noon010_info *info = to_noon010(sd);
0270     int ret = set_i2c_page(info, client, reg_addr);
0271 
0272     if (ret)
0273         return ret;
0274     return i2c_smbus_write_byte_data(client, reg_addr & 0xFF, val);
0275 }
0276 
0277 static inline int noon010_bulk_write_reg(struct v4l2_subdev *sd,
0278                      const struct i2c_regval *msg)
0279 {
0280     while (msg->addr != REG_TERM) {
0281         int ret = cam_i2c_write(sd, msg->addr, msg->val);
0282 
0283         if (ret)
0284             return ret;
0285         msg++;
0286     }
0287     return 0;
0288 }
0289 
0290 /* Device reset and sleep mode control */
0291 static int noon010_power_ctrl(struct v4l2_subdev *sd, bool reset, bool sleep)
0292 {
0293     struct noon010_info *info = to_noon010(sd);
0294     u8 reg = sleep ? 0xF1 : 0xF0;
0295     int ret = 0;
0296 
0297     if (reset) {
0298         ret = cam_i2c_write(sd, POWER_CTRL_REG, reg | 0x02);
0299         udelay(20);
0300     }
0301     if (!ret) {
0302         ret = cam_i2c_write(sd, POWER_CTRL_REG, reg);
0303         if (reset && !ret)
0304             info->i2c_reg_page = -1;
0305     }
0306     return ret;
0307 }
0308 
0309 /* Automatic white balance control */
0310 static int noon010_enable_autowhitebalance(struct v4l2_subdev *sd, int on)
0311 {
0312     int ret;
0313 
0314     ret = cam_i2c_write(sd, AWB_CTL_REG(1), on ? 0x2E : 0x2F);
0315     if (!ret)
0316         ret = cam_i2c_write(sd, AWB_CTL_REG(0), on ? 0xFB : 0x7B);
0317     return ret;
0318 }
0319 
0320 /* Called with struct noon010_info.lock mutex held */
0321 static int noon010_set_flip(struct v4l2_subdev *sd, int hflip, int vflip)
0322 {
0323     struct noon010_info *info = to_noon010(sd);
0324     int reg, ret;
0325 
0326     reg = cam_i2c_read(sd, VDO_CTL_REG(1));
0327     if (reg < 0)
0328         return reg;
0329 
0330     reg &= 0x7C;
0331     if (hflip)
0332         reg |= 0x01;
0333     if (vflip)
0334         reg |= 0x02;
0335 
0336     ret = cam_i2c_write(sd, VDO_CTL_REG(1), reg | 0x80);
0337     if (!ret) {
0338         info->hflip = hflip;
0339         info->vflip = vflip;
0340     }
0341     return ret;
0342 }
0343 
0344 /* Configure resolution and color format */
0345 static int noon010_set_params(struct v4l2_subdev *sd)
0346 {
0347     struct noon010_info *info = to_noon010(sd);
0348 
0349     int ret = cam_i2c_write(sd, VDO_CTL_REG(0),
0350                 info->curr_win->vid_ctl1);
0351     if (ret)
0352         return ret;
0353     return cam_i2c_write(sd, ISP_CTL_REG(0),
0354                  info->curr_fmt->ispctl1_reg);
0355 }
0356 
0357 /* Find nearest matching image pixel size. */
0358 static int noon010_try_frame_size(struct v4l2_mbus_framefmt *mf,
0359                   const struct noon010_frmsize **size)
0360 {
0361     unsigned int min_err = ~0;
0362     int i = ARRAY_SIZE(noon010_sizes);
0363     const struct noon010_frmsize *fsize = &noon010_sizes[0],
0364         *match = NULL;
0365 
0366     while (i--) {
0367         int err = abs(fsize->width - mf->width)
0368                 + abs(fsize->height - mf->height);
0369 
0370         if (err < min_err) {
0371             min_err = err;
0372             match = fsize;
0373         }
0374         fsize++;
0375     }
0376     if (match) {
0377         mf->width  = match->width;
0378         mf->height = match->height;
0379         if (size)
0380             *size = match;
0381         return 0;
0382     }
0383     return -EINVAL;
0384 }
0385 
0386 /* Called with info.lock mutex held */
0387 static int power_enable(struct noon010_info *info)
0388 {
0389     int ret;
0390 
0391     if (info->power) {
0392         v4l2_info(&info->sd, "%s: sensor is already on\n", __func__);
0393         return 0;
0394     }
0395 
0396     /* Assert standby: line should be flagged active low in descriptor */
0397     if (info->stby)
0398         gpiod_set_value(info->stby, 1);
0399 
0400     /* Assert reset: line should be flagged active low in descriptor */
0401     if (info->reset)
0402         gpiod_set_value(info->reset, 1);
0403 
0404     ret = regulator_bulk_enable(NOON010_NUM_SUPPLIES, info->supply);
0405     if (ret)
0406         return ret;
0407 
0408     /* De-assert reset and standby */
0409     if (info->reset) {
0410         msleep(50);
0411         gpiod_set_value(info->reset, 0);
0412     }
0413     if (info->stby) {
0414         udelay(1000);
0415         gpiod_set_value(info->stby, 0);
0416     }
0417     /* Cycle reset: assert and deassert */
0418     if (info->reset) {
0419         udelay(1000);
0420         gpiod_set_value(info->reset, 1);
0421         msleep(100);
0422         gpiod_set_value(info->reset, 0);
0423         msleep(20);
0424     }
0425     info->power = 1;
0426 
0427     v4l2_dbg(1, debug, &info->sd,  "%s: sensor is on\n", __func__);
0428     return 0;
0429 }
0430 
0431 /* Called with info.lock mutex held */
0432 static int power_disable(struct noon010_info *info)
0433 {
0434     int ret;
0435 
0436     if (!info->power) {
0437         v4l2_info(&info->sd, "%s: sensor is already off\n", __func__);
0438         return 0;
0439     }
0440 
0441     ret = regulator_bulk_disable(NOON010_NUM_SUPPLIES, info->supply);
0442     if (ret)
0443         return ret;
0444 
0445     /* Assert standby and reset */
0446     if (info->stby)
0447         gpiod_set_value(info->stby, 1);
0448 
0449     if (info->reset)
0450         gpiod_set_value(info->reset, 1);
0451 
0452     info->power = 0;
0453 
0454     v4l2_dbg(1, debug, &info->sd,  "%s: sensor is off\n", __func__);
0455 
0456     return 0;
0457 }
0458 
0459 static int noon010_s_ctrl(struct v4l2_ctrl *ctrl)
0460 {
0461     struct v4l2_subdev *sd = to_sd(ctrl);
0462     struct noon010_info *info = to_noon010(sd);
0463     int ret = 0;
0464 
0465     v4l2_dbg(1, debug, sd, "%s: ctrl_id: %d, value: %d\n",
0466          __func__, ctrl->id, ctrl->val);
0467 
0468     mutex_lock(&info->lock);
0469     /*
0470      * If the device is not powered up by the host driver do
0471      * not apply any controls to H/W at this time. Instead
0472      * the controls will be restored right after power-up.
0473      */
0474     if (!info->power)
0475         goto unlock;
0476 
0477     switch (ctrl->id) {
0478     case V4L2_CID_AUTO_WHITE_BALANCE:
0479         ret = noon010_enable_autowhitebalance(sd, ctrl->val);
0480         break;
0481     case V4L2_CID_BLUE_BALANCE:
0482         ret = cam_i2c_write(sd, MWB_BGAIN_REG, ctrl->val);
0483         break;
0484     case V4L2_CID_RED_BALANCE:
0485         ret =  cam_i2c_write(sd, MWB_RGAIN_REG, ctrl->val);
0486         break;
0487     default:
0488         ret = -EINVAL;
0489     }
0490 unlock:
0491     mutex_unlock(&info->lock);
0492     return ret;
0493 }
0494 
0495 static int noon010_enum_mbus_code(struct v4l2_subdev *sd,
0496                   struct v4l2_subdev_state *sd_state,
0497                   struct v4l2_subdev_mbus_code_enum *code)
0498 {
0499     if (code->index >= ARRAY_SIZE(noon010_formats))
0500         return -EINVAL;
0501 
0502     code->code = noon010_formats[code->index].code;
0503     return 0;
0504 }
0505 
0506 static int noon010_get_fmt(struct v4l2_subdev *sd,
0507                struct v4l2_subdev_state *sd_state,
0508                struct v4l2_subdev_format *fmt)
0509 {
0510     struct noon010_info *info = to_noon010(sd);
0511     struct v4l2_mbus_framefmt *mf;
0512 
0513     if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
0514         if (sd_state) {
0515             mf = v4l2_subdev_get_try_format(sd, sd_state, 0);
0516             fmt->format = *mf;
0517         }
0518         return 0;
0519     }
0520     mf = &fmt->format;
0521 
0522     mutex_lock(&info->lock);
0523     mf->width = info->curr_win->width;
0524     mf->height = info->curr_win->height;
0525     mf->code = info->curr_fmt->code;
0526     mf->colorspace = info->curr_fmt->colorspace;
0527     mf->field = V4L2_FIELD_NONE;
0528 
0529     mutex_unlock(&info->lock);
0530     return 0;
0531 }
0532 
0533 /* Return nearest media bus frame format. */
0534 static const struct noon010_format *noon010_try_fmt(struct v4l2_subdev *sd,
0535                         struct v4l2_mbus_framefmt *mf)
0536 {
0537     int i = ARRAY_SIZE(noon010_formats);
0538 
0539     while (--i)
0540         if (mf->code == noon010_formats[i].code)
0541             break;
0542     mf->code = noon010_formats[i].code;
0543 
0544     return &noon010_formats[i];
0545 }
0546 
0547 static int noon010_set_fmt(struct v4l2_subdev *sd,
0548                struct v4l2_subdev_state *sd_state,
0549                struct v4l2_subdev_format *fmt)
0550 {
0551     struct noon010_info *info = to_noon010(sd);
0552     const struct noon010_frmsize *size = NULL;
0553     const struct noon010_format *nf;
0554     struct v4l2_mbus_framefmt *mf;
0555     int ret = 0;
0556 
0557     nf = noon010_try_fmt(sd, &fmt->format);
0558     noon010_try_frame_size(&fmt->format, &size);
0559     fmt->format.colorspace = V4L2_COLORSPACE_JPEG;
0560     fmt->format.field = V4L2_FIELD_NONE;
0561 
0562     if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
0563         if (sd_state) {
0564             mf = v4l2_subdev_get_try_format(sd, sd_state, 0);
0565             *mf = fmt->format;
0566         }
0567         return 0;
0568     }
0569     mutex_lock(&info->lock);
0570     if (!info->streaming) {
0571         info->apply_new_cfg = 1;
0572         info->curr_fmt = nf;
0573         info->curr_win = size;
0574     } else {
0575         ret = -EBUSY;
0576     }
0577     mutex_unlock(&info->lock);
0578     return ret;
0579 }
0580 
0581 /* Called with struct noon010_info.lock mutex held */
0582 static int noon010_base_config(struct v4l2_subdev *sd)
0583 {
0584     int ret = noon010_bulk_write_reg(sd, noon010_base_regs);
0585     if (!ret)
0586         ret = noon010_set_params(sd);
0587     if (!ret)
0588         ret = noon010_set_flip(sd, 1, 0);
0589 
0590     return ret;
0591 }
0592 
0593 static int noon010_s_power(struct v4l2_subdev *sd, int on)
0594 {
0595     struct noon010_info *info = to_noon010(sd);
0596     int ret;
0597 
0598     mutex_lock(&info->lock);
0599     if (on) {
0600         ret = power_enable(info);
0601         if (!ret)
0602             ret = noon010_base_config(sd);
0603     } else {
0604         noon010_power_ctrl(sd, false, true);
0605         ret = power_disable(info);
0606     }
0607     mutex_unlock(&info->lock);
0608 
0609     /* Restore the controls state */
0610     if (!ret && on)
0611         ret = v4l2_ctrl_handler_setup(&info->hdl);
0612 
0613     return ret;
0614 }
0615 
0616 static int noon010_s_stream(struct v4l2_subdev *sd, int on)
0617 {
0618     struct noon010_info *info = to_noon010(sd);
0619     int ret = 0;
0620 
0621     mutex_lock(&info->lock);
0622     if (!info->streaming != !on) {
0623         ret = noon010_power_ctrl(sd, false, !on);
0624         if (!ret)
0625             info->streaming = on;
0626     }
0627     if (!ret && on && info->apply_new_cfg) {
0628         ret = noon010_set_params(sd);
0629         if (!ret)
0630             info->apply_new_cfg = 0;
0631     }
0632     mutex_unlock(&info->lock);
0633     return ret;
0634 }
0635 
0636 static int noon010_log_status(struct v4l2_subdev *sd)
0637 {
0638     struct noon010_info *info = to_noon010(sd);
0639 
0640     v4l2_ctrl_handler_log_status(&info->hdl, sd->name);
0641     return 0;
0642 }
0643 
0644 static int noon010_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
0645 {
0646     struct v4l2_mbus_framefmt *mf = v4l2_subdev_get_try_format(sd,
0647                                    fh->state,
0648                                    0);
0649 
0650     mf->width = noon010_sizes[0].width;
0651     mf->height = noon010_sizes[0].height;
0652     mf->code = noon010_formats[0].code;
0653     mf->colorspace = V4L2_COLORSPACE_JPEG;
0654     mf->field = V4L2_FIELD_NONE;
0655     return 0;
0656 }
0657 
0658 static const struct v4l2_subdev_internal_ops noon010_subdev_internal_ops = {
0659     .open = noon010_open,
0660 };
0661 
0662 static const struct v4l2_ctrl_ops noon010_ctrl_ops = {
0663     .s_ctrl = noon010_s_ctrl,
0664 };
0665 
0666 static const struct v4l2_subdev_core_ops noon010_core_ops = {
0667     .s_power    = noon010_s_power,
0668     .log_status = noon010_log_status,
0669 };
0670 
0671 static const struct v4l2_subdev_pad_ops noon010_pad_ops = {
0672     .enum_mbus_code = noon010_enum_mbus_code,
0673     .get_fmt    = noon010_get_fmt,
0674     .set_fmt    = noon010_set_fmt,
0675 };
0676 
0677 static const struct v4l2_subdev_video_ops noon010_video_ops = {
0678     .s_stream   = noon010_s_stream,
0679 };
0680 
0681 static const struct v4l2_subdev_ops noon010_ops = {
0682     .core   = &noon010_core_ops,
0683     .pad    = &noon010_pad_ops,
0684     .video  = &noon010_video_ops,
0685 };
0686 
0687 /* Return 0 if NOON010PC30L sensor type was detected or -ENODEV otherwise. */
0688 static int noon010_detect(struct i2c_client *client, struct noon010_info *info)
0689 {
0690     int ret;
0691 
0692     ret = power_enable(info);
0693     if (ret)
0694         return ret;
0695 
0696     ret = i2c_smbus_read_byte_data(client, DEVICE_ID_REG);
0697     if (ret < 0)
0698         dev_err(&client->dev, "I2C read failed: 0x%X\n", ret);
0699 
0700     power_disable(info);
0701 
0702     return ret == NOON010PC30_ID ? 0 : -ENODEV;
0703 }
0704 
0705 static int noon010_probe(struct i2c_client *client,
0706              const struct i2c_device_id *id)
0707 {
0708     struct noon010_info *info;
0709     struct v4l2_subdev *sd;
0710     const struct noon010pc30_platform_data *pdata
0711         = client->dev.platform_data;
0712     int ret;
0713     int i;
0714 
0715     if (!pdata) {
0716         dev_err(&client->dev, "No platform data!\n");
0717         return -EIO;
0718     }
0719 
0720     info = devm_kzalloc(&client->dev, sizeof(*info), GFP_KERNEL);
0721     if (!info)
0722         return -ENOMEM;
0723 
0724     mutex_init(&info->lock);
0725     sd = &info->sd;
0726     v4l2_i2c_subdev_init(sd, client, &noon010_ops);
0727     /* Static name; NEVER use in new drivers! */
0728     strscpy(sd->name, MODULE_NAME, sizeof(sd->name));
0729 
0730     sd->internal_ops = &noon010_subdev_internal_ops;
0731     sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
0732 
0733     v4l2_ctrl_handler_init(&info->hdl, 3);
0734 
0735     v4l2_ctrl_new_std(&info->hdl, &noon010_ctrl_ops,
0736               V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
0737     v4l2_ctrl_new_std(&info->hdl, &noon010_ctrl_ops,
0738               V4L2_CID_RED_BALANCE, 0, 127, 1, 64);
0739     v4l2_ctrl_new_std(&info->hdl, &noon010_ctrl_ops,
0740               V4L2_CID_BLUE_BALANCE, 0, 127, 1, 64);
0741 
0742     sd->ctrl_handler = &info->hdl;
0743 
0744     ret = info->hdl.error;
0745     if (ret)
0746         goto np_err;
0747 
0748     info->i2c_reg_page  = -1;
0749     info->curr_fmt      = &noon010_formats[0];
0750     info->curr_win      = &noon010_sizes[0];
0751 
0752     /* Request reset asserted so we get put into reset */
0753     info->reset = devm_gpiod_get(&client->dev, "reset", GPIOD_OUT_HIGH);
0754     if (IS_ERR(info->reset)) {
0755         ret = PTR_ERR(info->reset);
0756         goto np_err;
0757     }
0758     gpiod_set_consumer_name(info->reset, "NOON010PC30 NRST");
0759 
0760     /* Request standby asserted so we get put into standby */
0761     info->stby = devm_gpiod_get(&client->dev, "standby", GPIOD_OUT_HIGH);
0762     if (IS_ERR(info->stby)) {
0763         ret = PTR_ERR(info->stby);
0764         goto np_err;
0765     }
0766     gpiod_set_consumer_name(info->reset, "NOON010PC30 STBY");
0767 
0768     for (i = 0; i < NOON010_NUM_SUPPLIES; i++)
0769         info->supply[i].supply = noon010_supply_name[i];
0770 
0771     ret = devm_regulator_bulk_get(&client->dev, NOON010_NUM_SUPPLIES,
0772                  info->supply);
0773     if (ret)
0774         goto np_err;
0775 
0776     info->pad.flags = MEDIA_PAD_FL_SOURCE;
0777     sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
0778     ret = media_entity_pads_init(&sd->entity, 1, &info->pad);
0779     if (ret < 0)
0780         goto np_err;
0781 
0782     ret = noon010_detect(client, info);
0783     if (!ret)
0784         return 0;
0785 
0786 np_err:
0787     v4l2_ctrl_handler_free(&info->hdl);
0788     v4l2_device_unregister_subdev(sd);
0789     return ret;
0790 }
0791 
0792 static int noon010_remove(struct i2c_client *client)
0793 {
0794     struct v4l2_subdev *sd = i2c_get_clientdata(client);
0795     struct noon010_info *info = to_noon010(sd);
0796 
0797     v4l2_device_unregister_subdev(sd);
0798     v4l2_ctrl_handler_free(&info->hdl);
0799     media_entity_cleanup(&sd->entity);
0800 
0801     return 0;
0802 }
0803 
0804 static const struct i2c_device_id noon010_id[] = {
0805     { MODULE_NAME, 0 },
0806     { },
0807 };
0808 MODULE_DEVICE_TABLE(i2c, noon010_id);
0809 
0810 
0811 static struct i2c_driver noon010_i2c_driver = {
0812     .driver = {
0813         .name = MODULE_NAME
0814     },
0815     .probe      = noon010_probe,
0816     .remove     = noon010_remove,
0817     .id_table   = noon010_id,
0818 };
0819 
0820 module_i2c_driver(noon010_i2c_driver);
0821 
0822 MODULE_DESCRIPTION("Siliconfile NOON010PC30 camera driver");
0823 MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
0824 MODULE_LICENSE("GPL");
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