0001
0002
0003
0004
0005
0006
0007 #include <asm/unaligned.h>
0008
0009 #include <linux/clk.h>
0010 #include <linux/delay.h>
0011 #include <linux/i2c.h>
0012 #include <linux/module.h>
0013 #include <linux/pm_runtime.h>
0014
0015 #include <media/v4l2-ctrls.h>
0016 #include <media/v4l2-fwnode.h>
0017 #include <media/v4l2-subdev.h>
0018
0019
0020 #define IMX335_REG_MODE_SELECT 0x3000
0021 #define IMX335_MODE_STANDBY 0x01
0022 #define IMX335_MODE_STREAMING 0x00
0023
0024
0025 #define IMX335_REG_LPFR 0x3030
0026
0027
0028 #define IMX335_REG_ID 0x3912
0029 #define IMX335_ID 0x00
0030
0031
0032 #define IMX335_REG_SHUTTER 0x3058
0033 #define IMX335_EXPOSURE_MIN 1
0034 #define IMX335_EXPOSURE_OFFSET 9
0035 #define IMX335_EXPOSURE_STEP 1
0036 #define IMX335_EXPOSURE_DEFAULT 0x0648
0037
0038
0039 #define IMX335_REG_AGAIN 0x30e8
0040 #define IMX335_AGAIN_MIN 0
0041 #define IMX335_AGAIN_MAX 240
0042 #define IMX335_AGAIN_STEP 1
0043 #define IMX335_AGAIN_DEFAULT 0
0044
0045
0046 #define IMX335_REG_HOLD 0x3001
0047
0048
0049 #define IMX335_INCLK_RATE 24000000
0050
0051
0052 #define IMX335_LINK_FREQ 594000000
0053 #define IMX335_NUM_DATA_LANES 4
0054
0055 #define IMX335_REG_MIN 0x00
0056 #define IMX335_REG_MAX 0xfffff
0057
0058
0059
0060
0061
0062
0063 struct imx335_reg {
0064 u16 address;
0065 u8 val;
0066 };
0067
0068
0069
0070
0071
0072
0073 struct imx335_reg_list {
0074 u32 num_of_regs;
0075 const struct imx335_reg *regs;
0076 };
0077
0078
0079
0080
0081
0082
0083
0084
0085
0086
0087
0088
0089
0090
0091 struct imx335_mode {
0092 u32 width;
0093 u32 height;
0094 u32 code;
0095 u32 hblank;
0096 u32 vblank;
0097 u32 vblank_min;
0098 u32 vblank_max;
0099 u64 pclk;
0100 u32 link_freq_idx;
0101 struct imx335_reg_list reg_list;
0102 };
0103
0104
0105
0106
0107
0108
0109
0110
0111
0112
0113
0114
0115
0116
0117
0118
0119
0120
0121
0122
0123
0124 struct imx335 {
0125 struct device *dev;
0126 struct i2c_client *client;
0127 struct v4l2_subdev sd;
0128 struct media_pad pad;
0129 struct gpio_desc *reset_gpio;
0130 struct clk *inclk;
0131 struct v4l2_ctrl_handler ctrl_handler;
0132 struct v4l2_ctrl *link_freq_ctrl;
0133 struct v4l2_ctrl *pclk_ctrl;
0134 struct v4l2_ctrl *hblank_ctrl;
0135 struct v4l2_ctrl *vblank_ctrl;
0136 struct {
0137 struct v4l2_ctrl *exp_ctrl;
0138 struct v4l2_ctrl *again_ctrl;
0139 };
0140 u32 vblank;
0141 const struct imx335_mode *cur_mode;
0142 struct mutex mutex;
0143 bool streaming;
0144 };
0145
0146 static const s64 link_freq[] = {
0147 IMX335_LINK_FREQ,
0148 };
0149
0150
0151 static const struct imx335_reg mode_2592x1940_regs[] = {
0152 {0x3000, 0x01},
0153 {0x3002, 0x00},
0154 {0x300c, 0x3b},
0155 {0x300d, 0x2a},
0156 {0x3018, 0x04},
0157 {0x302c, 0x3c},
0158 {0x302e, 0x20},
0159 {0x3056, 0x94},
0160 {0x3074, 0xc8},
0161 {0x3076, 0x28},
0162 {0x304c, 0x00},
0163 {0x314c, 0xc6},
0164 {0x315a, 0x02},
0165 {0x3168, 0xa0},
0166 {0x316a, 0x7e},
0167 {0x31a1, 0x00},
0168 {0x3288, 0x21},
0169 {0x328a, 0x02},
0170 {0x3414, 0x05},
0171 {0x3416, 0x18},
0172 {0x3648, 0x01},
0173 {0x364a, 0x04},
0174 {0x364c, 0x04},
0175 {0x3678, 0x01},
0176 {0x367c, 0x31},
0177 {0x367e, 0x31},
0178 {0x3706, 0x10},
0179 {0x3708, 0x03},
0180 {0x3714, 0x02},
0181 {0x3715, 0x02},
0182 {0x3716, 0x01},
0183 {0x3717, 0x03},
0184 {0x371c, 0x3d},
0185 {0x371d, 0x3f},
0186 {0x372c, 0x00},
0187 {0x372d, 0x00},
0188 {0x372e, 0x46},
0189 {0x372f, 0x00},
0190 {0x3730, 0x89},
0191 {0x3731, 0x00},
0192 {0x3732, 0x08},
0193 {0x3733, 0x01},
0194 {0x3734, 0xfe},
0195 {0x3735, 0x05},
0196 {0x3740, 0x02},
0197 {0x375d, 0x00},
0198 {0x375e, 0x00},
0199 {0x375f, 0x11},
0200 {0x3760, 0x01},
0201 {0x3768, 0x1b},
0202 {0x3769, 0x1b},
0203 {0x376a, 0x1b},
0204 {0x376b, 0x1b},
0205 {0x376c, 0x1a},
0206 {0x376d, 0x17},
0207 {0x376e, 0x0f},
0208 {0x3776, 0x00},
0209 {0x3777, 0x00},
0210 {0x3778, 0x46},
0211 {0x3779, 0x00},
0212 {0x377a, 0x89},
0213 {0x377b, 0x00},
0214 {0x377c, 0x08},
0215 {0x377d, 0x01},
0216 {0x377e, 0x23},
0217 {0x377f, 0x02},
0218 {0x3780, 0xd9},
0219 {0x3781, 0x03},
0220 {0x3782, 0xf5},
0221 {0x3783, 0x06},
0222 {0x3784, 0xa5},
0223 {0x3788, 0x0f},
0224 {0x378a, 0xd9},
0225 {0x378b, 0x03},
0226 {0x378c, 0xeb},
0227 {0x378d, 0x05},
0228 {0x378e, 0x87},
0229 {0x378f, 0x06},
0230 {0x3790, 0xf5},
0231 {0x3792, 0x43},
0232 {0x3794, 0x7a},
0233 {0x3796, 0xa1},
0234 {0x37b0, 0x36},
0235 {0x3a00, 0x01},
0236 };
0237
0238
0239 static const struct imx335_mode supported_mode = {
0240 .width = 2592,
0241 .height = 1940,
0242 .hblank = 342,
0243 .vblank = 2560,
0244 .vblank_min = 2560,
0245 .vblank_max = 133060,
0246 .pclk = 396000000,
0247 .link_freq_idx = 0,
0248 .code = MEDIA_BUS_FMT_SRGGB12_1X12,
0249 .reg_list = {
0250 .num_of_regs = ARRAY_SIZE(mode_2592x1940_regs),
0251 .regs = mode_2592x1940_regs,
0252 },
0253 };
0254
0255
0256
0257
0258
0259
0260
0261 static inline struct imx335 *to_imx335(struct v4l2_subdev *subdev)
0262 {
0263 return container_of(subdev, struct imx335, sd);
0264 }
0265
0266
0267
0268
0269
0270
0271
0272
0273
0274
0275
0276
0277 static int imx335_read_reg(struct imx335 *imx335, u16 reg, u32 len, u32 *val)
0278 {
0279 struct i2c_client *client = v4l2_get_subdevdata(&imx335->sd);
0280 struct i2c_msg msgs[2] = {0};
0281 u8 addr_buf[2] = {0};
0282 u8 data_buf[4] = {0};
0283 int ret;
0284
0285 if (WARN_ON(len > 4))
0286 return -EINVAL;
0287
0288 put_unaligned_be16(reg, addr_buf);
0289
0290
0291 msgs[0].addr = client->addr;
0292 msgs[0].flags = 0;
0293 msgs[0].len = ARRAY_SIZE(addr_buf);
0294 msgs[0].buf = addr_buf;
0295
0296
0297 msgs[1].addr = client->addr;
0298 msgs[1].flags = I2C_M_RD;
0299 msgs[1].len = len;
0300 msgs[1].buf = data_buf;
0301
0302 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
0303 if (ret != ARRAY_SIZE(msgs))
0304 return -EIO;
0305
0306 *val = get_unaligned_le32(data_buf);
0307
0308 return 0;
0309 }
0310
0311
0312
0313
0314
0315
0316
0317
0318
0319
0320
0321
0322 static int imx335_write_reg(struct imx335 *imx335, u16 reg, u32 len, u32 val)
0323 {
0324 struct i2c_client *client = v4l2_get_subdevdata(&imx335->sd);
0325 u8 buf[6] = {0};
0326
0327 if (WARN_ON(len > 4))
0328 return -EINVAL;
0329
0330 put_unaligned_be16(reg, buf);
0331 put_unaligned_le32(val, buf + 2);
0332 if (i2c_master_send(client, buf, len + 2) != len + 2)
0333 return -EIO;
0334
0335 return 0;
0336 }
0337
0338
0339
0340
0341
0342
0343
0344
0345
0346 static int imx335_write_regs(struct imx335 *imx335,
0347 const struct imx335_reg *regs, u32 len)
0348 {
0349 unsigned int i;
0350 int ret;
0351
0352 for (i = 0; i < len; i++) {
0353 ret = imx335_write_reg(imx335, regs[i].address, 1, regs[i].val);
0354 if (ret)
0355 return ret;
0356 }
0357
0358 return 0;
0359 }
0360
0361
0362
0363
0364
0365
0366
0367
0368 static int imx335_update_controls(struct imx335 *imx335,
0369 const struct imx335_mode *mode)
0370 {
0371 int ret;
0372
0373 ret = __v4l2_ctrl_s_ctrl(imx335->link_freq_ctrl, mode->link_freq_idx);
0374 if (ret)
0375 return ret;
0376
0377 ret = __v4l2_ctrl_s_ctrl(imx335->hblank_ctrl, mode->hblank);
0378 if (ret)
0379 return ret;
0380
0381 return __v4l2_ctrl_modify_range(imx335->vblank_ctrl, mode->vblank_min,
0382 mode->vblank_max, 1, mode->vblank);
0383 }
0384
0385
0386
0387
0388
0389
0390
0391
0392
0393 static int imx335_update_exp_gain(struct imx335 *imx335, u32 exposure, u32 gain)
0394 {
0395 u32 lpfr, shutter;
0396 int ret;
0397
0398 lpfr = imx335->vblank + imx335->cur_mode->height;
0399 shutter = lpfr - exposure;
0400
0401 dev_dbg(imx335->dev, "Set exp %u, analog gain %u, shutter %u, lpfr %u",
0402 exposure, gain, shutter, lpfr);
0403
0404 ret = imx335_write_reg(imx335, IMX335_REG_HOLD, 1, 1);
0405 if (ret)
0406 return ret;
0407
0408 ret = imx335_write_reg(imx335, IMX335_REG_LPFR, 3, lpfr);
0409 if (ret)
0410 goto error_release_group_hold;
0411
0412 ret = imx335_write_reg(imx335, IMX335_REG_SHUTTER, 3, shutter);
0413 if (ret)
0414 goto error_release_group_hold;
0415
0416 ret = imx335_write_reg(imx335, IMX335_REG_AGAIN, 2, gain);
0417
0418 error_release_group_hold:
0419 imx335_write_reg(imx335, IMX335_REG_HOLD, 1, 0);
0420
0421 return ret;
0422 }
0423
0424
0425
0426
0427
0428
0429
0430
0431
0432
0433
0434
0435
0436 static int imx335_set_ctrl(struct v4l2_ctrl *ctrl)
0437 {
0438 struct imx335 *imx335 =
0439 container_of(ctrl->handler, struct imx335, ctrl_handler);
0440 u32 analog_gain;
0441 u32 exposure;
0442 int ret;
0443
0444 switch (ctrl->id) {
0445 case V4L2_CID_VBLANK:
0446 imx335->vblank = imx335->vblank_ctrl->val;
0447
0448 dev_dbg(imx335->dev, "Received vblank %u, new lpfr %u",
0449 imx335->vblank,
0450 imx335->vblank + imx335->cur_mode->height);
0451
0452 ret = __v4l2_ctrl_modify_range(imx335->exp_ctrl,
0453 IMX335_EXPOSURE_MIN,
0454 imx335->vblank +
0455 imx335->cur_mode->height -
0456 IMX335_EXPOSURE_OFFSET,
0457 1, IMX335_EXPOSURE_DEFAULT);
0458 break;
0459 case V4L2_CID_EXPOSURE:
0460
0461 if (!pm_runtime_get_if_in_use(imx335->dev))
0462 return 0;
0463
0464 exposure = ctrl->val;
0465 analog_gain = imx335->again_ctrl->val;
0466
0467 dev_dbg(imx335->dev, "Received exp %u, analog gain %u",
0468 exposure, analog_gain);
0469
0470 ret = imx335_update_exp_gain(imx335, exposure, analog_gain);
0471
0472 pm_runtime_put(imx335->dev);
0473
0474 break;
0475 default:
0476 dev_err(imx335->dev, "Invalid control %d", ctrl->id);
0477 ret = -EINVAL;
0478 }
0479
0480 return ret;
0481 }
0482
0483
0484 static const struct v4l2_ctrl_ops imx335_ctrl_ops = {
0485 .s_ctrl = imx335_set_ctrl,
0486 };
0487
0488
0489
0490
0491
0492
0493
0494
0495
0496 static int imx335_enum_mbus_code(struct v4l2_subdev *sd,
0497 struct v4l2_subdev_state *sd_state,
0498 struct v4l2_subdev_mbus_code_enum *code)
0499 {
0500 if (code->index > 0)
0501 return -EINVAL;
0502
0503 code->code = supported_mode.code;
0504
0505 return 0;
0506 }
0507
0508
0509
0510
0511
0512
0513
0514
0515
0516 static int imx335_enum_frame_size(struct v4l2_subdev *sd,
0517 struct v4l2_subdev_state *sd_state,
0518 struct v4l2_subdev_frame_size_enum *fsize)
0519 {
0520 if (fsize->index > 0)
0521 return -EINVAL;
0522
0523 if (fsize->code != supported_mode.code)
0524 return -EINVAL;
0525
0526 fsize->min_width = supported_mode.width;
0527 fsize->max_width = fsize->min_width;
0528 fsize->min_height = supported_mode.height;
0529 fsize->max_height = fsize->min_height;
0530
0531 return 0;
0532 }
0533
0534
0535
0536
0537
0538
0539
0540
0541 static void imx335_fill_pad_format(struct imx335 *imx335,
0542 const struct imx335_mode *mode,
0543 struct v4l2_subdev_format *fmt)
0544 {
0545 fmt->format.width = mode->width;
0546 fmt->format.height = mode->height;
0547 fmt->format.code = mode->code;
0548 fmt->format.field = V4L2_FIELD_NONE;
0549 fmt->format.colorspace = V4L2_COLORSPACE_RAW;
0550 fmt->format.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
0551 fmt->format.quantization = V4L2_QUANTIZATION_DEFAULT;
0552 fmt->format.xfer_func = V4L2_XFER_FUNC_NONE;
0553 }
0554
0555
0556
0557
0558
0559
0560
0561
0562
0563 static int imx335_get_pad_format(struct v4l2_subdev *sd,
0564 struct v4l2_subdev_state *sd_state,
0565 struct v4l2_subdev_format *fmt)
0566 {
0567 struct imx335 *imx335 = to_imx335(sd);
0568
0569 mutex_lock(&imx335->mutex);
0570
0571 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
0572 struct v4l2_mbus_framefmt *framefmt;
0573
0574 framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
0575 fmt->format = *framefmt;
0576 } else {
0577 imx335_fill_pad_format(imx335, imx335->cur_mode, fmt);
0578 }
0579
0580 mutex_unlock(&imx335->mutex);
0581
0582 return 0;
0583 }
0584
0585
0586
0587
0588
0589
0590
0591
0592
0593 static int imx335_set_pad_format(struct v4l2_subdev *sd,
0594 struct v4l2_subdev_state *sd_state,
0595 struct v4l2_subdev_format *fmt)
0596 {
0597 struct imx335 *imx335 = to_imx335(sd);
0598 const struct imx335_mode *mode;
0599 int ret = 0;
0600
0601 mutex_lock(&imx335->mutex);
0602
0603 mode = &supported_mode;
0604 imx335_fill_pad_format(imx335, mode, fmt);
0605
0606 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
0607 struct v4l2_mbus_framefmt *framefmt;
0608
0609 framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
0610 *framefmt = fmt->format;
0611 } else {
0612 ret = imx335_update_controls(imx335, mode);
0613 if (!ret)
0614 imx335->cur_mode = mode;
0615 }
0616
0617 mutex_unlock(&imx335->mutex);
0618
0619 return ret;
0620 }
0621
0622
0623
0624
0625
0626
0627
0628
0629 static int imx335_init_pad_cfg(struct v4l2_subdev *sd,
0630 struct v4l2_subdev_state *sd_state)
0631 {
0632 struct imx335 *imx335 = to_imx335(sd);
0633 struct v4l2_subdev_format fmt = { 0 };
0634
0635 fmt.which = sd_state ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
0636 imx335_fill_pad_format(imx335, &supported_mode, &fmt);
0637
0638 return imx335_set_pad_format(sd, sd_state, &fmt);
0639 }
0640
0641
0642
0643
0644
0645
0646
0647 static int imx335_start_streaming(struct imx335 *imx335)
0648 {
0649 const struct imx335_reg_list *reg_list;
0650 int ret;
0651
0652
0653 reg_list = &imx335->cur_mode->reg_list;
0654 ret = imx335_write_regs(imx335, reg_list->regs,
0655 reg_list->num_of_regs);
0656 if (ret) {
0657 dev_err(imx335->dev, "fail to write initial registers");
0658 return ret;
0659 }
0660
0661
0662 ret = __v4l2_ctrl_handler_setup(imx335->sd.ctrl_handler);
0663 if (ret) {
0664 dev_err(imx335->dev, "fail to setup handler");
0665 return ret;
0666 }
0667
0668
0669 ret = imx335_write_reg(imx335, IMX335_REG_MODE_SELECT,
0670 1, IMX335_MODE_STREAMING);
0671 if (ret) {
0672 dev_err(imx335->dev, "fail to start streaming");
0673 return ret;
0674 }
0675
0676
0677 usleep_range(18000, 20000);
0678
0679 return 0;
0680 }
0681
0682
0683
0684
0685
0686
0687
0688 static int imx335_stop_streaming(struct imx335 *imx335)
0689 {
0690 return imx335_write_reg(imx335, IMX335_REG_MODE_SELECT,
0691 1, IMX335_MODE_STANDBY);
0692 }
0693
0694
0695
0696
0697
0698
0699
0700
0701 static int imx335_set_stream(struct v4l2_subdev *sd, int enable)
0702 {
0703 struct imx335 *imx335 = to_imx335(sd);
0704 int ret;
0705
0706 mutex_lock(&imx335->mutex);
0707
0708 if (imx335->streaming == enable) {
0709 mutex_unlock(&imx335->mutex);
0710 return 0;
0711 }
0712
0713 if (enable) {
0714 ret = pm_runtime_resume_and_get(imx335->dev);
0715 if (ret)
0716 goto error_unlock;
0717
0718 ret = imx335_start_streaming(imx335);
0719 if (ret)
0720 goto error_power_off;
0721 } else {
0722 imx335_stop_streaming(imx335);
0723 pm_runtime_put(imx335->dev);
0724 }
0725
0726 imx335->streaming = enable;
0727
0728 mutex_unlock(&imx335->mutex);
0729
0730 return 0;
0731
0732 error_power_off:
0733 pm_runtime_put(imx335->dev);
0734 error_unlock:
0735 mutex_unlock(&imx335->mutex);
0736
0737 return ret;
0738 }
0739
0740
0741
0742
0743
0744
0745
0746 static int imx335_detect(struct imx335 *imx335)
0747 {
0748 int ret;
0749 u32 val;
0750
0751 ret = imx335_read_reg(imx335, IMX335_REG_ID, 2, &val);
0752 if (ret)
0753 return ret;
0754
0755 if (val != IMX335_ID) {
0756 dev_err(imx335->dev, "chip id mismatch: %x!=%x",
0757 IMX335_ID, val);
0758 return -ENXIO;
0759 }
0760
0761 return 0;
0762 }
0763
0764
0765
0766
0767
0768
0769
0770 static int imx335_parse_hw_config(struct imx335 *imx335)
0771 {
0772 struct fwnode_handle *fwnode = dev_fwnode(imx335->dev);
0773 struct v4l2_fwnode_endpoint bus_cfg = {
0774 .bus_type = V4L2_MBUS_CSI2_DPHY
0775 };
0776 struct fwnode_handle *ep;
0777 unsigned long rate;
0778 unsigned int i;
0779 int ret;
0780
0781 if (!fwnode)
0782 return -ENXIO;
0783
0784
0785 imx335->reset_gpio = devm_gpiod_get_optional(imx335->dev, "reset",
0786 GPIOD_OUT_LOW);
0787 if (IS_ERR(imx335->reset_gpio)) {
0788 dev_err(imx335->dev, "failed to get reset gpio %ld",
0789 PTR_ERR(imx335->reset_gpio));
0790 return PTR_ERR(imx335->reset_gpio);
0791 }
0792
0793
0794 imx335->inclk = devm_clk_get(imx335->dev, NULL);
0795 if (IS_ERR(imx335->inclk)) {
0796 dev_err(imx335->dev, "could not get inclk");
0797 return PTR_ERR(imx335->inclk);
0798 }
0799
0800 rate = clk_get_rate(imx335->inclk);
0801 if (rate != IMX335_INCLK_RATE) {
0802 dev_err(imx335->dev, "inclk frequency mismatch");
0803 return -EINVAL;
0804 }
0805
0806 ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
0807 if (!ep)
0808 return -ENXIO;
0809
0810 ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
0811 fwnode_handle_put(ep);
0812 if (ret)
0813 return ret;
0814
0815 if (bus_cfg.bus.mipi_csi2.num_data_lanes != IMX335_NUM_DATA_LANES) {
0816 dev_err(imx335->dev,
0817 "number of CSI2 data lanes %d is not supported",
0818 bus_cfg.bus.mipi_csi2.num_data_lanes);
0819 ret = -EINVAL;
0820 goto done_endpoint_free;
0821 }
0822
0823 if (!bus_cfg.nr_of_link_frequencies) {
0824 dev_err(imx335->dev, "no link frequencies defined");
0825 ret = -EINVAL;
0826 goto done_endpoint_free;
0827 }
0828
0829 for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++)
0830 if (bus_cfg.link_frequencies[i] == IMX335_LINK_FREQ)
0831 goto done_endpoint_free;
0832
0833 ret = -EINVAL;
0834
0835 done_endpoint_free:
0836 v4l2_fwnode_endpoint_free(&bus_cfg);
0837
0838 return ret;
0839 }
0840
0841
0842 static const struct v4l2_subdev_video_ops imx335_video_ops = {
0843 .s_stream = imx335_set_stream,
0844 };
0845
0846 static const struct v4l2_subdev_pad_ops imx335_pad_ops = {
0847 .init_cfg = imx335_init_pad_cfg,
0848 .enum_mbus_code = imx335_enum_mbus_code,
0849 .enum_frame_size = imx335_enum_frame_size,
0850 .get_fmt = imx335_get_pad_format,
0851 .set_fmt = imx335_set_pad_format,
0852 };
0853
0854 static const struct v4l2_subdev_ops imx335_subdev_ops = {
0855 .video = &imx335_video_ops,
0856 .pad = &imx335_pad_ops,
0857 };
0858
0859
0860
0861
0862
0863
0864
0865 static int imx335_power_on(struct device *dev)
0866 {
0867 struct v4l2_subdev *sd = dev_get_drvdata(dev);
0868 struct imx335 *imx335 = to_imx335(sd);
0869 int ret;
0870
0871 gpiod_set_value_cansleep(imx335->reset_gpio, 1);
0872
0873 ret = clk_prepare_enable(imx335->inclk);
0874 if (ret) {
0875 dev_err(imx335->dev, "fail to enable inclk");
0876 goto error_reset;
0877 }
0878
0879 usleep_range(20, 22);
0880
0881 return 0;
0882
0883 error_reset:
0884 gpiod_set_value_cansleep(imx335->reset_gpio, 0);
0885
0886 return ret;
0887 }
0888
0889
0890
0891
0892
0893
0894
0895 static int imx335_power_off(struct device *dev)
0896 {
0897 struct v4l2_subdev *sd = dev_get_drvdata(dev);
0898 struct imx335 *imx335 = to_imx335(sd);
0899
0900 gpiod_set_value_cansleep(imx335->reset_gpio, 0);
0901
0902 clk_disable_unprepare(imx335->inclk);
0903
0904 return 0;
0905 }
0906
0907
0908
0909
0910
0911
0912
0913 static int imx335_init_controls(struct imx335 *imx335)
0914 {
0915 struct v4l2_ctrl_handler *ctrl_hdlr = &imx335->ctrl_handler;
0916 const struct imx335_mode *mode = imx335->cur_mode;
0917 u32 lpfr;
0918 int ret;
0919
0920 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 6);
0921 if (ret)
0922 return ret;
0923
0924
0925 ctrl_hdlr->lock = &imx335->mutex;
0926
0927
0928 lpfr = mode->vblank + mode->height;
0929 imx335->exp_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
0930 &imx335_ctrl_ops,
0931 V4L2_CID_EXPOSURE,
0932 IMX335_EXPOSURE_MIN,
0933 lpfr - IMX335_EXPOSURE_OFFSET,
0934 IMX335_EXPOSURE_STEP,
0935 IMX335_EXPOSURE_DEFAULT);
0936
0937 imx335->again_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
0938 &imx335_ctrl_ops,
0939 V4L2_CID_ANALOGUE_GAIN,
0940 IMX335_AGAIN_MIN,
0941 IMX335_AGAIN_MAX,
0942 IMX335_AGAIN_STEP,
0943 IMX335_AGAIN_DEFAULT);
0944
0945 v4l2_ctrl_cluster(2, &imx335->exp_ctrl);
0946
0947 imx335->vblank_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
0948 &imx335_ctrl_ops,
0949 V4L2_CID_VBLANK,
0950 mode->vblank_min,
0951 mode->vblank_max,
0952 1, mode->vblank);
0953
0954
0955 imx335->pclk_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
0956 &imx335_ctrl_ops,
0957 V4L2_CID_PIXEL_RATE,
0958 mode->pclk, mode->pclk,
0959 1, mode->pclk);
0960
0961 imx335->link_freq_ctrl = v4l2_ctrl_new_int_menu(ctrl_hdlr,
0962 &imx335_ctrl_ops,
0963 V4L2_CID_LINK_FREQ,
0964 ARRAY_SIZE(link_freq) -
0965 1,
0966 mode->link_freq_idx,
0967 link_freq);
0968 if (imx335->link_freq_ctrl)
0969 imx335->link_freq_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
0970
0971 imx335->hblank_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
0972 &imx335_ctrl_ops,
0973 V4L2_CID_HBLANK,
0974 IMX335_REG_MIN,
0975 IMX335_REG_MAX,
0976 1, mode->hblank);
0977 if (imx335->hblank_ctrl)
0978 imx335->hblank_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
0979
0980 if (ctrl_hdlr->error) {
0981 dev_err(imx335->dev, "control init failed: %d",
0982 ctrl_hdlr->error);
0983 v4l2_ctrl_handler_free(ctrl_hdlr);
0984 return ctrl_hdlr->error;
0985 }
0986
0987 imx335->sd.ctrl_handler = ctrl_hdlr;
0988
0989 return 0;
0990 }
0991
0992
0993
0994
0995
0996
0997
0998 static int imx335_probe(struct i2c_client *client)
0999 {
1000 struct imx335 *imx335;
1001 int ret;
1002
1003 imx335 = devm_kzalloc(&client->dev, sizeof(*imx335), GFP_KERNEL);
1004 if (!imx335)
1005 return -ENOMEM;
1006
1007 imx335->dev = &client->dev;
1008
1009
1010 v4l2_i2c_subdev_init(&imx335->sd, client, &imx335_subdev_ops);
1011
1012 ret = imx335_parse_hw_config(imx335);
1013 if (ret) {
1014 dev_err(imx335->dev, "HW configuration is not supported");
1015 return ret;
1016 }
1017
1018 mutex_init(&imx335->mutex);
1019
1020 ret = imx335_power_on(imx335->dev);
1021 if (ret) {
1022 dev_err(imx335->dev, "failed to power-on the sensor");
1023 goto error_mutex_destroy;
1024 }
1025
1026
1027 ret = imx335_detect(imx335);
1028 if (ret) {
1029 dev_err(imx335->dev, "failed to find sensor: %d", ret);
1030 goto error_power_off;
1031 }
1032
1033
1034 imx335->cur_mode = &supported_mode;
1035 imx335->vblank = imx335->cur_mode->vblank;
1036
1037 ret = imx335_init_controls(imx335);
1038 if (ret) {
1039 dev_err(imx335->dev, "failed to init controls: %d", ret);
1040 goto error_power_off;
1041 }
1042
1043
1044 imx335->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1045 imx335->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1046
1047
1048 imx335->pad.flags = MEDIA_PAD_FL_SOURCE;
1049 ret = media_entity_pads_init(&imx335->sd.entity, 1, &imx335->pad);
1050 if (ret) {
1051 dev_err(imx335->dev, "failed to init entity pads: %d", ret);
1052 goto error_handler_free;
1053 }
1054
1055 ret = v4l2_async_register_subdev_sensor(&imx335->sd);
1056 if (ret < 0) {
1057 dev_err(imx335->dev,
1058 "failed to register async subdev: %d", ret);
1059 goto error_media_entity;
1060 }
1061
1062 pm_runtime_set_active(imx335->dev);
1063 pm_runtime_enable(imx335->dev);
1064 pm_runtime_idle(imx335->dev);
1065
1066 return 0;
1067
1068 error_media_entity:
1069 media_entity_cleanup(&imx335->sd.entity);
1070 error_handler_free:
1071 v4l2_ctrl_handler_free(imx335->sd.ctrl_handler);
1072 error_power_off:
1073 imx335_power_off(imx335->dev);
1074 error_mutex_destroy:
1075 mutex_destroy(&imx335->mutex);
1076
1077 return ret;
1078 }
1079
1080
1081
1082
1083
1084
1085
1086 static int imx335_remove(struct i2c_client *client)
1087 {
1088 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1089 struct imx335 *imx335 = to_imx335(sd);
1090
1091 v4l2_async_unregister_subdev(sd);
1092 media_entity_cleanup(&sd->entity);
1093 v4l2_ctrl_handler_free(sd->ctrl_handler);
1094
1095 pm_runtime_disable(&client->dev);
1096 if (!pm_runtime_status_suspended(&client->dev))
1097 imx335_power_off(&client->dev);
1098 pm_runtime_set_suspended(&client->dev);
1099
1100 mutex_destroy(&imx335->mutex);
1101
1102 return 0;
1103 }
1104
1105 static const struct dev_pm_ops imx335_pm_ops = {
1106 SET_RUNTIME_PM_OPS(imx335_power_off, imx335_power_on, NULL)
1107 };
1108
1109 static const struct of_device_id imx335_of_match[] = {
1110 { .compatible = "sony,imx335" },
1111 { }
1112 };
1113
1114 MODULE_DEVICE_TABLE(of, imx335_of_match);
1115
1116 static struct i2c_driver imx335_driver = {
1117 .probe_new = imx335_probe,
1118 .remove = imx335_remove,
1119 .driver = {
1120 .name = "imx335",
1121 .pm = &imx335_pm_ops,
1122 .of_match_table = imx335_of_match,
1123 },
1124 };
1125
1126 module_i2c_driver(imx335_driver);
1127
1128 MODULE_DESCRIPTION("Sony imx335 sensor driver");
1129 MODULE_LICENSE("GPL");