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0012 #include <linux/clk.h>
0013 #include <linux/delay.h>
0014 #include <linux/gpio/consumer.h>
0015 #include <linux/i2c.h>
0016 #include <linux/init.h>
0017 #include <linux/kernel.h>
0018 #include <linux/module.h>
0019 #include <linux/pm_runtime.h>
0020 #include <linux/regmap.h>
0021 #include <linux/regulator/consumer.h>
0022 #include <linux/slab.h>
0023 #include <linux/v4l2-mediabus.h>
0024 #include <linux/videodev2.h>
0025
0026 #include <media/v4l2-ctrls.h>
0027 #include <media/v4l2-device.h>
0028 #include <media/v4l2-fwnode.h>
0029 #include <media/v4l2-subdev.h>
0030
0031
0032
0033
0034 #define IMX274_DEFAULT_FRAME_LENGTH (4550)
0035 #define IMX274_MAX_FRAME_LENGTH (0x000fffff)
0036
0037
0038
0039
0040 #define IMX274_PIXCLK_CONST1 (72000000)
0041 #define IMX274_PIXCLK_CONST2 (1000000)
0042
0043
0044
0045
0046
0047
0048 #define IMX274_GAIN_SHIFT (8)
0049 #define IMX274_GAIN_SHIFT_MASK ((1 << IMX274_GAIN_SHIFT) - 1)
0050
0051
0052
0053
0054
0055
0056 #define IMX274_GAIN_REG_MAX (1957)
0057 #define IMX274_MIN_GAIN (0x01 << IMX274_GAIN_SHIFT)
0058 #define IMX274_MAX_ANALOG_GAIN ((2048 << IMX274_GAIN_SHIFT)\
0059 / (2048 - IMX274_GAIN_REG_MAX))
0060 #define IMX274_MAX_DIGITAL_GAIN (8)
0061 #define IMX274_DEF_GAIN (20 << IMX274_GAIN_SHIFT)
0062 #define IMX274_GAIN_CONST (2048)
0063
0064
0065
0066
0067 #define IMX274_MIN_EXPOSURE_TIME (4 * 260 / 72)
0068
0069 #define IMX274_MAX_WIDTH (3840)
0070 #define IMX274_MAX_HEIGHT (2160)
0071 #define IMX274_MAX_FRAME_RATE (120)
0072 #define IMX274_MIN_FRAME_RATE (5)
0073 #define IMX274_DEF_FRAME_RATE (60)
0074
0075
0076
0077
0078 #define IMX274_SHR_LIMIT_CONST (4)
0079
0080
0081
0082
0083 #define IMX274_RESET_DELAY1 (2000)
0084 #define IMX274_RESET_DELAY2 (2200)
0085
0086
0087
0088
0089 #define IMX274_SHIFT_8_BITS (8)
0090 #define IMX274_SHIFT_16_BITS (16)
0091 #define IMX274_MASK_LSB_2_BITS (0x03)
0092 #define IMX274_MASK_LSB_3_BITS (0x07)
0093 #define IMX274_MASK_LSB_4_BITS (0x0f)
0094 #define IMX274_MASK_LSB_8_BITS (0x00ff)
0095
0096 #define DRIVER_NAME "IMX274"
0097
0098
0099
0100
0101 #define IMX274_SHR_REG_MSB 0x300D
0102 #define IMX274_SHR_REG_LSB 0x300C
0103 #define IMX274_SVR_REG_MSB 0x300F
0104 #define IMX274_SVR_REG_LSB 0x300E
0105 #define IMX274_HTRIM_EN_REG 0x3037
0106 #define IMX274_HTRIM_START_REG_LSB 0x3038
0107 #define IMX274_HTRIM_START_REG_MSB 0x3039
0108 #define IMX274_HTRIM_END_REG_LSB 0x303A
0109 #define IMX274_HTRIM_END_REG_MSB 0x303B
0110 #define IMX274_VWIDCUTEN_REG 0x30DD
0111 #define IMX274_VWIDCUT_REG_LSB 0x30DE
0112 #define IMX274_VWIDCUT_REG_MSB 0x30DF
0113 #define IMX274_VWINPOS_REG_LSB 0x30E0
0114 #define IMX274_VWINPOS_REG_MSB 0x30E1
0115 #define IMX274_WRITE_VSIZE_REG_LSB 0x3130
0116 #define IMX274_WRITE_VSIZE_REG_MSB 0x3131
0117 #define IMX274_Y_OUT_SIZE_REG_LSB 0x3132
0118 #define IMX274_Y_OUT_SIZE_REG_MSB 0x3133
0119 #define IMX274_VMAX_REG_1 0x30FA
0120 #define IMX274_VMAX_REG_2 0x30F9
0121 #define IMX274_VMAX_REG_3 0x30F8
0122 #define IMX274_HMAX_REG_MSB 0x30F7
0123 #define IMX274_HMAX_REG_LSB 0x30F6
0124 #define IMX274_ANALOG_GAIN_ADDR_LSB 0x300A
0125 #define IMX274_ANALOG_GAIN_ADDR_MSB 0x300B
0126 #define IMX274_DIGITAL_GAIN_REG 0x3012
0127 #define IMX274_VFLIP_REG 0x301A
0128 #define IMX274_TEST_PATTERN_REG 0x303D
0129 #define IMX274_STANDBY_REG 0x3000
0130
0131 #define IMX274_TABLE_WAIT_MS 0
0132 #define IMX274_TABLE_END 1
0133
0134
0135 static const char * const imx274_supply_names[] = {
0136 "vddl",
0137 "vdig",
0138 "vana",
0139 };
0140
0141 #define IMX274_NUM_SUPPLIES ARRAY_SIZE(imx274_supply_names)
0142
0143
0144
0145
0146 struct reg_8 {
0147 u16 addr;
0148 u8 val;
0149 };
0150
0151 static const struct regmap_config imx274_regmap_config = {
0152 .reg_bits = 16,
0153 .val_bits = 8,
0154 .cache_type = REGCACHE_RBTREE,
0155 };
0156
0157
0158
0159
0160
0161
0162
0163
0164
0165
0166
0167
0168
0169
0170
0171
0172
0173
0174 struct imx274_mode {
0175 const struct reg_8 *init_regs;
0176 u8 wbin_ratio;
0177 u8 hbin_ratio;
0178 int min_frame_len;
0179 int min_SHR;
0180 int max_fps;
0181 int nocpiop;
0182 };
0183
0184
0185
0186
0187 enum {
0188 TEST_PATTERN_DISABLED = 0,
0189 TEST_PATTERN_ALL_000H,
0190 TEST_PATTERN_ALL_FFFH,
0191 TEST_PATTERN_ALL_555H,
0192 TEST_PATTERN_ALL_AAAH,
0193 TEST_PATTERN_VSP_5AH,
0194 TEST_PATTERN_VSP_A5H,
0195 TEST_PATTERN_VSP_05H,
0196 TEST_PATTERN_VSP_50H,
0197 TEST_PATTERN_VSP_0FH,
0198 TEST_PATTERN_VSP_F0H,
0199 TEST_PATTERN_H_COLOR_BARS,
0200 TEST_PATTERN_V_COLOR_BARS,
0201 };
0202
0203 static const char * const tp_qmenu[] = {
0204 "Disabled",
0205 "All 000h Pattern",
0206 "All FFFh Pattern",
0207 "All 555h Pattern",
0208 "All AAAh Pattern",
0209 "Vertical Stripe (555h / AAAh)",
0210 "Vertical Stripe (AAAh / 555h)",
0211 "Vertical Stripe (000h / 555h)",
0212 "Vertical Stripe (555h / 000h)",
0213 "Vertical Stripe (000h / FFFh)",
0214 "Vertical Stripe (FFFh / 000h)",
0215 "Vertical Color Bars",
0216 "Horizontal Color Bars",
0217 };
0218
0219
0220
0221
0222
0223
0224 static const struct reg_8 imx274_mode1_3840x2160_raw10[] = {
0225 {0x3004, 0x01},
0226 {0x3005, 0x01},
0227 {0x3006, 0x00},
0228 {0x3007, 0xa2},
0229
0230 {0x3018, 0xA2},
0231
0232 {0x306B, 0x05},
0233 {0x30E2, 0x01},
0234
0235 {0x30EE, 0x01},
0236 {0x3342, 0x0A},
0237 {0x3343, 0x00},
0238 {0x3344, 0x16},
0239 {0x3345, 0x00},
0240 {0x33A6, 0x01},
0241 {0x3528, 0x0E},
0242 {0x3554, 0x1F},
0243 {0x3555, 0x01},
0244 {0x3556, 0x01},
0245 {0x3557, 0x01},
0246 {0x3558, 0x01},
0247 {0x3559, 0x00},
0248 {0x355A, 0x00},
0249 {0x35BA, 0x0E},
0250 {0x366A, 0x1B},
0251 {0x366B, 0x1A},
0252 {0x366C, 0x19},
0253 {0x366D, 0x17},
0254 {0x3A41, 0x08},
0255
0256 {IMX274_TABLE_END, 0x00}
0257 };
0258
0259
0260
0261
0262
0263
0264
0265 static const struct reg_8 imx274_mode3_1920x1080_raw10[] = {
0266 {0x3004, 0x02},
0267 {0x3005, 0x21},
0268 {0x3006, 0x00},
0269 {0x3007, 0xb1},
0270
0271 {0x3018, 0xA2},
0272
0273 {0x306B, 0x05},
0274 {0x30E2, 0x02},
0275
0276 {0x30EE, 0x01},
0277 {0x3342, 0x0A},
0278 {0x3343, 0x00},
0279 {0x3344, 0x1A},
0280 {0x3345, 0x00},
0281 {0x33A6, 0x01},
0282 {0x3528, 0x0E},
0283 {0x3554, 0x00},
0284 {0x3555, 0x01},
0285 {0x3556, 0x01},
0286 {0x3557, 0x01},
0287 {0x3558, 0x01},
0288 {0x3559, 0x00},
0289 {0x355A, 0x00},
0290 {0x35BA, 0x0E},
0291 {0x366A, 0x1B},
0292 {0x366B, 0x1A},
0293 {0x366C, 0x19},
0294 {0x366D, 0x17},
0295 {0x3A41, 0x08},
0296
0297 {IMX274_TABLE_END, 0x00}
0298 };
0299
0300
0301
0302
0303
0304
0305 static const struct reg_8 imx274_mode5_1280x720_raw10[] = {
0306 {0x3004, 0x03},
0307 {0x3005, 0x31},
0308 {0x3006, 0x00},
0309 {0x3007, 0xa9},
0310
0311 {0x3018, 0xA2},
0312
0313 {0x306B, 0x05},
0314 {0x30E2, 0x03},
0315
0316 {0x30EE, 0x01},
0317 {0x3342, 0x0A},
0318 {0x3343, 0x00},
0319 {0x3344, 0x1B},
0320 {0x3345, 0x00},
0321 {0x33A6, 0x01},
0322 {0x3528, 0x0E},
0323 {0x3554, 0x00},
0324 {0x3555, 0x01},
0325 {0x3556, 0x01},
0326 {0x3557, 0x01},
0327 {0x3558, 0x01},
0328 {0x3559, 0x00},
0329 {0x355A, 0x00},
0330 {0x35BA, 0x0E},
0331 {0x366A, 0x1B},
0332 {0x366B, 0x19},
0333 {0x366C, 0x17},
0334 {0x366D, 0x17},
0335 {0x3A41, 0x04},
0336
0337 {IMX274_TABLE_END, 0x00}
0338 };
0339
0340
0341
0342
0343
0344
0345 static const struct reg_8 imx274_mode6_1280x540_raw10[] = {
0346 {0x3004, 0x04},
0347 {0x3005, 0x31},
0348 {0x3006, 0x00},
0349 {0x3007, 0x02},
0350
0351 {0x3018, 0xA2},
0352
0353 {0x306B, 0x05},
0354 {0x30E2, 0x04},
0355
0356 {0x30EE, 0x01},
0357 {0x3342, 0x0A},
0358 {0x3343, 0x00},
0359 {0x3344, 0x16},
0360 {0x3345, 0x00},
0361 {0x33A6, 0x01},
0362 {0x3528, 0x0E},
0363 {0x3554, 0x1F},
0364 {0x3555, 0x01},
0365 {0x3556, 0x01},
0366 {0x3557, 0x01},
0367 {0x3558, 0x01},
0368 {0x3559, 0x00},
0369 {0x355A, 0x00},
0370 {0x35BA, 0x0E},
0371 {0x366A, 0x1B},
0372 {0x366B, 0x1A},
0373 {0x366C, 0x19},
0374 {0x366D, 0x17},
0375 {0x3A41, 0x04},
0376
0377 {IMX274_TABLE_END, 0x00}
0378 };
0379
0380
0381
0382
0383
0384 static const struct reg_8 imx274_start_1[] = {
0385 {IMX274_STANDBY_REG, 0x12},
0386
0387
0388 {0x3120, 0xF0},
0389 {0x3121, 0x00},
0390 {0x3122, 0x02},
0391 {0x3129, 0x9C},
0392 {0x312A, 0x02},
0393 {0x312D, 0x02},
0394
0395 {0x310B, 0x00},
0396
0397
0398 {0x304C, 0x00},
0399 {0x304D, 0x03},
0400 {0x331C, 0x1A},
0401 {0x331D, 0x00},
0402 {0x3502, 0x02},
0403 {0x3529, 0x0E},
0404 {0x352A, 0x0E},
0405 {0x352B, 0x0E},
0406 {0x3538, 0x0E},
0407 {0x3539, 0x0E},
0408 {0x3553, 0x00},
0409 {0x357D, 0x05},
0410 {0x357F, 0x05},
0411 {0x3581, 0x04},
0412 {0x3583, 0x76},
0413 {0x3587, 0x01},
0414 {0x35BB, 0x0E},
0415 {0x35BC, 0x0E},
0416 {0x35BD, 0x0E},
0417 {0x35BE, 0x0E},
0418 {0x35BF, 0x0E},
0419 {0x366E, 0x00},
0420 {0x366F, 0x00},
0421 {0x3670, 0x00},
0422 {0x3671, 0x00},
0423
0424
0425 {0x3304, 0x32},
0426 {0x3305, 0x00},
0427 {0x3306, 0x32},
0428 {0x3307, 0x00},
0429 {0x3590, 0x32},
0430 {0x3591, 0x00},
0431 {0x3686, 0x32},
0432 {0x3687, 0x00},
0433
0434 {IMX274_TABLE_END, 0x00}
0435 };
0436
0437
0438
0439
0440
0441 static const struct reg_8 imx274_start_2[] = {
0442 {IMX274_STANDBY_REG, 0x00},
0443 {0x303E, 0x02},
0444 {IMX274_TABLE_END, 0x00}
0445 };
0446
0447
0448
0449
0450
0451 static const struct reg_8 imx274_start_3[] = {
0452 {0x30F4, 0x00},
0453 {0x3018, 0xA2},
0454 {IMX274_TABLE_END, 0x00}
0455 };
0456
0457
0458
0459
0460 static const struct reg_8 imx274_stop[] = {
0461 {IMX274_STANDBY_REG, 0x01},
0462 {IMX274_TABLE_END, 0x00}
0463 };
0464
0465
0466
0467
0468 static const struct reg_8 imx274_tp_disabled[] = {
0469 {0x303C, 0x00},
0470 {0x377F, 0x00},
0471 {0x3781, 0x00},
0472 {0x370B, 0x00},
0473 {IMX274_TABLE_END, 0x00}
0474 };
0475
0476
0477
0478
0479
0480 static const struct reg_8 imx274_tp_regs[] = {
0481 {0x303C, 0x11},
0482 {0x370E, 0x01},
0483 {0x377F, 0x01},
0484 {0x3781, 0x01},
0485 {0x370B, 0x11},
0486 {IMX274_TABLE_END, 0x00}
0487 };
0488
0489
0490 static const struct imx274_mode imx274_modes[] = {
0491 {
0492
0493 .wbin_ratio = 1,
0494 .hbin_ratio = 1,
0495 .init_regs = imx274_mode1_3840x2160_raw10,
0496 .min_frame_len = 4550,
0497 .min_SHR = 12,
0498 .max_fps = 60,
0499 .nocpiop = 112,
0500 },
0501 {
0502
0503 .wbin_ratio = 2,
0504 .hbin_ratio = 2,
0505 .init_regs = imx274_mode3_1920x1080_raw10,
0506 .min_frame_len = 2310,
0507 .min_SHR = 8,
0508 .max_fps = 120,
0509 .nocpiop = 112,
0510 },
0511 {
0512
0513 .wbin_ratio = 3,
0514 .hbin_ratio = 3,
0515 .init_regs = imx274_mode5_1280x720_raw10,
0516 .min_frame_len = 2310,
0517 .min_SHR = 8,
0518 .max_fps = 120,
0519 .nocpiop = 112,
0520 },
0521 {
0522
0523 .wbin_ratio = 3,
0524 .hbin_ratio = 4,
0525 .init_regs = imx274_mode6_1280x540_raw10,
0526 .min_frame_len = 2310,
0527 .min_SHR = 4,
0528 .max_fps = 120,
0529 .nocpiop = 112,
0530 },
0531 };
0532
0533
0534
0535
0536
0537
0538
0539
0540
0541 struct imx274_ctrls {
0542 struct v4l2_ctrl_handler handler;
0543 struct v4l2_ctrl *exposure;
0544 struct v4l2_ctrl *gain;
0545 struct v4l2_ctrl *vflip;
0546 struct v4l2_ctrl *test_pattern;
0547 };
0548
0549
0550
0551
0552
0553
0554
0555
0556
0557
0558
0559
0560
0561
0562
0563
0564
0565
0566
0567 struct stimx274 {
0568 struct v4l2_subdev sd;
0569 struct media_pad pad;
0570 struct i2c_client *client;
0571 struct imx274_ctrls ctrls;
0572 struct v4l2_rect crop;
0573 struct v4l2_mbus_framefmt format;
0574 struct v4l2_fract frame_interval;
0575 struct regmap *regmap;
0576 struct gpio_desc *reset_gpio;
0577 struct regulator_bulk_data supplies[IMX274_NUM_SUPPLIES];
0578 struct clk *inck;
0579 struct mutex lock;
0580 const struct imx274_mode *mode;
0581 };
0582
0583 #define IMX274_ROUND(dim, step, flags) \
0584 ((flags) & V4L2_SEL_FLAG_GE \
0585 ? roundup((dim), (step)) \
0586 : ((flags) & V4L2_SEL_FLAG_LE \
0587 ? rounddown((dim), (step)) \
0588 : rounddown((dim) + (step) / 2, (step))))
0589
0590
0591
0592
0593 static int imx274_set_gain(struct stimx274 *priv, struct v4l2_ctrl *ctrl);
0594 static int imx274_set_exposure(struct stimx274 *priv, int val);
0595 static int imx274_set_vflip(struct stimx274 *priv, int val);
0596 static int imx274_set_test_pattern(struct stimx274 *priv, int val);
0597 static int imx274_set_frame_interval(struct stimx274 *priv,
0598 struct v4l2_fract frame_interval);
0599
0600 static inline void msleep_range(unsigned int delay_base)
0601 {
0602 usleep_range(delay_base * 1000, delay_base * 1000 + 500);
0603 }
0604
0605
0606
0607
0608 static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
0609 {
0610 return &container_of(ctrl->handler,
0611 struct stimx274, ctrls.handler)->sd;
0612 }
0613
0614 static inline struct stimx274 *to_imx274(struct v4l2_subdev *sd)
0615 {
0616 return container_of(sd, struct stimx274, sd);
0617 }
0618
0619
0620
0621
0622
0623
0624
0625
0626
0627
0628
0629 static int imx274_write_table(struct stimx274 *priv, const struct reg_8 table[])
0630 {
0631 struct regmap *regmap = priv->regmap;
0632 int err = 0;
0633 const struct reg_8 *next;
0634 u8 val;
0635
0636 int range_start = -1;
0637 int range_count = 0;
0638 u8 range_vals[16];
0639 int max_range_vals = ARRAY_SIZE(range_vals);
0640
0641 for (next = table;; next++) {
0642 if ((next->addr != range_start + range_count) ||
0643 (next->addr == IMX274_TABLE_END) ||
0644 (next->addr == IMX274_TABLE_WAIT_MS) ||
0645 (range_count == max_range_vals)) {
0646 if (range_count == 1)
0647 err = regmap_write(regmap,
0648 range_start, range_vals[0]);
0649 else if (range_count > 1)
0650 err = regmap_bulk_write(regmap, range_start,
0651 &range_vals[0],
0652 range_count);
0653 else
0654 err = 0;
0655
0656 if (err)
0657 return err;
0658
0659 range_start = -1;
0660 range_count = 0;
0661
0662
0663 if (next->addr == IMX274_TABLE_END)
0664 break;
0665
0666 if (next->addr == IMX274_TABLE_WAIT_MS) {
0667 msleep_range(next->val);
0668 continue;
0669 }
0670 }
0671
0672 val = next->val;
0673
0674 if (range_start == -1)
0675 range_start = next->addr;
0676
0677 range_vals[range_count++] = val;
0678 }
0679 return 0;
0680 }
0681
0682 static inline int imx274_write_reg(struct stimx274 *priv, u16 addr, u8 val)
0683 {
0684 int err;
0685
0686 err = regmap_write(priv->regmap, addr, val);
0687 if (err)
0688 dev_err(&priv->client->dev,
0689 "%s : i2c write failed, %x = %x\n", __func__,
0690 addr, val);
0691 else
0692 dev_dbg(&priv->client->dev,
0693 "%s : addr 0x%x, val=0x%x\n", __func__,
0694 addr, val);
0695 return err;
0696 }
0697
0698
0699
0700
0701
0702
0703
0704
0705
0706
0707
0708
0709
0710
0711
0712 static int imx274_read_mbreg(struct stimx274 *priv, u16 addr, u32 *val,
0713 size_t nbytes)
0714 {
0715 __le32 val_le = 0;
0716 int err;
0717
0718 err = regmap_bulk_read(priv->regmap, addr, &val_le, nbytes);
0719 if (err) {
0720 dev_err(&priv->client->dev,
0721 "%s : i2c bulk read failed, %x (%zu bytes)\n",
0722 __func__, addr, nbytes);
0723 } else {
0724 *val = le32_to_cpu(val_le);
0725 dev_dbg(&priv->client->dev,
0726 "%s : addr 0x%x, val=0x%x (%zu bytes)\n",
0727 __func__, addr, *val, nbytes);
0728 }
0729
0730 return err;
0731 }
0732
0733
0734
0735
0736
0737
0738
0739
0740
0741
0742
0743
0744 static int imx274_write_mbreg(struct stimx274 *priv, u16 addr, u32 val,
0745 size_t nbytes)
0746 {
0747 __le32 val_le = cpu_to_le32(val);
0748 int err;
0749
0750 err = regmap_bulk_write(priv->regmap, addr, &val_le, nbytes);
0751 if (err)
0752 dev_err(&priv->client->dev,
0753 "%s : i2c bulk write failed, %x = %x (%zu bytes)\n",
0754 __func__, addr, val, nbytes);
0755 else
0756 dev_dbg(&priv->client->dev,
0757 "%s : addr 0x%x, val=0x%x (%zu bytes)\n",
0758 __func__, addr, val, nbytes);
0759 return err;
0760 }
0761
0762
0763
0764
0765
0766
0767
0768 static int imx274_mode_regs(struct stimx274 *priv)
0769 {
0770 int err = 0;
0771
0772 err = imx274_write_table(priv, imx274_start_1);
0773 if (err)
0774 return err;
0775
0776 err = imx274_write_table(priv, priv->mode->init_regs);
0777
0778 return err;
0779 }
0780
0781
0782
0783
0784
0785
0786
0787 static int imx274_start_stream(struct stimx274 *priv)
0788 {
0789 int err = 0;
0790
0791 err = __v4l2_ctrl_handler_setup(&priv->ctrls.handler);
0792 if (err) {
0793 dev_err(&priv->client->dev, "Error %d setup controls\n", err);
0794 return err;
0795 }
0796
0797
0798
0799
0800
0801
0802 msleep_range(11);
0803 err = imx274_write_table(priv, imx274_start_2);
0804 if (err)
0805 return err;
0806
0807
0808
0809
0810
0811
0812 msleep_range(8);
0813 err = imx274_write_table(priv, imx274_start_3);
0814 if (err)
0815 return err;
0816
0817 return 0;
0818 }
0819
0820
0821
0822
0823
0824
0825
0826
0827
0828
0829
0830 static void imx274_reset(struct stimx274 *priv, int rst)
0831 {
0832 gpiod_set_value_cansleep(priv->reset_gpio, 0);
0833 usleep_range(IMX274_RESET_DELAY1, IMX274_RESET_DELAY2);
0834 gpiod_set_value_cansleep(priv->reset_gpio, !!rst);
0835 usleep_range(IMX274_RESET_DELAY1, IMX274_RESET_DELAY2);
0836 }
0837
0838 static int imx274_power_on(struct device *dev)
0839 {
0840 struct i2c_client *client = to_i2c_client(dev);
0841 struct v4l2_subdev *sd = i2c_get_clientdata(client);
0842 struct stimx274 *imx274 = to_imx274(sd);
0843 int ret;
0844
0845
0846 imx274_reset(imx274, 0);
0847
0848 ret = clk_prepare_enable(imx274->inck);
0849 if (ret) {
0850 dev_err(&imx274->client->dev,
0851 "Failed to enable input clock: %d\n", ret);
0852 return ret;
0853 }
0854
0855 ret = regulator_bulk_enable(IMX274_NUM_SUPPLIES, imx274->supplies);
0856 if (ret) {
0857 dev_err(&imx274->client->dev,
0858 "Failed to enable regulators: %d\n", ret);
0859 goto fail_reg;
0860 }
0861
0862 udelay(2);
0863 imx274_reset(imx274, 1);
0864
0865 return 0;
0866
0867 fail_reg:
0868 clk_disable_unprepare(imx274->inck);
0869 return ret;
0870 }
0871
0872 static int imx274_power_off(struct device *dev)
0873 {
0874 struct i2c_client *client = to_i2c_client(dev);
0875 struct v4l2_subdev *sd = i2c_get_clientdata(client);
0876 struct stimx274 *imx274 = to_imx274(sd);
0877
0878 imx274_reset(imx274, 0);
0879
0880 regulator_bulk_disable(IMX274_NUM_SUPPLIES, imx274->supplies);
0881
0882 clk_disable_unprepare(imx274->inck);
0883
0884 return 0;
0885 }
0886
0887 static int imx274_regulators_get(struct device *dev, struct stimx274 *imx274)
0888 {
0889 unsigned int i;
0890
0891 for (i = 0; i < IMX274_NUM_SUPPLIES; i++)
0892 imx274->supplies[i].supply = imx274_supply_names[i];
0893
0894 return devm_regulator_bulk_get(dev, IMX274_NUM_SUPPLIES,
0895 imx274->supplies);
0896 }
0897
0898
0899
0900
0901
0902
0903
0904
0905
0906 static int imx274_s_ctrl(struct v4l2_ctrl *ctrl)
0907 {
0908 struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
0909 struct stimx274 *imx274 = to_imx274(sd);
0910 int ret = -EINVAL;
0911
0912 if (!pm_runtime_get_if_in_use(&imx274->client->dev))
0913 return 0;
0914
0915 dev_dbg(&imx274->client->dev,
0916 "%s : s_ctrl: %s, value: %d\n", __func__,
0917 ctrl->name, ctrl->val);
0918
0919 switch (ctrl->id) {
0920 case V4L2_CID_EXPOSURE:
0921 dev_dbg(&imx274->client->dev,
0922 "%s : set V4L2_CID_EXPOSURE\n", __func__);
0923 ret = imx274_set_exposure(imx274, ctrl->val);
0924 break;
0925
0926 case V4L2_CID_GAIN:
0927 dev_dbg(&imx274->client->dev,
0928 "%s : set V4L2_CID_GAIN\n", __func__);
0929 ret = imx274_set_gain(imx274, ctrl);
0930 break;
0931
0932 case V4L2_CID_VFLIP:
0933 dev_dbg(&imx274->client->dev,
0934 "%s : set V4L2_CID_VFLIP\n", __func__);
0935 ret = imx274_set_vflip(imx274, ctrl->val);
0936 break;
0937
0938 case V4L2_CID_TEST_PATTERN:
0939 dev_dbg(&imx274->client->dev,
0940 "%s : set V4L2_CID_TEST_PATTERN\n", __func__);
0941 ret = imx274_set_test_pattern(imx274, ctrl->val);
0942 break;
0943 }
0944
0945 pm_runtime_put(&imx274->client->dev);
0946
0947 return ret;
0948 }
0949
0950 static int imx274_binning_goodness(struct stimx274 *imx274,
0951 int w, int ask_w,
0952 int h, int ask_h, u32 flags)
0953 {
0954 struct device *dev = &imx274->client->dev;
0955 const int goodness = 100000;
0956 int val = 0;
0957
0958 if (flags & V4L2_SEL_FLAG_GE) {
0959 if (w < ask_w)
0960 val -= goodness;
0961 if (h < ask_h)
0962 val -= goodness;
0963 }
0964
0965 if (flags & V4L2_SEL_FLAG_LE) {
0966 if (w > ask_w)
0967 val -= goodness;
0968 if (h > ask_h)
0969 val -= goodness;
0970 }
0971
0972 val -= abs(w - ask_w);
0973 val -= abs(h - ask_h);
0974
0975 dev_dbg(dev, "%s: ask %dx%d, size %dx%d, goodness %d\n",
0976 __func__, ask_w, ask_h, w, h, val);
0977
0978 return val;
0979 }
0980
0981
0982
0983
0984
0985
0986
0987
0988
0989
0990
0991
0992
0993
0994
0995
0996
0997
0998
0999
1000
1001
1002
1003
1004
1005
1006 static int __imx274_change_compose(struct stimx274 *imx274,
1007 struct v4l2_subdev_state *sd_state,
1008 u32 which,
1009 u32 *width,
1010 u32 *height,
1011 u32 flags)
1012 {
1013 struct device *dev = &imx274->client->dev;
1014 const struct v4l2_rect *cur_crop;
1015 struct v4l2_mbus_framefmt *tgt_fmt;
1016 unsigned int i;
1017 const struct imx274_mode *best_mode = &imx274_modes[0];
1018 int best_goodness = INT_MIN;
1019
1020 if (which == V4L2_SUBDEV_FORMAT_TRY) {
1021 cur_crop = &sd_state->pads->try_crop;
1022 tgt_fmt = &sd_state->pads->try_fmt;
1023 } else {
1024 cur_crop = &imx274->crop;
1025 tgt_fmt = &imx274->format;
1026 }
1027
1028 for (i = 0; i < ARRAY_SIZE(imx274_modes); i++) {
1029 u8 wratio = imx274_modes[i].wbin_ratio;
1030 u8 hratio = imx274_modes[i].hbin_ratio;
1031
1032 int goodness = imx274_binning_goodness(
1033 imx274,
1034 cur_crop->width / wratio, *width,
1035 cur_crop->height / hratio, *height,
1036 flags);
1037
1038 if (goodness >= best_goodness) {
1039 best_goodness = goodness;
1040 best_mode = &imx274_modes[i];
1041 }
1042 }
1043
1044 *width = cur_crop->width / best_mode->wbin_ratio;
1045 *height = cur_crop->height / best_mode->hbin_ratio;
1046
1047 if (which == V4L2_SUBDEV_FORMAT_ACTIVE)
1048 imx274->mode = best_mode;
1049
1050 dev_dbg(dev, "%s: selected %ux%u binning\n",
1051 __func__, best_mode->wbin_ratio, best_mode->hbin_ratio);
1052
1053 tgt_fmt->width = *width;
1054 tgt_fmt->height = *height;
1055 tgt_fmt->field = V4L2_FIELD_NONE;
1056
1057 return 0;
1058 }
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070 static int imx274_get_fmt(struct v4l2_subdev *sd,
1071 struct v4l2_subdev_state *sd_state,
1072 struct v4l2_subdev_format *fmt)
1073 {
1074 struct stimx274 *imx274 = to_imx274(sd);
1075
1076 mutex_lock(&imx274->lock);
1077 fmt->format = imx274->format;
1078 mutex_unlock(&imx274->lock);
1079 return 0;
1080 }
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092 static int imx274_set_fmt(struct v4l2_subdev *sd,
1093 struct v4l2_subdev_state *sd_state,
1094 struct v4l2_subdev_format *format)
1095 {
1096 struct v4l2_mbus_framefmt *fmt = &format->format;
1097 struct stimx274 *imx274 = to_imx274(sd);
1098 int err = 0;
1099
1100 mutex_lock(&imx274->lock);
1101
1102 err = __imx274_change_compose(imx274, sd_state, format->which,
1103 &fmt->width, &fmt->height, 0);
1104
1105 if (err)
1106 goto out;
1107
1108
1109
1110
1111
1112
1113 fmt->field = V4L2_FIELD_NONE;
1114 if (format->which == V4L2_SUBDEV_FORMAT_TRY)
1115 sd_state->pads->try_fmt = *fmt;
1116 else
1117 imx274->format = *fmt;
1118
1119 out:
1120 mutex_unlock(&imx274->lock);
1121
1122 return err;
1123 }
1124
1125 static int imx274_get_selection(struct v4l2_subdev *sd,
1126 struct v4l2_subdev_state *sd_state,
1127 struct v4l2_subdev_selection *sel)
1128 {
1129 struct stimx274 *imx274 = to_imx274(sd);
1130 const struct v4l2_rect *src_crop;
1131 const struct v4l2_mbus_framefmt *src_fmt;
1132 int ret = 0;
1133
1134 if (sel->pad != 0)
1135 return -EINVAL;
1136
1137 if (sel->target == V4L2_SEL_TGT_CROP_BOUNDS) {
1138 sel->r.left = 0;
1139 sel->r.top = 0;
1140 sel->r.width = IMX274_MAX_WIDTH;
1141 sel->r.height = IMX274_MAX_HEIGHT;
1142 return 0;
1143 }
1144
1145 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1146 src_crop = &sd_state->pads->try_crop;
1147 src_fmt = &sd_state->pads->try_fmt;
1148 } else {
1149 src_crop = &imx274->crop;
1150 src_fmt = &imx274->format;
1151 }
1152
1153 mutex_lock(&imx274->lock);
1154
1155 switch (sel->target) {
1156 case V4L2_SEL_TGT_CROP:
1157 sel->r = *src_crop;
1158 break;
1159 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
1160 sel->r.top = 0;
1161 sel->r.left = 0;
1162 sel->r.width = src_crop->width;
1163 sel->r.height = src_crop->height;
1164 break;
1165 case V4L2_SEL_TGT_COMPOSE:
1166 sel->r.top = 0;
1167 sel->r.left = 0;
1168 sel->r.width = src_fmt->width;
1169 sel->r.height = src_fmt->height;
1170 break;
1171 default:
1172 ret = -EINVAL;
1173 }
1174
1175 mutex_unlock(&imx274->lock);
1176
1177 return ret;
1178 }
1179
1180 static int imx274_set_selection_crop(struct stimx274 *imx274,
1181 struct v4l2_subdev_state *sd_state,
1182 struct v4l2_subdev_selection *sel)
1183 {
1184 struct v4l2_rect *tgt_crop;
1185 struct v4l2_rect new_crop;
1186 bool size_changed;
1187
1188
1189
1190
1191
1192
1193
1194 const u32 h_step = 24;
1195
1196 new_crop.width = min_t(u32,
1197 IMX274_ROUND(sel->r.width, h_step, sel->flags),
1198 IMX274_MAX_WIDTH);
1199
1200
1201 if (new_crop.width < 144)
1202 new_crop.width = 144;
1203
1204 new_crop.left = min_t(u32,
1205 IMX274_ROUND(sel->r.left, h_step, 0),
1206 IMX274_MAX_WIDTH - new_crop.width);
1207
1208 new_crop.height = min_t(u32,
1209 IMX274_ROUND(sel->r.height, 2, sel->flags),
1210 IMX274_MAX_HEIGHT);
1211
1212 new_crop.top = min_t(u32, IMX274_ROUND(sel->r.top, 2, 0),
1213 IMX274_MAX_HEIGHT - new_crop.height);
1214
1215 sel->r = new_crop;
1216
1217 if (sel->which == V4L2_SUBDEV_FORMAT_TRY)
1218 tgt_crop = &sd_state->pads->try_crop;
1219 else
1220 tgt_crop = &imx274->crop;
1221
1222 mutex_lock(&imx274->lock);
1223
1224 size_changed = (new_crop.width != tgt_crop->width ||
1225 new_crop.height != tgt_crop->height);
1226
1227
1228 *tgt_crop = new_crop;
1229
1230
1231 if (size_changed)
1232 __imx274_change_compose(imx274, sd_state, sel->which,
1233 &new_crop.width, &new_crop.height,
1234 sel->flags);
1235
1236 mutex_unlock(&imx274->lock);
1237
1238 return 0;
1239 }
1240
1241 static int imx274_set_selection(struct v4l2_subdev *sd,
1242 struct v4l2_subdev_state *sd_state,
1243 struct v4l2_subdev_selection *sel)
1244 {
1245 struct stimx274 *imx274 = to_imx274(sd);
1246
1247 if (sel->pad != 0)
1248 return -EINVAL;
1249
1250 if (sel->target == V4L2_SEL_TGT_CROP)
1251 return imx274_set_selection_crop(imx274, sd_state, sel);
1252
1253 if (sel->target == V4L2_SEL_TGT_COMPOSE) {
1254 int err;
1255
1256 mutex_lock(&imx274->lock);
1257 err = __imx274_change_compose(imx274, sd_state, sel->which,
1258 &sel->r.width, &sel->r.height,
1259 sel->flags);
1260 mutex_unlock(&imx274->lock);
1261
1262
1263
1264
1265
1266 if (!err) {
1267 sel->r.top = 0;
1268 sel->r.left = 0;
1269 }
1270
1271 return err;
1272 }
1273
1274 return -EINVAL;
1275 }
1276
1277 static int imx274_apply_trimming(struct stimx274 *imx274)
1278 {
1279 u32 h_start;
1280 u32 h_end;
1281 u32 hmax;
1282 u32 v_cut;
1283 s32 v_pos;
1284 u32 write_v_size;
1285 u32 y_out_size;
1286 int err;
1287
1288 h_start = imx274->crop.left + 12;
1289 h_end = h_start + imx274->crop.width;
1290
1291
1292
1293
1294 hmax = max_t(u32, 260, (imx274->crop.width) / 16 + 23);
1295
1296
1297 v_pos = imx274->ctrls.vflip->cur.val ?
1298 (-imx274->crop.top / 2) : (imx274->crop.top / 2);
1299 v_cut = (IMX274_MAX_HEIGHT - imx274->crop.height) / 2;
1300 write_v_size = imx274->crop.height + 22;
1301 y_out_size = imx274->crop.height;
1302
1303 err = imx274_write_mbreg(imx274, IMX274_HMAX_REG_LSB, hmax, 2);
1304 if (!err)
1305 err = imx274_write_mbreg(imx274, IMX274_HTRIM_EN_REG, 1, 1);
1306 if (!err)
1307 err = imx274_write_mbreg(imx274, IMX274_HTRIM_START_REG_LSB,
1308 h_start, 2);
1309 if (!err)
1310 err = imx274_write_mbreg(imx274, IMX274_HTRIM_END_REG_LSB,
1311 h_end, 2);
1312 if (!err)
1313 err = imx274_write_mbreg(imx274, IMX274_VWIDCUTEN_REG, 1, 1);
1314 if (!err)
1315 err = imx274_write_mbreg(imx274, IMX274_VWIDCUT_REG_LSB,
1316 v_cut, 2);
1317 if (!err)
1318 err = imx274_write_mbreg(imx274, IMX274_VWINPOS_REG_LSB,
1319 v_pos, 2);
1320 if (!err)
1321 err = imx274_write_mbreg(imx274, IMX274_WRITE_VSIZE_REG_LSB,
1322 write_v_size, 2);
1323 if (!err)
1324 err = imx274_write_mbreg(imx274, IMX274_Y_OUT_SIZE_REG_LSB,
1325 y_out_size, 2);
1326
1327 return err;
1328 }
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339 static int imx274_g_frame_interval(struct v4l2_subdev *sd,
1340 struct v4l2_subdev_frame_interval *fi)
1341 {
1342 struct stimx274 *imx274 = to_imx274(sd);
1343
1344 fi->interval = imx274->frame_interval;
1345 dev_dbg(&imx274->client->dev, "%s frame rate = %d / %d\n",
1346 __func__, imx274->frame_interval.numerator,
1347 imx274->frame_interval.denominator);
1348
1349 return 0;
1350 }
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361 static int imx274_s_frame_interval(struct v4l2_subdev *sd,
1362 struct v4l2_subdev_frame_interval *fi)
1363 {
1364 struct stimx274 *imx274 = to_imx274(sd);
1365 struct v4l2_ctrl *ctrl = imx274->ctrls.exposure;
1366 int min, max, def;
1367 int ret;
1368
1369 ret = pm_runtime_resume_and_get(&imx274->client->dev);
1370 if (ret < 0)
1371 return ret;
1372
1373 mutex_lock(&imx274->lock);
1374 ret = imx274_set_frame_interval(imx274, fi->interval);
1375
1376 if (!ret) {
1377 fi->interval = imx274->frame_interval;
1378
1379
1380
1381
1382
1383 min = IMX274_MIN_EXPOSURE_TIME;
1384 max = fi->interval.numerator * 1000000
1385 / fi->interval.denominator;
1386 def = max;
1387 ret = __v4l2_ctrl_modify_range(ctrl, min, max, 1, def);
1388 if (ret) {
1389 dev_err(&imx274->client->dev,
1390 "Exposure ctrl range update failed\n");
1391 goto unlock;
1392 }
1393
1394
1395 imx274_set_exposure(imx274, ctrl->val);
1396
1397 dev_dbg(&imx274->client->dev, "set frame interval to %uus\n",
1398 fi->interval.numerator * 1000000
1399 / fi->interval.denominator);
1400 }
1401
1402 unlock:
1403 mutex_unlock(&imx274->lock);
1404 pm_runtime_put(&imx274->client->dev);
1405
1406 return ret;
1407 }
1408
1409
1410
1411
1412
1413
1414
1415 static void imx274_load_default(struct stimx274 *priv)
1416 {
1417
1418 priv->frame_interval.numerator = 1;
1419 priv->frame_interval.denominator = IMX274_DEF_FRAME_RATE;
1420 priv->ctrls.exposure->val = 1000000 / IMX274_DEF_FRAME_RATE;
1421 priv->ctrls.gain->val = IMX274_DEF_GAIN;
1422 priv->ctrls.vflip->val = 0;
1423 priv->ctrls.test_pattern->val = TEST_PATTERN_DISABLED;
1424 }
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436 static int imx274_s_stream(struct v4l2_subdev *sd, int on)
1437 {
1438 struct stimx274 *imx274 = to_imx274(sd);
1439 int ret = 0;
1440
1441 dev_dbg(&imx274->client->dev, "%s : %s, mode index = %td\n", __func__,
1442 on ? "Stream Start" : "Stream Stop",
1443 imx274->mode - &imx274_modes[0]);
1444
1445 mutex_lock(&imx274->lock);
1446
1447 if (on) {
1448 ret = pm_runtime_resume_and_get(&imx274->client->dev);
1449 if (ret < 0) {
1450 mutex_unlock(&imx274->lock);
1451 return ret;
1452 }
1453
1454
1455 ret = imx274_mode_regs(imx274);
1456 if (ret)
1457 goto fail;
1458
1459 ret = imx274_apply_trimming(imx274);
1460 if (ret)
1461 goto fail;
1462
1463
1464
1465
1466
1467
1468
1469 ret = imx274_set_frame_interval(imx274,
1470 imx274->frame_interval);
1471 if (ret)
1472 goto fail;
1473
1474
1475 ret = imx274_start_stream(imx274);
1476 if (ret)
1477 goto fail;
1478 } else {
1479
1480 ret = imx274_write_table(imx274, imx274_stop);
1481 if (ret)
1482 goto fail;
1483
1484 pm_runtime_put(&imx274->client->dev);
1485 }
1486
1487 mutex_unlock(&imx274->lock);
1488 dev_dbg(&imx274->client->dev, "%s : Done\n", __func__);
1489 return 0;
1490
1491 fail:
1492 pm_runtime_put(&imx274->client->dev);
1493 mutex_unlock(&imx274->lock);
1494 dev_err(&imx274->client->dev, "s_stream failed\n");
1495 return ret;
1496 }
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507 static int imx274_get_frame_length(struct stimx274 *priv, u32 *val)
1508 {
1509 int err;
1510 u32 svr;
1511 u32 vmax;
1512
1513 err = imx274_read_mbreg(priv, IMX274_SVR_REG_LSB, &svr, 2);
1514 if (err)
1515 goto fail;
1516
1517 err = imx274_read_mbreg(priv, IMX274_VMAX_REG_3, &vmax, 3);
1518 if (err)
1519 goto fail;
1520
1521 *val = vmax * (svr + 1);
1522
1523 return 0;
1524
1525 fail:
1526 dev_err(&priv->client->dev, "%s error = %d\n", __func__, err);
1527 return err;
1528 }
1529
1530 static int imx274_clamp_coarse_time(struct stimx274 *priv, u32 *val,
1531 u32 *frame_length)
1532 {
1533 int err;
1534
1535 err = imx274_get_frame_length(priv, frame_length);
1536 if (err)
1537 return err;
1538
1539 if (*frame_length < priv->mode->min_frame_len)
1540 *frame_length = priv->mode->min_frame_len;
1541
1542 *val = *frame_length - *val;
1543 if (*val > *frame_length - IMX274_SHR_LIMIT_CONST)
1544 *val = *frame_length - IMX274_SHR_LIMIT_CONST;
1545 else if (*val < priv->mode->min_SHR)
1546 *val = priv->mode->min_SHR;
1547
1548 return 0;
1549 }
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560 static int imx274_set_digital_gain(struct stimx274 *priv, u32 dgain)
1561 {
1562 u8 reg_val;
1563
1564 reg_val = ffs(dgain);
1565
1566 if (reg_val)
1567 reg_val--;
1568
1569 reg_val = clamp(reg_val, (u8)0, (u8)3);
1570
1571 return imx274_write_reg(priv, IMX274_DIGITAL_GAIN_REG,
1572 reg_val & IMX274_MASK_LSB_4_BITS);
1573 }
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586 static int imx274_set_gain(struct stimx274 *priv, struct v4l2_ctrl *ctrl)
1587 {
1588 int err;
1589 u32 gain, analog_gain, digital_gain, gain_reg;
1590
1591 gain = (u32)(ctrl->val);
1592
1593 dev_dbg(&priv->client->dev,
1594 "%s : input gain = %d.%d\n", __func__,
1595 gain >> IMX274_GAIN_SHIFT,
1596 ((gain & IMX274_GAIN_SHIFT_MASK) * 100) >> IMX274_GAIN_SHIFT);
1597
1598 if (gain > IMX274_MAX_DIGITAL_GAIN * IMX274_MAX_ANALOG_GAIN)
1599 gain = IMX274_MAX_DIGITAL_GAIN * IMX274_MAX_ANALOG_GAIN;
1600 else if (gain < IMX274_MIN_GAIN)
1601 gain = IMX274_MIN_GAIN;
1602
1603 if (gain <= IMX274_MAX_ANALOG_GAIN)
1604 digital_gain = 1;
1605 else if (gain <= IMX274_MAX_ANALOG_GAIN * 2)
1606 digital_gain = 2;
1607 else if (gain <= IMX274_MAX_ANALOG_GAIN * 4)
1608 digital_gain = 4;
1609 else
1610 digital_gain = IMX274_MAX_DIGITAL_GAIN;
1611
1612 analog_gain = gain / digital_gain;
1613
1614 dev_dbg(&priv->client->dev,
1615 "%s : digital gain = %d, analog gain = %d.%d\n",
1616 __func__, digital_gain, analog_gain >> IMX274_GAIN_SHIFT,
1617 ((analog_gain & IMX274_GAIN_SHIFT_MASK) * 100)
1618 >> IMX274_GAIN_SHIFT);
1619
1620 err = imx274_set_digital_gain(priv, digital_gain);
1621 if (err)
1622 goto fail;
1623
1624
1625 gain_reg = (u32)IMX274_GAIN_CONST -
1626 (IMX274_GAIN_CONST << IMX274_GAIN_SHIFT) / analog_gain;
1627 if (gain_reg > IMX274_GAIN_REG_MAX)
1628 gain_reg = IMX274_GAIN_REG_MAX;
1629
1630 err = imx274_write_mbreg(priv, IMX274_ANALOG_GAIN_ADDR_LSB, gain_reg,
1631 2);
1632 if (err)
1633 goto fail;
1634
1635 if (IMX274_GAIN_CONST - gain_reg == 0) {
1636 err = -EINVAL;
1637 goto fail;
1638 }
1639
1640
1641 ctrl->val = (IMX274_GAIN_CONST << IMX274_GAIN_SHIFT)
1642 / (IMX274_GAIN_CONST - gain_reg) * digital_gain;
1643
1644 dev_dbg(&priv->client->dev,
1645 "%s : GAIN control success, gain_reg = %d, new gain = %d\n",
1646 __func__, gain_reg, ctrl->val);
1647
1648 return 0;
1649
1650 fail:
1651 dev_err(&priv->client->dev, "%s error = %d\n", __func__, err);
1652 return err;
1653 }
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664 static int imx274_set_coarse_time(struct stimx274 *priv, u32 *val)
1665 {
1666 int err;
1667 u32 coarse_time, frame_length;
1668
1669 coarse_time = *val;
1670
1671
1672 err = imx274_clamp_coarse_time(priv, &coarse_time, &frame_length);
1673 if (err)
1674 goto fail;
1675
1676 err = imx274_write_mbreg(priv, IMX274_SHR_REG_LSB, coarse_time, 2);
1677 if (err)
1678 goto fail;
1679
1680 *val = frame_length - coarse_time;
1681 return 0;
1682
1683 fail:
1684 dev_err(&priv->client->dev, "%s error = %d\n", __func__, err);
1685 return err;
1686 }
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698 static int imx274_set_exposure(struct stimx274 *priv, int val)
1699 {
1700 int err;
1701 u32 hmax;
1702 u32 coarse_time;
1703
1704 dev_dbg(&priv->client->dev,
1705 "%s : EXPOSURE control input = %d\n", __func__, val);
1706
1707
1708
1709 err = imx274_read_mbreg(priv, IMX274_HMAX_REG_LSB, &hmax, 2);
1710 if (err)
1711 goto fail;
1712
1713 if (hmax == 0) {
1714 err = -EINVAL;
1715 goto fail;
1716 }
1717
1718 coarse_time = (IMX274_PIXCLK_CONST1 / IMX274_PIXCLK_CONST2 * val
1719 - priv->mode->nocpiop) / hmax;
1720
1721
1722
1723
1724 err = imx274_set_coarse_time(priv, &coarse_time);
1725 if (err)
1726 goto fail;
1727
1728 priv->ctrls.exposure->val =
1729 (coarse_time * hmax + priv->mode->nocpiop)
1730 / (IMX274_PIXCLK_CONST1 / IMX274_PIXCLK_CONST2);
1731
1732 dev_dbg(&priv->client->dev,
1733 "%s : EXPOSURE control success\n", __func__);
1734 return 0;
1735
1736 fail:
1737 dev_err(&priv->client->dev, "%s error = %d\n", __func__, err);
1738
1739 return err;
1740 }
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754 static int imx274_set_vflip(struct stimx274 *priv, int val)
1755 {
1756 int err;
1757
1758 err = imx274_write_reg(priv, IMX274_VFLIP_REG, val);
1759 if (err) {
1760 dev_err(&priv->client->dev, "VFLIP control error\n");
1761 return err;
1762 }
1763
1764 dev_dbg(&priv->client->dev,
1765 "%s : VFLIP control success\n", __func__);
1766
1767 return 0;
1768 }
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779 static int imx274_set_test_pattern(struct stimx274 *priv, int val)
1780 {
1781 int err = 0;
1782
1783 if (val == TEST_PATTERN_DISABLED) {
1784 err = imx274_write_table(priv, imx274_tp_disabled);
1785 } else if (val <= TEST_PATTERN_V_COLOR_BARS) {
1786 err = imx274_write_reg(priv, IMX274_TEST_PATTERN_REG, val - 1);
1787 if (!err)
1788 err = imx274_write_table(priv, imx274_tp_regs);
1789 } else {
1790 err = -EINVAL;
1791 }
1792
1793 if (!err)
1794 dev_dbg(&priv->client->dev,
1795 "%s : TEST PATTERN control success\n", __func__);
1796 else
1797 dev_err(&priv->client->dev, "%s error = %d\n", __func__, err);
1798
1799 return err;
1800 }
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811 static int imx274_set_frame_length(struct stimx274 *priv, u32 val)
1812 {
1813 int err;
1814 u32 frame_length;
1815
1816 dev_dbg(&priv->client->dev, "%s : input length = %d\n",
1817 __func__, val);
1818
1819 frame_length = (u32)val;
1820
1821 err = imx274_write_mbreg(priv, IMX274_VMAX_REG_3, frame_length, 3);
1822 if (err)
1823 goto fail;
1824
1825 return 0;
1826
1827 fail:
1828 dev_err(&priv->client->dev, "%s error = %d\n", __func__, err);
1829 return err;
1830 }
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842 static int imx274_set_frame_interval(struct stimx274 *priv,
1843 struct v4l2_fract frame_interval)
1844 {
1845 int err;
1846 u32 frame_length, req_frame_rate;
1847 u32 svr;
1848 u32 hmax;
1849
1850 dev_dbg(&priv->client->dev, "%s: input frame interval = %d / %d",
1851 __func__, frame_interval.numerator,
1852 frame_interval.denominator);
1853
1854 if (frame_interval.numerator == 0 || frame_interval.denominator == 0) {
1855 frame_interval.denominator = IMX274_DEF_FRAME_RATE;
1856 frame_interval.numerator = 1;
1857 }
1858
1859 req_frame_rate = (u32)(frame_interval.denominator
1860 / frame_interval.numerator);
1861
1862
1863 if (req_frame_rate > priv->mode->max_fps) {
1864 frame_interval.numerator = 1;
1865 frame_interval.denominator = priv->mode->max_fps;
1866 } else if (req_frame_rate < IMX274_MIN_FRAME_RATE) {
1867 frame_interval.numerator = 1;
1868 frame_interval.denominator = IMX274_MIN_FRAME_RATE;
1869 }
1870
1871
1872
1873
1874
1875
1876 err = imx274_read_mbreg(priv, IMX274_SVR_REG_LSB, &svr, 2);
1877 if (err)
1878 goto fail;
1879
1880 dev_dbg(&priv->client->dev,
1881 "%s : register SVR = %d\n", __func__, svr);
1882
1883 err = imx274_read_mbreg(priv, IMX274_HMAX_REG_LSB, &hmax, 2);
1884 if (err)
1885 goto fail;
1886
1887 dev_dbg(&priv->client->dev,
1888 "%s : register HMAX = %d\n", __func__, hmax);
1889
1890 if (hmax == 0 || frame_interval.denominator == 0) {
1891 err = -EINVAL;
1892 goto fail;
1893 }
1894
1895 frame_length = IMX274_PIXCLK_CONST1 / (svr + 1) / hmax
1896 * frame_interval.numerator
1897 / frame_interval.denominator;
1898
1899 err = imx274_set_frame_length(priv, frame_length);
1900 if (err)
1901 goto fail;
1902
1903 priv->frame_interval = frame_interval;
1904 return 0;
1905
1906 fail:
1907 dev_err(&priv->client->dev, "%s error = %d\n", __func__, err);
1908 return err;
1909 }
1910
1911 static int imx274_enum_mbus_code(struct v4l2_subdev *sd,
1912 struct v4l2_subdev_state *sd_state,
1913 struct v4l2_subdev_mbus_code_enum *code)
1914 {
1915 if (code->index > 0)
1916 return -EINVAL;
1917
1918
1919 code->code = MEDIA_BUS_FMT_SRGGB10_1X10;
1920
1921 return 0;
1922 }
1923
1924 static const struct v4l2_subdev_pad_ops imx274_pad_ops = {
1925 .enum_mbus_code = imx274_enum_mbus_code,
1926 .get_fmt = imx274_get_fmt,
1927 .set_fmt = imx274_set_fmt,
1928 .get_selection = imx274_get_selection,
1929 .set_selection = imx274_set_selection,
1930 };
1931
1932 static const struct v4l2_subdev_video_ops imx274_video_ops = {
1933 .g_frame_interval = imx274_g_frame_interval,
1934 .s_frame_interval = imx274_s_frame_interval,
1935 .s_stream = imx274_s_stream,
1936 };
1937
1938 static const struct v4l2_subdev_ops imx274_subdev_ops = {
1939 .pad = &imx274_pad_ops,
1940 .video = &imx274_video_ops,
1941 };
1942
1943 static const struct v4l2_ctrl_ops imx274_ctrl_ops = {
1944 .s_ctrl = imx274_s_ctrl,
1945 };
1946
1947 static const struct of_device_id imx274_of_id_table[] = {
1948 { .compatible = "sony,imx274" },
1949 { }
1950 };
1951 MODULE_DEVICE_TABLE(of, imx274_of_id_table);
1952
1953 static const struct i2c_device_id imx274_id[] = {
1954 { "IMX274", 0 },
1955 { }
1956 };
1957 MODULE_DEVICE_TABLE(i2c, imx274_id);
1958
1959 static int imx274_fwnode_parse(struct device *dev)
1960 {
1961 struct fwnode_handle *endpoint;
1962
1963 struct v4l2_fwnode_endpoint ep = {
1964 .bus_type = V4L2_MBUS_CSI2_DPHY
1965 };
1966 int ret;
1967
1968 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL);
1969 if (!endpoint) {
1970 dev_err(dev, "Endpoint node not found\n");
1971 return -EINVAL;
1972 }
1973
1974 ret = v4l2_fwnode_endpoint_parse(endpoint, &ep);
1975 fwnode_handle_put(endpoint);
1976 if (ret == -ENXIO) {
1977 dev_err(dev, "Unsupported bus type, should be CSI2\n");
1978 return ret;
1979 } else if (ret) {
1980 dev_err(dev, "Parsing endpoint node failed %d\n", ret);
1981 return ret;
1982 }
1983
1984
1985 if (ep.bus.mipi_csi2.num_data_lanes != 4) {
1986 dev_err(dev, "Invalid data lanes: %d\n",
1987 ep.bus.mipi_csi2.num_data_lanes);
1988 return -EINVAL;
1989 }
1990
1991 return 0;
1992 }
1993
1994 static int imx274_probe(struct i2c_client *client)
1995 {
1996 struct v4l2_subdev *sd;
1997 struct stimx274 *imx274;
1998 struct device *dev = &client->dev;
1999 int ret;
2000
2001
2002 imx274 = devm_kzalloc(dev, sizeof(*imx274), GFP_KERNEL);
2003 if (!imx274)
2004 return -ENOMEM;
2005
2006 mutex_init(&imx274->lock);
2007
2008 ret = imx274_fwnode_parse(dev);
2009 if (ret)
2010 return ret;
2011
2012 imx274->inck = devm_clk_get_optional(dev, "inck");
2013 if (IS_ERR(imx274->inck))
2014 return PTR_ERR(imx274->inck);
2015
2016 ret = imx274_regulators_get(dev, imx274);
2017 if (ret) {
2018 dev_err(dev, "Failed to get power regulators, err: %d\n", ret);
2019 return ret;
2020 }
2021
2022
2023 imx274->mode = &imx274_modes[0];
2024 imx274->crop.width = IMX274_MAX_WIDTH;
2025 imx274->crop.height = IMX274_MAX_HEIGHT;
2026 imx274->format.width = imx274->crop.width / imx274->mode->wbin_ratio;
2027 imx274->format.height = imx274->crop.height / imx274->mode->hbin_ratio;
2028 imx274->format.field = V4L2_FIELD_NONE;
2029 imx274->format.code = MEDIA_BUS_FMT_SRGGB10_1X10;
2030 imx274->format.colorspace = V4L2_COLORSPACE_SRGB;
2031 imx274->frame_interval.numerator = 1;
2032 imx274->frame_interval.denominator = IMX274_DEF_FRAME_RATE;
2033
2034
2035 imx274->regmap = devm_regmap_init_i2c(client, &imx274_regmap_config);
2036 if (IS_ERR(imx274->regmap)) {
2037 dev_err(dev,
2038 "regmap init failed: %ld\n", PTR_ERR(imx274->regmap));
2039 ret = -ENODEV;
2040 goto err_regmap;
2041 }
2042
2043
2044 imx274->client = client;
2045 sd = &imx274->sd;
2046 v4l2_i2c_subdev_init(sd, client, &imx274_subdev_ops);
2047 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS;
2048
2049
2050 imx274->pad.flags = MEDIA_PAD_FL_SOURCE;
2051 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
2052 ret = media_entity_pads_init(&sd->entity, 1, &imx274->pad);
2053 if (ret < 0) {
2054 dev_err(dev,
2055 "%s : media entity init Failed %d\n", __func__, ret);
2056 goto err_regmap;
2057 }
2058
2059
2060 imx274->reset_gpio = devm_gpiod_get_optional(dev, "reset",
2061 GPIOD_OUT_HIGH);
2062 if (IS_ERR(imx274->reset_gpio)) {
2063 if (PTR_ERR(imx274->reset_gpio) != -EPROBE_DEFER)
2064 dev_err(dev, "Reset GPIO not setup in DT");
2065 ret = PTR_ERR(imx274->reset_gpio);
2066 goto err_me;
2067 }
2068
2069
2070 ret = imx274_power_on(dev);
2071 if (ret < 0) {
2072 dev_err(dev, "%s : imx274 power on failed\n", __func__);
2073 goto err_me;
2074 }
2075
2076
2077 ret = v4l2_ctrl_handler_init(&imx274->ctrls.handler, 4);
2078 if (ret < 0) {
2079 dev_err(dev, "%s : ctrl handler init Failed\n", __func__);
2080 goto err_power_off;
2081 }
2082
2083 imx274->ctrls.handler.lock = &imx274->lock;
2084
2085
2086 imx274->ctrls.test_pattern = v4l2_ctrl_new_std_menu_items(
2087 &imx274->ctrls.handler, &imx274_ctrl_ops,
2088 V4L2_CID_TEST_PATTERN,
2089 ARRAY_SIZE(tp_qmenu) - 1, 0, 0, tp_qmenu);
2090
2091 imx274->ctrls.gain = v4l2_ctrl_new_std(
2092 &imx274->ctrls.handler,
2093 &imx274_ctrl_ops,
2094 V4L2_CID_GAIN, IMX274_MIN_GAIN,
2095 IMX274_MAX_DIGITAL_GAIN * IMX274_MAX_ANALOG_GAIN, 1,
2096 IMX274_DEF_GAIN);
2097
2098 imx274->ctrls.exposure = v4l2_ctrl_new_std(
2099 &imx274->ctrls.handler,
2100 &imx274_ctrl_ops,
2101 V4L2_CID_EXPOSURE, IMX274_MIN_EXPOSURE_TIME,
2102 1000000 / IMX274_DEF_FRAME_RATE, 1,
2103 IMX274_MIN_EXPOSURE_TIME);
2104
2105 imx274->ctrls.vflip = v4l2_ctrl_new_std(
2106 &imx274->ctrls.handler,
2107 &imx274_ctrl_ops,
2108 V4L2_CID_VFLIP, 0, 1, 1, 0);
2109
2110 imx274->sd.ctrl_handler = &imx274->ctrls.handler;
2111 if (imx274->ctrls.handler.error) {
2112 ret = imx274->ctrls.handler.error;
2113 goto err_ctrls;
2114 }
2115
2116
2117 imx274_load_default(imx274);
2118
2119
2120 ret = v4l2_async_register_subdev(sd);
2121 if (ret < 0) {
2122 dev_err(dev, "%s : v4l2_async_register_subdev failed %d\n",
2123 __func__, ret);
2124 goto err_ctrls;
2125 }
2126
2127 pm_runtime_set_active(dev);
2128 pm_runtime_enable(dev);
2129 pm_runtime_idle(dev);
2130
2131 dev_info(dev, "imx274 : imx274 probe success !\n");
2132 return 0;
2133
2134 err_ctrls:
2135 v4l2_ctrl_handler_free(&imx274->ctrls.handler);
2136 err_power_off:
2137 imx274_power_off(dev);
2138 err_me:
2139 media_entity_cleanup(&sd->entity);
2140 err_regmap:
2141 mutex_destroy(&imx274->lock);
2142 return ret;
2143 }
2144
2145 static int imx274_remove(struct i2c_client *client)
2146 {
2147 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2148 struct stimx274 *imx274 = to_imx274(sd);
2149
2150 pm_runtime_disable(&client->dev);
2151 if (!pm_runtime_status_suspended(&client->dev))
2152 imx274_power_off(&client->dev);
2153 pm_runtime_set_suspended(&client->dev);
2154
2155 v4l2_async_unregister_subdev(sd);
2156 v4l2_ctrl_handler_free(&imx274->ctrls.handler);
2157
2158 media_entity_cleanup(&sd->entity);
2159 mutex_destroy(&imx274->lock);
2160 return 0;
2161 }
2162
2163 static const struct dev_pm_ops imx274_pm_ops = {
2164 SET_RUNTIME_PM_OPS(imx274_power_off, imx274_power_on, NULL)
2165 };
2166
2167 static struct i2c_driver imx274_i2c_driver = {
2168 .driver = {
2169 .name = DRIVER_NAME,
2170 .pm = &imx274_pm_ops,
2171 .of_match_table = imx274_of_id_table,
2172 },
2173 .probe_new = imx274_probe,
2174 .remove = imx274_remove,
2175 .id_table = imx274_id,
2176 };
2177
2178 module_i2c_driver(imx274_i2c_driver);
2179
2180 MODULE_AUTHOR("Leon Luo <leonl@leopardimaging.com>");
2181 MODULE_DESCRIPTION("IMX274 CMOS Image Sensor driver");
2182 MODULE_LICENSE("GPL v2");