Back to home page

OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * A V4L2 driver for Sony IMX219 cameras.
0004  * Copyright (C) 2019, Raspberry Pi (Trading) Ltd
0005  *
0006  * Based on Sony imx258 camera driver
0007  * Copyright (C) 2018 Intel Corporation
0008  *
0009  * DT / fwnode changes, and regulator / GPIO control taken from imx214 driver
0010  * Copyright 2018 Qtechnology A/S
0011  *
0012  * Flip handling taken from the Sony IMX319 driver.
0013  * Copyright (C) 2018 Intel Corporation
0014  *
0015  */
0016 
0017 #include <linux/clk.h>
0018 #include <linux/delay.h>
0019 #include <linux/gpio/consumer.h>
0020 #include <linux/i2c.h>
0021 #include <linux/module.h>
0022 #include <linux/pm_runtime.h>
0023 #include <linux/regulator/consumer.h>
0024 #include <media/v4l2-ctrls.h>
0025 #include <media/v4l2-device.h>
0026 #include <media/v4l2-event.h>
0027 #include <media/v4l2-fwnode.h>
0028 #include <media/v4l2-mediabus.h>
0029 #include <asm/unaligned.h>
0030 
0031 #define IMX219_REG_VALUE_08BIT      1
0032 #define IMX219_REG_VALUE_16BIT      2
0033 
0034 #define IMX219_REG_MODE_SELECT      0x0100
0035 #define IMX219_MODE_STANDBY     0x00
0036 #define IMX219_MODE_STREAMING       0x01
0037 
0038 /* Chip ID */
0039 #define IMX219_REG_CHIP_ID      0x0000
0040 #define IMX219_CHIP_ID          0x0219
0041 
0042 /* External clock frequency is 24.0M */
0043 #define IMX219_XCLK_FREQ        24000000
0044 
0045 /* Pixel rate is fixed at 182.4M for all the modes */
0046 #define IMX219_PIXEL_RATE       182400000
0047 
0048 #define IMX219_DEFAULT_LINK_FREQ    456000000
0049 
0050 /* V_TIMING internal */
0051 #define IMX219_REG_VTS          0x0160
0052 #define IMX219_VTS_15FPS        0x0dc6
0053 #define IMX219_VTS_30FPS_1080P      0x06e3
0054 #define IMX219_VTS_30FPS_BINNED     0x06e3
0055 #define IMX219_VTS_30FPS_640x480    0x06e3
0056 #define IMX219_VTS_MAX          0xffff
0057 
0058 #define IMX219_VBLANK_MIN       4
0059 
0060 /*Frame Length Line*/
0061 #define IMX219_FLL_MIN          0x08a6
0062 #define IMX219_FLL_MAX          0xffff
0063 #define IMX219_FLL_STEP         1
0064 #define IMX219_FLL_DEFAULT      0x0c98
0065 
0066 /* HBLANK control - read only */
0067 #define IMX219_PPL_DEFAULT      3448
0068 
0069 /* Exposure control */
0070 #define IMX219_REG_EXPOSURE     0x015a
0071 #define IMX219_EXPOSURE_MIN     4
0072 #define IMX219_EXPOSURE_STEP        1
0073 #define IMX219_EXPOSURE_DEFAULT     0x640
0074 #define IMX219_EXPOSURE_MAX     65535
0075 
0076 /* Analog gain control */
0077 #define IMX219_REG_ANALOG_GAIN      0x0157
0078 #define IMX219_ANA_GAIN_MIN     0
0079 #define IMX219_ANA_GAIN_MAX     232
0080 #define IMX219_ANA_GAIN_STEP        1
0081 #define IMX219_ANA_GAIN_DEFAULT     0x0
0082 
0083 /* Digital gain control */
0084 #define IMX219_REG_DIGITAL_GAIN     0x0158
0085 #define IMX219_DGTL_GAIN_MIN        0x0100
0086 #define IMX219_DGTL_GAIN_MAX        0x0fff
0087 #define IMX219_DGTL_GAIN_DEFAULT    0x0100
0088 #define IMX219_DGTL_GAIN_STEP       1
0089 
0090 #define IMX219_REG_ORIENTATION      0x0172
0091 
0092 /* Test Pattern Control */
0093 #define IMX219_REG_TEST_PATTERN     0x0600
0094 #define IMX219_TEST_PATTERN_DISABLE 0
0095 #define IMX219_TEST_PATTERN_SOLID_COLOR 1
0096 #define IMX219_TEST_PATTERN_COLOR_BARS  2
0097 #define IMX219_TEST_PATTERN_GREY_COLOR  3
0098 #define IMX219_TEST_PATTERN_PN9     4
0099 
0100 /* Test pattern colour components */
0101 #define IMX219_REG_TESTP_RED        0x0602
0102 #define IMX219_REG_TESTP_GREENR     0x0604
0103 #define IMX219_REG_TESTP_BLUE       0x0606
0104 #define IMX219_REG_TESTP_GREENB     0x0608
0105 #define IMX219_TESTP_COLOUR_MIN     0
0106 #define IMX219_TESTP_COLOUR_MAX     0x03ff
0107 #define IMX219_TESTP_COLOUR_STEP    1
0108 #define IMX219_TESTP_RED_DEFAULT    IMX219_TESTP_COLOUR_MAX
0109 #define IMX219_TESTP_GREENR_DEFAULT 0
0110 #define IMX219_TESTP_BLUE_DEFAULT   0
0111 #define IMX219_TESTP_GREENB_DEFAULT 0
0112 
0113 /* IMX219 native and active pixel array size. */
0114 #define IMX219_NATIVE_WIDTH     3296U
0115 #define IMX219_NATIVE_HEIGHT        2480U
0116 #define IMX219_PIXEL_ARRAY_LEFT     8U
0117 #define IMX219_PIXEL_ARRAY_TOP      8U
0118 #define IMX219_PIXEL_ARRAY_WIDTH    3280U
0119 #define IMX219_PIXEL_ARRAY_HEIGHT   2464U
0120 
0121 struct imx219_reg {
0122     u16 address;
0123     u8 val;
0124 };
0125 
0126 struct imx219_reg_list {
0127     unsigned int num_of_regs;
0128     const struct imx219_reg *regs;
0129 };
0130 
0131 /* Mode : resolution and related config&values */
0132 struct imx219_mode {
0133     /* Frame width */
0134     unsigned int width;
0135     /* Frame height */
0136     unsigned int height;
0137 
0138     /* Analog crop rectangle. */
0139     struct v4l2_rect crop;
0140 
0141     /* V-timing */
0142     unsigned int vts_def;
0143 
0144     /* Default register values */
0145     struct imx219_reg_list reg_list;
0146 };
0147 
0148 /*
0149  * Register sets lifted off the i2C interface from the Raspberry Pi firmware
0150  * driver.
0151  * 3280x2464 = mode 2, 1920x1080 = mode 1, 1640x1232 = mode 4, 640x480 = mode 7.
0152  */
0153 static const struct imx219_reg mode_3280x2464_regs[] = {
0154     {0x0100, 0x00},
0155     {0x30eb, 0x0c},
0156     {0x30eb, 0x05},
0157     {0x300a, 0xff},
0158     {0x300b, 0xff},
0159     {0x30eb, 0x05},
0160     {0x30eb, 0x09},
0161     {0x0114, 0x01},
0162     {0x0128, 0x00},
0163     {0x012a, 0x18},
0164     {0x012b, 0x00},
0165     {0x0164, 0x00},
0166     {0x0165, 0x00},
0167     {0x0166, 0x0c},
0168     {0x0167, 0xcf},
0169     {0x0168, 0x00},
0170     {0x0169, 0x00},
0171     {0x016a, 0x09},
0172     {0x016b, 0x9f},
0173     {0x016c, 0x0c},
0174     {0x016d, 0xd0},
0175     {0x016e, 0x09},
0176     {0x016f, 0xa0},
0177     {0x0170, 0x01},
0178     {0x0171, 0x01},
0179     {0x0174, 0x00},
0180     {0x0175, 0x00},
0181     {0x0301, 0x05},
0182     {0x0303, 0x01},
0183     {0x0304, 0x03},
0184     {0x0305, 0x03},
0185     {0x0306, 0x00},
0186     {0x0307, 0x39},
0187     {0x030b, 0x01},
0188     {0x030c, 0x00},
0189     {0x030d, 0x72},
0190     {0x0624, 0x0c},
0191     {0x0625, 0xd0},
0192     {0x0626, 0x09},
0193     {0x0627, 0xa0},
0194     {0x455e, 0x00},
0195     {0x471e, 0x4b},
0196     {0x4767, 0x0f},
0197     {0x4750, 0x14},
0198     {0x4540, 0x00},
0199     {0x47b4, 0x14},
0200     {0x4713, 0x30},
0201     {0x478b, 0x10},
0202     {0x478f, 0x10},
0203     {0x4793, 0x10},
0204     {0x4797, 0x0e},
0205     {0x479b, 0x0e},
0206     {0x0162, 0x0d},
0207     {0x0163, 0x78},
0208 };
0209 
0210 static const struct imx219_reg mode_1920_1080_regs[] = {
0211     {0x0100, 0x00},
0212     {0x30eb, 0x05},
0213     {0x30eb, 0x0c},
0214     {0x300a, 0xff},
0215     {0x300b, 0xff},
0216     {0x30eb, 0x05},
0217     {0x30eb, 0x09},
0218     {0x0114, 0x01},
0219     {0x0128, 0x00},
0220     {0x012a, 0x18},
0221     {0x012b, 0x00},
0222     {0x0162, 0x0d},
0223     {0x0163, 0x78},
0224     {0x0164, 0x02},
0225     {0x0165, 0xa8},
0226     {0x0166, 0x0a},
0227     {0x0167, 0x27},
0228     {0x0168, 0x02},
0229     {0x0169, 0xb4},
0230     {0x016a, 0x06},
0231     {0x016b, 0xeb},
0232     {0x016c, 0x07},
0233     {0x016d, 0x80},
0234     {0x016e, 0x04},
0235     {0x016f, 0x38},
0236     {0x0170, 0x01},
0237     {0x0171, 0x01},
0238     {0x0174, 0x00},
0239     {0x0175, 0x00},
0240     {0x0301, 0x05},
0241     {0x0303, 0x01},
0242     {0x0304, 0x03},
0243     {0x0305, 0x03},
0244     {0x0306, 0x00},
0245     {0x0307, 0x39},
0246     {0x030b, 0x01},
0247     {0x030c, 0x00},
0248     {0x030d, 0x72},
0249     {0x0624, 0x07},
0250     {0x0625, 0x80},
0251     {0x0626, 0x04},
0252     {0x0627, 0x38},
0253     {0x455e, 0x00},
0254     {0x471e, 0x4b},
0255     {0x4767, 0x0f},
0256     {0x4750, 0x14},
0257     {0x4540, 0x00},
0258     {0x47b4, 0x14},
0259     {0x4713, 0x30},
0260     {0x478b, 0x10},
0261     {0x478f, 0x10},
0262     {0x4793, 0x10},
0263     {0x4797, 0x0e},
0264     {0x479b, 0x0e},
0265 };
0266 
0267 static const struct imx219_reg mode_1640_1232_regs[] = {
0268     {0x0100, 0x00},
0269     {0x30eb, 0x0c},
0270     {0x30eb, 0x05},
0271     {0x300a, 0xff},
0272     {0x300b, 0xff},
0273     {0x30eb, 0x05},
0274     {0x30eb, 0x09},
0275     {0x0114, 0x01},
0276     {0x0128, 0x00},
0277     {0x012a, 0x18},
0278     {0x012b, 0x00},
0279     {0x0164, 0x00},
0280     {0x0165, 0x00},
0281     {0x0166, 0x0c},
0282     {0x0167, 0xcf},
0283     {0x0168, 0x00},
0284     {0x0169, 0x00},
0285     {0x016a, 0x09},
0286     {0x016b, 0x9f},
0287     {0x016c, 0x06},
0288     {0x016d, 0x68},
0289     {0x016e, 0x04},
0290     {0x016f, 0xd0},
0291     {0x0170, 0x01},
0292     {0x0171, 0x01},
0293     {0x0174, 0x01},
0294     {0x0175, 0x01},
0295     {0x0301, 0x05},
0296     {0x0303, 0x01},
0297     {0x0304, 0x03},
0298     {0x0305, 0x03},
0299     {0x0306, 0x00},
0300     {0x0307, 0x39},
0301     {0x030b, 0x01},
0302     {0x030c, 0x00},
0303     {0x030d, 0x72},
0304     {0x0624, 0x06},
0305     {0x0625, 0x68},
0306     {0x0626, 0x04},
0307     {0x0627, 0xd0},
0308     {0x455e, 0x00},
0309     {0x471e, 0x4b},
0310     {0x4767, 0x0f},
0311     {0x4750, 0x14},
0312     {0x4540, 0x00},
0313     {0x47b4, 0x14},
0314     {0x4713, 0x30},
0315     {0x478b, 0x10},
0316     {0x478f, 0x10},
0317     {0x4793, 0x10},
0318     {0x4797, 0x0e},
0319     {0x479b, 0x0e},
0320     {0x0162, 0x0d},
0321     {0x0163, 0x78},
0322 };
0323 
0324 static const struct imx219_reg mode_640_480_regs[] = {
0325     {0x0100, 0x00},
0326     {0x30eb, 0x05},
0327     {0x30eb, 0x0c},
0328     {0x300a, 0xff},
0329     {0x300b, 0xff},
0330     {0x30eb, 0x05},
0331     {0x30eb, 0x09},
0332     {0x0114, 0x01},
0333     {0x0128, 0x00},
0334     {0x012a, 0x18},
0335     {0x012b, 0x00},
0336     {0x0162, 0x0d},
0337     {0x0163, 0x78},
0338     {0x0164, 0x03},
0339     {0x0165, 0xe8},
0340     {0x0166, 0x08},
0341     {0x0167, 0xe7},
0342     {0x0168, 0x02},
0343     {0x0169, 0xf0},
0344     {0x016a, 0x06},
0345     {0x016b, 0xaf},
0346     {0x016c, 0x02},
0347     {0x016d, 0x80},
0348     {0x016e, 0x01},
0349     {0x016f, 0xe0},
0350     {0x0170, 0x01},
0351     {0x0171, 0x01},
0352     {0x0174, 0x03},
0353     {0x0175, 0x03},
0354     {0x0301, 0x05},
0355     {0x0303, 0x01},
0356     {0x0304, 0x03},
0357     {0x0305, 0x03},
0358     {0x0306, 0x00},
0359     {0x0307, 0x39},
0360     {0x030b, 0x01},
0361     {0x030c, 0x00},
0362     {0x030d, 0x72},
0363     {0x0624, 0x06},
0364     {0x0625, 0x68},
0365     {0x0626, 0x04},
0366     {0x0627, 0xd0},
0367     {0x455e, 0x00},
0368     {0x471e, 0x4b},
0369     {0x4767, 0x0f},
0370     {0x4750, 0x14},
0371     {0x4540, 0x00},
0372     {0x47b4, 0x14},
0373     {0x4713, 0x30},
0374     {0x478b, 0x10},
0375     {0x478f, 0x10},
0376     {0x4793, 0x10},
0377     {0x4797, 0x0e},
0378     {0x479b, 0x0e},
0379 };
0380 
0381 static const struct imx219_reg raw8_framefmt_regs[] = {
0382     {0x018c, 0x08},
0383     {0x018d, 0x08},
0384     {0x0309, 0x08},
0385 };
0386 
0387 static const struct imx219_reg raw10_framefmt_regs[] = {
0388     {0x018c, 0x0a},
0389     {0x018d, 0x0a},
0390     {0x0309, 0x0a},
0391 };
0392 
0393 static const s64 imx219_link_freq_menu[] = {
0394     IMX219_DEFAULT_LINK_FREQ,
0395 };
0396 
0397 static const char * const imx219_test_pattern_menu[] = {
0398     "Disabled",
0399     "Color Bars",
0400     "Solid Color",
0401     "Grey Color Bars",
0402     "PN9"
0403 };
0404 
0405 static const int imx219_test_pattern_val[] = {
0406     IMX219_TEST_PATTERN_DISABLE,
0407     IMX219_TEST_PATTERN_COLOR_BARS,
0408     IMX219_TEST_PATTERN_SOLID_COLOR,
0409     IMX219_TEST_PATTERN_GREY_COLOR,
0410     IMX219_TEST_PATTERN_PN9,
0411 };
0412 
0413 /* regulator supplies */
0414 static const char * const imx219_supply_name[] = {
0415     /* Supplies can be enabled in any order */
0416     "VANA",  /* Analog (2.8V) supply */
0417     "VDIG",  /* Digital Core (1.8V) supply */
0418     "VDDL",  /* IF (1.2V) supply */
0419 };
0420 
0421 #define IMX219_NUM_SUPPLIES ARRAY_SIZE(imx219_supply_name)
0422 
0423 /*
0424  * The supported formats.
0425  * This table MUST contain 4 entries per format, to cover the various flip
0426  * combinations in the order
0427  * - no flip
0428  * - h flip
0429  * - v flip
0430  * - h&v flips
0431  */
0432 static const u32 codes[] = {
0433     MEDIA_BUS_FMT_SRGGB10_1X10,
0434     MEDIA_BUS_FMT_SGRBG10_1X10,
0435     MEDIA_BUS_FMT_SGBRG10_1X10,
0436     MEDIA_BUS_FMT_SBGGR10_1X10,
0437 
0438     MEDIA_BUS_FMT_SRGGB8_1X8,
0439     MEDIA_BUS_FMT_SGRBG8_1X8,
0440     MEDIA_BUS_FMT_SGBRG8_1X8,
0441     MEDIA_BUS_FMT_SBGGR8_1X8,
0442 };
0443 
0444 /*
0445  * Initialisation delay between XCLR low->high and the moment when the sensor
0446  * can start capture (i.e. can leave software stanby) must be not less than:
0447  *   t4 + max(t5, t6 + <time to initialize the sensor register over I2C>)
0448  * where
0449  *   t4 is fixed, and is max 200uS,
0450  *   t5 is fixed, and is 6000uS,
0451  *   t6 depends on the sensor external clock, and is max 32000 clock periods.
0452  * As per sensor datasheet, the external clock must be from 6MHz to 27MHz.
0453  * So for any acceptable external clock t6 is always within the range of
0454  * 1185 to 5333 uS, and is always less than t5.
0455  * For this reason this is always safe to wait (t4 + t5) = 6200 uS, then
0456  * initialize the sensor over I2C, and then exit the software standby.
0457  *
0458  * This start-up time can be optimized a bit more, if we start the writes
0459  * over I2C after (t4+t6), but before (t4+t5) expires. But then sensor
0460  * initialization over I2C may complete before (t4+t5) expires, and we must
0461  * ensure that capture is not started before (t4+t5).
0462  *
0463  * This delay doesn't account for the power supply startup time. If needed,
0464  * this should be taken care of via the regulator framework. E.g. in the
0465  * case of DT for regulator-fixed one should define the startup-delay-us
0466  * property.
0467  */
0468 #define IMX219_XCLR_MIN_DELAY_US    6200
0469 #define IMX219_XCLR_DELAY_RANGE_US  1000
0470 
0471 /* Mode configs */
0472 static const struct imx219_mode supported_modes[] = {
0473     {
0474         /* 8MPix 15fps mode */
0475         .width = 3280,
0476         .height = 2464,
0477         .crop = {
0478             .left = IMX219_PIXEL_ARRAY_LEFT,
0479             .top = IMX219_PIXEL_ARRAY_TOP,
0480             .width = 3280,
0481             .height = 2464
0482         },
0483         .vts_def = IMX219_VTS_15FPS,
0484         .reg_list = {
0485             .num_of_regs = ARRAY_SIZE(mode_3280x2464_regs),
0486             .regs = mode_3280x2464_regs,
0487         },
0488     },
0489     {
0490         /* 1080P 30fps cropped */
0491         .width = 1920,
0492         .height = 1080,
0493         .crop = {
0494             .left = 688,
0495             .top = 700,
0496             .width = 1920,
0497             .height = 1080
0498         },
0499         .vts_def = IMX219_VTS_30FPS_1080P,
0500         .reg_list = {
0501             .num_of_regs = ARRAY_SIZE(mode_1920_1080_regs),
0502             .regs = mode_1920_1080_regs,
0503         },
0504     },
0505     {
0506         /* 2x2 binned 30fps mode */
0507         .width = 1640,
0508         .height = 1232,
0509         .crop = {
0510             .left = IMX219_PIXEL_ARRAY_LEFT,
0511             .top = IMX219_PIXEL_ARRAY_TOP,
0512             .width = 3280,
0513             .height = 2464
0514         },
0515         .vts_def = IMX219_VTS_30FPS_BINNED,
0516         .reg_list = {
0517             .num_of_regs = ARRAY_SIZE(mode_1640_1232_regs),
0518             .regs = mode_1640_1232_regs,
0519         },
0520     },
0521     {
0522         /* 640x480 30fps mode */
0523         .width = 640,
0524         .height = 480,
0525         .crop = {
0526             .left = 1008,
0527             .top = 760,
0528             .width = 1280,
0529             .height = 960
0530         },
0531         .vts_def = IMX219_VTS_30FPS_640x480,
0532         .reg_list = {
0533             .num_of_regs = ARRAY_SIZE(mode_640_480_regs),
0534             .regs = mode_640_480_regs,
0535         },
0536     },
0537 };
0538 
0539 struct imx219 {
0540     struct v4l2_subdev sd;
0541     struct media_pad pad;
0542 
0543     struct v4l2_mbus_framefmt fmt;
0544 
0545     struct clk *xclk; /* system clock to IMX219 */
0546     u32 xclk_freq;
0547 
0548     struct gpio_desc *reset_gpio;
0549     struct regulator_bulk_data supplies[IMX219_NUM_SUPPLIES];
0550 
0551     struct v4l2_ctrl_handler ctrl_handler;
0552     /* V4L2 Controls */
0553     struct v4l2_ctrl *pixel_rate;
0554     struct v4l2_ctrl *link_freq;
0555     struct v4l2_ctrl *exposure;
0556     struct v4l2_ctrl *vflip;
0557     struct v4l2_ctrl *hflip;
0558     struct v4l2_ctrl *vblank;
0559     struct v4l2_ctrl *hblank;
0560 
0561     /* Current mode */
0562     const struct imx219_mode *mode;
0563 
0564     /*
0565      * Mutex for serialized access:
0566      * Protect sensor module set pad format and start/stop streaming safely.
0567      */
0568     struct mutex mutex;
0569 
0570     /* Streaming on/off */
0571     bool streaming;
0572 };
0573 
0574 static inline struct imx219 *to_imx219(struct v4l2_subdev *_sd)
0575 {
0576     return container_of(_sd, struct imx219, sd);
0577 }
0578 
0579 /* Read registers up to 2 at a time */
0580 static int imx219_read_reg(struct imx219 *imx219, u16 reg, u32 len, u32 *val)
0581 {
0582     struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
0583     struct i2c_msg msgs[2];
0584     u8 addr_buf[2] = { reg >> 8, reg & 0xff };
0585     u8 data_buf[4] = { 0, };
0586     int ret;
0587 
0588     if (len > 4)
0589         return -EINVAL;
0590 
0591     /* Write register address */
0592     msgs[0].addr = client->addr;
0593     msgs[0].flags = 0;
0594     msgs[0].len = ARRAY_SIZE(addr_buf);
0595     msgs[0].buf = addr_buf;
0596 
0597     /* Read data from register */
0598     msgs[1].addr = client->addr;
0599     msgs[1].flags = I2C_M_RD;
0600     msgs[1].len = len;
0601     msgs[1].buf = &data_buf[4 - len];
0602 
0603     ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
0604     if (ret != ARRAY_SIZE(msgs))
0605         return -EIO;
0606 
0607     *val = get_unaligned_be32(data_buf);
0608 
0609     return 0;
0610 }
0611 
0612 /* Write registers up to 2 at a time */
0613 static int imx219_write_reg(struct imx219 *imx219, u16 reg, u32 len, u32 val)
0614 {
0615     struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
0616     u8 buf[6];
0617 
0618     if (len > 4)
0619         return -EINVAL;
0620 
0621     put_unaligned_be16(reg, buf);
0622     put_unaligned_be32(val << (8 * (4 - len)), buf + 2);
0623     if (i2c_master_send(client, buf, len + 2) != len + 2)
0624         return -EIO;
0625 
0626     return 0;
0627 }
0628 
0629 /* Write a list of registers */
0630 static int imx219_write_regs(struct imx219 *imx219,
0631                  const struct imx219_reg *regs, u32 len)
0632 {
0633     struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
0634     unsigned int i;
0635     int ret;
0636 
0637     for (i = 0; i < len; i++) {
0638         ret = imx219_write_reg(imx219, regs[i].address, 1, regs[i].val);
0639         if (ret) {
0640             dev_err_ratelimited(&client->dev,
0641                         "Failed to write reg 0x%4.4x. error = %d\n",
0642                         regs[i].address, ret);
0643 
0644             return ret;
0645         }
0646     }
0647 
0648     return 0;
0649 }
0650 
0651 /* Get bayer order based on flip setting. */
0652 static u32 imx219_get_format_code(struct imx219 *imx219, u32 code)
0653 {
0654     unsigned int i;
0655 
0656     lockdep_assert_held(&imx219->mutex);
0657 
0658     for (i = 0; i < ARRAY_SIZE(codes); i++)
0659         if (codes[i] == code)
0660             break;
0661 
0662     if (i >= ARRAY_SIZE(codes))
0663         i = 0;
0664 
0665     i = (i & ~3) | (imx219->vflip->val ? 2 : 0) |
0666         (imx219->hflip->val ? 1 : 0);
0667 
0668     return codes[i];
0669 }
0670 
0671 static void imx219_set_default_format(struct imx219 *imx219)
0672 {
0673     struct v4l2_mbus_framefmt *fmt;
0674 
0675     fmt = &imx219->fmt;
0676     fmt->code = MEDIA_BUS_FMT_SRGGB10_1X10;
0677     fmt->colorspace = V4L2_COLORSPACE_SRGB;
0678     fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
0679     fmt->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true,
0680                               fmt->colorspace,
0681                               fmt->ycbcr_enc);
0682     fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
0683     fmt->width = supported_modes[0].width;
0684     fmt->height = supported_modes[0].height;
0685     fmt->field = V4L2_FIELD_NONE;
0686 }
0687 
0688 static int imx219_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
0689 {
0690     struct imx219 *imx219 = to_imx219(sd);
0691     struct v4l2_mbus_framefmt *try_fmt =
0692         v4l2_subdev_get_try_format(sd, fh->state, 0);
0693     struct v4l2_rect *try_crop;
0694 
0695     mutex_lock(&imx219->mutex);
0696 
0697     /* Initialize try_fmt */
0698     try_fmt->width = supported_modes[0].width;
0699     try_fmt->height = supported_modes[0].height;
0700     try_fmt->code = imx219_get_format_code(imx219,
0701                            MEDIA_BUS_FMT_SRGGB10_1X10);
0702     try_fmt->field = V4L2_FIELD_NONE;
0703 
0704     /* Initialize try_crop rectangle. */
0705     try_crop = v4l2_subdev_get_try_crop(sd, fh->state, 0);
0706     try_crop->top = IMX219_PIXEL_ARRAY_TOP;
0707     try_crop->left = IMX219_PIXEL_ARRAY_LEFT;
0708     try_crop->width = IMX219_PIXEL_ARRAY_WIDTH;
0709     try_crop->height = IMX219_PIXEL_ARRAY_HEIGHT;
0710 
0711     mutex_unlock(&imx219->mutex);
0712 
0713     return 0;
0714 }
0715 
0716 static int imx219_set_ctrl(struct v4l2_ctrl *ctrl)
0717 {
0718     struct imx219 *imx219 =
0719         container_of(ctrl->handler, struct imx219, ctrl_handler);
0720     struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
0721     int ret;
0722 
0723     if (ctrl->id == V4L2_CID_VBLANK) {
0724         int exposure_max, exposure_def;
0725 
0726         /* Update max exposure while meeting expected vblanking */
0727         exposure_max = imx219->mode->height + ctrl->val - 4;
0728         exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
0729             exposure_max : IMX219_EXPOSURE_DEFAULT;
0730         __v4l2_ctrl_modify_range(imx219->exposure,
0731                      imx219->exposure->minimum,
0732                      exposure_max, imx219->exposure->step,
0733                      exposure_def);
0734     }
0735 
0736     /*
0737      * Applying V4L2 control value only happens
0738      * when power is up for streaming
0739      */
0740     if (pm_runtime_get_if_in_use(&client->dev) == 0)
0741         return 0;
0742 
0743     switch (ctrl->id) {
0744     case V4L2_CID_ANALOGUE_GAIN:
0745         ret = imx219_write_reg(imx219, IMX219_REG_ANALOG_GAIN,
0746                        IMX219_REG_VALUE_08BIT, ctrl->val);
0747         break;
0748     case V4L2_CID_EXPOSURE:
0749         ret = imx219_write_reg(imx219, IMX219_REG_EXPOSURE,
0750                        IMX219_REG_VALUE_16BIT, ctrl->val);
0751         break;
0752     case V4L2_CID_DIGITAL_GAIN:
0753         ret = imx219_write_reg(imx219, IMX219_REG_DIGITAL_GAIN,
0754                        IMX219_REG_VALUE_16BIT, ctrl->val);
0755         break;
0756     case V4L2_CID_TEST_PATTERN:
0757         ret = imx219_write_reg(imx219, IMX219_REG_TEST_PATTERN,
0758                        IMX219_REG_VALUE_16BIT,
0759                        imx219_test_pattern_val[ctrl->val]);
0760         break;
0761     case V4L2_CID_HFLIP:
0762     case V4L2_CID_VFLIP:
0763         ret = imx219_write_reg(imx219, IMX219_REG_ORIENTATION, 1,
0764                        imx219->hflip->val |
0765                        imx219->vflip->val << 1);
0766         break;
0767     case V4L2_CID_VBLANK:
0768         ret = imx219_write_reg(imx219, IMX219_REG_VTS,
0769                        IMX219_REG_VALUE_16BIT,
0770                        imx219->mode->height + ctrl->val);
0771         break;
0772     case V4L2_CID_TEST_PATTERN_RED:
0773         ret = imx219_write_reg(imx219, IMX219_REG_TESTP_RED,
0774                        IMX219_REG_VALUE_16BIT, ctrl->val);
0775         break;
0776     case V4L2_CID_TEST_PATTERN_GREENR:
0777         ret = imx219_write_reg(imx219, IMX219_REG_TESTP_GREENR,
0778                        IMX219_REG_VALUE_16BIT, ctrl->val);
0779         break;
0780     case V4L2_CID_TEST_PATTERN_BLUE:
0781         ret = imx219_write_reg(imx219, IMX219_REG_TESTP_BLUE,
0782                        IMX219_REG_VALUE_16BIT, ctrl->val);
0783         break;
0784     case V4L2_CID_TEST_PATTERN_GREENB:
0785         ret = imx219_write_reg(imx219, IMX219_REG_TESTP_GREENB,
0786                        IMX219_REG_VALUE_16BIT, ctrl->val);
0787         break;
0788     default:
0789         dev_info(&client->dev,
0790              "ctrl(id:0x%x,val:0x%x) is not handled\n",
0791              ctrl->id, ctrl->val);
0792         ret = -EINVAL;
0793         break;
0794     }
0795 
0796     pm_runtime_put(&client->dev);
0797 
0798     return ret;
0799 }
0800 
0801 static const struct v4l2_ctrl_ops imx219_ctrl_ops = {
0802     .s_ctrl = imx219_set_ctrl,
0803 };
0804 
0805 static int imx219_enum_mbus_code(struct v4l2_subdev *sd,
0806                  struct v4l2_subdev_state *sd_state,
0807                  struct v4l2_subdev_mbus_code_enum *code)
0808 {
0809     struct imx219 *imx219 = to_imx219(sd);
0810 
0811     if (code->index >= (ARRAY_SIZE(codes) / 4))
0812         return -EINVAL;
0813 
0814     mutex_lock(&imx219->mutex);
0815     code->code = imx219_get_format_code(imx219, codes[code->index * 4]);
0816     mutex_unlock(&imx219->mutex);
0817 
0818     return 0;
0819 }
0820 
0821 static int imx219_enum_frame_size(struct v4l2_subdev *sd,
0822                   struct v4l2_subdev_state *sd_state,
0823                   struct v4l2_subdev_frame_size_enum *fse)
0824 {
0825     struct imx219 *imx219 = to_imx219(sd);
0826     u32 code;
0827 
0828     if (fse->index >= ARRAY_SIZE(supported_modes))
0829         return -EINVAL;
0830 
0831     mutex_lock(&imx219->mutex);
0832     code = imx219_get_format_code(imx219, fse->code);
0833     mutex_unlock(&imx219->mutex);
0834     if (fse->code != code)
0835         return -EINVAL;
0836 
0837     fse->min_width = supported_modes[fse->index].width;
0838     fse->max_width = fse->min_width;
0839     fse->min_height = supported_modes[fse->index].height;
0840     fse->max_height = fse->min_height;
0841 
0842     return 0;
0843 }
0844 
0845 static void imx219_reset_colorspace(struct v4l2_mbus_framefmt *fmt)
0846 {
0847     fmt->colorspace = V4L2_COLORSPACE_SRGB;
0848     fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
0849     fmt->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true,
0850                               fmt->colorspace,
0851                               fmt->ycbcr_enc);
0852     fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
0853 }
0854 
0855 static void imx219_update_pad_format(struct imx219 *imx219,
0856                      const struct imx219_mode *mode,
0857                      struct v4l2_subdev_format *fmt)
0858 {
0859     fmt->format.width = mode->width;
0860     fmt->format.height = mode->height;
0861     fmt->format.field = V4L2_FIELD_NONE;
0862     imx219_reset_colorspace(&fmt->format);
0863 }
0864 
0865 static int __imx219_get_pad_format(struct imx219 *imx219,
0866                    struct v4l2_subdev_state *sd_state,
0867                    struct v4l2_subdev_format *fmt)
0868 {
0869     if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
0870         struct v4l2_mbus_framefmt *try_fmt =
0871             v4l2_subdev_get_try_format(&imx219->sd, sd_state,
0872                            fmt->pad);
0873         /* update the code which could change due to vflip or hflip: */
0874         try_fmt->code = imx219_get_format_code(imx219, try_fmt->code);
0875         fmt->format = *try_fmt;
0876     } else {
0877         imx219_update_pad_format(imx219, imx219->mode, fmt);
0878         fmt->format.code = imx219_get_format_code(imx219,
0879                               imx219->fmt.code);
0880     }
0881 
0882     return 0;
0883 }
0884 
0885 static int imx219_get_pad_format(struct v4l2_subdev *sd,
0886                  struct v4l2_subdev_state *sd_state,
0887                  struct v4l2_subdev_format *fmt)
0888 {
0889     struct imx219 *imx219 = to_imx219(sd);
0890     int ret;
0891 
0892     mutex_lock(&imx219->mutex);
0893     ret = __imx219_get_pad_format(imx219, sd_state, fmt);
0894     mutex_unlock(&imx219->mutex);
0895 
0896     return ret;
0897 }
0898 
0899 static int imx219_set_pad_format(struct v4l2_subdev *sd,
0900                  struct v4l2_subdev_state *sd_state,
0901                  struct v4l2_subdev_format *fmt)
0902 {
0903     struct imx219 *imx219 = to_imx219(sd);
0904     const struct imx219_mode *mode;
0905     struct v4l2_mbus_framefmt *framefmt;
0906     int exposure_max, exposure_def, hblank;
0907     unsigned int i;
0908 
0909     mutex_lock(&imx219->mutex);
0910 
0911     for (i = 0; i < ARRAY_SIZE(codes); i++)
0912         if (codes[i] == fmt->format.code)
0913             break;
0914     if (i >= ARRAY_SIZE(codes))
0915         i = 0;
0916 
0917     /* Bayer order varies with flips */
0918     fmt->format.code = imx219_get_format_code(imx219, codes[i]);
0919 
0920     mode = v4l2_find_nearest_size(supported_modes,
0921                       ARRAY_SIZE(supported_modes),
0922                       width, height,
0923                       fmt->format.width, fmt->format.height);
0924     imx219_update_pad_format(imx219, mode, fmt);
0925     if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
0926         framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
0927         *framefmt = fmt->format;
0928     } else if (imx219->mode != mode ||
0929            imx219->fmt.code != fmt->format.code) {
0930         imx219->fmt = fmt->format;
0931         imx219->mode = mode;
0932         /* Update limits and set FPS to default */
0933         __v4l2_ctrl_modify_range(imx219->vblank, IMX219_VBLANK_MIN,
0934                      IMX219_VTS_MAX - mode->height, 1,
0935                      mode->vts_def - mode->height);
0936         __v4l2_ctrl_s_ctrl(imx219->vblank,
0937                    mode->vts_def - mode->height);
0938         /* Update max exposure while meeting expected vblanking */
0939         exposure_max = mode->vts_def - 4;
0940         exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
0941             exposure_max : IMX219_EXPOSURE_DEFAULT;
0942         __v4l2_ctrl_modify_range(imx219->exposure,
0943                      imx219->exposure->minimum,
0944                      exposure_max, imx219->exposure->step,
0945                      exposure_def);
0946         /*
0947          * Currently PPL is fixed to IMX219_PPL_DEFAULT, so hblank
0948          * depends on mode->width only, and is not changeble in any
0949          * way other than changing the mode.
0950          */
0951         hblank = IMX219_PPL_DEFAULT - mode->width;
0952         __v4l2_ctrl_modify_range(imx219->hblank, hblank, hblank, 1,
0953                      hblank);
0954     }
0955 
0956     mutex_unlock(&imx219->mutex);
0957 
0958     return 0;
0959 }
0960 
0961 static int imx219_set_framefmt(struct imx219 *imx219)
0962 {
0963     switch (imx219->fmt.code) {
0964     case MEDIA_BUS_FMT_SRGGB8_1X8:
0965     case MEDIA_BUS_FMT_SGRBG8_1X8:
0966     case MEDIA_BUS_FMT_SGBRG8_1X8:
0967     case MEDIA_BUS_FMT_SBGGR8_1X8:
0968         return imx219_write_regs(imx219, raw8_framefmt_regs,
0969                     ARRAY_SIZE(raw8_framefmt_regs));
0970 
0971     case MEDIA_BUS_FMT_SRGGB10_1X10:
0972     case MEDIA_BUS_FMT_SGRBG10_1X10:
0973     case MEDIA_BUS_FMT_SGBRG10_1X10:
0974     case MEDIA_BUS_FMT_SBGGR10_1X10:
0975         return imx219_write_regs(imx219, raw10_framefmt_regs,
0976                     ARRAY_SIZE(raw10_framefmt_regs));
0977     }
0978 
0979     return -EINVAL;
0980 }
0981 
0982 static const struct v4l2_rect *
0983 __imx219_get_pad_crop(struct imx219 *imx219,
0984               struct v4l2_subdev_state *sd_state,
0985               unsigned int pad, enum v4l2_subdev_format_whence which)
0986 {
0987     switch (which) {
0988     case V4L2_SUBDEV_FORMAT_TRY:
0989         return v4l2_subdev_get_try_crop(&imx219->sd, sd_state, pad);
0990     case V4L2_SUBDEV_FORMAT_ACTIVE:
0991         return &imx219->mode->crop;
0992     }
0993 
0994     return NULL;
0995 }
0996 
0997 static int imx219_get_selection(struct v4l2_subdev *sd,
0998                 struct v4l2_subdev_state *sd_state,
0999                 struct v4l2_subdev_selection *sel)
1000 {
1001     switch (sel->target) {
1002     case V4L2_SEL_TGT_CROP: {
1003         struct imx219 *imx219 = to_imx219(sd);
1004 
1005         mutex_lock(&imx219->mutex);
1006         sel->r = *__imx219_get_pad_crop(imx219, sd_state, sel->pad,
1007                         sel->which);
1008         mutex_unlock(&imx219->mutex);
1009 
1010         return 0;
1011     }
1012 
1013     case V4L2_SEL_TGT_NATIVE_SIZE:
1014         sel->r.top = 0;
1015         sel->r.left = 0;
1016         sel->r.width = IMX219_NATIVE_WIDTH;
1017         sel->r.height = IMX219_NATIVE_HEIGHT;
1018 
1019         return 0;
1020 
1021     case V4L2_SEL_TGT_CROP_DEFAULT:
1022     case V4L2_SEL_TGT_CROP_BOUNDS:
1023         sel->r.top = IMX219_PIXEL_ARRAY_TOP;
1024         sel->r.left = IMX219_PIXEL_ARRAY_LEFT;
1025         sel->r.width = IMX219_PIXEL_ARRAY_WIDTH;
1026         sel->r.height = IMX219_PIXEL_ARRAY_HEIGHT;
1027 
1028         return 0;
1029     }
1030 
1031     return -EINVAL;
1032 }
1033 
1034 static int imx219_start_streaming(struct imx219 *imx219)
1035 {
1036     struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1037     const struct imx219_reg_list *reg_list;
1038     int ret;
1039 
1040     ret = pm_runtime_resume_and_get(&client->dev);
1041     if (ret < 0)
1042         return ret;
1043 
1044     /* Apply default values of current mode */
1045     reg_list = &imx219->mode->reg_list;
1046     ret = imx219_write_regs(imx219, reg_list->regs, reg_list->num_of_regs);
1047     if (ret) {
1048         dev_err(&client->dev, "%s failed to set mode\n", __func__);
1049         goto err_rpm_put;
1050     }
1051 
1052     ret = imx219_set_framefmt(imx219);
1053     if (ret) {
1054         dev_err(&client->dev, "%s failed to set frame format: %d\n",
1055             __func__, ret);
1056         goto err_rpm_put;
1057     }
1058 
1059     /* Apply customized values from user */
1060     ret =  __v4l2_ctrl_handler_setup(imx219->sd.ctrl_handler);
1061     if (ret)
1062         goto err_rpm_put;
1063 
1064     /* set stream on register */
1065     ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1066                    IMX219_REG_VALUE_08BIT, IMX219_MODE_STREAMING);
1067     if (ret)
1068         goto err_rpm_put;
1069 
1070     /* vflip and hflip cannot change during streaming */
1071     __v4l2_ctrl_grab(imx219->vflip, true);
1072     __v4l2_ctrl_grab(imx219->hflip, true);
1073 
1074     return 0;
1075 
1076 err_rpm_put:
1077     pm_runtime_put(&client->dev);
1078     return ret;
1079 }
1080 
1081 static void imx219_stop_streaming(struct imx219 *imx219)
1082 {
1083     struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1084     int ret;
1085 
1086     /* set stream off register */
1087     ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1088                    IMX219_REG_VALUE_08BIT, IMX219_MODE_STANDBY);
1089     if (ret)
1090         dev_err(&client->dev, "%s failed to set stream\n", __func__);
1091 
1092     __v4l2_ctrl_grab(imx219->vflip, false);
1093     __v4l2_ctrl_grab(imx219->hflip, false);
1094 
1095     pm_runtime_put(&client->dev);
1096 }
1097 
1098 static int imx219_set_stream(struct v4l2_subdev *sd, int enable)
1099 {
1100     struct imx219 *imx219 = to_imx219(sd);
1101     int ret = 0;
1102 
1103     mutex_lock(&imx219->mutex);
1104     if (imx219->streaming == enable) {
1105         mutex_unlock(&imx219->mutex);
1106         return 0;
1107     }
1108 
1109     if (enable) {
1110         /*
1111          * Apply default & customized values
1112          * and then start streaming.
1113          */
1114         ret = imx219_start_streaming(imx219);
1115         if (ret)
1116             goto err_unlock;
1117     } else {
1118         imx219_stop_streaming(imx219);
1119     }
1120 
1121     imx219->streaming = enable;
1122 
1123     mutex_unlock(&imx219->mutex);
1124 
1125     return ret;
1126 
1127 err_unlock:
1128     mutex_unlock(&imx219->mutex);
1129 
1130     return ret;
1131 }
1132 
1133 /* Power/clock management functions */
1134 static int imx219_power_on(struct device *dev)
1135 {
1136     struct v4l2_subdev *sd = dev_get_drvdata(dev);
1137     struct imx219 *imx219 = to_imx219(sd);
1138     int ret;
1139 
1140     ret = regulator_bulk_enable(IMX219_NUM_SUPPLIES,
1141                     imx219->supplies);
1142     if (ret) {
1143         dev_err(dev, "%s: failed to enable regulators\n",
1144             __func__);
1145         return ret;
1146     }
1147 
1148     ret = clk_prepare_enable(imx219->xclk);
1149     if (ret) {
1150         dev_err(dev, "%s: failed to enable clock\n",
1151             __func__);
1152         goto reg_off;
1153     }
1154 
1155     gpiod_set_value_cansleep(imx219->reset_gpio, 1);
1156     usleep_range(IMX219_XCLR_MIN_DELAY_US,
1157              IMX219_XCLR_MIN_DELAY_US + IMX219_XCLR_DELAY_RANGE_US);
1158 
1159     return 0;
1160 
1161 reg_off:
1162     regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies);
1163 
1164     return ret;
1165 }
1166 
1167 static int imx219_power_off(struct device *dev)
1168 {
1169     struct v4l2_subdev *sd = dev_get_drvdata(dev);
1170     struct imx219 *imx219 = to_imx219(sd);
1171 
1172     gpiod_set_value_cansleep(imx219->reset_gpio, 0);
1173     regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies);
1174     clk_disable_unprepare(imx219->xclk);
1175 
1176     return 0;
1177 }
1178 
1179 static int __maybe_unused imx219_suspend(struct device *dev)
1180 {
1181     struct v4l2_subdev *sd = dev_get_drvdata(dev);
1182     struct imx219 *imx219 = to_imx219(sd);
1183 
1184     if (imx219->streaming)
1185         imx219_stop_streaming(imx219);
1186 
1187     return 0;
1188 }
1189 
1190 static int __maybe_unused imx219_resume(struct device *dev)
1191 {
1192     struct v4l2_subdev *sd = dev_get_drvdata(dev);
1193     struct imx219 *imx219 = to_imx219(sd);
1194     int ret;
1195 
1196     if (imx219->streaming) {
1197         ret = imx219_start_streaming(imx219);
1198         if (ret)
1199             goto error;
1200     }
1201 
1202     return 0;
1203 
1204 error:
1205     imx219_stop_streaming(imx219);
1206     imx219->streaming = false;
1207 
1208     return ret;
1209 }
1210 
1211 static int imx219_get_regulators(struct imx219 *imx219)
1212 {
1213     struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1214     unsigned int i;
1215 
1216     for (i = 0; i < IMX219_NUM_SUPPLIES; i++)
1217         imx219->supplies[i].supply = imx219_supply_name[i];
1218 
1219     return devm_regulator_bulk_get(&client->dev,
1220                        IMX219_NUM_SUPPLIES,
1221                        imx219->supplies);
1222 }
1223 
1224 /* Verify chip ID */
1225 static int imx219_identify_module(struct imx219 *imx219)
1226 {
1227     struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1228     int ret;
1229     u32 val;
1230 
1231     ret = imx219_read_reg(imx219, IMX219_REG_CHIP_ID,
1232                   IMX219_REG_VALUE_16BIT, &val);
1233     if (ret) {
1234         dev_err(&client->dev, "failed to read chip id %x\n",
1235             IMX219_CHIP_ID);
1236         return ret;
1237     }
1238 
1239     if (val != IMX219_CHIP_ID) {
1240         dev_err(&client->dev, "chip id mismatch: %x!=%x\n",
1241             IMX219_CHIP_ID, val);
1242         return -EIO;
1243     }
1244 
1245     return 0;
1246 }
1247 
1248 static const struct v4l2_subdev_core_ops imx219_core_ops = {
1249     .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
1250     .unsubscribe_event = v4l2_event_subdev_unsubscribe,
1251 };
1252 
1253 static const struct v4l2_subdev_video_ops imx219_video_ops = {
1254     .s_stream = imx219_set_stream,
1255 };
1256 
1257 static const struct v4l2_subdev_pad_ops imx219_pad_ops = {
1258     .enum_mbus_code = imx219_enum_mbus_code,
1259     .get_fmt = imx219_get_pad_format,
1260     .set_fmt = imx219_set_pad_format,
1261     .get_selection = imx219_get_selection,
1262     .enum_frame_size = imx219_enum_frame_size,
1263 };
1264 
1265 static const struct v4l2_subdev_ops imx219_subdev_ops = {
1266     .core = &imx219_core_ops,
1267     .video = &imx219_video_ops,
1268     .pad = &imx219_pad_ops,
1269 };
1270 
1271 static const struct v4l2_subdev_internal_ops imx219_internal_ops = {
1272     .open = imx219_open,
1273 };
1274 
1275 /* Initialize control handlers */
1276 static int imx219_init_controls(struct imx219 *imx219)
1277 {
1278     struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1279     struct v4l2_ctrl_handler *ctrl_hdlr;
1280     unsigned int height = imx219->mode->height;
1281     struct v4l2_fwnode_device_properties props;
1282     int exposure_max, exposure_def, hblank;
1283     int i, ret;
1284 
1285     ctrl_hdlr = &imx219->ctrl_handler;
1286     ret = v4l2_ctrl_handler_init(ctrl_hdlr, 12);
1287     if (ret)
1288         return ret;
1289 
1290     mutex_init(&imx219->mutex);
1291     ctrl_hdlr->lock = &imx219->mutex;
1292 
1293     /* By default, PIXEL_RATE is read only */
1294     imx219->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1295                            V4L2_CID_PIXEL_RATE,
1296                            IMX219_PIXEL_RATE,
1297                            IMX219_PIXEL_RATE, 1,
1298                            IMX219_PIXEL_RATE);
1299 
1300     imx219->link_freq =
1301         v4l2_ctrl_new_int_menu(ctrl_hdlr, &imx219_ctrl_ops,
1302                        V4L2_CID_LINK_FREQ,
1303                        ARRAY_SIZE(imx219_link_freq_menu) - 1, 0,
1304                        imx219_link_freq_menu);
1305     if (imx219->link_freq)
1306         imx219->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1307 
1308     /* Initial vblank/hblank/exposure parameters based on current mode */
1309     imx219->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1310                        V4L2_CID_VBLANK, IMX219_VBLANK_MIN,
1311                        IMX219_VTS_MAX - height, 1,
1312                        imx219->mode->vts_def - height);
1313     hblank = IMX219_PPL_DEFAULT - imx219->mode->width;
1314     imx219->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1315                        V4L2_CID_HBLANK, hblank, hblank,
1316                        1, hblank);
1317     if (imx219->hblank)
1318         imx219->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1319     exposure_max = imx219->mode->vts_def - 4;
1320     exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
1321         exposure_max : IMX219_EXPOSURE_DEFAULT;
1322     imx219->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1323                          V4L2_CID_EXPOSURE,
1324                          IMX219_EXPOSURE_MIN, exposure_max,
1325                          IMX219_EXPOSURE_STEP,
1326                          exposure_def);
1327 
1328     v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1329               IMX219_ANA_GAIN_MIN, IMX219_ANA_GAIN_MAX,
1330               IMX219_ANA_GAIN_STEP, IMX219_ANA_GAIN_DEFAULT);
1331 
1332     v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1333               IMX219_DGTL_GAIN_MIN, IMX219_DGTL_GAIN_MAX,
1334               IMX219_DGTL_GAIN_STEP, IMX219_DGTL_GAIN_DEFAULT);
1335 
1336     imx219->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1337                       V4L2_CID_HFLIP, 0, 1, 1, 0);
1338     if (imx219->hflip)
1339         imx219->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
1340 
1341     imx219->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1342                       V4L2_CID_VFLIP, 0, 1, 1, 0);
1343     if (imx219->vflip)
1344         imx219->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
1345 
1346     v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx219_ctrl_ops,
1347                      V4L2_CID_TEST_PATTERN,
1348                      ARRAY_SIZE(imx219_test_pattern_menu) - 1,
1349                      0, 0, imx219_test_pattern_menu);
1350     for (i = 0; i < 4; i++) {
1351         /*
1352          * The assumption is that
1353          * V4L2_CID_TEST_PATTERN_GREENR == V4L2_CID_TEST_PATTERN_RED + 1
1354          * V4L2_CID_TEST_PATTERN_BLUE   == V4L2_CID_TEST_PATTERN_RED + 2
1355          * V4L2_CID_TEST_PATTERN_GREENB == V4L2_CID_TEST_PATTERN_RED + 3
1356          */
1357         v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1358                   V4L2_CID_TEST_PATTERN_RED + i,
1359                   IMX219_TESTP_COLOUR_MIN,
1360                   IMX219_TESTP_COLOUR_MAX,
1361                   IMX219_TESTP_COLOUR_STEP,
1362                   IMX219_TESTP_COLOUR_MAX);
1363         /* The "Solid color" pattern is white by default */
1364     }
1365 
1366     if (ctrl_hdlr->error) {
1367         ret = ctrl_hdlr->error;
1368         dev_err(&client->dev, "%s control init failed (%d)\n",
1369             __func__, ret);
1370         goto error;
1371     }
1372 
1373     ret = v4l2_fwnode_device_parse(&client->dev, &props);
1374     if (ret)
1375         goto error;
1376 
1377     ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx219_ctrl_ops,
1378                           &props);
1379     if (ret)
1380         goto error;
1381 
1382     imx219->sd.ctrl_handler = ctrl_hdlr;
1383 
1384     return 0;
1385 
1386 error:
1387     v4l2_ctrl_handler_free(ctrl_hdlr);
1388     mutex_destroy(&imx219->mutex);
1389 
1390     return ret;
1391 }
1392 
1393 static void imx219_free_controls(struct imx219 *imx219)
1394 {
1395     v4l2_ctrl_handler_free(imx219->sd.ctrl_handler);
1396     mutex_destroy(&imx219->mutex);
1397 }
1398 
1399 static int imx219_check_hwcfg(struct device *dev)
1400 {
1401     struct fwnode_handle *endpoint;
1402     struct v4l2_fwnode_endpoint ep_cfg = {
1403         .bus_type = V4L2_MBUS_CSI2_DPHY
1404     };
1405     int ret = -EINVAL;
1406 
1407     endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL);
1408     if (!endpoint) {
1409         dev_err(dev, "endpoint node not found\n");
1410         return -EINVAL;
1411     }
1412 
1413     if (v4l2_fwnode_endpoint_alloc_parse(endpoint, &ep_cfg)) {
1414         dev_err(dev, "could not parse endpoint\n");
1415         goto error_out;
1416     }
1417 
1418     /* Check the number of MIPI CSI2 data lanes */
1419     if (ep_cfg.bus.mipi_csi2.num_data_lanes != 2) {
1420         dev_err(dev, "only 2 data lanes are currently supported\n");
1421         goto error_out;
1422     }
1423 
1424     /* Check the link frequency set in device tree */
1425     if (!ep_cfg.nr_of_link_frequencies) {
1426         dev_err(dev, "link-frequency property not found in DT\n");
1427         goto error_out;
1428     }
1429 
1430     if (ep_cfg.nr_of_link_frequencies != 1 ||
1431         ep_cfg.link_frequencies[0] != IMX219_DEFAULT_LINK_FREQ) {
1432         dev_err(dev, "Link frequency not supported: %lld\n",
1433             ep_cfg.link_frequencies[0]);
1434         goto error_out;
1435     }
1436 
1437     ret = 0;
1438 
1439 error_out:
1440     v4l2_fwnode_endpoint_free(&ep_cfg);
1441     fwnode_handle_put(endpoint);
1442 
1443     return ret;
1444 }
1445 
1446 static int imx219_probe(struct i2c_client *client)
1447 {
1448     struct device *dev = &client->dev;
1449     struct imx219 *imx219;
1450     int ret;
1451 
1452     imx219 = devm_kzalloc(&client->dev, sizeof(*imx219), GFP_KERNEL);
1453     if (!imx219)
1454         return -ENOMEM;
1455 
1456     v4l2_i2c_subdev_init(&imx219->sd, client, &imx219_subdev_ops);
1457 
1458     /* Check the hardware configuration in device tree */
1459     if (imx219_check_hwcfg(dev))
1460         return -EINVAL;
1461 
1462     /* Get system clock (xclk) */
1463     imx219->xclk = devm_clk_get(dev, NULL);
1464     if (IS_ERR(imx219->xclk)) {
1465         dev_err(dev, "failed to get xclk\n");
1466         return PTR_ERR(imx219->xclk);
1467     }
1468 
1469     imx219->xclk_freq = clk_get_rate(imx219->xclk);
1470     if (imx219->xclk_freq != IMX219_XCLK_FREQ) {
1471         dev_err(dev, "xclk frequency not supported: %d Hz\n",
1472             imx219->xclk_freq);
1473         return -EINVAL;
1474     }
1475 
1476     ret = imx219_get_regulators(imx219);
1477     if (ret) {
1478         dev_err(dev, "failed to get regulators\n");
1479         return ret;
1480     }
1481 
1482     /* Request optional enable pin */
1483     imx219->reset_gpio = devm_gpiod_get_optional(dev, "reset",
1484                              GPIOD_OUT_HIGH);
1485 
1486     /*
1487      * The sensor must be powered for imx219_identify_module()
1488      * to be able to read the CHIP_ID register
1489      */
1490     ret = imx219_power_on(dev);
1491     if (ret)
1492         return ret;
1493 
1494     ret = imx219_identify_module(imx219);
1495     if (ret)
1496         goto error_power_off;
1497 
1498     /* Set default mode to max resolution */
1499     imx219->mode = &supported_modes[0];
1500 
1501     /* sensor doesn't enter LP-11 state upon power up until and unless
1502      * streaming is started, so upon power up switch the modes to:
1503      * streaming -> standby
1504      */
1505     ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1506                    IMX219_REG_VALUE_08BIT, IMX219_MODE_STREAMING);
1507     if (ret < 0)
1508         goto error_power_off;
1509     usleep_range(100, 110);
1510 
1511     /* put sensor back to standby mode */
1512     ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1513                    IMX219_REG_VALUE_08BIT, IMX219_MODE_STANDBY);
1514     if (ret < 0)
1515         goto error_power_off;
1516     usleep_range(100, 110);
1517 
1518     ret = imx219_init_controls(imx219);
1519     if (ret)
1520         goto error_power_off;
1521 
1522     /* Initialize subdev */
1523     imx219->sd.internal_ops = &imx219_internal_ops;
1524     imx219->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1525                 V4L2_SUBDEV_FL_HAS_EVENTS;
1526     imx219->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1527 
1528     /* Initialize source pad */
1529     imx219->pad.flags = MEDIA_PAD_FL_SOURCE;
1530 
1531     /* Initialize default format */
1532     imx219_set_default_format(imx219);
1533 
1534     ret = media_entity_pads_init(&imx219->sd.entity, 1, &imx219->pad);
1535     if (ret) {
1536         dev_err(dev, "failed to init entity pads: %d\n", ret);
1537         goto error_handler_free;
1538     }
1539 
1540     ret = v4l2_async_register_subdev_sensor(&imx219->sd);
1541     if (ret < 0) {
1542         dev_err(dev, "failed to register sensor sub-device: %d\n", ret);
1543         goto error_media_entity;
1544     }
1545 
1546     /* Enable runtime PM and turn off the device */
1547     pm_runtime_set_active(dev);
1548     pm_runtime_enable(dev);
1549     pm_runtime_idle(dev);
1550 
1551     return 0;
1552 
1553 error_media_entity:
1554     media_entity_cleanup(&imx219->sd.entity);
1555 
1556 error_handler_free:
1557     imx219_free_controls(imx219);
1558 
1559 error_power_off:
1560     imx219_power_off(dev);
1561 
1562     return ret;
1563 }
1564 
1565 static int imx219_remove(struct i2c_client *client)
1566 {
1567     struct v4l2_subdev *sd = i2c_get_clientdata(client);
1568     struct imx219 *imx219 = to_imx219(sd);
1569 
1570     v4l2_async_unregister_subdev(sd);
1571     media_entity_cleanup(&sd->entity);
1572     imx219_free_controls(imx219);
1573 
1574     pm_runtime_disable(&client->dev);
1575     if (!pm_runtime_status_suspended(&client->dev))
1576         imx219_power_off(&client->dev);
1577     pm_runtime_set_suspended(&client->dev);
1578 
1579     return 0;
1580 }
1581 
1582 static const struct of_device_id imx219_dt_ids[] = {
1583     { .compatible = "sony,imx219" },
1584     { /* sentinel */ }
1585 };
1586 MODULE_DEVICE_TABLE(of, imx219_dt_ids);
1587 
1588 static const struct dev_pm_ops imx219_pm_ops = {
1589     SET_SYSTEM_SLEEP_PM_OPS(imx219_suspend, imx219_resume)
1590     SET_RUNTIME_PM_OPS(imx219_power_off, imx219_power_on, NULL)
1591 };
1592 
1593 static struct i2c_driver imx219_i2c_driver = {
1594     .driver = {
1595         .name = "imx219",
1596         .of_match_table = imx219_dt_ids,
1597         .pm = &imx219_pm_ops,
1598     },
1599     .probe_new = imx219_probe,
1600     .remove = imx219_remove,
1601 };
1602 
1603 module_i2c_driver(imx219_i2c_driver);
1604 
1605 MODULE_AUTHOR("Dave Stevenson <dave.stevenson@raspberrypi.com");
1606 MODULE_DESCRIPTION("Sony IMX219 sensor driver");
1607 MODULE_LICENSE("GPL v2");
[ Source navigation ] [ Diff markup ] [ Identifier search ] [ general search ]

This page was automatically generated by the 2.1.0 LXR engine.

The LXR team
Valid CSS 2.1! Valid HTML 4.01!