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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0
0002 // Copyright (c) 2019 Intel Corporation.
0003 
0004 #include <asm/unaligned.h>
0005 #include <linux/acpi.h>
0006 #include <linux/delay.h>
0007 #include <linux/i2c.h>
0008 #include <linux/module.h>
0009 #include <linux/pm_runtime.h>
0010 #include <media/v4l2-ctrls.h>
0011 #include <media/v4l2-device.h>
0012 #include <media/v4l2-fwnode.h>
0013 
0014 #define HI556_REG_VALUE_08BIT       1
0015 #define HI556_REG_VALUE_16BIT       2
0016 #define HI556_REG_VALUE_24BIT       3
0017 
0018 #define HI556_LINK_FREQ_437MHZ      437000000ULL
0019 #define HI556_MCLK          19200000
0020 #define HI556_DATA_LANES        2
0021 #define HI556_RGB_DEPTH         10
0022 
0023 #define HI556_REG_CHIP_ID       0x0f16
0024 #define HI556_CHIP_ID           0x0556
0025 
0026 #define HI556_REG_MODE_SELECT       0x0a00
0027 #define HI556_MODE_STANDBY      0x0000
0028 #define HI556_MODE_STREAMING        0x0100
0029 
0030 /* vertical-timings from sensor */
0031 #define HI556_REG_FLL           0x0006
0032 #define HI556_FLL_30FPS         0x0814
0033 #define HI556_FLL_30FPS_MIN     0x0814
0034 #define HI556_FLL_MAX           0x7fff
0035 
0036 /* horizontal-timings from sensor */
0037 #define HI556_REG_LLP           0x0008
0038 
0039 /* Exposure controls from sensor */
0040 #define HI556_REG_EXPOSURE      0x0074
0041 #define HI556_EXPOSURE_MIN      6
0042 #define HI556_EXPOSURE_MAX_MARGIN   2
0043 #define HI556_EXPOSURE_STEP     1
0044 
0045 /* Analog gain controls from sensor */
0046 #define HI556_REG_ANALOG_GAIN       0x0077
0047 #define HI556_ANAL_GAIN_MIN     0
0048 #define HI556_ANAL_GAIN_MAX     240
0049 #define HI556_ANAL_GAIN_STEP        1
0050 
0051 /* Digital gain controls from sensor */
0052 #define HI556_REG_MWB_GR_GAIN       0x0078
0053 #define HI556_REG_MWB_GB_GAIN       0x007a
0054 #define HI556_REG_MWB_R_GAIN        0x007c
0055 #define HI556_REG_MWB_B_GAIN        0x007e
0056 #define HI556_DGTL_GAIN_MIN     0
0057 #define HI556_DGTL_GAIN_MAX     2048
0058 #define HI556_DGTL_GAIN_STEP        1
0059 #define HI556_DGTL_GAIN_DEFAULT     256
0060 
0061 /* Test Pattern Control */
0062 #define HI556_REG_ISP           0X0a05
0063 #define HI556_REG_ISP_TPG_EN        0x01
0064 #define HI556_REG_TEST_PATTERN      0x0201
0065 
0066 enum {
0067     HI556_LINK_FREQ_437MHZ_INDEX,
0068 };
0069 
0070 struct hi556_reg {
0071     u16 address;
0072     u16 val;
0073 };
0074 
0075 struct hi556_reg_list {
0076     u32 num_of_regs;
0077     const struct hi556_reg *regs;
0078 };
0079 
0080 struct hi556_link_freq_config {
0081     const struct hi556_reg_list reg_list;
0082 };
0083 
0084 struct hi556_mode {
0085     /* Frame width in pixels */
0086     u32 width;
0087 
0088     /* Frame height in pixels */
0089     u32 height;
0090 
0091     /* Horizontal timining size */
0092     u32 llp;
0093 
0094     /* Default vertical timining size */
0095     u32 fll_def;
0096 
0097     /* Min vertical timining size */
0098     u32 fll_min;
0099 
0100     /* Link frequency needed for this resolution */
0101     u32 link_freq_index;
0102 
0103     /* Sensor register settings for this resolution */
0104     const struct hi556_reg_list reg_list;
0105 };
0106 
0107 #define to_hi556(_sd) container_of(_sd, struct hi556, sd)
0108 
0109 //SENSOR_INITIALIZATION
0110 static const struct hi556_reg mipi_data_rate_874mbps[] = {
0111     {0x0e00, 0x0102},
0112     {0x0e02, 0x0102},
0113     {0x0e0c, 0x0100},
0114     {0x2000, 0x7400},
0115     {0x2002, 0x001c},
0116     {0x2004, 0x0242},
0117     {0x2006, 0x0942},
0118     {0x2008, 0x7007},
0119     {0x200a, 0x0fd9},
0120     {0x200c, 0x0259},
0121     {0x200e, 0x7008},
0122     {0x2010, 0x160e},
0123     {0x2012, 0x0047},
0124     {0x2014, 0x2118},
0125     {0x2016, 0x0041},
0126     {0x2018, 0x00d8},
0127     {0x201a, 0x0145},
0128     {0x201c, 0x0006},
0129     {0x201e, 0x0181},
0130     {0x2020, 0x13cc},
0131     {0x2022, 0x2057},
0132     {0x2024, 0x7001},
0133     {0x2026, 0x0fca},
0134     {0x2028, 0x00cb},
0135     {0x202a, 0x009f},
0136     {0x202c, 0x7002},
0137     {0x202e, 0x13cc},
0138     {0x2030, 0x019b},
0139     {0x2032, 0x014d},
0140     {0x2034, 0x2987},
0141     {0x2036, 0x2766},
0142     {0x2038, 0x0020},
0143     {0x203a, 0x2060},
0144     {0x203c, 0x0e5d},
0145     {0x203e, 0x181d},
0146     {0x2040, 0x2066},
0147     {0x2042, 0x20c4},
0148     {0x2044, 0x5000},
0149     {0x2046, 0x0005},
0150     {0x2048, 0x0000},
0151     {0x204a, 0x01db},
0152     {0x204c, 0x025a},
0153     {0x204e, 0x00c0},
0154     {0x2050, 0x0005},
0155     {0x2052, 0x0006},
0156     {0x2054, 0x0ad9},
0157     {0x2056, 0x0259},
0158     {0x2058, 0x0618},
0159     {0x205a, 0x0258},
0160     {0x205c, 0x2266},
0161     {0x205e, 0x20c8},
0162     {0x2060, 0x2060},
0163     {0x2062, 0x707b},
0164     {0x2064, 0x0fdd},
0165     {0x2066, 0x81b8},
0166     {0x2068, 0x5040},
0167     {0x206a, 0x0020},
0168     {0x206c, 0x5060},
0169     {0x206e, 0x3143},
0170     {0x2070, 0x5081},
0171     {0x2072, 0x025c},
0172     {0x2074, 0x7800},
0173     {0x2076, 0x7400},
0174     {0x2078, 0x001c},
0175     {0x207a, 0x0242},
0176     {0x207c, 0x0942},
0177     {0x207e, 0x0bd9},
0178     {0x2080, 0x0259},
0179     {0x2082, 0x7008},
0180     {0x2084, 0x160e},
0181     {0x2086, 0x0047},
0182     {0x2088, 0x2118},
0183     {0x208a, 0x0041},
0184     {0x208c, 0x00d8},
0185     {0x208e, 0x0145},
0186     {0x2090, 0x0006},
0187     {0x2092, 0x0181},
0188     {0x2094, 0x13cc},
0189     {0x2096, 0x2057},
0190     {0x2098, 0x7001},
0191     {0x209a, 0x0fca},
0192     {0x209c, 0x00cb},
0193     {0x209e, 0x009f},
0194     {0x20a0, 0x7002},
0195     {0x20a2, 0x13cc},
0196     {0x20a4, 0x019b},
0197     {0x20a6, 0x014d},
0198     {0x20a8, 0x2987},
0199     {0x20aa, 0x2766},
0200     {0x20ac, 0x0020},
0201     {0x20ae, 0x2060},
0202     {0x20b0, 0x0e5d},
0203     {0x20b2, 0x181d},
0204     {0x20b4, 0x2066},
0205     {0x20b6, 0x20c4},
0206     {0x20b8, 0x50a0},
0207     {0x20ba, 0x0005},
0208     {0x20bc, 0x0000},
0209     {0x20be, 0x01db},
0210     {0x20c0, 0x025a},
0211     {0x20c2, 0x00c0},
0212     {0x20c4, 0x0005},
0213     {0x20c6, 0x0006},
0214     {0x20c8, 0x0ad9},
0215     {0x20ca, 0x0259},
0216     {0x20cc, 0x0618},
0217     {0x20ce, 0x0258},
0218     {0x20d0, 0x2266},
0219     {0x20d2, 0x20c8},
0220     {0x20d4, 0x2060},
0221     {0x20d6, 0x707b},
0222     {0x20d8, 0x0fdd},
0223     {0x20da, 0x86b8},
0224     {0x20dc, 0x50e0},
0225     {0x20de, 0x0020},
0226     {0x20e0, 0x5100},
0227     {0x20e2, 0x3143},
0228     {0x20e4, 0x5121},
0229     {0x20e6, 0x7800},
0230     {0x20e8, 0x3140},
0231     {0x20ea, 0x01c4},
0232     {0x20ec, 0x01c1},
0233     {0x20ee, 0x01c0},
0234     {0x20f0, 0x01c4},
0235     {0x20f2, 0x2700},
0236     {0x20f4, 0x3d40},
0237     {0x20f6, 0x7800},
0238     {0x20f8, 0xffff},
0239     {0x27fe, 0xe000},
0240     {0x3000, 0x60f8},
0241     {0x3002, 0x187f},
0242     {0x3004, 0x7060},
0243     {0x3006, 0x0114},
0244     {0x3008, 0x60b0},
0245     {0x300a, 0x1473},
0246     {0x300c, 0x0013},
0247     {0x300e, 0x140f},
0248     {0x3010, 0x0040},
0249     {0x3012, 0x100f},
0250     {0x3014, 0x60f8},
0251     {0x3016, 0x187f},
0252     {0x3018, 0x7060},
0253     {0x301a, 0x0114},
0254     {0x301c, 0x60b0},
0255     {0x301e, 0x1473},
0256     {0x3020, 0x0013},
0257     {0x3022, 0x140f},
0258     {0x3024, 0x0040},
0259     {0x3026, 0x000f},
0260 
0261     {0x0b00, 0x0000},
0262     {0x0b02, 0x0045},
0263     {0x0b04, 0xb405},
0264     {0x0b06, 0xc403},
0265     {0x0b08, 0x0081},
0266     {0x0b0a, 0x8252},
0267     {0x0b0c, 0xf814},
0268     {0x0b0e, 0xc618},
0269     {0x0b10, 0xa828},
0270     {0x0b12, 0x004c},
0271     {0x0b14, 0x4068},
0272     {0x0b16, 0x0000},
0273     {0x0f30, 0x5b15},
0274     {0x0f32, 0x7067},
0275     {0x0954, 0x0009},
0276     {0x0956, 0x0000},
0277     {0x0958, 0xbb80},
0278     {0x095a, 0x5140},
0279     {0x0c00, 0x1110},
0280     {0x0c02, 0x0011},
0281     {0x0c04, 0x0000},
0282     {0x0c06, 0x0200},
0283     {0x0c10, 0x0040},
0284     {0x0c12, 0x0040},
0285     {0x0c14, 0x0040},
0286     {0x0c16, 0x0040},
0287     {0x0a10, 0x4000},
0288     {0x3068, 0xf800},
0289     {0x306a, 0xf876},
0290     {0x006c, 0x0000},
0291     {0x005e, 0x0200},
0292     {0x000e, 0x0100},
0293     {0x0e0a, 0x0001},
0294     {0x004a, 0x0100},
0295     {0x004c, 0x0000},
0296     {0x004e, 0x0100},
0297     {0x000c, 0x0022},
0298     {0x0008, 0x0b00},
0299     {0x005a, 0x0202},
0300     {0x0012, 0x000e},
0301     {0x0018, 0x0a33},
0302     {0x0022, 0x0008},
0303     {0x0028, 0x0017},
0304     {0x0024, 0x0028},
0305     {0x002a, 0x002d},
0306     {0x0026, 0x0030},
0307     {0x002c, 0x07c9},
0308     {0x002e, 0x1111},
0309     {0x0030, 0x1111},
0310     {0x0032, 0x1111},
0311     {0x0006, 0x07bc},
0312     {0x0a22, 0x0000},
0313     {0x0a12, 0x0a20},
0314     {0x0a14, 0x0798},
0315     {0x003e, 0x0000},
0316     {0x0074, 0x080e},
0317     {0x0070, 0x0407},
0318     {0x0002, 0x0000},
0319     {0x0a02, 0x0100},
0320     {0x0a24, 0x0100},
0321     {0x0046, 0x0000},
0322     {0x0076, 0x0000},
0323     {0x0060, 0x0000},
0324     {0x0062, 0x0530},
0325     {0x0064, 0x0500},
0326     {0x0066, 0x0530},
0327     {0x0068, 0x0500},
0328     {0x0122, 0x0300},
0329     {0x015a, 0xff08},
0330     {0x0804, 0x0300},
0331     {0x0806, 0x0100},
0332     {0x005c, 0x0102},
0333     {0x0a1a, 0x0800},
0334 };
0335 
0336 static const struct hi556_reg mode_2592x1944_regs[] = {
0337     {0x0a00, 0x0000},
0338     {0x0b0a, 0x8252},
0339     {0x0f30, 0x5b15},
0340     {0x0f32, 0x7067},
0341     {0x004a, 0x0100},
0342     {0x004c, 0x0000},
0343     {0x004e, 0x0100},
0344     {0x000c, 0x0022},
0345     {0x0008, 0x0b00},
0346     {0x005a, 0x0202},
0347     {0x0012, 0x000e},
0348     {0x0018, 0x0a33},
0349     {0x0022, 0x0008},
0350     {0x0028, 0x0017},
0351     {0x0024, 0x0028},
0352     {0x002a, 0x002d},
0353     {0x0026, 0x0030},
0354     {0x002c, 0x07c9},
0355     {0x002e, 0x1111},
0356     {0x0030, 0x1111},
0357     {0x0032, 0x1111},
0358     {0x0006, 0x0814},
0359     {0x0a22, 0x0000},
0360     {0x0a12, 0x0a20},
0361     {0x0a14, 0x0798},
0362     {0x003e, 0x0000},
0363     {0x0074, 0x0812},
0364     {0x0070, 0x0409},
0365     {0x0804, 0x0300},
0366     {0x0806, 0x0100},
0367     {0x0a04, 0x014a},
0368     {0x090c, 0x0fdc},
0369     {0x090e, 0x002d},
0370 
0371     {0x0902, 0x4319},
0372     {0x0914, 0xc10a},
0373     {0x0916, 0x071f},
0374     {0x0918, 0x0408},
0375     {0x091a, 0x0c0d},
0376     {0x091c, 0x0f09},
0377     {0x091e, 0x0a00},
0378     {0x0958, 0xbb80},
0379 };
0380 
0381 static const struct hi556_reg mode_1296x972_regs[] = {
0382     {0x0a00, 0x0000},
0383     {0x0b0a, 0x8259},
0384     {0x0f30, 0x5b15},
0385     {0x0f32, 0x7167},
0386     {0x004a, 0x0100},
0387     {0x004c, 0x0000},
0388     {0x004e, 0x0100},
0389     {0x000c, 0x0122},
0390     {0x0008, 0x0b00},
0391     {0x005a, 0x0404},
0392     {0x0012, 0x000c},
0393     {0x0018, 0x0a33},
0394     {0x0022, 0x0008},
0395     {0x0028, 0x0017},
0396     {0x0024, 0x0022},
0397     {0x002a, 0x002b},
0398     {0x0026, 0x0030},
0399     {0x002c, 0x07c9},
0400     {0x002e, 0x3311},
0401     {0x0030, 0x3311},
0402     {0x0032, 0x3311},
0403     {0x0006, 0x0814},
0404     {0x0a22, 0x0000},
0405     {0x0a12, 0x0510},
0406     {0x0a14, 0x03cc},
0407     {0x003e, 0x0000},
0408     {0x0074, 0x0812},
0409     {0x0070, 0x0409},
0410     {0x0804, 0x0308},
0411     {0x0806, 0x0100},
0412     {0x0a04, 0x016a},
0413     {0x090e, 0x0010},
0414     {0x090c, 0x09c0},
0415 
0416     {0x0902, 0x4319},
0417     {0x0914, 0xc106},
0418     {0x0916, 0x040e},
0419     {0x0918, 0x0304},
0420     {0x091a, 0x0708},
0421     {0x091c, 0x0e06},
0422     {0x091e, 0x0300},
0423     {0x0958, 0xbb80},
0424 };
0425 
0426 static const char * const hi556_test_pattern_menu[] = {
0427     "Disabled",
0428     "Solid Colour",
0429     "100% Colour Bars",
0430     "Fade To Grey Colour Bars",
0431     "PN9",
0432     "Gradient Horizontal",
0433     "Gradient Vertical",
0434     "Check Board",
0435     "Slant Pattern",
0436 };
0437 
0438 static const s64 link_freq_menu_items[] = {
0439     HI556_LINK_FREQ_437MHZ,
0440 };
0441 
0442 static const struct hi556_link_freq_config link_freq_configs[] = {
0443     [HI556_LINK_FREQ_437MHZ_INDEX] = {
0444         .reg_list = {
0445             .num_of_regs = ARRAY_SIZE(mipi_data_rate_874mbps),
0446             .regs = mipi_data_rate_874mbps,
0447         }
0448     }
0449 };
0450 
0451 static const struct hi556_mode supported_modes[] = {
0452     {
0453         .width = 2592,
0454         .height = 1944,
0455         .fll_def = HI556_FLL_30FPS,
0456         .fll_min = HI556_FLL_30FPS_MIN,
0457         .llp = 0x0b00,
0458         .reg_list = {
0459             .num_of_regs = ARRAY_SIZE(mode_2592x1944_regs),
0460             .regs = mode_2592x1944_regs,
0461         },
0462         .link_freq_index = HI556_LINK_FREQ_437MHZ_INDEX,
0463     },
0464     {
0465         .width = 1296,
0466         .height = 972,
0467         .fll_def = HI556_FLL_30FPS,
0468         .fll_min = HI556_FLL_30FPS_MIN,
0469         .llp = 0x0b00,
0470         .reg_list = {
0471             .num_of_regs = ARRAY_SIZE(mode_1296x972_regs),
0472             .regs = mode_1296x972_regs,
0473         },
0474         .link_freq_index = HI556_LINK_FREQ_437MHZ_INDEX,
0475     }
0476 };
0477 
0478 struct hi556 {
0479     struct v4l2_subdev sd;
0480     struct media_pad pad;
0481     struct v4l2_ctrl_handler ctrl_handler;
0482 
0483     /* V4L2 Controls */
0484     struct v4l2_ctrl *link_freq;
0485     struct v4l2_ctrl *pixel_rate;
0486     struct v4l2_ctrl *vblank;
0487     struct v4l2_ctrl *hblank;
0488     struct v4l2_ctrl *exposure;
0489 
0490     /* Current mode */
0491     const struct hi556_mode *cur_mode;
0492 
0493     /* To serialize asynchronus callbacks */
0494     struct mutex mutex;
0495 
0496     /* Streaming on/off */
0497     bool streaming;
0498 
0499     /* True if the device has been identified */
0500     bool identified;
0501 };
0502 
0503 static u64 to_pixel_rate(u32 f_index)
0504 {
0505     u64 pixel_rate = link_freq_menu_items[f_index] * 2 * HI556_DATA_LANES;
0506 
0507     do_div(pixel_rate, HI556_RGB_DEPTH);
0508 
0509     return pixel_rate;
0510 }
0511 
0512 static int hi556_read_reg(struct hi556 *hi556, u16 reg, u16 len, u32 *val)
0513 {
0514     struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
0515     struct i2c_msg msgs[2];
0516     u8 addr_buf[2];
0517     u8 data_buf[4] = {0};
0518     int ret;
0519 
0520     if (len > 4)
0521         return -EINVAL;
0522 
0523     put_unaligned_be16(reg, addr_buf);
0524     msgs[0].addr = client->addr;
0525     msgs[0].flags = 0;
0526     msgs[0].len = sizeof(addr_buf);
0527     msgs[0].buf = addr_buf;
0528     msgs[1].addr = client->addr;
0529     msgs[1].flags = I2C_M_RD;
0530     msgs[1].len = len;
0531     msgs[1].buf = &data_buf[4 - len];
0532 
0533     ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
0534     if (ret != ARRAY_SIZE(msgs))
0535         return -EIO;
0536 
0537     *val = get_unaligned_be32(data_buf);
0538 
0539     return 0;
0540 }
0541 
0542 static int hi556_write_reg(struct hi556 *hi556, u16 reg, u16 len, u32 val)
0543 {
0544     struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
0545     u8 buf[6];
0546 
0547     if (len > 4)
0548         return -EINVAL;
0549 
0550     put_unaligned_be16(reg, buf);
0551     put_unaligned_be32(val << 8 * (4 - len), buf + 2);
0552     if (i2c_master_send(client, buf, len + 2) != len + 2)
0553         return -EIO;
0554 
0555     return 0;
0556 }
0557 
0558 static int hi556_write_reg_list(struct hi556 *hi556,
0559                 const struct hi556_reg_list *r_list)
0560 {
0561     struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
0562     unsigned int i;
0563     int ret;
0564 
0565     for (i = 0; i < r_list->num_of_regs; i++) {
0566         ret = hi556_write_reg(hi556, r_list->regs[i].address,
0567                       HI556_REG_VALUE_16BIT,
0568                       r_list->regs[i].val);
0569         if (ret) {
0570             dev_err_ratelimited(&client->dev,
0571                         "failed to write reg 0x%4.4x. error = %d",
0572                         r_list->regs[i].address, ret);
0573             return ret;
0574         }
0575     }
0576 
0577     return 0;
0578 }
0579 
0580 static int hi556_update_digital_gain(struct hi556 *hi556, u32 d_gain)
0581 {
0582     int ret;
0583 
0584     ret = hi556_write_reg(hi556, HI556_REG_MWB_GR_GAIN,
0585                   HI556_REG_VALUE_16BIT, d_gain);
0586     if (ret)
0587         return ret;
0588 
0589     ret = hi556_write_reg(hi556, HI556_REG_MWB_GB_GAIN,
0590                   HI556_REG_VALUE_16BIT, d_gain);
0591     if (ret)
0592         return ret;
0593 
0594     ret = hi556_write_reg(hi556, HI556_REG_MWB_R_GAIN,
0595                   HI556_REG_VALUE_16BIT, d_gain);
0596     if (ret)
0597         return ret;
0598 
0599     return hi556_write_reg(hi556, HI556_REG_MWB_B_GAIN,
0600                    HI556_REG_VALUE_16BIT, d_gain);
0601 }
0602 
0603 static int hi556_test_pattern(struct hi556 *hi556, u32 pattern)
0604 {
0605     int ret;
0606     u32 val;
0607 
0608     if (pattern) {
0609         ret = hi556_read_reg(hi556, HI556_REG_ISP,
0610                      HI556_REG_VALUE_08BIT, &val);
0611         if (ret)
0612             return ret;
0613 
0614         ret = hi556_write_reg(hi556, HI556_REG_ISP,
0615                       HI556_REG_VALUE_08BIT,
0616                       val | HI556_REG_ISP_TPG_EN);
0617         if (ret)
0618             return ret;
0619     }
0620 
0621     return hi556_write_reg(hi556, HI556_REG_TEST_PATTERN,
0622                    HI556_REG_VALUE_08BIT, pattern);
0623 }
0624 
0625 static int hi556_set_ctrl(struct v4l2_ctrl *ctrl)
0626 {
0627     struct hi556 *hi556 = container_of(ctrl->handler,
0628                          struct hi556, ctrl_handler);
0629     struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
0630     s64 exposure_max;
0631     int ret = 0;
0632 
0633     /* Propagate change of current control to all related controls */
0634     if (ctrl->id == V4L2_CID_VBLANK) {
0635         /* Update max exposure while meeting expected vblanking */
0636         exposure_max = hi556->cur_mode->height + ctrl->val -
0637                    HI556_EXPOSURE_MAX_MARGIN;
0638         __v4l2_ctrl_modify_range(hi556->exposure,
0639                      hi556->exposure->minimum,
0640                      exposure_max, hi556->exposure->step,
0641                      exposure_max);
0642     }
0643 
0644     /* V4L2 controls values will be applied only when power is already up */
0645     if (!pm_runtime_get_if_in_use(&client->dev))
0646         return 0;
0647 
0648     switch (ctrl->id) {
0649     case V4L2_CID_ANALOGUE_GAIN:
0650         ret = hi556_write_reg(hi556, HI556_REG_ANALOG_GAIN,
0651                       HI556_REG_VALUE_16BIT, ctrl->val);
0652         break;
0653 
0654     case V4L2_CID_DIGITAL_GAIN:
0655         ret = hi556_update_digital_gain(hi556, ctrl->val);
0656         break;
0657 
0658     case V4L2_CID_EXPOSURE:
0659         ret = hi556_write_reg(hi556, HI556_REG_EXPOSURE,
0660                       HI556_REG_VALUE_16BIT, ctrl->val);
0661         break;
0662 
0663     case V4L2_CID_VBLANK:
0664         /* Update FLL that meets expected vertical blanking */
0665         ret = hi556_write_reg(hi556, HI556_REG_FLL,
0666                       HI556_REG_VALUE_16BIT,
0667                       hi556->cur_mode->height + ctrl->val);
0668         break;
0669 
0670     case V4L2_CID_TEST_PATTERN:
0671         ret = hi556_test_pattern(hi556, ctrl->val);
0672         break;
0673 
0674     default:
0675         ret = -EINVAL;
0676         break;
0677     }
0678 
0679     pm_runtime_put(&client->dev);
0680 
0681     return ret;
0682 }
0683 
0684 static const struct v4l2_ctrl_ops hi556_ctrl_ops = {
0685     .s_ctrl = hi556_set_ctrl,
0686 };
0687 
0688 static int hi556_init_controls(struct hi556 *hi556)
0689 {
0690     struct v4l2_ctrl_handler *ctrl_hdlr;
0691     s64 exposure_max, h_blank;
0692     int ret;
0693 
0694     ctrl_hdlr = &hi556->ctrl_handler;
0695     ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
0696     if (ret)
0697         return ret;
0698 
0699     ctrl_hdlr->lock = &hi556->mutex;
0700     hi556->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &hi556_ctrl_ops,
0701                           V4L2_CID_LINK_FREQ,
0702                     ARRAY_SIZE(link_freq_menu_items) - 1,
0703                     0, link_freq_menu_items);
0704     if (hi556->link_freq)
0705         hi556->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
0706 
0707     hi556->pixel_rate = v4l2_ctrl_new_std
0708                 (ctrl_hdlr, &hi556_ctrl_ops,
0709                  V4L2_CID_PIXEL_RATE, 0,
0710                  to_pixel_rate(HI556_LINK_FREQ_437MHZ_INDEX),
0711                  1,
0712                  to_pixel_rate(HI556_LINK_FREQ_437MHZ_INDEX));
0713     hi556->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops,
0714                       V4L2_CID_VBLANK,
0715                       hi556->cur_mode->fll_min -
0716                       hi556->cur_mode->height,
0717                       HI556_FLL_MAX -
0718                       hi556->cur_mode->height, 1,
0719                       hi556->cur_mode->fll_def -
0720                       hi556->cur_mode->height);
0721 
0722     h_blank = hi556->cur_mode->llp - hi556->cur_mode->width;
0723 
0724     hi556->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops,
0725                       V4L2_CID_HBLANK, h_blank, h_blank, 1,
0726                       h_blank);
0727     if (hi556->hblank)
0728         hi556->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
0729 
0730     v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
0731               HI556_ANAL_GAIN_MIN, HI556_ANAL_GAIN_MAX,
0732               HI556_ANAL_GAIN_STEP, HI556_ANAL_GAIN_MIN);
0733     v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
0734               HI556_DGTL_GAIN_MIN, HI556_DGTL_GAIN_MAX,
0735               HI556_DGTL_GAIN_STEP, HI556_DGTL_GAIN_DEFAULT);
0736     exposure_max = hi556->cur_mode->fll_def - HI556_EXPOSURE_MAX_MARGIN;
0737     hi556->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops,
0738                         V4L2_CID_EXPOSURE,
0739                         HI556_EXPOSURE_MIN, exposure_max,
0740                         HI556_EXPOSURE_STEP,
0741                         exposure_max);
0742     v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &hi556_ctrl_ops,
0743                      V4L2_CID_TEST_PATTERN,
0744                      ARRAY_SIZE(hi556_test_pattern_menu) - 1,
0745                      0, 0, hi556_test_pattern_menu);
0746     if (ctrl_hdlr->error)
0747         return ctrl_hdlr->error;
0748 
0749     hi556->sd.ctrl_handler = ctrl_hdlr;
0750 
0751     return 0;
0752 }
0753 
0754 static void hi556_assign_pad_format(const struct hi556_mode *mode,
0755                     struct v4l2_mbus_framefmt *fmt)
0756 {
0757     fmt->width = mode->width;
0758     fmt->height = mode->height;
0759     fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
0760     fmt->field = V4L2_FIELD_NONE;
0761 }
0762 
0763 static int hi556_identify_module(struct hi556 *hi556)
0764 {
0765     struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
0766     int ret;
0767     u32 val;
0768 
0769     if (hi556->identified)
0770         return 0;
0771 
0772     ret = hi556_read_reg(hi556, HI556_REG_CHIP_ID,
0773                  HI556_REG_VALUE_16BIT, &val);
0774     if (ret)
0775         return ret;
0776 
0777     if (val != HI556_CHIP_ID) {
0778         dev_err(&client->dev, "chip id mismatch: %x!=%x",
0779             HI556_CHIP_ID, val);
0780         return -ENXIO;
0781     }
0782 
0783     hi556->identified = true;
0784 
0785     return 0;
0786 }
0787 
0788 static int hi556_start_streaming(struct hi556 *hi556)
0789 {
0790     struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
0791     const struct hi556_reg_list *reg_list;
0792     int link_freq_index, ret;
0793 
0794     ret = hi556_identify_module(hi556);
0795     if (ret)
0796         return ret;
0797 
0798     link_freq_index = hi556->cur_mode->link_freq_index;
0799     reg_list = &link_freq_configs[link_freq_index].reg_list;
0800     ret = hi556_write_reg_list(hi556, reg_list);
0801     if (ret) {
0802         dev_err(&client->dev, "failed to set plls");
0803         return ret;
0804     }
0805 
0806     reg_list = &hi556->cur_mode->reg_list;
0807     ret = hi556_write_reg_list(hi556, reg_list);
0808     if (ret) {
0809         dev_err(&client->dev, "failed to set mode");
0810         return ret;
0811     }
0812 
0813     ret = __v4l2_ctrl_handler_setup(hi556->sd.ctrl_handler);
0814     if (ret)
0815         return ret;
0816 
0817     ret = hi556_write_reg(hi556, HI556_REG_MODE_SELECT,
0818                   HI556_REG_VALUE_16BIT, HI556_MODE_STREAMING);
0819 
0820     if (ret) {
0821         dev_err(&client->dev, "failed to set stream");
0822         return ret;
0823     }
0824 
0825     return 0;
0826 }
0827 
0828 static void hi556_stop_streaming(struct hi556 *hi556)
0829 {
0830     struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
0831 
0832     if (hi556_write_reg(hi556, HI556_REG_MODE_SELECT,
0833                 HI556_REG_VALUE_16BIT, HI556_MODE_STANDBY))
0834         dev_err(&client->dev, "failed to set stream");
0835 }
0836 
0837 static int hi556_set_stream(struct v4l2_subdev *sd, int enable)
0838 {
0839     struct hi556 *hi556 = to_hi556(sd);
0840     struct i2c_client *client = v4l2_get_subdevdata(sd);
0841     int ret = 0;
0842 
0843     if (hi556->streaming == enable)
0844         return 0;
0845 
0846     mutex_lock(&hi556->mutex);
0847     if (enable) {
0848         ret = pm_runtime_resume_and_get(&client->dev);
0849         if (ret < 0) {
0850             mutex_unlock(&hi556->mutex);
0851             return ret;
0852         }
0853 
0854         ret = hi556_start_streaming(hi556);
0855         if (ret) {
0856             enable = 0;
0857             hi556_stop_streaming(hi556);
0858             pm_runtime_put(&client->dev);
0859         }
0860     } else {
0861         hi556_stop_streaming(hi556);
0862         pm_runtime_put(&client->dev);
0863     }
0864 
0865     hi556->streaming = enable;
0866     mutex_unlock(&hi556->mutex);
0867 
0868     return ret;
0869 }
0870 
0871 static int __maybe_unused hi556_suspend(struct device *dev)
0872 {
0873     struct v4l2_subdev *sd = dev_get_drvdata(dev);
0874     struct hi556 *hi556 = to_hi556(sd);
0875 
0876     mutex_lock(&hi556->mutex);
0877     if (hi556->streaming)
0878         hi556_stop_streaming(hi556);
0879 
0880     mutex_unlock(&hi556->mutex);
0881 
0882     return 0;
0883 }
0884 
0885 static int __maybe_unused hi556_resume(struct device *dev)
0886 {
0887     struct v4l2_subdev *sd = dev_get_drvdata(dev);
0888     struct hi556 *hi556 = to_hi556(sd);
0889     int ret;
0890 
0891     mutex_lock(&hi556->mutex);
0892     if (hi556->streaming) {
0893         ret = hi556_start_streaming(hi556);
0894         if (ret)
0895             goto error;
0896     }
0897 
0898     mutex_unlock(&hi556->mutex);
0899 
0900     return 0;
0901 
0902 error:
0903     hi556_stop_streaming(hi556);
0904     hi556->streaming = 0;
0905     mutex_unlock(&hi556->mutex);
0906     return ret;
0907 }
0908 
0909 static int hi556_set_format(struct v4l2_subdev *sd,
0910                 struct v4l2_subdev_state *sd_state,
0911                 struct v4l2_subdev_format *fmt)
0912 {
0913     struct hi556 *hi556 = to_hi556(sd);
0914     const struct hi556_mode *mode;
0915     s32 vblank_def, h_blank;
0916 
0917     mode = v4l2_find_nearest_size(supported_modes,
0918                       ARRAY_SIZE(supported_modes), width,
0919                       height, fmt->format.width,
0920                       fmt->format.height);
0921 
0922     mutex_lock(&hi556->mutex);
0923     hi556_assign_pad_format(mode, &fmt->format);
0924     if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
0925         *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
0926     } else {
0927         hi556->cur_mode = mode;
0928         __v4l2_ctrl_s_ctrl(hi556->link_freq, mode->link_freq_index);
0929         __v4l2_ctrl_s_ctrl_int64(hi556->pixel_rate,
0930                      to_pixel_rate(mode->link_freq_index));
0931 
0932         /* Update limits and set FPS to default */
0933         vblank_def = mode->fll_def - mode->height;
0934         __v4l2_ctrl_modify_range(hi556->vblank,
0935                      mode->fll_min - mode->height,
0936                      HI556_FLL_MAX - mode->height, 1,
0937                      vblank_def);
0938         __v4l2_ctrl_s_ctrl(hi556->vblank, vblank_def);
0939 
0940         h_blank = hi556->cur_mode->llp - hi556->cur_mode->width;
0941 
0942         __v4l2_ctrl_modify_range(hi556->hblank, h_blank, h_blank, 1,
0943                      h_blank);
0944     }
0945 
0946     mutex_unlock(&hi556->mutex);
0947 
0948     return 0;
0949 }
0950 
0951 static int hi556_get_format(struct v4l2_subdev *sd,
0952                 struct v4l2_subdev_state *sd_state,
0953                 struct v4l2_subdev_format *fmt)
0954 {
0955     struct hi556 *hi556 = to_hi556(sd);
0956 
0957     mutex_lock(&hi556->mutex);
0958     if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
0959         fmt->format = *v4l2_subdev_get_try_format(&hi556->sd,
0960                               sd_state,
0961                               fmt->pad);
0962     else
0963         hi556_assign_pad_format(hi556->cur_mode, &fmt->format);
0964 
0965     mutex_unlock(&hi556->mutex);
0966 
0967     return 0;
0968 }
0969 
0970 static int hi556_enum_mbus_code(struct v4l2_subdev *sd,
0971                 struct v4l2_subdev_state *sd_state,
0972                 struct v4l2_subdev_mbus_code_enum *code)
0973 {
0974     if (code->index > 0)
0975         return -EINVAL;
0976 
0977     code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
0978 
0979     return 0;
0980 }
0981 
0982 static int hi556_enum_frame_size(struct v4l2_subdev *sd,
0983                  struct v4l2_subdev_state *sd_state,
0984                  struct v4l2_subdev_frame_size_enum *fse)
0985 {
0986     if (fse->index >= ARRAY_SIZE(supported_modes))
0987         return -EINVAL;
0988 
0989     if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
0990         return -EINVAL;
0991 
0992     fse->min_width = supported_modes[fse->index].width;
0993     fse->max_width = fse->min_width;
0994     fse->min_height = supported_modes[fse->index].height;
0995     fse->max_height = fse->min_height;
0996 
0997     return 0;
0998 }
0999 
1000 static int hi556_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1001 {
1002     struct hi556 *hi556 = to_hi556(sd);
1003 
1004     mutex_lock(&hi556->mutex);
1005     hi556_assign_pad_format(&supported_modes[0],
1006                 v4l2_subdev_get_try_format(sd, fh->state, 0));
1007     mutex_unlock(&hi556->mutex);
1008 
1009     return 0;
1010 }
1011 
1012 static const struct v4l2_subdev_video_ops hi556_video_ops = {
1013     .s_stream = hi556_set_stream,
1014 };
1015 
1016 static const struct v4l2_subdev_pad_ops hi556_pad_ops = {
1017     .set_fmt = hi556_set_format,
1018     .get_fmt = hi556_get_format,
1019     .enum_mbus_code = hi556_enum_mbus_code,
1020     .enum_frame_size = hi556_enum_frame_size,
1021 };
1022 
1023 static const struct v4l2_subdev_ops hi556_subdev_ops = {
1024     .video = &hi556_video_ops,
1025     .pad = &hi556_pad_ops,
1026 };
1027 
1028 static const struct media_entity_operations hi556_subdev_entity_ops = {
1029     .link_validate = v4l2_subdev_link_validate,
1030 };
1031 
1032 static const struct v4l2_subdev_internal_ops hi556_internal_ops = {
1033     .open = hi556_open,
1034 };
1035 
1036 static int hi556_check_hwcfg(struct device *dev)
1037 {
1038     struct fwnode_handle *ep;
1039     struct fwnode_handle *fwnode = dev_fwnode(dev);
1040     struct v4l2_fwnode_endpoint bus_cfg = {
1041         .bus_type = V4L2_MBUS_CSI2_DPHY
1042     };
1043     u32 mclk;
1044     int ret = 0;
1045     unsigned int i, j;
1046 
1047     if (!fwnode)
1048         return -ENXIO;
1049 
1050     ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk);
1051     if (ret) {
1052         dev_err(dev, "can't get clock frequency");
1053         return ret;
1054     }
1055 
1056     if (mclk != HI556_MCLK) {
1057         dev_err(dev, "external clock %d is not supported", mclk);
1058         return -EINVAL;
1059     }
1060 
1061     ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
1062     if (!ep)
1063         return -ENXIO;
1064 
1065     ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
1066     fwnode_handle_put(ep);
1067     if (ret)
1068         return ret;
1069 
1070     if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2) {
1071         dev_err(dev, "number of CSI2 data lanes %d is not supported",
1072             bus_cfg.bus.mipi_csi2.num_data_lanes);
1073         ret = -EINVAL;
1074         goto check_hwcfg_error;
1075     }
1076 
1077     if (!bus_cfg.nr_of_link_frequencies) {
1078         dev_err(dev, "no link frequencies defined");
1079         ret = -EINVAL;
1080         goto check_hwcfg_error;
1081     }
1082 
1083     for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
1084         for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
1085             if (link_freq_menu_items[i] ==
1086                 bus_cfg.link_frequencies[j])
1087                 break;
1088         }
1089 
1090         if (j == bus_cfg.nr_of_link_frequencies) {
1091             dev_err(dev, "no link frequency %lld supported",
1092                 link_freq_menu_items[i]);
1093             ret = -EINVAL;
1094             goto check_hwcfg_error;
1095         }
1096     }
1097 
1098 check_hwcfg_error:
1099     v4l2_fwnode_endpoint_free(&bus_cfg);
1100 
1101     return ret;
1102 }
1103 
1104 static int hi556_remove(struct i2c_client *client)
1105 {
1106     struct v4l2_subdev *sd = i2c_get_clientdata(client);
1107     struct hi556 *hi556 = to_hi556(sd);
1108 
1109     v4l2_async_unregister_subdev(sd);
1110     media_entity_cleanup(&sd->entity);
1111     v4l2_ctrl_handler_free(sd->ctrl_handler);
1112     pm_runtime_disable(&client->dev);
1113     mutex_destroy(&hi556->mutex);
1114 
1115     return 0;
1116 }
1117 
1118 static int hi556_probe(struct i2c_client *client)
1119 {
1120     struct hi556 *hi556;
1121     bool full_power;
1122     int ret;
1123 
1124     ret = hi556_check_hwcfg(&client->dev);
1125     if (ret) {
1126         dev_err(&client->dev, "failed to check HW configuration: %d",
1127             ret);
1128         return ret;
1129     }
1130 
1131     hi556 = devm_kzalloc(&client->dev, sizeof(*hi556), GFP_KERNEL);
1132     if (!hi556)
1133         return -ENOMEM;
1134 
1135     v4l2_i2c_subdev_init(&hi556->sd, client, &hi556_subdev_ops);
1136 
1137     full_power = acpi_dev_state_d0(&client->dev);
1138     if (full_power) {
1139         ret = hi556_identify_module(hi556);
1140         if (ret) {
1141             dev_err(&client->dev, "failed to find sensor: %d", ret);
1142             return ret;
1143         }
1144     }
1145 
1146     mutex_init(&hi556->mutex);
1147     hi556->cur_mode = &supported_modes[0];
1148     ret = hi556_init_controls(hi556);
1149     if (ret) {
1150         dev_err(&client->dev, "failed to init controls: %d", ret);
1151         goto probe_error_v4l2_ctrl_handler_free;
1152     }
1153 
1154     hi556->sd.internal_ops = &hi556_internal_ops;
1155     hi556->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1156     hi556->sd.entity.ops = &hi556_subdev_entity_ops;
1157     hi556->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1158     hi556->pad.flags = MEDIA_PAD_FL_SOURCE;
1159     ret = media_entity_pads_init(&hi556->sd.entity, 1, &hi556->pad);
1160     if (ret) {
1161         dev_err(&client->dev, "failed to init entity pads: %d", ret);
1162         goto probe_error_v4l2_ctrl_handler_free;
1163     }
1164 
1165     ret = v4l2_async_register_subdev_sensor(&hi556->sd);
1166     if (ret < 0) {
1167         dev_err(&client->dev, "failed to register V4L2 subdev: %d",
1168             ret);
1169         goto probe_error_media_entity_cleanup;
1170     }
1171 
1172     /* Set the device's state to active if it's in D0 state. */
1173     if (full_power)
1174         pm_runtime_set_active(&client->dev);
1175     pm_runtime_enable(&client->dev);
1176     pm_runtime_idle(&client->dev);
1177 
1178     return 0;
1179 
1180 probe_error_media_entity_cleanup:
1181     media_entity_cleanup(&hi556->sd.entity);
1182 
1183 probe_error_v4l2_ctrl_handler_free:
1184     v4l2_ctrl_handler_free(hi556->sd.ctrl_handler);
1185     mutex_destroy(&hi556->mutex);
1186 
1187     return ret;
1188 }
1189 
1190 static const struct dev_pm_ops hi556_pm_ops = {
1191     SET_SYSTEM_SLEEP_PM_OPS(hi556_suspend, hi556_resume)
1192 };
1193 
1194 #ifdef CONFIG_ACPI
1195 static const struct acpi_device_id hi556_acpi_ids[] = {
1196     {"INT3537"},
1197     {}
1198 };
1199 
1200 MODULE_DEVICE_TABLE(acpi, hi556_acpi_ids);
1201 #endif
1202 
1203 static struct i2c_driver hi556_i2c_driver = {
1204     .driver = {
1205         .name = "hi556",
1206         .pm = &hi556_pm_ops,
1207         .acpi_match_table = ACPI_PTR(hi556_acpi_ids),
1208     },
1209     .probe_new = hi556_probe,
1210     .remove = hi556_remove,
1211     .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
1212 };
1213 
1214 module_i2c_driver(hi556_i2c_driver);
1215 
1216 MODULE_AUTHOR("Shawn Tu <shawnx.tu@intel.com>");
1217 MODULE_DESCRIPTION("Hynix HI556 sensor driver");
1218 MODULE_LICENSE("GPL v2");
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