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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Analog Devices ADV7511 HDMI Transmitter Device Driver
0004  *
0005  * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
0006  */
0007 
0008 /*
0009  * This file is named adv7511-v4l2.c so it doesn't conflict with the Analog
0010  * Device ADV7511 (config fragment CONFIG_DRM_I2C_ADV7511).
0011  */
0012 
0013 
0014 #include <linux/kernel.h>
0015 #include <linux/module.h>
0016 #include <linux/slab.h>
0017 #include <linux/i2c.h>
0018 #include <linux/delay.h>
0019 #include <linux/videodev2.h>
0020 #include <linux/workqueue.h>
0021 #include <linux/hdmi.h>
0022 #include <linux/v4l2-dv-timings.h>
0023 #include <media/v4l2-device.h>
0024 #include <media/v4l2-common.h>
0025 #include <media/v4l2-ctrls.h>
0026 #include <media/v4l2-dv-timings.h>
0027 #include <media/i2c/adv7511.h>
0028 #include <media/cec.h>
0029 
0030 static int debug;
0031 module_param(debug, int, 0644);
0032 MODULE_PARM_DESC(debug, "debug level (0-2)");
0033 
0034 MODULE_DESCRIPTION("Analog Devices ADV7511 HDMI Transmitter Device Driver");
0035 MODULE_AUTHOR("Hans Verkuil");
0036 MODULE_LICENSE("GPL v2");
0037 
0038 #define MASK_ADV7511_EDID_RDY_INT   0x04
0039 #define MASK_ADV7511_MSEN_INT       0x40
0040 #define MASK_ADV7511_HPD_INT        0x80
0041 
0042 #define MASK_ADV7511_HPD_DETECT     0x40
0043 #define MASK_ADV7511_MSEN_DETECT    0x20
0044 #define MASK_ADV7511_EDID_RDY       0x10
0045 
0046 #define EDID_MAX_RETRIES (8)
0047 #define EDID_DELAY 250
0048 #define EDID_MAX_SEGM 8
0049 
0050 #define ADV7511_MAX_WIDTH 1920
0051 #define ADV7511_MAX_HEIGHT 1200
0052 #define ADV7511_MIN_PIXELCLOCK 20000000
0053 #define ADV7511_MAX_PIXELCLOCK 225000000
0054 
0055 #define ADV7511_MAX_ADDRS (3)
0056 
0057 /*
0058 **********************************************************************
0059 *
0060 *  Arrays with configuration parameters for the ADV7511
0061 *
0062 **********************************************************************
0063 */
0064 
0065 struct i2c_reg_value {
0066     unsigned char reg;
0067     unsigned char value;
0068 };
0069 
0070 struct adv7511_state_edid {
0071     /* total number of blocks */
0072     u32 blocks;
0073     /* Number of segments read */
0074     u32 segments;
0075     u8 data[EDID_MAX_SEGM * 256];
0076     /* Number of EDID read retries left */
0077     unsigned read_retries;
0078     bool complete;
0079 };
0080 
0081 struct adv7511_state {
0082     struct adv7511_platform_data pdata;
0083     struct v4l2_subdev sd;
0084     struct media_pad pad;
0085     struct v4l2_ctrl_handler hdl;
0086     int chip_revision;
0087     u8 i2c_edid_addr;
0088     u8 i2c_pktmem_addr;
0089     u8 i2c_cec_addr;
0090 
0091     struct i2c_client *i2c_cec;
0092     struct cec_adapter *cec_adap;
0093     u8   cec_addr[ADV7511_MAX_ADDRS];
0094     u8   cec_valid_addrs;
0095     bool cec_enabled_adap;
0096 
0097     /* Is the adv7511 powered on? */
0098     bool power_on;
0099     /* Did we receive hotplug and rx-sense signals? */
0100     bool have_monitor;
0101     bool enabled_irq;
0102     /* timings from s_dv_timings */
0103     struct v4l2_dv_timings dv_timings;
0104     u32 fmt_code;
0105     u32 colorspace;
0106     u32 ycbcr_enc;
0107     u32 quantization;
0108     u32 xfer_func;
0109     u32 content_type;
0110     /* controls */
0111     struct v4l2_ctrl *hdmi_mode_ctrl;
0112     struct v4l2_ctrl *hotplug_ctrl;
0113     struct v4l2_ctrl *rx_sense_ctrl;
0114     struct v4l2_ctrl *have_edid0_ctrl;
0115     struct v4l2_ctrl *rgb_quantization_range_ctrl;
0116     struct v4l2_ctrl *content_type_ctrl;
0117     struct i2c_client *i2c_edid;
0118     struct i2c_client *i2c_pktmem;
0119     struct adv7511_state_edid edid;
0120     /* Running counter of the number of detected EDIDs (for debugging) */
0121     unsigned edid_detect_counter;
0122     struct workqueue_struct *work_queue;
0123     struct delayed_work edid_handler; /* work entry */
0124 };
0125 
0126 static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd);
0127 static bool adv7511_check_edid_status(struct v4l2_subdev *sd);
0128 static void adv7511_setup(struct v4l2_subdev *sd);
0129 static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq);
0130 static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq);
0131 
0132 
0133 static const struct v4l2_dv_timings_cap adv7511_timings_cap = {
0134     .type = V4L2_DV_BT_656_1120,
0135     /* keep this initialization for compatibility with GCC < 4.4.6 */
0136     .reserved = { 0 },
0137     V4L2_INIT_BT_TIMINGS(640, ADV7511_MAX_WIDTH, 350, ADV7511_MAX_HEIGHT,
0138         ADV7511_MIN_PIXELCLOCK, ADV7511_MAX_PIXELCLOCK,
0139         V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
0140             V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
0141         V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
0142             V4L2_DV_BT_CAP_CUSTOM)
0143 };
0144 
0145 static inline struct adv7511_state *get_adv7511_state(struct v4l2_subdev *sd)
0146 {
0147     return container_of(sd, struct adv7511_state, sd);
0148 }
0149 
0150 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
0151 {
0152     return &container_of(ctrl->handler, struct adv7511_state, hdl)->sd;
0153 }
0154 
0155 /* ------------------------ I2C ----------------------------------------------- */
0156 
0157 static s32 adv_smbus_read_byte_data_check(struct i2c_client *client,
0158                       u8 command, bool check)
0159 {
0160     union i2c_smbus_data data;
0161 
0162     if (!i2c_smbus_xfer(client->adapter, client->addr, client->flags,
0163                 I2C_SMBUS_READ, command,
0164                 I2C_SMBUS_BYTE_DATA, &data))
0165         return data.byte;
0166     if (check)
0167         v4l_err(client, "error reading %02x, %02x\n",
0168             client->addr, command);
0169     return -1;
0170 }
0171 
0172 static s32 adv_smbus_read_byte_data(struct i2c_client *client, u8 command)
0173 {
0174     int i;
0175     for (i = 0; i < 3; i++) {
0176         int ret = adv_smbus_read_byte_data_check(client, command, true);
0177         if (ret >= 0) {
0178             if (i)
0179                 v4l_err(client, "read ok after %d retries\n", i);
0180             return ret;
0181         }
0182     }
0183     v4l_err(client, "read failed\n");
0184     return -1;
0185 }
0186 
0187 static int adv7511_rd(struct v4l2_subdev *sd, u8 reg)
0188 {
0189     struct i2c_client *client = v4l2_get_subdevdata(sd);
0190 
0191     return adv_smbus_read_byte_data(client, reg);
0192 }
0193 
0194 static int adv7511_wr(struct v4l2_subdev *sd, u8 reg, u8 val)
0195 {
0196     struct i2c_client *client = v4l2_get_subdevdata(sd);
0197     int ret;
0198     int i;
0199 
0200     for (i = 0; i < 3; i++) {
0201         ret = i2c_smbus_write_byte_data(client, reg, val);
0202         if (ret == 0)
0203             return 0;
0204     }
0205     v4l2_err(sd, "%s: i2c write error\n", __func__);
0206     return ret;
0207 }
0208 
0209 /* To set specific bits in the register, a clear-mask is given (to be AND-ed),
0210    and then the value-mask (to be OR-ed). */
0211 static inline void adv7511_wr_and_or(struct v4l2_subdev *sd, u8 reg, u8 clr_mask, u8 val_mask)
0212 {
0213     adv7511_wr(sd, reg, (adv7511_rd(sd, reg) & clr_mask) | val_mask);
0214 }
0215 
0216 static int adv7511_edid_rd(struct v4l2_subdev *sd, uint16_t len, uint8_t *buf)
0217 {
0218     struct adv7511_state *state = get_adv7511_state(sd);
0219     int i;
0220 
0221     v4l2_dbg(1, debug, sd, "%s:\n", __func__);
0222 
0223     for (i = 0; i < len; i += I2C_SMBUS_BLOCK_MAX) {
0224         s32 ret;
0225 
0226         ret = i2c_smbus_read_i2c_block_data(state->i2c_edid, i,
0227                             I2C_SMBUS_BLOCK_MAX, buf + i);
0228         if (ret < 0) {
0229             v4l2_err(sd, "%s: i2c read error\n", __func__);
0230             return ret;
0231         }
0232     }
0233 
0234     return 0;
0235 }
0236 
0237 static inline int adv7511_cec_read(struct v4l2_subdev *sd, u8 reg)
0238 {
0239     struct adv7511_state *state = get_adv7511_state(sd);
0240 
0241     return i2c_smbus_read_byte_data(state->i2c_cec, reg);
0242 }
0243 
0244 static int adv7511_cec_write(struct v4l2_subdev *sd, u8 reg, u8 val)
0245 {
0246     struct adv7511_state *state = get_adv7511_state(sd);
0247     int ret;
0248     int i;
0249 
0250     for (i = 0; i < 3; i++) {
0251         ret = i2c_smbus_write_byte_data(state->i2c_cec, reg, val);
0252         if (ret == 0)
0253             return 0;
0254     }
0255     v4l2_err(sd, "%s: I2C Write Problem\n", __func__);
0256     return ret;
0257 }
0258 
0259 static inline int adv7511_cec_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask,
0260                    u8 val)
0261 {
0262     return adv7511_cec_write(sd, reg, (adv7511_cec_read(sd, reg) & mask) | val);
0263 }
0264 
0265 static int adv7511_pktmem_rd(struct v4l2_subdev *sd, u8 reg)
0266 {
0267     struct adv7511_state *state = get_adv7511_state(sd);
0268 
0269     return adv_smbus_read_byte_data(state->i2c_pktmem, reg);
0270 }
0271 
0272 static inline bool adv7511_have_hotplug(struct v4l2_subdev *sd)
0273 {
0274     return adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT;
0275 }
0276 
0277 static inline bool adv7511_have_rx_sense(struct v4l2_subdev *sd)
0278 {
0279     return adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT;
0280 }
0281 
0282 static void adv7511_csc_conversion_mode(struct v4l2_subdev *sd, u8 mode)
0283 {
0284     adv7511_wr_and_or(sd, 0x18, 0x9f, (mode & 0x3)<<5);
0285 }
0286 
0287 static void adv7511_csc_coeff(struct v4l2_subdev *sd,
0288                   u16 A1, u16 A2, u16 A3, u16 A4,
0289                   u16 B1, u16 B2, u16 B3, u16 B4,
0290                   u16 C1, u16 C2, u16 C3, u16 C4)
0291 {
0292     /* A */
0293     adv7511_wr_and_or(sd, 0x18, 0xe0, A1>>8);
0294     adv7511_wr(sd, 0x19, A1);
0295     adv7511_wr_and_or(sd, 0x1A, 0xe0, A2>>8);
0296     adv7511_wr(sd, 0x1B, A2);
0297     adv7511_wr_and_or(sd, 0x1c, 0xe0, A3>>8);
0298     adv7511_wr(sd, 0x1d, A3);
0299     adv7511_wr_and_or(sd, 0x1e, 0xe0, A4>>8);
0300     adv7511_wr(sd, 0x1f, A4);
0301 
0302     /* B */
0303     adv7511_wr_and_or(sd, 0x20, 0xe0, B1>>8);
0304     adv7511_wr(sd, 0x21, B1);
0305     adv7511_wr_and_or(sd, 0x22, 0xe0, B2>>8);
0306     adv7511_wr(sd, 0x23, B2);
0307     adv7511_wr_and_or(sd, 0x24, 0xe0, B3>>8);
0308     adv7511_wr(sd, 0x25, B3);
0309     adv7511_wr_and_or(sd, 0x26, 0xe0, B4>>8);
0310     adv7511_wr(sd, 0x27, B4);
0311 
0312     /* C */
0313     adv7511_wr_and_or(sd, 0x28, 0xe0, C1>>8);
0314     adv7511_wr(sd, 0x29, C1);
0315     adv7511_wr_and_or(sd, 0x2A, 0xe0, C2>>8);
0316     adv7511_wr(sd, 0x2B, C2);
0317     adv7511_wr_and_or(sd, 0x2C, 0xe0, C3>>8);
0318     adv7511_wr(sd, 0x2D, C3);
0319     adv7511_wr_and_or(sd, 0x2E, 0xe0, C4>>8);
0320     adv7511_wr(sd, 0x2F, C4);
0321 }
0322 
0323 static void adv7511_csc_rgb_full2limit(struct v4l2_subdev *sd, bool enable)
0324 {
0325     if (enable) {
0326         u8 csc_mode = 0;
0327         adv7511_csc_conversion_mode(sd, csc_mode);
0328         adv7511_csc_coeff(sd,
0329                   4096-564, 0, 0, 256,
0330                   0, 4096-564, 0, 256,
0331                   0, 0, 4096-564, 256);
0332         /* enable CSC */
0333         adv7511_wr_and_or(sd, 0x18, 0x7f, 0x80);
0334         /* AVI infoframe: Limited range RGB (16-235) */
0335         adv7511_wr_and_or(sd, 0x57, 0xf3, 0x04);
0336     } else {
0337         /* disable CSC */
0338         adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0);
0339         /* AVI infoframe: Full range RGB (0-255) */
0340         adv7511_wr_and_or(sd, 0x57, 0xf3, 0x08);
0341     }
0342 }
0343 
0344 static void adv7511_set_rgb_quantization_mode(struct v4l2_subdev *sd, struct v4l2_ctrl *ctrl)
0345 {
0346     struct adv7511_state *state = get_adv7511_state(sd);
0347 
0348     /* Only makes sense for RGB formats */
0349     if (state->fmt_code != MEDIA_BUS_FMT_RGB888_1X24) {
0350         /* so just keep quantization */
0351         adv7511_csc_rgb_full2limit(sd, false);
0352         return;
0353     }
0354 
0355     switch (ctrl->val) {
0356     case V4L2_DV_RGB_RANGE_AUTO:
0357         /* automatic */
0358         if (state->dv_timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO) {
0359             /* CE format, RGB limited range (16-235) */
0360             adv7511_csc_rgb_full2limit(sd, true);
0361         } else {
0362             /* not CE format, RGB full range (0-255) */
0363             adv7511_csc_rgb_full2limit(sd, false);
0364         }
0365         break;
0366     case V4L2_DV_RGB_RANGE_LIMITED:
0367         /* RGB limited range (16-235) */
0368         adv7511_csc_rgb_full2limit(sd, true);
0369         break;
0370     case V4L2_DV_RGB_RANGE_FULL:
0371         /* RGB full range (0-255) */
0372         adv7511_csc_rgb_full2limit(sd, false);
0373         break;
0374     }
0375 }
0376 
0377 /* ------------------------------ CTRL OPS ------------------------------ */
0378 
0379 static int adv7511_s_ctrl(struct v4l2_ctrl *ctrl)
0380 {
0381     struct v4l2_subdev *sd = to_sd(ctrl);
0382     struct adv7511_state *state = get_adv7511_state(sd);
0383 
0384     v4l2_dbg(1, debug, sd, "%s: ctrl id: %d, ctrl->val %d\n", __func__, ctrl->id, ctrl->val);
0385 
0386     if (state->hdmi_mode_ctrl == ctrl) {
0387         /* Set HDMI or DVI-D */
0388         adv7511_wr_and_or(sd, 0xaf, 0xfd, ctrl->val == V4L2_DV_TX_MODE_HDMI ? 0x02 : 0x00);
0389         return 0;
0390     }
0391     if (state->rgb_quantization_range_ctrl == ctrl) {
0392         adv7511_set_rgb_quantization_mode(sd, ctrl);
0393         return 0;
0394     }
0395     if (state->content_type_ctrl == ctrl) {
0396         u8 itc, cn;
0397 
0398         state->content_type = ctrl->val;
0399         itc = state->content_type != V4L2_DV_IT_CONTENT_TYPE_NO_ITC;
0400         cn = itc ? state->content_type : V4L2_DV_IT_CONTENT_TYPE_GRAPHICS;
0401         adv7511_wr_and_or(sd, 0x57, 0x7f, itc << 7);
0402         adv7511_wr_and_or(sd, 0x59, 0xcf, cn << 4);
0403         return 0;
0404     }
0405 
0406     return -EINVAL;
0407 }
0408 
0409 static const struct v4l2_ctrl_ops adv7511_ctrl_ops = {
0410     .s_ctrl = adv7511_s_ctrl,
0411 };
0412 
0413 /* ---------------------------- CORE OPS ------------------------------------------- */
0414 
0415 #ifdef CONFIG_VIDEO_ADV_DEBUG
0416 static void adv7511_inv_register(struct v4l2_subdev *sd)
0417 {
0418     struct adv7511_state *state = get_adv7511_state(sd);
0419 
0420     v4l2_info(sd, "0x000-0x0ff: Main Map\n");
0421     if (state->i2c_cec)
0422         v4l2_info(sd, "0x100-0x1ff: CEC Map\n");
0423 }
0424 
0425 static int adv7511_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
0426 {
0427     struct adv7511_state *state = get_adv7511_state(sd);
0428 
0429     reg->size = 1;
0430     switch (reg->reg >> 8) {
0431     case 0:
0432         reg->val = adv7511_rd(sd, reg->reg & 0xff);
0433         break;
0434     case 1:
0435         if (state->i2c_cec) {
0436             reg->val = adv7511_cec_read(sd, reg->reg & 0xff);
0437             break;
0438         }
0439         fallthrough;
0440     default:
0441         v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
0442         adv7511_inv_register(sd);
0443         break;
0444     }
0445     return 0;
0446 }
0447 
0448 static int adv7511_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
0449 {
0450     struct adv7511_state *state = get_adv7511_state(sd);
0451 
0452     switch (reg->reg >> 8) {
0453     case 0:
0454         adv7511_wr(sd, reg->reg & 0xff, reg->val & 0xff);
0455         break;
0456     case 1:
0457         if (state->i2c_cec) {
0458             adv7511_cec_write(sd, reg->reg & 0xff, reg->val & 0xff);
0459             break;
0460         }
0461         fallthrough;
0462     default:
0463         v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
0464         adv7511_inv_register(sd);
0465         break;
0466     }
0467     return 0;
0468 }
0469 #endif
0470 
0471 struct adv7511_cfg_read_infoframe {
0472     const char *desc;
0473     u8 present_reg;
0474     u8 present_mask;
0475     u8 header[3];
0476     u16 payload_addr;
0477 };
0478 
0479 static u8 hdmi_infoframe_checksum(u8 *ptr, size_t size)
0480 {
0481     u8 csum = 0;
0482     size_t i;
0483 
0484     /* compute checksum */
0485     for (i = 0; i < size; i++)
0486         csum += ptr[i];
0487 
0488     return 256 - csum;
0489 }
0490 
0491 static void log_infoframe(struct v4l2_subdev *sd, const struct adv7511_cfg_read_infoframe *cri)
0492 {
0493     struct i2c_client *client = v4l2_get_subdevdata(sd);
0494     struct device *dev = &client->dev;
0495     union hdmi_infoframe frame;
0496     u8 buffer[32];
0497     u8 len;
0498     int i;
0499 
0500     if (!(adv7511_rd(sd, cri->present_reg) & cri->present_mask)) {
0501         v4l2_info(sd, "%s infoframe not transmitted\n", cri->desc);
0502         return;
0503     }
0504 
0505     memcpy(buffer, cri->header, sizeof(cri->header));
0506 
0507     len = buffer[2];
0508 
0509     if (len + 4 > sizeof(buffer)) {
0510         v4l2_err(sd, "%s: invalid %s infoframe length %d\n", __func__, cri->desc, len);
0511         return;
0512     }
0513 
0514     if (cri->payload_addr >= 0x100) {
0515         for (i = 0; i < len; i++)
0516             buffer[i + 4] = adv7511_pktmem_rd(sd, cri->payload_addr + i - 0x100);
0517     } else {
0518         for (i = 0; i < len; i++)
0519             buffer[i + 4] = adv7511_rd(sd, cri->payload_addr + i);
0520     }
0521     buffer[3] = 0;
0522     buffer[3] = hdmi_infoframe_checksum(buffer, len + 4);
0523 
0524     if (hdmi_infoframe_unpack(&frame, buffer, len + 4) < 0) {
0525         v4l2_err(sd, "%s: unpack of %s infoframe failed\n", __func__, cri->desc);
0526         return;
0527     }
0528 
0529     hdmi_infoframe_log(KERN_INFO, dev, &frame);
0530 }
0531 
0532 static void adv7511_log_infoframes(struct v4l2_subdev *sd)
0533 {
0534     static const struct adv7511_cfg_read_infoframe cri[] = {
0535         { "AVI", 0x44, 0x10, { 0x82, 2, 13 }, 0x55 },
0536         { "Audio", 0x44, 0x08, { 0x84, 1, 10 }, 0x73 },
0537         { "SDP", 0x40, 0x40, { 0x83, 1, 25 }, 0x103 },
0538     };
0539     int i;
0540 
0541     for (i = 0; i < ARRAY_SIZE(cri); i++)
0542         log_infoframe(sd, &cri[i]);
0543 }
0544 
0545 static int adv7511_log_status(struct v4l2_subdev *sd)
0546 {
0547     struct adv7511_state *state = get_adv7511_state(sd);
0548     struct adv7511_state_edid *edid = &state->edid;
0549     int i;
0550 
0551     static const char * const states[] = {
0552         "in reset",
0553         "reading EDID",
0554         "idle",
0555         "initializing HDCP",
0556         "HDCP enabled",
0557         "initializing HDCP repeater",
0558         "6", "7", "8", "9", "A", "B", "C", "D", "E", "F"
0559     };
0560     static const char * const errors[] = {
0561         "no error",
0562         "bad receiver BKSV",
0563         "Ri mismatch",
0564         "Pj mismatch",
0565         "i2c error",
0566         "timed out",
0567         "max repeater cascade exceeded",
0568         "hash check failed",
0569         "too many devices",
0570         "9", "A", "B", "C", "D", "E", "F"
0571     };
0572 
0573     v4l2_info(sd, "power %s\n", state->power_on ? "on" : "off");
0574     v4l2_info(sd, "%s hotplug, %s Rx Sense, %s EDID (%d block(s))\n",
0575           (adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT) ? "detected" : "no",
0576           (adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT) ? "detected" : "no",
0577           edid->segments ? "found" : "no",
0578           edid->blocks);
0579     v4l2_info(sd, "%s output %s\n",
0580           (adv7511_rd(sd, 0xaf) & 0x02) ?
0581           "HDMI" : "DVI-D",
0582           (adv7511_rd(sd, 0xa1) & 0x3c) ?
0583           "disabled" : "enabled");
0584     v4l2_info(sd, "state: %s, error: %s, detect count: %u, msk/irq: %02x/%02x\n",
0585               states[adv7511_rd(sd, 0xc8) & 0xf],
0586               errors[adv7511_rd(sd, 0xc8) >> 4], state->edid_detect_counter,
0587               adv7511_rd(sd, 0x94), adv7511_rd(sd, 0x96));
0588     v4l2_info(sd, "RGB quantization: %s range\n", adv7511_rd(sd, 0x18) & 0x80 ? "limited" : "full");
0589     if (adv7511_rd(sd, 0xaf) & 0x02) {
0590         /* HDMI only */
0591         u8 manual_cts = adv7511_rd(sd, 0x0a) & 0x80;
0592         u32 N = (adv7511_rd(sd, 0x01) & 0xf) << 16 |
0593             adv7511_rd(sd, 0x02) << 8 |
0594             adv7511_rd(sd, 0x03);
0595         u8 vic_detect = adv7511_rd(sd, 0x3e) >> 2;
0596         u8 vic_sent = adv7511_rd(sd, 0x3d) & 0x3f;
0597         u32 CTS;
0598 
0599         if (manual_cts)
0600             CTS = (adv7511_rd(sd, 0x07) & 0xf) << 16 |
0601                   adv7511_rd(sd, 0x08) << 8 |
0602                   adv7511_rd(sd, 0x09);
0603         else
0604             CTS = (adv7511_rd(sd, 0x04) & 0xf) << 16 |
0605                   adv7511_rd(sd, 0x05) << 8 |
0606                   adv7511_rd(sd, 0x06);
0607         v4l2_info(sd, "CTS %s mode: N %d, CTS %d\n",
0608               manual_cts ? "manual" : "automatic", N, CTS);
0609         v4l2_info(sd, "VIC: detected %d, sent %d\n",
0610               vic_detect, vic_sent);
0611         adv7511_log_infoframes(sd);
0612     }
0613     if (state->dv_timings.type == V4L2_DV_BT_656_1120)
0614         v4l2_print_dv_timings(sd->name, "timings: ",
0615                 &state->dv_timings, false);
0616     else
0617         v4l2_info(sd, "no timings set\n");
0618     v4l2_info(sd, "i2c edid addr: 0x%x\n", state->i2c_edid_addr);
0619 
0620     if (state->i2c_cec == NULL)
0621         return 0;
0622 
0623     v4l2_info(sd, "i2c cec addr: 0x%x\n", state->i2c_cec_addr);
0624 
0625     v4l2_info(sd, "CEC: %s\n", state->cec_enabled_adap ?
0626             "enabled" : "disabled");
0627     if (state->cec_enabled_adap) {
0628         for (i = 0; i < ADV7511_MAX_ADDRS; i++) {
0629             bool is_valid = state->cec_valid_addrs & (1 << i);
0630 
0631             if (is_valid)
0632                 v4l2_info(sd, "CEC Logical Address: 0x%x\n",
0633                       state->cec_addr[i]);
0634         }
0635     }
0636     v4l2_info(sd, "i2c pktmem addr: 0x%x\n", state->i2c_pktmem_addr);
0637     return 0;
0638 }
0639 
0640 /* Power up/down adv7511 */
0641 static int adv7511_s_power(struct v4l2_subdev *sd, int on)
0642 {
0643     struct adv7511_state *state = get_adv7511_state(sd);
0644     const int retries = 20;
0645     int i;
0646 
0647     v4l2_dbg(1, debug, sd, "%s: power %s\n", __func__, on ? "on" : "off");
0648 
0649     state->power_on = on;
0650 
0651     if (!on) {
0652         /* Power down */
0653         adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40);
0654         return true;
0655     }
0656 
0657     /* Power up */
0658     /* The adv7511 does not always come up immediately.
0659        Retry multiple times. */
0660     for (i = 0; i < retries; i++) {
0661         adv7511_wr_and_or(sd, 0x41, 0xbf, 0x0);
0662         if ((adv7511_rd(sd, 0x41) & 0x40) == 0)
0663             break;
0664         adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40);
0665         msleep(10);
0666     }
0667     if (i == retries) {
0668         v4l2_dbg(1, debug, sd, "%s: failed to powerup the adv7511!\n", __func__);
0669         adv7511_s_power(sd, 0);
0670         return false;
0671     }
0672     if (i > 1)
0673         v4l2_dbg(1, debug, sd, "%s: needed %d retries to powerup the adv7511\n", __func__, i);
0674 
0675     /* Reserved registers that must be set */
0676     adv7511_wr(sd, 0x98, 0x03);
0677     adv7511_wr_and_or(sd, 0x9a, 0xfe, 0x70);
0678     adv7511_wr(sd, 0x9c, 0x30);
0679     adv7511_wr_and_or(sd, 0x9d, 0xfc, 0x01);
0680     adv7511_wr(sd, 0xa2, 0xa4);
0681     adv7511_wr(sd, 0xa3, 0xa4);
0682     adv7511_wr(sd, 0xe0, 0xd0);
0683     adv7511_wr(sd, 0xf9, 0x00);
0684 
0685     adv7511_wr(sd, 0x43, state->i2c_edid_addr);
0686     adv7511_wr(sd, 0x45, state->i2c_pktmem_addr);
0687 
0688     /* Set number of attempts to read the EDID */
0689     adv7511_wr(sd, 0xc9, 0xf);
0690     return true;
0691 }
0692 
0693 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC)
0694 static int adv7511_cec_adap_enable(struct cec_adapter *adap, bool enable)
0695 {
0696     struct adv7511_state *state = cec_get_drvdata(adap);
0697     struct v4l2_subdev *sd = &state->sd;
0698 
0699     if (state->i2c_cec == NULL)
0700         return -EIO;
0701 
0702     if (!state->cec_enabled_adap && enable) {
0703         /* power up cec section */
0704         adv7511_cec_write_and_or(sd, 0x4e, 0xfc, 0x01);
0705         /* legacy mode and clear all rx buffers */
0706         adv7511_cec_write(sd, 0x4a, 0x00);
0707         adv7511_cec_write(sd, 0x4a, 0x07);
0708         adv7511_cec_write_and_or(sd, 0x11, 0xfe, 0); /* initially disable tx */
0709         /* enabled irqs: */
0710         /* tx: ready */
0711         /* tx: arbitration lost */
0712         /* tx: retry timeout */
0713         /* rx: ready 1 */
0714         if (state->enabled_irq)
0715             adv7511_wr_and_or(sd, 0x95, 0xc0, 0x39);
0716     } else if (state->cec_enabled_adap && !enable) {
0717         if (state->enabled_irq)
0718             adv7511_wr_and_or(sd, 0x95, 0xc0, 0x00);
0719         /* disable address mask 1-3 */
0720         adv7511_cec_write_and_or(sd, 0x4b, 0x8f, 0x00);
0721         /* power down cec section */
0722         adv7511_cec_write_and_or(sd, 0x4e, 0xfc, 0x00);
0723         state->cec_valid_addrs = 0;
0724     }
0725     state->cec_enabled_adap = enable;
0726     return 0;
0727 }
0728 
0729 static int adv7511_cec_adap_log_addr(struct cec_adapter *adap, u8 addr)
0730 {
0731     struct adv7511_state *state = cec_get_drvdata(adap);
0732     struct v4l2_subdev *sd = &state->sd;
0733     unsigned int i, free_idx = ADV7511_MAX_ADDRS;
0734 
0735     if (!state->cec_enabled_adap)
0736         return addr == CEC_LOG_ADDR_INVALID ? 0 : -EIO;
0737 
0738     if (addr == CEC_LOG_ADDR_INVALID) {
0739         adv7511_cec_write_and_or(sd, 0x4b, 0x8f, 0);
0740         state->cec_valid_addrs = 0;
0741         return 0;
0742     }
0743 
0744     for (i = 0; i < ADV7511_MAX_ADDRS; i++) {
0745         bool is_valid = state->cec_valid_addrs & (1 << i);
0746 
0747         if (free_idx == ADV7511_MAX_ADDRS && !is_valid)
0748             free_idx = i;
0749         if (is_valid && state->cec_addr[i] == addr)
0750             return 0;
0751     }
0752     if (i == ADV7511_MAX_ADDRS) {
0753         i = free_idx;
0754         if (i == ADV7511_MAX_ADDRS)
0755             return -ENXIO;
0756     }
0757     state->cec_addr[i] = addr;
0758     state->cec_valid_addrs |= 1 << i;
0759 
0760     switch (i) {
0761     case 0:
0762         /* enable address mask 0 */
0763         adv7511_cec_write_and_or(sd, 0x4b, 0xef, 0x10);
0764         /* set address for mask 0 */
0765         adv7511_cec_write_and_or(sd, 0x4c, 0xf0, addr);
0766         break;
0767     case 1:
0768         /* enable address mask 1 */
0769         adv7511_cec_write_and_or(sd, 0x4b, 0xdf, 0x20);
0770         /* set address for mask 1 */
0771         adv7511_cec_write_and_or(sd, 0x4c, 0x0f, addr << 4);
0772         break;
0773     case 2:
0774         /* enable address mask 2 */
0775         adv7511_cec_write_and_or(sd, 0x4b, 0xbf, 0x40);
0776         /* set address for mask 1 */
0777         adv7511_cec_write_and_or(sd, 0x4d, 0xf0, addr);
0778         break;
0779     }
0780     return 0;
0781 }
0782 
0783 static int adv7511_cec_adap_transmit(struct cec_adapter *adap, u8 attempts,
0784                      u32 signal_free_time, struct cec_msg *msg)
0785 {
0786     struct adv7511_state *state = cec_get_drvdata(adap);
0787     struct v4l2_subdev *sd = &state->sd;
0788     u8 len = msg->len;
0789     unsigned int i;
0790 
0791     v4l2_dbg(1, debug, sd, "%s: len %d\n", __func__, len);
0792 
0793     if (len > 16) {
0794         v4l2_err(sd, "%s: len exceeded 16 (%d)\n", __func__, len);
0795         return -EINVAL;
0796     }
0797 
0798     /*
0799      * The number of retries is the number of attempts - 1, but retry
0800      * at least once. It's not clear if a value of 0 is allowed, so
0801      * let's do at least one retry.
0802      */
0803     adv7511_cec_write_and_or(sd, 0x12, ~0x70, max(1, attempts - 1) << 4);
0804 
0805     /* clear cec tx irq status */
0806     adv7511_wr(sd, 0x97, 0x38);
0807 
0808     /* write data */
0809     for (i = 0; i < len; i++)
0810         adv7511_cec_write(sd, i, msg->msg[i]);
0811 
0812     /* set length (data + header) */
0813     adv7511_cec_write(sd, 0x10, len);
0814     /* start transmit, enable tx */
0815     adv7511_cec_write(sd, 0x11, 0x01);
0816     return 0;
0817 }
0818 
0819 static void adv_cec_tx_raw_status(struct v4l2_subdev *sd, u8 tx_raw_status)
0820 {
0821     struct adv7511_state *state = get_adv7511_state(sd);
0822 
0823     if ((adv7511_cec_read(sd, 0x11) & 0x01) == 0) {
0824         v4l2_dbg(1, debug, sd, "%s: tx raw: tx disabled\n", __func__);
0825         return;
0826     }
0827 
0828     if (tx_raw_status & 0x10) {
0829         v4l2_dbg(1, debug, sd,
0830              "%s: tx raw: arbitration lost\n", __func__);
0831         cec_transmit_done(state->cec_adap, CEC_TX_STATUS_ARB_LOST,
0832                   1, 0, 0, 0);
0833         return;
0834     }
0835     if (tx_raw_status & 0x08) {
0836         u8 status;
0837         u8 nack_cnt;
0838         u8 low_drive_cnt;
0839 
0840         v4l2_dbg(1, debug, sd, "%s: tx raw: retry failed\n", __func__);
0841         /*
0842          * We set this status bit since this hardware performs
0843          * retransmissions.
0844          */
0845         status = CEC_TX_STATUS_MAX_RETRIES;
0846         nack_cnt = adv7511_cec_read(sd, 0x14) & 0xf;
0847         if (nack_cnt)
0848             status |= CEC_TX_STATUS_NACK;
0849         low_drive_cnt = adv7511_cec_read(sd, 0x14) >> 4;
0850         if (low_drive_cnt)
0851             status |= CEC_TX_STATUS_LOW_DRIVE;
0852         cec_transmit_done(state->cec_adap, status,
0853                   0, nack_cnt, low_drive_cnt, 0);
0854         return;
0855     }
0856     if (tx_raw_status & 0x20) {
0857         v4l2_dbg(1, debug, sd, "%s: tx raw: ready ok\n", __func__);
0858         cec_transmit_done(state->cec_adap, CEC_TX_STATUS_OK, 0, 0, 0, 0);
0859         return;
0860     }
0861 }
0862 
0863 static const struct cec_adap_ops adv7511_cec_adap_ops = {
0864     .adap_enable = adv7511_cec_adap_enable,
0865     .adap_log_addr = adv7511_cec_adap_log_addr,
0866     .adap_transmit = adv7511_cec_adap_transmit,
0867 };
0868 #endif
0869 
0870 /* Enable interrupts */
0871 static void adv7511_set_isr(struct v4l2_subdev *sd, bool enable)
0872 {
0873     struct adv7511_state *state = get_adv7511_state(sd);
0874     u8 irqs = MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT;
0875     u8 irqs_rd;
0876     int retries = 100;
0877 
0878     v4l2_dbg(2, debug, sd, "%s: %s\n", __func__, enable ? "enable" : "disable");
0879 
0880     if (state->enabled_irq == enable)
0881         return;
0882     state->enabled_irq = enable;
0883 
0884     /* The datasheet says that the EDID ready interrupt should be
0885        disabled if there is no hotplug. */
0886     if (!enable)
0887         irqs = 0;
0888     else if (adv7511_have_hotplug(sd))
0889         irqs |= MASK_ADV7511_EDID_RDY_INT;
0890 
0891     /*
0892      * This i2c write can fail (approx. 1 in 1000 writes). But it
0893      * is essential that this register is correct, so retry it
0894      * multiple times.
0895      *
0896      * Note that the i2c write does not report an error, but the readback
0897      * clearly shows the wrong value.
0898      */
0899     do {
0900         adv7511_wr(sd, 0x94, irqs);
0901         irqs_rd = adv7511_rd(sd, 0x94);
0902     } while (retries-- && irqs_rd != irqs);
0903 
0904     if (irqs_rd != irqs)
0905         v4l2_err(sd, "Could not set interrupts: hw failure?\n");
0906 
0907     adv7511_wr_and_or(sd, 0x95, 0xc0,
0908               (state->cec_enabled_adap && enable) ? 0x39 : 0x00);
0909 }
0910 
0911 /* Interrupt handler */
0912 static int adv7511_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
0913 {
0914     u8 irq_status;
0915     u8 cec_irq;
0916 
0917     /* disable interrupts to prevent a race condition */
0918     adv7511_set_isr(sd, false);
0919     irq_status = adv7511_rd(sd, 0x96);
0920     cec_irq = adv7511_rd(sd, 0x97);
0921     /* clear detected interrupts */
0922     adv7511_wr(sd, 0x96, irq_status);
0923     adv7511_wr(sd, 0x97, cec_irq);
0924 
0925     v4l2_dbg(1, debug, sd, "%s: irq 0x%x, cec-irq 0x%x\n", __func__,
0926          irq_status, cec_irq);
0927 
0928     if (irq_status & (MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT))
0929         adv7511_check_monitor_present_status(sd);
0930     if (irq_status & MASK_ADV7511_EDID_RDY_INT)
0931         adv7511_check_edid_status(sd);
0932 
0933 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC)
0934     if (cec_irq & 0x38)
0935         adv_cec_tx_raw_status(sd, cec_irq);
0936 
0937     if (cec_irq & 1) {
0938         struct adv7511_state *state = get_adv7511_state(sd);
0939         struct cec_msg msg;
0940 
0941         msg.len = adv7511_cec_read(sd, 0x25) & 0x1f;
0942 
0943         v4l2_dbg(1, debug, sd, "%s: cec msg len %d\n", __func__,
0944              msg.len);
0945 
0946         if (msg.len > 16)
0947             msg.len = 16;
0948 
0949         if (msg.len) {
0950             u8 i;
0951 
0952             for (i = 0; i < msg.len; i++)
0953                 msg.msg[i] = adv7511_cec_read(sd, i + 0x15);
0954 
0955             adv7511_cec_write(sd, 0x4a, 0); /* toggle to re-enable rx 1 */
0956             adv7511_cec_write(sd, 0x4a, 1);
0957             cec_received_msg(state->cec_adap, &msg);
0958         }
0959     }
0960 #endif
0961 
0962     /* enable interrupts */
0963     adv7511_set_isr(sd, true);
0964 
0965     if (handled)
0966         *handled = true;
0967     return 0;
0968 }
0969 
0970 static const struct v4l2_subdev_core_ops adv7511_core_ops = {
0971     .log_status = adv7511_log_status,
0972 #ifdef CONFIG_VIDEO_ADV_DEBUG
0973     .g_register = adv7511_g_register,
0974     .s_register = adv7511_s_register,
0975 #endif
0976     .s_power = adv7511_s_power,
0977     .interrupt_service_routine = adv7511_isr,
0978 };
0979 
0980 /* ------------------------------ VIDEO OPS ------------------------------ */
0981 
0982 /* Enable/disable adv7511 output */
0983 static int adv7511_s_stream(struct v4l2_subdev *sd, int enable)
0984 {
0985     struct adv7511_state *state = get_adv7511_state(sd);
0986 
0987     v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis"));
0988     adv7511_wr_and_or(sd, 0xa1, ~0x3c, (enable ? 0 : 0x3c));
0989     if (enable) {
0990         adv7511_check_monitor_present_status(sd);
0991     } else {
0992         adv7511_s_power(sd, 0);
0993         state->have_monitor = false;
0994     }
0995     return 0;
0996 }
0997 
0998 static int adv7511_s_dv_timings(struct v4l2_subdev *sd,
0999                    struct v4l2_dv_timings *timings)
1000 {
1001     struct adv7511_state *state = get_adv7511_state(sd);
1002     struct v4l2_bt_timings *bt = &timings->bt;
1003     u32 fps;
1004 
1005     v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1006 
1007     /* quick sanity check */
1008     if (!v4l2_valid_dv_timings(timings, &adv7511_timings_cap, NULL, NULL))
1009         return -EINVAL;
1010 
1011     /* Fill the optional fields .standards and .flags in struct v4l2_dv_timings
1012        if the format is one of the CEA or DMT timings. */
1013     v4l2_find_dv_timings_cap(timings, &adv7511_timings_cap, 0, NULL, NULL);
1014 
1015     /* save timings */
1016     state->dv_timings = *timings;
1017 
1018     /* set h/vsync polarities */
1019     adv7511_wr_and_or(sd, 0x17, 0x9f,
1020         ((bt->polarities & V4L2_DV_VSYNC_POS_POL) ? 0 : 0x40) |
1021         ((bt->polarities & V4L2_DV_HSYNC_POS_POL) ? 0 : 0x20));
1022 
1023     fps = (u32)bt->pixelclock / (V4L2_DV_BT_FRAME_WIDTH(bt) * V4L2_DV_BT_FRAME_HEIGHT(bt));
1024     switch (fps) {
1025     case 24:
1026         adv7511_wr_and_or(sd, 0xfb, 0xf9, 1 << 1);
1027         break;
1028     case 25:
1029         adv7511_wr_and_or(sd, 0xfb, 0xf9, 2 << 1);
1030         break;
1031     case 30:
1032         adv7511_wr_and_or(sd, 0xfb, 0xf9, 3 << 1);
1033         break;
1034     default:
1035         adv7511_wr_and_or(sd, 0xfb, 0xf9, 0);
1036         break;
1037     }
1038 
1039     /* update quantization range based on new dv_timings */
1040     adv7511_set_rgb_quantization_mode(sd, state->rgb_quantization_range_ctrl);
1041 
1042     return 0;
1043 }
1044 
1045 static int adv7511_g_dv_timings(struct v4l2_subdev *sd,
1046                 struct v4l2_dv_timings *timings)
1047 {
1048     struct adv7511_state *state = get_adv7511_state(sd);
1049 
1050     v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1051 
1052     if (!timings)
1053         return -EINVAL;
1054 
1055     *timings = state->dv_timings;
1056 
1057     return 0;
1058 }
1059 
1060 static int adv7511_enum_dv_timings(struct v4l2_subdev *sd,
1061                    struct v4l2_enum_dv_timings *timings)
1062 {
1063     if (timings->pad != 0)
1064         return -EINVAL;
1065 
1066     return v4l2_enum_dv_timings_cap(timings, &adv7511_timings_cap, NULL, NULL);
1067 }
1068 
1069 static int adv7511_dv_timings_cap(struct v4l2_subdev *sd,
1070                   struct v4l2_dv_timings_cap *cap)
1071 {
1072     if (cap->pad != 0)
1073         return -EINVAL;
1074 
1075     *cap = adv7511_timings_cap;
1076     return 0;
1077 }
1078 
1079 static const struct v4l2_subdev_video_ops adv7511_video_ops = {
1080     .s_stream = adv7511_s_stream,
1081     .s_dv_timings = adv7511_s_dv_timings,
1082     .g_dv_timings = adv7511_g_dv_timings,
1083 };
1084 
1085 /* ------------------------------ AUDIO OPS ------------------------------ */
1086 static int adv7511_s_audio_stream(struct v4l2_subdev *sd, int enable)
1087 {
1088     v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis"));
1089 
1090     if (enable)
1091         adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x80);
1092     else
1093         adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x40);
1094 
1095     return 0;
1096 }
1097 
1098 static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq)
1099 {
1100     u32 N;
1101 
1102     switch (freq) {
1103     case 32000:  N = 4096;  break;
1104     case 44100:  N = 6272;  break;
1105     case 48000:  N = 6144;  break;
1106     case 88200:  N = 12544; break;
1107     case 96000:  N = 12288; break;
1108     case 176400: N = 25088; break;
1109     case 192000: N = 24576; break;
1110     default:
1111         return -EINVAL;
1112     }
1113 
1114     /* Set N (used with CTS to regenerate the audio clock) */
1115     adv7511_wr(sd, 0x01, (N >> 16) & 0xf);
1116     adv7511_wr(sd, 0x02, (N >> 8) & 0xff);
1117     adv7511_wr(sd, 0x03, N & 0xff);
1118 
1119     return 0;
1120 }
1121 
1122 static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq)
1123 {
1124     u32 i2s_sf;
1125 
1126     switch (freq) {
1127     case 32000:  i2s_sf = 0x30; break;
1128     case 44100:  i2s_sf = 0x00; break;
1129     case 48000:  i2s_sf = 0x20; break;
1130     case 88200:  i2s_sf = 0x80; break;
1131     case 96000:  i2s_sf = 0xa0; break;
1132     case 176400: i2s_sf = 0xc0; break;
1133     case 192000: i2s_sf = 0xe0; break;
1134     default:
1135         return -EINVAL;
1136     }
1137 
1138     /* Set sampling frequency for I2S audio to 48 kHz */
1139     adv7511_wr_and_or(sd, 0x15, 0xf, i2s_sf);
1140 
1141     return 0;
1142 }
1143 
1144 static int adv7511_s_routing(struct v4l2_subdev *sd, u32 input, u32 output, u32 config)
1145 {
1146     /* Only 2 channels in use for application */
1147     adv7511_wr_and_or(sd, 0x73, 0xf8, 0x1);
1148     /* Speaker mapping */
1149     adv7511_wr(sd, 0x76, 0x00);
1150 
1151     /* 16 bit audio word length */
1152     adv7511_wr_and_or(sd, 0x14, 0xf0, 0x02);
1153 
1154     return 0;
1155 }
1156 
1157 static const struct v4l2_subdev_audio_ops adv7511_audio_ops = {
1158     .s_stream = adv7511_s_audio_stream,
1159     .s_clock_freq = adv7511_s_clock_freq,
1160     .s_i2s_clock_freq = adv7511_s_i2s_clock_freq,
1161     .s_routing = adv7511_s_routing,
1162 };
1163 
1164 /* ---------------------------- PAD OPS ------------------------------------- */
1165 
1166 static int adv7511_get_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid)
1167 {
1168     struct adv7511_state *state = get_adv7511_state(sd);
1169 
1170     memset(edid->reserved, 0, sizeof(edid->reserved));
1171 
1172     if (edid->pad != 0)
1173         return -EINVAL;
1174 
1175     if (edid->start_block == 0 && edid->blocks == 0) {
1176         edid->blocks = state->edid.blocks;
1177         return 0;
1178     }
1179 
1180     if (state->edid.blocks == 0)
1181         return -ENODATA;
1182 
1183     if (edid->start_block >= state->edid.blocks)
1184         return -EINVAL;
1185 
1186     if (edid->start_block + edid->blocks > state->edid.blocks)
1187         edid->blocks = state->edid.blocks - edid->start_block;
1188 
1189     memcpy(edid->edid, &state->edid.data[edid->start_block * 128],
1190            128 * edid->blocks);
1191 
1192     return 0;
1193 }
1194 
1195 static int adv7511_enum_mbus_code(struct v4l2_subdev *sd,
1196                   struct v4l2_subdev_state *sd_state,
1197                   struct v4l2_subdev_mbus_code_enum *code)
1198 {
1199     if (code->pad != 0)
1200         return -EINVAL;
1201 
1202     switch (code->index) {
1203     case 0:
1204         code->code = MEDIA_BUS_FMT_RGB888_1X24;
1205         break;
1206     case 1:
1207         code->code = MEDIA_BUS_FMT_YUYV8_1X16;
1208         break;
1209     case 2:
1210         code->code = MEDIA_BUS_FMT_UYVY8_1X16;
1211         break;
1212     default:
1213         return -EINVAL;
1214     }
1215     return 0;
1216 }
1217 
1218 static void adv7511_fill_format(struct adv7511_state *state,
1219                 struct v4l2_mbus_framefmt *format)
1220 {
1221     format->width = state->dv_timings.bt.width;
1222     format->height = state->dv_timings.bt.height;
1223     format->field = V4L2_FIELD_NONE;
1224 }
1225 
1226 static int adv7511_get_fmt(struct v4l2_subdev *sd,
1227                struct v4l2_subdev_state *sd_state,
1228                struct v4l2_subdev_format *format)
1229 {
1230     struct adv7511_state *state = get_adv7511_state(sd);
1231 
1232     if (format->pad != 0)
1233         return -EINVAL;
1234 
1235     memset(&format->format, 0, sizeof(format->format));
1236     adv7511_fill_format(state, &format->format);
1237 
1238     if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
1239         struct v4l2_mbus_framefmt *fmt;
1240 
1241         fmt = v4l2_subdev_get_try_format(sd, sd_state, format->pad);
1242         format->format.code = fmt->code;
1243         format->format.colorspace = fmt->colorspace;
1244         format->format.ycbcr_enc = fmt->ycbcr_enc;
1245         format->format.quantization = fmt->quantization;
1246         format->format.xfer_func = fmt->xfer_func;
1247     } else {
1248         format->format.code = state->fmt_code;
1249         format->format.colorspace = state->colorspace;
1250         format->format.ycbcr_enc = state->ycbcr_enc;
1251         format->format.quantization = state->quantization;
1252         format->format.xfer_func = state->xfer_func;
1253     }
1254 
1255     return 0;
1256 }
1257 
1258 static int adv7511_set_fmt(struct v4l2_subdev *sd,
1259                struct v4l2_subdev_state *sd_state,
1260                struct v4l2_subdev_format *format)
1261 {
1262     struct adv7511_state *state = get_adv7511_state(sd);
1263     /*
1264      * Bitfield namings come the CEA-861-F standard, table 8 "Auxiliary
1265      * Video Information (AVI) InfoFrame Format"
1266      *
1267      * c = Colorimetry
1268      * ec = Extended Colorimetry
1269      * y = RGB or YCbCr
1270      * q = RGB Quantization Range
1271      * yq = YCC Quantization Range
1272      */
1273     u8 c = HDMI_COLORIMETRY_NONE;
1274     u8 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
1275     u8 y = HDMI_COLORSPACE_RGB;
1276     u8 q = HDMI_QUANTIZATION_RANGE_DEFAULT;
1277     u8 yq = HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
1278     u8 itc = state->content_type != V4L2_DV_IT_CONTENT_TYPE_NO_ITC;
1279     u8 cn = itc ? state->content_type : V4L2_DV_IT_CONTENT_TYPE_GRAPHICS;
1280 
1281     if (format->pad != 0)
1282         return -EINVAL;
1283     switch (format->format.code) {
1284     case MEDIA_BUS_FMT_UYVY8_1X16:
1285     case MEDIA_BUS_FMT_YUYV8_1X16:
1286     case MEDIA_BUS_FMT_RGB888_1X24:
1287         break;
1288     default:
1289         return -EINVAL;
1290     }
1291 
1292     adv7511_fill_format(state, &format->format);
1293     if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
1294         struct v4l2_mbus_framefmt *fmt;
1295 
1296         fmt = v4l2_subdev_get_try_format(sd, sd_state, format->pad);
1297         fmt->code = format->format.code;
1298         fmt->colorspace = format->format.colorspace;
1299         fmt->ycbcr_enc = format->format.ycbcr_enc;
1300         fmt->quantization = format->format.quantization;
1301         fmt->xfer_func = format->format.xfer_func;
1302         return 0;
1303     }
1304 
1305     switch (format->format.code) {
1306     case MEDIA_BUS_FMT_UYVY8_1X16:
1307         adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01);
1308         adv7511_wr_and_or(sd, 0x16, 0x03, 0xb8);
1309         y = HDMI_COLORSPACE_YUV422;
1310         break;
1311     case MEDIA_BUS_FMT_YUYV8_1X16:
1312         adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01);
1313         adv7511_wr_and_or(sd, 0x16, 0x03, 0xbc);
1314         y = HDMI_COLORSPACE_YUV422;
1315         break;
1316     case MEDIA_BUS_FMT_RGB888_1X24:
1317     default:
1318         adv7511_wr_and_or(sd, 0x15, 0xf0, 0x00);
1319         adv7511_wr_and_or(sd, 0x16, 0x03, 0x00);
1320         break;
1321     }
1322     state->fmt_code = format->format.code;
1323     state->colorspace = format->format.colorspace;
1324     state->ycbcr_enc = format->format.ycbcr_enc;
1325     state->quantization = format->format.quantization;
1326     state->xfer_func = format->format.xfer_func;
1327 
1328     switch (format->format.colorspace) {
1329     case V4L2_COLORSPACE_OPRGB:
1330         c = HDMI_COLORIMETRY_EXTENDED;
1331         ec = y ? HDMI_EXTENDED_COLORIMETRY_OPYCC_601 :
1332              HDMI_EXTENDED_COLORIMETRY_OPRGB;
1333         break;
1334     case V4L2_COLORSPACE_SMPTE170M:
1335         c = y ? HDMI_COLORIMETRY_ITU_601 : HDMI_COLORIMETRY_NONE;
1336         if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_XV601) {
1337             c = HDMI_COLORIMETRY_EXTENDED;
1338             ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
1339         }
1340         break;
1341     case V4L2_COLORSPACE_REC709:
1342         c = y ? HDMI_COLORIMETRY_ITU_709 : HDMI_COLORIMETRY_NONE;
1343         if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_XV709) {
1344             c = HDMI_COLORIMETRY_EXTENDED;
1345             ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_709;
1346         }
1347         break;
1348     case V4L2_COLORSPACE_SRGB:
1349         c = y ? HDMI_COLORIMETRY_EXTENDED : HDMI_COLORIMETRY_NONE;
1350         ec = y ? HDMI_EXTENDED_COLORIMETRY_S_YCC_601 :
1351              HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
1352         break;
1353     case V4L2_COLORSPACE_BT2020:
1354         c = HDMI_COLORIMETRY_EXTENDED;
1355         if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_BT2020_CONST_LUM)
1356             ec = 5; /* Not yet available in hdmi.h */
1357         else
1358             ec = 6; /* Not yet available in hdmi.h */
1359         break;
1360     default:
1361         break;
1362     }
1363 
1364     /*
1365      * CEA-861-F says that for RGB formats the YCC range must match the
1366      * RGB range, although sources should ignore the YCC range.
1367      *
1368      * The RGB quantization range shouldn't be non-zero if the EDID doesn't
1369      * have the Q bit set in the Video Capabilities Data Block, however this
1370      * isn't checked at the moment. The assumption is that the application
1371      * knows the EDID and can detect this.
1372      *
1373      * The same is true for the YCC quantization range: non-standard YCC
1374      * quantization ranges should only be sent if the EDID has the YQ bit
1375      * set in the Video Capabilities Data Block.
1376      */
1377     switch (format->format.quantization) {
1378     case V4L2_QUANTIZATION_FULL_RANGE:
1379         q = y ? HDMI_QUANTIZATION_RANGE_DEFAULT :
1380             HDMI_QUANTIZATION_RANGE_FULL;
1381         yq = q ? q - 1 : HDMI_YCC_QUANTIZATION_RANGE_FULL;
1382         break;
1383     case V4L2_QUANTIZATION_LIM_RANGE:
1384         q = y ? HDMI_QUANTIZATION_RANGE_DEFAULT :
1385             HDMI_QUANTIZATION_RANGE_LIMITED;
1386         yq = q ? q - 1 : HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
1387         break;
1388     }
1389 
1390     adv7511_wr_and_or(sd, 0x4a, 0xbf, 0);
1391     adv7511_wr_and_or(sd, 0x55, 0x9f, y << 5);
1392     adv7511_wr_and_or(sd, 0x56, 0x3f, c << 6);
1393     adv7511_wr_and_or(sd, 0x57, 0x83, (ec << 4) | (q << 2) | (itc << 7));
1394     adv7511_wr_and_or(sd, 0x59, 0x0f, (yq << 6) | (cn << 4));
1395     adv7511_wr_and_or(sd, 0x4a, 0xff, 1);
1396     adv7511_set_rgb_quantization_mode(sd, state->rgb_quantization_range_ctrl);
1397 
1398     return 0;
1399 }
1400 
1401 static const struct v4l2_subdev_pad_ops adv7511_pad_ops = {
1402     .get_edid = adv7511_get_edid,
1403     .enum_mbus_code = adv7511_enum_mbus_code,
1404     .get_fmt = adv7511_get_fmt,
1405     .set_fmt = adv7511_set_fmt,
1406     .enum_dv_timings = adv7511_enum_dv_timings,
1407     .dv_timings_cap = adv7511_dv_timings_cap,
1408 };
1409 
1410 /* --------------------- SUBDEV OPS --------------------------------------- */
1411 
1412 static const struct v4l2_subdev_ops adv7511_ops = {
1413     .core  = &adv7511_core_ops,
1414     .pad  = &adv7511_pad_ops,
1415     .video = &adv7511_video_ops,
1416     .audio = &adv7511_audio_ops,
1417 };
1418 
1419 /* ----------------------------------------------------------------------- */
1420 static void adv7511_dbg_dump_edid(int lvl, int debug, struct v4l2_subdev *sd, int segment, u8 *buf)
1421 {
1422     if (debug >= lvl) {
1423         int i, j;
1424         v4l2_dbg(lvl, debug, sd, "edid segment %d\n", segment);
1425         for (i = 0; i < 256; i += 16) {
1426             u8 b[128];
1427             u8 *bp = b;
1428             if (i == 128)
1429                 v4l2_dbg(lvl, debug, sd, "\n");
1430             for (j = i; j < i + 16; j++) {
1431                 sprintf(bp, "0x%02x, ", buf[j]);
1432                 bp += 6;
1433             }
1434             bp[0] = '\0';
1435             v4l2_dbg(lvl, debug, sd, "%s\n", b);
1436         }
1437     }
1438 }
1439 
1440 static void adv7511_notify_no_edid(struct v4l2_subdev *sd)
1441 {
1442     struct adv7511_state *state = get_adv7511_state(sd);
1443     struct adv7511_edid_detect ed;
1444 
1445     /* We failed to read the EDID, so send an event for this. */
1446     ed.present = false;
1447     ed.segment = adv7511_rd(sd, 0xc4);
1448     ed.phys_addr = CEC_PHYS_ADDR_INVALID;
1449     cec_s_phys_addr(state->cec_adap, ed.phys_addr, false);
1450     v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed);
1451     v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, 0x0);
1452 }
1453 
1454 static void adv7511_edid_handler(struct work_struct *work)
1455 {
1456     struct delayed_work *dwork = to_delayed_work(work);
1457     struct adv7511_state *state = container_of(dwork, struct adv7511_state, edid_handler);
1458     struct v4l2_subdev *sd = &state->sd;
1459 
1460     v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1461 
1462     if (adv7511_check_edid_status(sd)) {
1463         /* Return if we received the EDID. */
1464         return;
1465     }
1466 
1467     if (adv7511_have_hotplug(sd)) {
1468         /* We must retry reading the EDID several times, it is possible
1469          * that initially the EDID couldn't be read due to i2c errors
1470          * (DVI connectors are particularly prone to this problem). */
1471         if (state->edid.read_retries) {
1472             state->edid.read_retries--;
1473             v4l2_dbg(1, debug, sd, "%s: edid read failed\n", __func__);
1474             state->have_monitor = false;
1475             adv7511_s_power(sd, false);
1476             adv7511_s_power(sd, true);
1477             queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1478             return;
1479         }
1480     }
1481 
1482     /* We failed to read the EDID, so send an event for this. */
1483     adv7511_notify_no_edid(sd);
1484     v4l2_dbg(1, debug, sd, "%s: no edid found\n", __func__);
1485 }
1486 
1487 static void adv7511_audio_setup(struct v4l2_subdev *sd)
1488 {
1489     v4l2_dbg(1, debug, sd, "%s\n", __func__);
1490 
1491     adv7511_s_i2s_clock_freq(sd, 48000);
1492     adv7511_s_clock_freq(sd, 48000);
1493     adv7511_s_routing(sd, 0, 0, 0);
1494 }
1495 
1496 /* Configure hdmi transmitter. */
1497 static void adv7511_setup(struct v4l2_subdev *sd)
1498 {
1499     struct adv7511_state *state = get_adv7511_state(sd);
1500     v4l2_dbg(1, debug, sd, "%s\n", __func__);
1501 
1502     /* Input format: RGB 4:4:4 */
1503     adv7511_wr_and_or(sd, 0x15, 0xf0, 0x0);
1504     /* Output format: RGB 4:4:4 */
1505     adv7511_wr_and_or(sd, 0x16, 0x7f, 0x0);
1506     /* 1st order interpolation 4:2:2 -> 4:4:4 up conversion, Aspect ratio: 16:9 */
1507     adv7511_wr_and_or(sd, 0x17, 0xf9, 0x06);
1508     /* Disable pixel repetition */
1509     adv7511_wr_and_or(sd, 0x3b, 0x9f, 0x0);
1510     /* Disable CSC */
1511     adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0);
1512     /* Output format: RGB 4:4:4, Active Format Information is valid,
1513      * underscanned */
1514     adv7511_wr_and_or(sd, 0x55, 0x9c, 0x12);
1515     /* AVI Info frame packet enable, Audio Info frame disable */
1516     adv7511_wr_and_or(sd, 0x44, 0xe7, 0x10);
1517     /* Colorimetry, Active format aspect ratio: same as picure. */
1518     adv7511_wr(sd, 0x56, 0xa8);
1519     /* No encryption */
1520     adv7511_wr_and_or(sd, 0xaf, 0xed, 0x0);
1521 
1522     /* Positive clk edge capture for input video clock */
1523     adv7511_wr_and_or(sd, 0xba, 0x1f, 0x60);
1524 
1525     adv7511_audio_setup(sd);
1526 
1527     v4l2_ctrl_handler_setup(&state->hdl);
1528 }
1529 
1530 static void adv7511_notify_monitor_detect(struct v4l2_subdev *sd)
1531 {
1532     struct adv7511_monitor_detect mdt;
1533     struct adv7511_state *state = get_adv7511_state(sd);
1534 
1535     mdt.present = state->have_monitor;
1536     v4l2_subdev_notify(sd, ADV7511_MONITOR_DETECT, (void *)&mdt);
1537 }
1538 
1539 static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd)
1540 {
1541     struct adv7511_state *state = get_adv7511_state(sd);
1542     /* read hotplug and rx-sense state */
1543     u8 status = adv7511_rd(sd, 0x42);
1544 
1545     v4l2_dbg(1, debug, sd, "%s: status: 0x%x%s%s\n",
1546              __func__,
1547              status,
1548              status & MASK_ADV7511_HPD_DETECT ? ", hotplug" : "",
1549              status & MASK_ADV7511_MSEN_DETECT ? ", rx-sense" : "");
1550 
1551     /* update read only ctrls */
1552     v4l2_ctrl_s_ctrl(state->hotplug_ctrl, adv7511_have_hotplug(sd) ? 0x1 : 0x0);
1553     v4l2_ctrl_s_ctrl(state->rx_sense_ctrl, adv7511_have_rx_sense(sd) ? 0x1 : 0x0);
1554 
1555     if ((status & MASK_ADV7511_HPD_DETECT) && ((status & MASK_ADV7511_MSEN_DETECT) || state->edid.segments)) {
1556         v4l2_dbg(1, debug, sd, "%s: hotplug and (rx-sense or edid)\n", __func__);
1557         if (!state->have_monitor) {
1558             v4l2_dbg(1, debug, sd, "%s: monitor detected\n", __func__);
1559             state->have_monitor = true;
1560             adv7511_set_isr(sd, true);
1561             if (!adv7511_s_power(sd, true)) {
1562                 v4l2_dbg(1, debug, sd, "%s: monitor detected, powerup failed\n", __func__);
1563                 return;
1564             }
1565             adv7511_setup(sd);
1566             adv7511_notify_monitor_detect(sd);
1567             state->edid.read_retries = EDID_MAX_RETRIES;
1568             queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1569         }
1570     } else if (status & MASK_ADV7511_HPD_DETECT) {
1571         v4l2_dbg(1, debug, sd, "%s: hotplug detected\n", __func__);
1572         state->edid.read_retries = EDID_MAX_RETRIES;
1573         queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1574     } else if (!(status & MASK_ADV7511_HPD_DETECT)) {
1575         v4l2_dbg(1, debug, sd, "%s: hotplug not detected\n", __func__);
1576         if (state->have_monitor) {
1577             v4l2_dbg(1, debug, sd, "%s: monitor not detected\n", __func__);
1578             state->have_monitor = false;
1579             adv7511_notify_monitor_detect(sd);
1580         }
1581         adv7511_s_power(sd, false);
1582         memset(&state->edid, 0, sizeof(struct adv7511_state_edid));
1583         adv7511_notify_no_edid(sd);
1584     }
1585 }
1586 
1587 static bool edid_block_verify_crc(u8 *edid_block)
1588 {
1589     u8 sum = 0;
1590     int i;
1591 
1592     for (i = 0; i < 128; i++)
1593         sum += edid_block[i];
1594     return sum == 0;
1595 }
1596 
1597 static bool edid_verify_crc(struct v4l2_subdev *sd, u32 segment)
1598 {
1599     struct adv7511_state *state = get_adv7511_state(sd);
1600     u32 blocks = state->edid.blocks;
1601     u8 *data = state->edid.data;
1602 
1603     if (!edid_block_verify_crc(&data[segment * 256]))
1604         return false;
1605     if ((segment + 1) * 2 <= blocks)
1606         return edid_block_verify_crc(&data[segment * 256 + 128]);
1607     return true;
1608 }
1609 
1610 static bool edid_verify_header(struct v4l2_subdev *sd, u32 segment)
1611 {
1612     static const u8 hdmi_header[] = {
1613         0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1614     };
1615     struct adv7511_state *state = get_adv7511_state(sd);
1616     u8 *data = state->edid.data;
1617 
1618     if (segment != 0)
1619         return true;
1620     return !memcmp(data, hdmi_header, sizeof(hdmi_header));
1621 }
1622 
1623 static bool adv7511_check_edid_status(struct v4l2_subdev *sd)
1624 {
1625     struct adv7511_state *state = get_adv7511_state(sd);
1626     u8 edidRdy = adv7511_rd(sd, 0xc5);
1627 
1628     v4l2_dbg(1, debug, sd, "%s: edid ready (retries: %d)\n",
1629              __func__, EDID_MAX_RETRIES - state->edid.read_retries);
1630 
1631     if (state->edid.complete)
1632         return true;
1633 
1634     if (edidRdy & MASK_ADV7511_EDID_RDY) {
1635         int segment = adv7511_rd(sd, 0xc4);
1636         struct adv7511_edid_detect ed;
1637         int err;
1638 
1639         if (segment >= EDID_MAX_SEGM) {
1640             v4l2_err(sd, "edid segment number too big\n");
1641             return false;
1642         }
1643         v4l2_dbg(1, debug, sd, "%s: got segment %d\n", __func__, segment);
1644         err = adv7511_edid_rd(sd, 256, &state->edid.data[segment * 256]);
1645         if (!err) {
1646             adv7511_dbg_dump_edid(2, debug, sd, segment, &state->edid.data[segment * 256]);
1647             if (segment == 0) {
1648                 state->edid.blocks = state->edid.data[0x7e] + 1;
1649                 v4l2_dbg(1, debug, sd, "%s: %d blocks in total\n",
1650                      __func__, state->edid.blocks);
1651             }
1652         }
1653 
1654         if (err || !edid_verify_crc(sd, segment) || !edid_verify_header(sd, segment)) {
1655             /* Couldn't read EDID or EDID is invalid. Force retry! */
1656             if (!err)
1657                 v4l2_err(sd, "%s: edid crc or header error\n", __func__);
1658             state->have_monitor = false;
1659             adv7511_s_power(sd, false);
1660             adv7511_s_power(sd, true);
1661             return false;
1662         }
1663         /* one more segment read ok */
1664         state->edid.segments = segment + 1;
1665         v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, 0x1);
1666         if (((state->edid.data[0x7e] >> 1) + 1) > state->edid.segments) {
1667             /* Request next EDID segment */
1668             v4l2_dbg(1, debug, sd, "%s: request segment %d\n", __func__, state->edid.segments);
1669             adv7511_wr(sd, 0xc9, 0xf);
1670             adv7511_wr(sd, 0xc4, state->edid.segments);
1671             state->edid.read_retries = EDID_MAX_RETRIES;
1672             queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1673             return false;
1674         }
1675 
1676         v4l2_dbg(1, debug, sd, "%s: edid complete with %d segment(s)\n", __func__, state->edid.segments);
1677         state->edid.complete = true;
1678         ed.phys_addr = cec_get_edid_phys_addr(state->edid.data,
1679                               state->edid.segments * 256,
1680                               NULL);
1681         /* report when we have all segments
1682            but report only for segment 0
1683          */
1684         ed.present = true;
1685         ed.segment = 0;
1686         state->edid_detect_counter++;
1687         cec_s_phys_addr(state->cec_adap, ed.phys_addr, false);
1688         v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed);
1689         return ed.present;
1690     }
1691 
1692     return false;
1693 }
1694 
1695 static int adv7511_registered(struct v4l2_subdev *sd)
1696 {
1697     struct adv7511_state *state = get_adv7511_state(sd);
1698     struct i2c_client *client = v4l2_get_subdevdata(sd);
1699     int err;
1700 
1701     err = cec_register_adapter(state->cec_adap, &client->dev);
1702     if (err)
1703         cec_delete_adapter(state->cec_adap);
1704     return err;
1705 }
1706 
1707 static void adv7511_unregistered(struct v4l2_subdev *sd)
1708 {
1709     struct adv7511_state *state = get_adv7511_state(sd);
1710 
1711     cec_unregister_adapter(state->cec_adap);
1712 }
1713 
1714 static const struct v4l2_subdev_internal_ops adv7511_int_ops = {
1715     .registered = adv7511_registered,
1716     .unregistered = adv7511_unregistered,
1717 };
1718 
1719 /* ----------------------------------------------------------------------- */
1720 /* Setup ADV7511 */
1721 static void adv7511_init_setup(struct v4l2_subdev *sd)
1722 {
1723     struct adv7511_state *state = get_adv7511_state(sd);
1724     struct adv7511_state_edid *edid = &state->edid;
1725     u32 cec_clk = state->pdata.cec_clk;
1726     u8 ratio;
1727 
1728     v4l2_dbg(1, debug, sd, "%s\n", __func__);
1729 
1730     /* clear all interrupts */
1731     adv7511_wr(sd, 0x96, 0xff);
1732     adv7511_wr(sd, 0x97, 0xff);
1733     /*
1734      * Stop HPD from resetting a lot of registers.
1735      * It might leave the chip in a partly un-initialized state,
1736      * in particular with regards to hotplug bounces.
1737      */
1738     adv7511_wr_and_or(sd, 0xd6, 0x3f, 0xc0);
1739     memset(edid, 0, sizeof(struct adv7511_state_edid));
1740     state->have_monitor = false;
1741     adv7511_set_isr(sd, false);
1742     adv7511_s_stream(sd, false);
1743     adv7511_s_audio_stream(sd, false);
1744 
1745     if (state->i2c_cec == NULL)
1746         return;
1747 
1748     v4l2_dbg(1, debug, sd, "%s: cec_clk %d\n", __func__, cec_clk);
1749 
1750     /* cec soft reset */
1751     adv7511_cec_write(sd, 0x50, 0x01);
1752     adv7511_cec_write(sd, 0x50, 0x00);
1753 
1754     /* legacy mode */
1755     adv7511_cec_write(sd, 0x4a, 0x00);
1756     adv7511_cec_write(sd, 0x4a, 0x07);
1757 
1758     if (cec_clk % 750000 != 0)
1759         v4l2_err(sd, "%s: cec_clk %d, not multiple of 750 Khz\n",
1760              __func__, cec_clk);
1761 
1762     ratio = (cec_clk / 750000) - 1;
1763     adv7511_cec_write(sd, 0x4e, ratio << 2);
1764 }
1765 
1766 static int adv7511_probe(struct i2c_client *client, const struct i2c_device_id *id)
1767 {
1768     struct adv7511_state *state;
1769     struct adv7511_platform_data *pdata = client->dev.platform_data;
1770     struct v4l2_ctrl_handler *hdl;
1771     struct v4l2_subdev *sd;
1772     u8 chip_id[2];
1773     int err = -EIO;
1774 
1775     /* Check if the adapter supports the needed features */
1776     if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1777         return -EIO;
1778 
1779     state = devm_kzalloc(&client->dev, sizeof(struct adv7511_state), GFP_KERNEL);
1780     if (!state)
1781         return -ENOMEM;
1782 
1783     /* Platform data */
1784     if (!pdata) {
1785         v4l_err(client, "No platform data!\n");
1786         return -ENODEV;
1787     }
1788     memcpy(&state->pdata, pdata, sizeof(state->pdata));
1789     state->fmt_code = MEDIA_BUS_FMT_RGB888_1X24;
1790     state->colorspace = V4L2_COLORSPACE_SRGB;
1791 
1792     sd = &state->sd;
1793 
1794     v4l2_dbg(1, debug, sd, "detecting adv7511 client on address 0x%x\n",
1795              client->addr << 1);
1796 
1797     v4l2_i2c_subdev_init(sd, client, &adv7511_ops);
1798     sd->internal_ops = &adv7511_int_ops;
1799 
1800     hdl = &state->hdl;
1801     v4l2_ctrl_handler_init(hdl, 10);
1802     /* add in ascending ID order */
1803     state->hdmi_mode_ctrl = v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
1804             V4L2_CID_DV_TX_MODE, V4L2_DV_TX_MODE_HDMI,
1805             0, V4L2_DV_TX_MODE_DVI_D);
1806     state->hotplug_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1807             V4L2_CID_DV_TX_HOTPLUG, 0, 1, 0, 0);
1808     state->rx_sense_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1809             V4L2_CID_DV_TX_RXSENSE, 0, 1, 0, 0);
1810     state->have_edid0_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1811             V4L2_CID_DV_TX_EDID_PRESENT, 0, 1, 0, 0);
1812     state->rgb_quantization_range_ctrl =
1813         v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
1814             V4L2_CID_DV_TX_RGB_RANGE, V4L2_DV_RGB_RANGE_FULL,
1815             0, V4L2_DV_RGB_RANGE_AUTO);
1816     state->content_type_ctrl =
1817         v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
1818             V4L2_CID_DV_TX_IT_CONTENT_TYPE, V4L2_DV_IT_CONTENT_TYPE_NO_ITC,
1819             0, V4L2_DV_IT_CONTENT_TYPE_NO_ITC);
1820     sd->ctrl_handler = hdl;
1821     if (hdl->error) {
1822         err = hdl->error;
1823         goto err_hdl;
1824     }
1825     state->pad.flags = MEDIA_PAD_FL_SINK;
1826     sd->entity.function = MEDIA_ENT_F_DV_ENCODER;
1827     err = media_entity_pads_init(&sd->entity, 1, &state->pad);
1828     if (err)
1829         goto err_hdl;
1830 
1831     /* EDID and CEC i2c addr */
1832     state->i2c_edid_addr = state->pdata.i2c_edid << 1;
1833     state->i2c_cec_addr = state->pdata.i2c_cec << 1;
1834     state->i2c_pktmem_addr = state->pdata.i2c_pktmem << 1;
1835 
1836     state->chip_revision = adv7511_rd(sd, 0x0);
1837     chip_id[0] = adv7511_rd(sd, 0xf5);
1838     chip_id[1] = adv7511_rd(sd, 0xf6);
1839     if (chip_id[0] != 0x75 || chip_id[1] != 0x11) {
1840         v4l2_err(sd, "chip_id != 0x7511, read 0x%02x%02x\n", chip_id[0],
1841              chip_id[1]);
1842         err = -EIO;
1843         goto err_entity;
1844     }
1845 
1846     state->i2c_edid = i2c_new_dummy_device(client->adapter,
1847                     state->i2c_edid_addr >> 1);
1848     if (IS_ERR(state->i2c_edid)) {
1849         v4l2_err(sd, "failed to register edid i2c client\n");
1850         err = PTR_ERR(state->i2c_edid);
1851         goto err_entity;
1852     }
1853 
1854     adv7511_wr(sd, 0xe1, state->i2c_cec_addr);
1855     if (state->pdata.cec_clk < 3000000 ||
1856         state->pdata.cec_clk > 100000000) {
1857         v4l2_err(sd, "%s: cec_clk %u outside range, disabling cec\n",
1858                 __func__, state->pdata.cec_clk);
1859         state->pdata.cec_clk = 0;
1860     }
1861 
1862     if (state->pdata.cec_clk) {
1863         state->i2c_cec = i2c_new_dummy_device(client->adapter,
1864                            state->i2c_cec_addr >> 1);
1865         if (IS_ERR(state->i2c_cec)) {
1866             v4l2_err(sd, "failed to register cec i2c client\n");
1867             err = PTR_ERR(state->i2c_cec);
1868             goto err_unreg_edid;
1869         }
1870         adv7511_wr(sd, 0xe2, 0x00); /* power up cec section */
1871     } else {
1872         adv7511_wr(sd, 0xe2, 0x01); /* power down cec section */
1873     }
1874 
1875     state->i2c_pktmem = i2c_new_dummy_device(client->adapter, state->i2c_pktmem_addr >> 1);
1876     if (IS_ERR(state->i2c_pktmem)) {
1877         v4l2_err(sd, "failed to register pktmem i2c client\n");
1878         err = PTR_ERR(state->i2c_pktmem);
1879         goto err_unreg_cec;
1880     }
1881 
1882     state->work_queue = create_singlethread_workqueue(sd->name);
1883     if (state->work_queue == NULL) {
1884         v4l2_err(sd, "could not create workqueue\n");
1885         err = -ENOMEM;
1886         goto err_unreg_pktmem;
1887     }
1888 
1889     INIT_DELAYED_WORK(&state->edid_handler, adv7511_edid_handler);
1890 
1891     adv7511_init_setup(sd);
1892 
1893 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC)
1894     state->cec_adap = cec_allocate_adapter(&adv7511_cec_adap_ops,
1895         state, dev_name(&client->dev), CEC_CAP_DEFAULTS,
1896         ADV7511_MAX_ADDRS);
1897     err = PTR_ERR_OR_ZERO(state->cec_adap);
1898     if (err) {
1899         destroy_workqueue(state->work_queue);
1900         goto err_unreg_pktmem;
1901     }
1902 #endif
1903 
1904     adv7511_set_isr(sd, true);
1905     adv7511_check_monitor_present_status(sd);
1906 
1907     v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
1908               client->addr << 1, client->adapter->name);
1909     return 0;
1910 
1911 err_unreg_pktmem:
1912     i2c_unregister_device(state->i2c_pktmem);
1913 err_unreg_cec:
1914     i2c_unregister_device(state->i2c_cec);
1915 err_unreg_edid:
1916     i2c_unregister_device(state->i2c_edid);
1917 err_entity:
1918     media_entity_cleanup(&sd->entity);
1919 err_hdl:
1920     v4l2_ctrl_handler_free(&state->hdl);
1921     return err;
1922 }
1923 
1924 /* ----------------------------------------------------------------------- */
1925 
1926 static int adv7511_remove(struct i2c_client *client)
1927 {
1928     struct v4l2_subdev *sd = i2c_get_clientdata(client);
1929     struct adv7511_state *state = get_adv7511_state(sd);
1930 
1931     state->chip_revision = -1;
1932 
1933     v4l2_dbg(1, debug, sd, "%s removed @ 0x%x (%s)\n", client->name,
1934          client->addr << 1, client->adapter->name);
1935 
1936     adv7511_set_isr(sd, false);
1937     adv7511_init_setup(sd);
1938     cancel_delayed_work_sync(&state->edid_handler);
1939     i2c_unregister_device(state->i2c_edid);
1940     i2c_unregister_device(state->i2c_cec);
1941     i2c_unregister_device(state->i2c_pktmem);
1942     destroy_workqueue(state->work_queue);
1943     v4l2_device_unregister_subdev(sd);
1944     media_entity_cleanup(&sd->entity);
1945     v4l2_ctrl_handler_free(sd->ctrl_handler);
1946     return 0;
1947 }
1948 
1949 /* ----------------------------------------------------------------------- */
1950 
1951 static const struct i2c_device_id adv7511_id[] = {
1952     { "adv7511-v4l2", 0 },
1953     { }
1954 };
1955 MODULE_DEVICE_TABLE(i2c, adv7511_id);
1956 
1957 static struct i2c_driver adv7511_driver = {
1958     .driver = {
1959         .name = "adv7511-v4l2",
1960     },
1961     .probe = adv7511_probe,
1962     .remove = adv7511_remove,
1963     .id_table = adv7511_id,
1964 };
1965 
1966 module_i2c_driver(adv7511_driver);
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