media/i2c/adv7343.c

0001 /*
0002  * adv7343 - ADV7343 Video Encoder Driver
0003  *
0004  * The encoder hardware does not support SECAM.
0005  *
0006  * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
0007  *
0008  * This program is free software; you can redistribute it and/or
0009  * modify it under the terms of the GNU General Public License as
0010  * published by the Free Software Foundation version 2.
0011  *
0012  * This program is distributed .as is. WITHOUT ANY WARRANTY of any
0013  * kind, whether express or implied; without even the implied warranty
0014  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
0015  * GNU General Public License for more details.
0016  */
0017
0018 #include <linux/kernel.h>
0019 #include <linux/init.h>
0020 #include <linux/ctype.h>
0021 #include <linux/slab.h>
0022 #include <linux/i2c.h>
0023 #include <linux/device.h>
0024 #include <linux/delay.h>
0025 #include <linux/module.h>
0026 #include <linux/videodev2.h>
0027 #include <linux/uaccess.h>
0028 #include <linux/of.h>
0029 #include <linux/of_graph.h>
0030
0031 #include <media/i2c/adv7343.h>
0032 #include <media/v4l2-async.h>
0033 #include <media/v4l2-device.h>
0034 #include <media/v4l2-ctrls.h>
0035
0036 #include "adv7343_regs.h"
0037
0038 MODULE_DESCRIPTION("ADV7343 video encoder driver");
0039 MODULE_LICENSE("GPL");
0040
0041 static int debug;
0042 module_param(debug, int, 0644);
0043 MODULE_PARM_DESC(debug, "Debug level 0-1");
0044
0045 struct adv7343_state {
0046     struct v4l2_subdev sd;
0047     struct v4l2_ctrl_handler hdl;
0048     const struct adv7343_platform_data *pdata;
0049     u8 reg00;
0050     u8 reg01;
0051     u8 reg02;
0052     u8 reg35;
0053     u8 reg80;
0054     u8 reg82;
0055     u32 output;
0056     v4l2_std_id std;
0057 };
0058
0059 static inline struct adv7343_state *to_state(struct v4l2_subdev *sd)
0060 {
0061     return container_of(sd, struct adv7343_state, sd);
0062 }
0063
0064 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
0065 {
0066     return &container_of(ctrl->handler, struct adv7343_state, hdl)->sd;
0067 }
0068
0069 static inline int adv7343_write(struct v4l2_subdev *sd, u8 reg, u8 value)
0070 {
0071     struct i2c_client *client = v4l2_get_subdevdata(sd);
0072
0073     return i2c_smbus_write_byte_data(client, reg, value);
0074 }
0075
0076 static const u8 adv7343_init_reg_val[] = {
0077     ADV7343_SOFT_RESET, ADV7343_SOFT_RESET_DEFAULT,
0078     ADV7343_POWER_MODE_REG, ADV7343_POWER_MODE_REG_DEFAULT,
0079
0080     ADV7343_HD_MODE_REG1, ADV7343_HD_MODE_REG1_DEFAULT,
0081     ADV7343_HD_MODE_REG2, ADV7343_HD_MODE_REG2_DEFAULT,
0082     ADV7343_HD_MODE_REG3, ADV7343_HD_MODE_REG3_DEFAULT,
0083     ADV7343_HD_MODE_REG4, ADV7343_HD_MODE_REG4_DEFAULT,
0084     ADV7343_HD_MODE_REG5, ADV7343_HD_MODE_REG5_DEFAULT,
0085     ADV7343_HD_MODE_REG6, ADV7343_HD_MODE_REG6_DEFAULT,
0086     ADV7343_HD_MODE_REG7, ADV7343_HD_MODE_REG7_DEFAULT,
0087
0088     ADV7343_SD_MODE_REG1, ADV7343_SD_MODE_REG1_DEFAULT,
0089     ADV7343_SD_MODE_REG2, ADV7343_SD_MODE_REG2_DEFAULT,
0090     ADV7343_SD_MODE_REG3, ADV7343_SD_MODE_REG3_DEFAULT,
0091     ADV7343_SD_MODE_REG4, ADV7343_SD_MODE_REG4_DEFAULT,
0092     ADV7343_SD_MODE_REG5, ADV7343_SD_MODE_REG5_DEFAULT,
0093     ADV7343_SD_MODE_REG6, ADV7343_SD_MODE_REG6_DEFAULT,
0094     ADV7343_SD_MODE_REG7, ADV7343_SD_MODE_REG7_DEFAULT,
0095     ADV7343_SD_MODE_REG8, ADV7343_SD_MODE_REG8_DEFAULT,
0096
0097     ADV7343_SD_HUE_REG, ADV7343_SD_HUE_REG_DEFAULT,
0098     ADV7343_SD_CGMS_WSS0, ADV7343_SD_CGMS_WSS0_DEFAULT,
0099     ADV7343_SD_BRIGHTNESS_WSS, ADV7343_SD_BRIGHTNESS_WSS_DEFAULT,
0100 };
0101
0102 /*
0103  *              2^32
0104  * FSC(reg) =  FSC (HZ) * --------
0105  *            27000000
0106  */
0107 static const struct adv7343_std_info stdinfo[] = {
0108     {
0109         /* FSC(Hz) = 3,579,545.45 Hz */
0110         SD_STD_NTSC, 569408542, V4L2_STD_NTSC,
0111     }, {
0112         /* FSC(Hz) = 3,575,611.00 Hz */
0113         SD_STD_PAL_M, 568782678, V4L2_STD_PAL_M,
0114     }, {
0115         /* FSC(Hz) = 3,582,056.00 */
0116         SD_STD_PAL_N, 569807903, V4L2_STD_PAL_Nc,
0117     }, {
0118         /* FSC(Hz) = 4,433,618.75 Hz */
0119         SD_STD_PAL_N, 705268427, V4L2_STD_PAL_N,
0120     }, {
0121         /* FSC(Hz) = 4,433,618.75 Hz */
0122         SD_STD_PAL_BDGHI, 705268427, V4L2_STD_PAL,
0123     }, {
0124         /* FSC(Hz) = 4,433,618.75 Hz */
0125         SD_STD_NTSC, 705268427, V4L2_STD_NTSC_443,
0126     }, {
0127         /* FSC(Hz) = 4,433,618.75 Hz */
0128         SD_STD_PAL_M, 705268427, V4L2_STD_PAL_60,
0129     },
0130 };
0131
0132 static int adv7343_setstd(struct v4l2_subdev *sd, v4l2_std_id std)
0133 {
0134     struct adv7343_state *state = to_state(sd);
0135     struct adv7343_std_info *std_info;
0136     int num_std;
0137     char *fsc_ptr;
0138     u8 reg, val;
0139     int err = 0;
0140     int i = 0;
0141
0142     std_info = (struct adv7343_std_info *)stdinfo;
0143     num_std = ARRAY_SIZE(stdinfo);
0144
0145     for (i = 0; i < num_std; i++) {
0146         if (std_info[i].stdid & std)
0147             break;
0148     }
0149
0150     if (i == num_std) {
0151         v4l2_dbg(1, debug, sd,
0152                 "Invalid std or std is not supported: %llx\n",
0153                         (unsigned long long)std);
0154         return -EINVAL;
0155     }
0156
0157     /* Set the standard */
0158     val = state->reg80 & (~(SD_STD_MASK));
0159     val |= std_info[i].standard_val3;
0160     err = adv7343_write(sd, ADV7343_SD_MODE_REG1, val);
0161     if (err < 0)
0162         goto setstd_exit;
0163
0164     state->reg80 = val;
0165
0166     /* Configure the input mode register */
0167     val = state->reg01 & (~((u8) INPUT_MODE_MASK));
0168     val |= SD_INPUT_MODE;
0169     err = adv7343_write(sd, ADV7343_MODE_SELECT_REG, val);
0170     if (err < 0)
0171         goto setstd_exit;
0172
0173     state->reg01 = val;
0174
0175     /* Program the sub carrier frequency registers */
0176     fsc_ptr = (unsigned char *)&std_info[i].fsc_val;
0177     reg = ADV7343_FSC_REG0;
0178     for (i = 0; i < 4; i++, reg++, fsc_ptr++) {
0179         err = adv7343_write(sd, reg, *fsc_ptr);
0180         if (err < 0)
0181             goto setstd_exit;
0182     }
0183
0184     val = state->reg80;
0185
0186     /* Filter settings */
0187     if (std & (V4L2_STD_NTSC | V4L2_STD_NTSC_443))
0188         val &= 0x03;
0189     else if (std & ~V4L2_STD_SECAM)
0190         val |= 0x04;
0191
0192     err = adv7343_write(sd, ADV7343_SD_MODE_REG1, val);
0193     if (err < 0)
0194         goto setstd_exit;
0195
0196     state->reg80 = val;
0197
0198 setstd_exit:
0199     if (err != 0)
0200         v4l2_err(sd, "Error setting std, write failed\n");
0201
0202     return err;
0203 }
0204
0205 static int adv7343_setoutput(struct v4l2_subdev *sd, u32 output_type)
0206 {
0207     struct adv7343_state *state = to_state(sd);
0208     unsigned char val;
0209     int err = 0;
0210
0211     if (output_type > ADV7343_SVIDEO_ID) {
0212         v4l2_dbg(1, debug, sd,
0213             "Invalid output type or output type not supported:%d\n",
0214                                 output_type);
0215         return -EINVAL;
0216     }
0217
0218     /* Enable Appropriate DAC */
0219     val = state->reg00 & 0x03;
0220
0221     /* configure default configuration */
0222     if (!state->pdata)
0223         if (output_type == ADV7343_COMPOSITE_ID)
0224             val |= ADV7343_COMPOSITE_POWER_VALUE;
0225         else if (output_type == ADV7343_COMPONENT_ID)
0226             val |= ADV7343_COMPONENT_POWER_VALUE;
0227         else
0228             val |= ADV7343_SVIDEO_POWER_VALUE;
0229     else
0230         val = state->pdata->mode_config.sleep_mode << 0 |
0231               state->pdata->mode_config.pll_control << 1 |
0232               state->pdata->mode_config.dac[2] << 2 |
0233               state->pdata->mode_config.dac[1] << 3 |
0234               state->pdata->mode_config.dac[0] << 4 |
0235               state->pdata->mode_config.dac[5] << 5 |
0236               state->pdata->mode_config.dac[4] << 6 |
0237               state->pdata->mode_config.dac[3] << 7;
0238
0239     err = adv7343_write(sd, ADV7343_POWER_MODE_REG, val);
0240     if (err < 0)
0241         goto setoutput_exit;
0242
0243     state->reg00 = val;
0244
0245     /* Enable YUV output */
0246     val = state->reg02 | YUV_OUTPUT_SELECT;
0247     err = adv7343_write(sd, ADV7343_MODE_REG0, val);
0248     if (err < 0)
0249         goto setoutput_exit;
0250
0251     state->reg02 = val;
0252
0253     /* configure SD DAC Output 2 and SD DAC Output 1 bit to zero */
0254     val = state->reg82 & (SD_DAC_1_DI & SD_DAC_2_DI);
0255
0256     if (state->pdata && state->pdata->sd_config.sd_dac_out[0])
0257         val = val | (state->pdata->sd_config.sd_dac_out[0] << 1);
0258     else if (state->pdata && !state->pdata->sd_config.sd_dac_out[0])
0259         val = val & ~(state->pdata->sd_config.sd_dac_out[0] << 1);
0260
0261     if (state->pdata && state->pdata->sd_config.sd_dac_out[1])
0262         val = val | (state->pdata->sd_config.sd_dac_out[1] << 2);
0263     else if (state->pdata && !state->pdata->sd_config.sd_dac_out[1])
0264         val = val & ~(state->pdata->sd_config.sd_dac_out[1] << 2);
0265
0266     err = adv7343_write(sd, ADV7343_SD_MODE_REG2, val);
0267     if (err < 0)
0268         goto setoutput_exit;
0269
0270     state->reg82 = val;
0271
0272     /* configure ED/HD Color DAC Swap and ED/HD RGB Input Enable bit to
0273      * zero */
0274     val = state->reg35 & (HD_RGB_INPUT_DI & HD_DAC_SWAP_DI);
0275     err = adv7343_write(sd, ADV7343_HD_MODE_REG6, val);
0276     if (err < 0)
0277         goto setoutput_exit;
0278
0279     state->reg35 = val;
0280
0281 setoutput_exit:
0282     if (err != 0)
0283         v4l2_err(sd, "Error setting output, write failed\n");
0284
0285     return err;
0286 }
0287
0288 static int adv7343_log_status(struct v4l2_subdev *sd)
0289 {
0290     struct adv7343_state *state = to_state(sd);
0291
0292     v4l2_info(sd, "Standard: %llx\n", (unsigned long long)state->std);
0293     v4l2_info(sd, "Output: %s\n", (state->output == 0) ? "Composite" :
0294             ((state->output == 1) ? "Component" : "S-Video"));
0295     return 0;
0296 }
0297
0298 static int adv7343_s_ctrl(struct v4l2_ctrl *ctrl)
0299 {
0300     struct v4l2_subdev *sd = to_sd(ctrl);
0301
0302     switch (ctrl->id) {
0303     case V4L2_CID_BRIGHTNESS:
0304         return adv7343_write(sd, ADV7343_SD_BRIGHTNESS_WSS,
0305                     ctrl->val);
0306
0307     case V4L2_CID_HUE:
0308         return adv7343_write(sd, ADV7343_SD_HUE_REG, ctrl->val);
0309
0310     case V4L2_CID_GAIN:
0311         return adv7343_write(sd, ADV7343_DAC2_OUTPUT_LEVEL, ctrl->val);
0312     }
0313     return -EINVAL;
0314 }
0315
0316 static const struct v4l2_ctrl_ops adv7343_ctrl_ops = {
0317     .s_ctrl = adv7343_s_ctrl,
0318 };
0319
0320 static const struct v4l2_subdev_core_ops adv7343_core_ops = {
0321     .log_status = adv7343_log_status,
0322 };
0323
0324 static int adv7343_s_std_output(struct v4l2_subdev *sd, v4l2_std_id std)
0325 {
0326     struct adv7343_state *state = to_state(sd);
0327     int err = 0;
0328
0329     if (state->std == std)
0330         return 0;
0331
0332     err = adv7343_setstd(sd, std);
0333     if (!err)
0334         state->std = std;
0335
0336     return err;
0337 }
0338
0339 static int adv7343_s_routing(struct v4l2_subdev *sd,
0340         u32 input, u32 output, u32 config)
0341 {
0342     struct adv7343_state *state = to_state(sd);
0343     int err = 0;
0344
0345     if (state->output == output)
0346         return 0;
0347
0348     err = adv7343_setoutput(sd, output);
0349     if (!err)
0350         state->output = output;
0351
0352     return err;
0353 }
0354
0355 static const struct v4l2_subdev_video_ops adv7343_video_ops = {
0356     .s_std_output   = adv7343_s_std_output,
0357     .s_routing  = adv7343_s_routing,
0358 };
0359
0360 static const struct v4l2_subdev_ops adv7343_ops = {
0361     .core   = &adv7343_core_ops,
0362     .video  = &adv7343_video_ops,
0363 };
0364
0365 static int adv7343_initialize(struct v4l2_subdev *sd)
0366 {
0367     struct adv7343_state *state = to_state(sd);
0368     int err = 0;
0369     int i;
0370
0371     for (i = 0; i < ARRAY_SIZE(adv7343_init_reg_val); i += 2) {
0372
0373         err = adv7343_write(sd, adv7343_init_reg_val[i],
0374                     adv7343_init_reg_val[i+1]);
0375         if (err) {
0376             v4l2_err(sd, "Error initializing\n");
0377             return err;
0378         }
0379     }
0380
0381     /* Configure for default video standard */
0382     err = adv7343_setoutput(sd, state->output);
0383     if (err < 0) {
0384         v4l2_err(sd, "Error setting output during init\n");
0385         return -EINVAL;
0386     }
0387
0388     err = adv7343_setstd(sd, state->std);
0389     if (err < 0) {
0390         v4l2_err(sd, "Error setting std during init\n");
0391         return -EINVAL;
0392     }
0393
0394     return err;
0395 }
0396
0397 static struct adv7343_platform_data *
0398 adv7343_get_pdata(struct i2c_client *client)
0399 {
0400     struct adv7343_platform_data *pdata;
0401     struct device_node *np;
0402
0403     if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node)
0404         return client->dev.platform_data;
0405
0406     np = of_graph_get_next_endpoint(client->dev.of_node, NULL);
0407     if (!np)
0408         return NULL;
0409
0410     pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
0411     if (!pdata)
0412         goto done;
0413
0414     pdata->mode_config.sleep_mode =
0415             of_property_read_bool(np, "adi,power-mode-sleep-mode");
0416
0417     pdata->mode_config.pll_control =
0418             of_property_read_bool(np, "adi,power-mode-pll-ctrl");
0419
0420     of_property_read_u32_array(np, "adi,dac-enable",
0421                    pdata->mode_config.dac, 6);
0422
0423     of_property_read_u32_array(np, "adi,sd-dac-enable",
0424                    pdata->sd_config.sd_dac_out, 2);
0425
0426 done:
0427     of_node_put(np);
0428     return pdata;
0429 }
0430
0431 static int adv7343_probe(struct i2c_client *client)
0432 {
0433     struct adv7343_state *state;
0434     int err;
0435
0436     if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
0437         return -ENODEV;
0438
0439     v4l_info(client, "chip found @ 0x%x (%s)\n",
0440             client->addr << 1, client->adapter->name);
0441
0442     state = devm_kzalloc(&client->dev, sizeof(struct adv7343_state),
0443                  GFP_KERNEL);
0444     if (state == NULL)
0445         return -ENOMEM;
0446
0447     /* Copy board specific information here */
0448     state->pdata = adv7343_get_pdata(client);
0449
0450     state->reg00    = 0x80;
0451     state->reg01    = 0x00;
0452     state->reg02    = 0x20;
0453     state->reg35    = 0x00;
0454     state->reg80    = ADV7343_SD_MODE_REG1_DEFAULT;
0455     state->reg82    = ADV7343_SD_MODE_REG2_DEFAULT;
0456
0457     state->output = ADV7343_COMPOSITE_ID;
0458     state->std = V4L2_STD_NTSC;
0459
0460     v4l2_i2c_subdev_init(&state->sd, client, &adv7343_ops);
0461
0462     v4l2_ctrl_handler_init(&state->hdl, 2);
0463     v4l2_ctrl_new_std(&state->hdl, &adv7343_ctrl_ops,
0464             V4L2_CID_BRIGHTNESS, ADV7343_BRIGHTNESS_MIN,
0465                          ADV7343_BRIGHTNESS_MAX, 1,
0466                          ADV7343_BRIGHTNESS_DEF);
0467     v4l2_ctrl_new_std(&state->hdl, &adv7343_ctrl_ops,
0468             V4L2_CID_HUE, ADV7343_HUE_MIN,
0469                       ADV7343_HUE_MAX, 1,
0470                       ADV7343_HUE_DEF);
0471     v4l2_ctrl_new_std(&state->hdl, &adv7343_ctrl_ops,
0472             V4L2_CID_GAIN, ADV7343_GAIN_MIN,
0473                        ADV7343_GAIN_MAX, 1,
0474                        ADV7343_GAIN_DEF);
0475     state->sd.ctrl_handler = &state->hdl;
0476     if (state->hdl.error) {
0477         err = state->hdl.error;
0478         goto done;
0479     }
0480     v4l2_ctrl_handler_setup(&state->hdl);
0481
0482     err = adv7343_initialize(&state->sd);
0483     if (err)
0484         goto done;
0485
0486     err = v4l2_async_register_subdev(&state->sd);
0487
0488 done:
0489     if (err < 0)
0490         v4l2_ctrl_handler_free(&state->hdl);
0491
0492     return err;
0493 }
0494
0495 static int adv7343_remove(struct i2c_client *client)
0496 {
0497     struct v4l2_subdev *sd = i2c_get_clientdata(client);
0498     struct adv7343_state *state = to_state(sd);
0499
0500     v4l2_async_unregister_subdev(&state->sd);
0501     v4l2_ctrl_handler_free(&state->hdl);
0502
0503     return 0;
0504 }
0505
0506 static const struct i2c_device_id adv7343_id[] = {
0507     {"adv7343", 0},
0508     {},
0509 };
0510
0511 MODULE_DEVICE_TABLE(i2c, adv7343_id);
0512
0513 #if IS_ENABLED(CONFIG_OF)
0514 static const struct of_device_id adv7343_of_match[] = {
0515     {.compatible = "adi,adv7343", },
0516     { /* sentinel */ },
0517 };
0518 MODULE_DEVICE_TABLE(of, adv7343_of_match);
0519 #endif
0520
0521 static struct i2c_driver adv7343_driver = {
0522     .driver = {
0523         .of_match_table = of_match_ptr(adv7343_of_match),
0524         .name   = "adv7343",
0525     },
0526     .probe_new  = adv7343_probe,
0527     .remove     = adv7343_remove,
0528     .id_table   = adv7343_id,
0529 };
0530
0531 module_i2c_driver(adv7343_driver);