media/dvb-frontends/tda10086.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002   /*
0003      Driver for Philips tda10086 DVBS Demodulator
0004
0005      (c) 2006 Andrew de Quincey
0006
0007
0008    */
0009
0010 #include <linux/init.h>
0011 #include <linux/module.h>
0012 #include <linux/device.h>
0013 #include <linux/jiffies.h>
0014 #include <linux/string.h>
0015 #include <linux/slab.h>
0016
0017 #include <media/dvb_frontend.h>
0018 #include "tda10086.h"
0019
0020 #define SACLK 96000000U
0021
0022 struct tda10086_state {
0023     struct i2c_adapter* i2c;
0024     const struct tda10086_config* config;
0025     struct dvb_frontend frontend;
0026
0027     /* private demod data */
0028     u32 frequency;
0029     u32 symbol_rate;
0030     bool has_lock;
0031 };
0032
0033 static int debug;
0034 #define dprintk(args...) \
0035     do { \
0036         if (debug) printk(KERN_DEBUG "tda10086: " args); \
0037     } while (0)
0038
0039 static int tda10086_write_byte(struct tda10086_state *state, int reg, int data)
0040 {
0041     int ret;
0042     u8 b0[] = { reg, data };
0043     struct i2c_msg msg = { .flags = 0, .buf = b0, .len = 2 };
0044
0045     msg.addr = state->config->demod_address;
0046     ret = i2c_transfer(state->i2c, &msg, 1);
0047
0048     if (ret != 1)
0049         dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n",
0050             __func__, reg, data, ret);
0051
0052     return (ret != 1) ? ret : 0;
0053 }
0054
0055 static int tda10086_read_byte(struct tda10086_state *state, int reg)
0056 {
0057     int ret;
0058     u8 b0[] = { reg };
0059     u8 b1[] = { 0 };
0060     struct i2c_msg msg[] = {{ .flags = 0, .buf = b0, .len = 1 },
0061                 { .flags = I2C_M_RD, .buf = b1, .len = 1 }};
0062
0063     msg[0].addr = state->config->demod_address;
0064     msg[1].addr = state->config->demod_address;
0065     ret = i2c_transfer(state->i2c, msg, 2);
0066
0067     if (ret != 2) {
0068         dprintk("%s: error reg=0x%x, ret=%i\n", __func__, reg,
0069             ret);
0070         return ret;
0071     }
0072
0073     return b1[0];
0074 }
0075
0076 static int tda10086_write_mask(struct tda10086_state *state, int reg, int mask, int data)
0077 {
0078     int val;
0079
0080     /* read a byte and check */
0081     val = tda10086_read_byte(state, reg);
0082     if (val < 0)
0083         return val;
0084
0085     /* mask if off */
0086     val = val & ~mask;
0087     val |= data & 0xff;
0088
0089     /* write it out again */
0090     return tda10086_write_byte(state, reg, val);
0091 }
0092
0093 static int tda10086_init(struct dvb_frontend* fe)
0094 {
0095     struct tda10086_state* state = fe->demodulator_priv;
0096     u8 t22k_off = 0x80;
0097
0098     dprintk ("%s\n", __func__);
0099
0100     if (state->config->diseqc_tone)
0101         t22k_off = 0;
0102     /* reset */
0103     tda10086_write_byte(state, 0x00, 0x00);
0104     msleep(10);
0105
0106     /* misc setup */
0107     tda10086_write_byte(state, 0x01, 0x94);
0108     tda10086_write_byte(state, 0x02, 0x35); /* NOTE: TT drivers appear to disable CSWP */
0109     tda10086_write_byte(state, 0x03, 0xe4);
0110     tda10086_write_byte(state, 0x04, 0x43);
0111     tda10086_write_byte(state, 0x0c, 0x0c);
0112     tda10086_write_byte(state, 0x1b, 0xb0); /* noise threshold */
0113     tda10086_write_byte(state, 0x20, 0x89); /* misc */
0114     tda10086_write_byte(state, 0x30, 0x04); /* acquisition period length */
0115     tda10086_write_byte(state, 0x32, 0x00); /* irq off */
0116     tda10086_write_byte(state, 0x31, 0x56); /* setup AFC */
0117
0118     /* setup PLL (this assumes SACLK = 96MHz) */
0119     tda10086_write_byte(state, 0x55, 0x2c); /* misc PLL setup */
0120     if (state->config->xtal_freq == TDA10086_XTAL_16M) {
0121         tda10086_write_byte(state, 0x3a, 0x0b); /* M=12 */
0122         tda10086_write_byte(state, 0x3b, 0x01); /* P=2 */
0123     } else {
0124         tda10086_write_byte(state, 0x3a, 0x17); /* M=24 */
0125         tda10086_write_byte(state, 0x3b, 0x00); /* P=1 */
0126     }
0127     tda10086_write_mask(state, 0x55, 0x20, 0x00); /* powerup PLL */
0128
0129     /* setup TS interface */
0130     tda10086_write_byte(state, 0x11, 0x81);
0131     tda10086_write_byte(state, 0x12, 0x81);
0132     tda10086_write_byte(state, 0x19, 0x40); /* parallel mode A + MSBFIRST */
0133     tda10086_write_byte(state, 0x56, 0x80); /* powerdown WPLL - unused in the mode we use */
0134     tda10086_write_byte(state, 0x57, 0x08); /* bypass WPLL - unused in the mode we use */
0135     tda10086_write_byte(state, 0x10, 0x2a);
0136
0137     /* setup ADC */
0138     tda10086_write_byte(state, 0x58, 0x61); /* ADC setup */
0139     tda10086_write_mask(state, 0x58, 0x01, 0x00); /* powerup ADC */
0140
0141     /* setup AGC */
0142     tda10086_write_byte(state, 0x05, 0x0B);
0143     tda10086_write_byte(state, 0x37, 0x63);
0144     tda10086_write_byte(state, 0x3f, 0x0a); /* NOTE: flydvb varies it */
0145     tda10086_write_byte(state, 0x40, 0x64);
0146     tda10086_write_byte(state, 0x41, 0x4f);
0147     tda10086_write_byte(state, 0x42, 0x43);
0148
0149     /* setup viterbi */
0150     tda10086_write_byte(state, 0x1a, 0x11); /* VBER 10^6, DVB, QPSK */
0151
0152     /* setup carrier recovery */
0153     tda10086_write_byte(state, 0x3d, 0x80);
0154
0155     /* setup SEC */
0156     tda10086_write_byte(state, 0x36, t22k_off); /* all SEC off, 22k tone */
0157     tda10086_write_byte(state, 0x34, (((1<<19) * (22000/1000)) / (SACLK/1000)));
0158     tda10086_write_byte(state, 0x35, (((1<<19) * (22000/1000)) / (SACLK/1000)) >> 8);
0159
0160     return 0;
0161 }
0162
0163 static void tda10086_diseqc_wait(struct tda10086_state *state)
0164 {
0165     unsigned long timeout = jiffies + msecs_to_jiffies(200);
0166     while (!(tda10086_read_byte(state, 0x50) & 0x01)) {
0167         if(time_after(jiffies, timeout)) {
0168             printk("%s: diseqc queue not ready, command may be lost.\n", __func__);
0169             break;
0170         }
0171         msleep(10);
0172     }
0173 }
0174
0175 static int tda10086_set_tone(struct dvb_frontend *fe,
0176                  enum fe_sec_tone_mode tone)
0177 {
0178     struct tda10086_state* state = fe->demodulator_priv;
0179     u8 t22k_off = 0x80;
0180
0181     dprintk ("%s\n", __func__);
0182
0183     if (state->config->diseqc_tone)
0184         t22k_off = 0;
0185
0186     switch (tone) {
0187     case SEC_TONE_OFF:
0188         tda10086_write_byte(state, 0x36, t22k_off);
0189         break;
0190
0191     case SEC_TONE_ON:
0192         tda10086_write_byte(state, 0x36, 0x01 + t22k_off);
0193         break;
0194     }
0195
0196     return 0;
0197 }
0198
0199 static int tda10086_send_master_cmd (struct dvb_frontend* fe,
0200                     struct dvb_diseqc_master_cmd* cmd)
0201 {
0202     struct tda10086_state* state = fe->demodulator_priv;
0203     int i;
0204     u8 oldval;
0205     u8 t22k_off = 0x80;
0206
0207     dprintk ("%s\n", __func__);
0208
0209     if (state->config->diseqc_tone)
0210         t22k_off = 0;
0211
0212     if (cmd->msg_len > 6)
0213         return -EINVAL;
0214     oldval = tda10086_read_byte(state, 0x36);
0215
0216     for(i=0; i< cmd->msg_len; i++) {
0217         tda10086_write_byte(state, 0x48+i, cmd->msg[i]);
0218     }
0219     tda10086_write_byte(state, 0x36, (0x08 + t22k_off)
0220                     | ((cmd->msg_len - 1) << 4));
0221
0222     tda10086_diseqc_wait(state);
0223
0224     tda10086_write_byte(state, 0x36, oldval);
0225
0226     return 0;
0227 }
0228
0229 static int tda10086_send_burst(struct dvb_frontend *fe,
0230                    enum fe_sec_mini_cmd minicmd)
0231 {
0232     struct tda10086_state* state = fe->demodulator_priv;
0233     u8 oldval = tda10086_read_byte(state, 0x36);
0234     u8 t22k_off = 0x80;
0235
0236     dprintk ("%s\n", __func__);
0237
0238     if (state->config->diseqc_tone)
0239         t22k_off = 0;
0240
0241     switch(minicmd) {
0242     case SEC_MINI_A:
0243         tda10086_write_byte(state, 0x36, 0x04 + t22k_off);
0244         break;
0245
0246     case SEC_MINI_B:
0247         tda10086_write_byte(state, 0x36, 0x06 + t22k_off);
0248         break;
0249     }
0250
0251     tda10086_diseqc_wait(state);
0252
0253     tda10086_write_byte(state, 0x36, oldval);
0254
0255     return 0;
0256 }
0257
0258 static int tda10086_set_inversion(struct tda10086_state *state,
0259                   struct dtv_frontend_properties *fe_params)
0260 {
0261     u8 invval = 0x80;
0262
0263     dprintk ("%s %i %i\n", __func__, fe_params->inversion, state->config->invert);
0264
0265     switch(fe_params->inversion) {
0266     case INVERSION_OFF:
0267         if (state->config->invert)
0268             invval = 0x40;
0269         break;
0270     case INVERSION_ON:
0271         if (!state->config->invert)
0272             invval = 0x40;
0273         break;
0274     case INVERSION_AUTO:
0275         invval = 0x00;
0276         break;
0277     }
0278     tda10086_write_mask(state, 0x0c, 0xc0, invval);
0279
0280     return 0;
0281 }
0282
0283 static int tda10086_set_symbol_rate(struct tda10086_state *state,
0284                     struct dtv_frontend_properties *fe_params)
0285 {
0286     u8 dfn = 0;
0287     u8 afs = 0;
0288     u8 byp = 0;
0289     u8 reg37 = 0x43;
0290     u8 reg42 = 0x43;
0291     u64 big;
0292     u32 tmp;
0293     u32 bdr;
0294     u32 bdri;
0295     u32 symbol_rate = fe_params->symbol_rate;
0296
0297     dprintk ("%s %i\n", __func__, symbol_rate);
0298
0299     /* setup the decimation and anti-aliasing filters.. */
0300     if (symbol_rate < SACLK / 10000 * 137) {
0301         dfn=4;
0302         afs=1;
0303     } else if (symbol_rate < SACLK / 10000 * 208) {
0304         dfn=4;
0305         afs=0;
0306     } else if (symbol_rate < SACLK / 10000 * 270) {
0307         dfn=3;
0308         afs=1;
0309     } else if (symbol_rate < SACLK / 10000 * 416) {
0310         dfn=3;
0311         afs=0;
0312     } else if (symbol_rate < SACLK / 10000 * 550) {
0313         dfn=2;
0314         afs=1;
0315     } else if (symbol_rate < SACLK / 10000 * 833) {
0316         dfn=2;
0317         afs=0;
0318     } else if (symbol_rate < SACLK / 10000 * 1100) {
0319         dfn=1;
0320         afs=1;
0321     } else if (symbol_rate < SACLK / 10000 * 1666) {
0322         dfn=1;
0323         afs=0;
0324     } else if (symbol_rate < SACLK / 10000 * 2200) {
0325         dfn=0;
0326         afs=1;
0327     } else if (symbol_rate < SACLK / 10000 * 3333) {
0328         dfn=0;
0329         afs=0;
0330     } else {
0331         reg37 = 0x63;
0332         reg42 = 0x4f;
0333         byp=1;
0334     }
0335
0336     /* calculate BDR */
0337     big = (1ULL<<21) * ((u64) symbol_rate/1000ULL) * (1ULL<<dfn);
0338     big += ((SACLK/1000ULL)-1ULL);
0339     do_div(big, (SACLK/1000ULL));
0340     bdr = big & 0xfffff;
0341
0342     /* calculate BDRI */
0343     tmp = (1<<dfn)*(symbol_rate/1000);
0344     bdri = ((32 * (SACLK/1000)) + (tmp-1)) / tmp;
0345
0346     tda10086_write_byte(state, 0x21, (afs << 7) | dfn);
0347     tda10086_write_mask(state, 0x20, 0x08, byp << 3);
0348     tda10086_write_byte(state, 0x06, bdr);
0349     tda10086_write_byte(state, 0x07, bdr >> 8);
0350     tda10086_write_byte(state, 0x08, bdr >> 16);
0351     tda10086_write_byte(state, 0x09, bdri);
0352     tda10086_write_byte(state, 0x37, reg37);
0353     tda10086_write_byte(state, 0x42, reg42);
0354
0355     return 0;
0356 }
0357
0358 static int tda10086_set_fec(struct tda10086_state *state,
0359                 struct dtv_frontend_properties *fe_params)
0360 {
0361     u8 fecval;
0362
0363     dprintk("%s %i\n", __func__, fe_params->fec_inner);
0364
0365     switch (fe_params->fec_inner) {
0366     case FEC_1_2:
0367         fecval = 0x00;
0368         break;
0369     case FEC_2_3:
0370         fecval = 0x01;
0371         break;
0372     case FEC_3_4:
0373         fecval = 0x02;
0374         break;
0375     case FEC_4_5:
0376         fecval = 0x03;
0377         break;
0378     case FEC_5_6:
0379         fecval = 0x04;
0380         break;
0381     case FEC_6_7:
0382         fecval = 0x05;
0383         break;
0384     case FEC_7_8:
0385         fecval = 0x06;
0386         break;
0387     case FEC_8_9:
0388         fecval = 0x07;
0389         break;
0390     case FEC_AUTO:
0391         fecval = 0x08;
0392         break;
0393     default:
0394         return -1;
0395     }
0396     tda10086_write_byte(state, 0x0d, fecval);
0397
0398     return 0;
0399 }
0400
0401 static int tda10086_set_frontend(struct dvb_frontend *fe)
0402 {
0403     struct dtv_frontend_properties *fe_params = &fe->dtv_property_cache;
0404     struct tda10086_state *state = fe->demodulator_priv;
0405     int ret;
0406     u32 freq = 0;
0407     int freqoff;
0408
0409     dprintk ("%s\n", __func__);
0410
0411     /* modify parameters for tuning */
0412     tda10086_write_byte(state, 0x02, 0x35);
0413     state->has_lock = false;
0414
0415     /* set params */
0416     if (fe->ops.tuner_ops.set_params) {
0417         fe->ops.tuner_ops.set_params(fe);
0418         if (fe->ops.i2c_gate_ctrl)
0419             fe->ops.i2c_gate_ctrl(fe, 0);
0420
0421         if (fe->ops.tuner_ops.get_frequency)
0422             fe->ops.tuner_ops.get_frequency(fe, &freq);
0423         if (fe->ops.i2c_gate_ctrl)
0424             fe->ops.i2c_gate_ctrl(fe, 0);
0425     }
0426
0427     /* calculate the frequency offset (in *Hz* not kHz) */
0428     freqoff = fe_params->frequency - freq;
0429     freqoff = ((1<<16) * freqoff) / (SACLK/1000);
0430     tda10086_write_byte(state, 0x3d, 0x80 | ((freqoff >> 8) & 0x7f));
0431     tda10086_write_byte(state, 0x3e, freqoff);
0432
0433     if ((ret = tda10086_set_inversion(state, fe_params)) < 0)
0434         return ret;
0435     if ((ret = tda10086_set_symbol_rate(state, fe_params)) < 0)
0436         return ret;
0437     if ((ret = tda10086_set_fec(state, fe_params)) < 0)
0438         return ret;
0439
0440     /* soft reset + disable TS output until lock */
0441     tda10086_write_mask(state, 0x10, 0x40, 0x40);
0442     tda10086_write_mask(state, 0x00, 0x01, 0x00);
0443
0444     state->symbol_rate = fe_params->symbol_rate;
0445     state->frequency = fe_params->frequency;
0446     return 0;
0447 }
0448
0449 static int tda10086_get_frontend(struct dvb_frontend *fe,
0450                  struct dtv_frontend_properties *fe_params)
0451 {
0452     struct tda10086_state* state = fe->demodulator_priv;
0453     u8 val;
0454     int tmp;
0455     u64 tmp64;
0456
0457     dprintk ("%s\n", __func__);
0458
0459     /* check for invalid symbol rate */
0460     if (fe_params->symbol_rate < 500000)
0461         return -EINVAL;
0462
0463     /* calculate the updated frequency (note: we convert from Hz->kHz) */
0464     tmp64 = ((u64)tda10086_read_byte(state, 0x52)
0465         | (tda10086_read_byte(state, 0x51) << 8));
0466     if (tmp64 & 0x8000)
0467         tmp64 |= 0xffffffffffff0000ULL;
0468     tmp64 = (tmp64 * (SACLK/1000ULL));
0469     do_div(tmp64, (1ULL<<15) * (1ULL<<1));
0470     fe_params->frequency = (int) state->frequency + (int) tmp64;
0471
0472     /* the inversion */
0473     val = tda10086_read_byte(state, 0x0c);
0474     if (val & 0x80) {
0475         switch(val & 0x40) {
0476         case 0x00:
0477             fe_params->inversion = INVERSION_OFF;
0478             if (state->config->invert)
0479                 fe_params->inversion = INVERSION_ON;
0480             break;
0481         default:
0482             fe_params->inversion = INVERSION_ON;
0483             if (state->config->invert)
0484                 fe_params->inversion = INVERSION_OFF;
0485             break;
0486         }
0487     } else {
0488         tda10086_read_byte(state, 0x0f);
0489         switch(val & 0x02) {
0490         case 0x00:
0491             fe_params->inversion = INVERSION_OFF;
0492             if (state->config->invert)
0493                 fe_params->inversion = INVERSION_ON;
0494             break;
0495         default:
0496             fe_params->inversion = INVERSION_ON;
0497             if (state->config->invert)
0498                 fe_params->inversion = INVERSION_OFF;
0499             break;
0500         }
0501     }
0502
0503     /* calculate the updated symbol rate */
0504     tmp = tda10086_read_byte(state, 0x1d);
0505     if (tmp & 0x80)
0506         tmp |= 0xffffff00;
0507     tmp = (tmp * 480 * (1<<1)) / 128;
0508     tmp = ((state->symbol_rate/1000) * tmp) / (1000000/1000);
0509     fe_params->symbol_rate = state->symbol_rate + tmp;
0510
0511     /* the FEC */
0512     val = (tda10086_read_byte(state, 0x0d) & 0x70) >> 4;
0513     switch(val) {
0514     case 0x00:
0515         fe_params->fec_inner = FEC_1_2;
0516         break;
0517     case 0x01:
0518         fe_params->fec_inner = FEC_2_3;
0519         break;
0520     case 0x02:
0521         fe_params->fec_inner = FEC_3_4;
0522         break;
0523     case 0x03:
0524         fe_params->fec_inner = FEC_4_5;
0525         break;
0526     case 0x04:
0527         fe_params->fec_inner = FEC_5_6;
0528         break;
0529     case 0x05:
0530         fe_params->fec_inner = FEC_6_7;
0531         break;
0532     case 0x06:
0533         fe_params->fec_inner = FEC_7_8;
0534         break;
0535     case 0x07:
0536         fe_params->fec_inner = FEC_8_9;
0537         break;
0538     }
0539
0540     return 0;
0541 }
0542
0543 static int tda10086_read_status(struct dvb_frontend *fe,
0544                 enum fe_status *fe_status)
0545 {
0546     struct tda10086_state* state = fe->demodulator_priv;
0547     u8 val;
0548
0549     dprintk ("%s\n", __func__);
0550
0551     val = tda10086_read_byte(state, 0x0e);
0552     *fe_status = 0;
0553     if (val & 0x01)
0554         *fe_status |= FE_HAS_SIGNAL;
0555     if (val & 0x02)
0556         *fe_status |= FE_HAS_CARRIER;
0557     if (val & 0x04)
0558         *fe_status |= FE_HAS_VITERBI;
0559     if (val & 0x08)
0560         *fe_status |= FE_HAS_SYNC;
0561     if (val & 0x10) {
0562         *fe_status |= FE_HAS_LOCK;
0563         if (!state->has_lock) {
0564             state->has_lock = true;
0565             /* modify parameters for stable reception */
0566             tda10086_write_byte(state, 0x02, 0x00);
0567         }
0568     }
0569
0570     return 0;
0571 }
0572
0573 static int tda10086_read_signal_strength(struct dvb_frontend* fe, u16 * signal)
0574 {
0575     struct tda10086_state* state = fe->demodulator_priv;
0576     u8 _str;
0577
0578     dprintk ("%s\n", __func__);
0579
0580     _str = 0xff - tda10086_read_byte(state, 0x43);
0581     *signal = (_str << 8) | _str;
0582
0583     return 0;
0584 }
0585
0586 static int tda10086_read_snr(struct dvb_frontend* fe, u16 * snr)
0587 {
0588     struct tda10086_state* state = fe->demodulator_priv;
0589     u8 _snr;
0590
0591     dprintk ("%s\n", __func__);
0592
0593     _snr = 0xff - tda10086_read_byte(state, 0x1c);
0594     *snr = (_snr << 8) | _snr;
0595
0596     return 0;
0597 }
0598
0599 static int tda10086_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
0600 {
0601     struct tda10086_state* state = fe->demodulator_priv;
0602
0603     dprintk ("%s\n", __func__);
0604
0605     /* read it */
0606     *ucblocks = tda10086_read_byte(state, 0x18) & 0x7f;
0607
0608     /* reset counter */
0609     tda10086_write_byte(state, 0x18, 0x00);
0610     tda10086_write_byte(state, 0x18, 0x80);
0611
0612     return 0;
0613 }
0614
0615 static int tda10086_read_ber(struct dvb_frontend* fe, u32* ber)
0616 {
0617     struct tda10086_state* state = fe->demodulator_priv;
0618
0619     dprintk ("%s\n", __func__);
0620
0621     /* read it */
0622     *ber = 0;
0623     *ber |= tda10086_read_byte(state, 0x15);
0624     *ber |= tda10086_read_byte(state, 0x16) << 8;
0625     *ber |= (tda10086_read_byte(state, 0x17) & 0xf) << 16;
0626
0627     return 0;
0628 }
0629
0630 static int tda10086_sleep(struct dvb_frontend* fe)
0631 {
0632     struct tda10086_state* state = fe->demodulator_priv;
0633
0634     dprintk ("%s\n", __func__);
0635
0636     tda10086_write_mask(state, 0x00, 0x08, 0x08);
0637
0638     return 0;
0639 }
0640
0641 static int tda10086_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
0642 {
0643     struct tda10086_state* state = fe->demodulator_priv;
0644
0645     dprintk ("%s\n", __func__);
0646
0647     if (enable) {
0648         tda10086_write_mask(state, 0x00, 0x10, 0x10);
0649     } else {
0650         tda10086_write_mask(state, 0x00, 0x10, 0x00);
0651     }
0652
0653     return 0;
0654 }
0655
0656 static int tda10086_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
0657 {
0658     struct dtv_frontend_properties *p = &fe->dtv_property_cache;
0659
0660     if (p->symbol_rate > 20000000) {
0661         fesettings->min_delay_ms = 50;
0662         fesettings->step_size = 2000;
0663         fesettings->max_drift = 8000;
0664     } else if (p->symbol_rate > 12000000) {
0665         fesettings->min_delay_ms = 100;
0666         fesettings->step_size = 1500;
0667         fesettings->max_drift = 9000;
0668     } else if (p->symbol_rate > 8000000) {
0669         fesettings->min_delay_ms = 100;
0670         fesettings->step_size = 1000;
0671         fesettings->max_drift = 8000;
0672     } else if (p->symbol_rate > 4000000) {
0673         fesettings->min_delay_ms = 100;
0674         fesettings->step_size = 500;
0675         fesettings->max_drift = 7000;
0676     } else if (p->symbol_rate > 2000000) {
0677         fesettings->min_delay_ms = 200;
0678         fesettings->step_size = p->symbol_rate / 8000;
0679         fesettings->max_drift = 14 * fesettings->step_size;
0680     } else {
0681         fesettings->min_delay_ms = 200;
0682         fesettings->step_size =  p->symbol_rate / 8000;
0683         fesettings->max_drift = 18 * fesettings->step_size;
0684     }
0685
0686     return 0;
0687 }
0688
0689 static void tda10086_release(struct dvb_frontend* fe)
0690 {
0691     struct tda10086_state *state = fe->demodulator_priv;
0692     tda10086_sleep(fe);
0693     kfree(state);
0694 }
0695
0696 static const struct dvb_frontend_ops tda10086_ops = {
0697     .delsys = { SYS_DVBS },
0698     .info = {
0699         .name     = "Philips TDA10086 DVB-S",
0700         .frequency_min_hz      =  950 * MHz,
0701         .frequency_max_hz      = 2150 * MHz,
0702         .frequency_stepsize_hz =  125 * kHz,
0703         .symbol_rate_min  = 1000000,
0704         .symbol_rate_max  = 45000000,
0705         .caps = FE_CAN_INVERSION_AUTO |
0706             FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
0707             FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
0708             FE_CAN_QPSK
0709     },
0710
0711     .release = tda10086_release,
0712
0713     .init = tda10086_init,
0714     .sleep = tda10086_sleep,
0715     .i2c_gate_ctrl = tda10086_i2c_gate_ctrl,
0716
0717     .set_frontend = tda10086_set_frontend,
0718     .get_frontend = tda10086_get_frontend,
0719     .get_tune_settings = tda10086_get_tune_settings,
0720
0721     .read_status = tda10086_read_status,
0722     .read_ber = tda10086_read_ber,
0723     .read_signal_strength = tda10086_read_signal_strength,
0724     .read_snr = tda10086_read_snr,
0725     .read_ucblocks = tda10086_read_ucblocks,
0726
0727     .diseqc_send_master_cmd = tda10086_send_master_cmd,
0728     .diseqc_send_burst = tda10086_send_burst,
0729     .set_tone = tda10086_set_tone,
0730 };
0731
0732 struct dvb_frontend* tda10086_attach(const struct tda10086_config* config,
0733                      struct i2c_adapter* i2c)
0734 {
0735     struct tda10086_state *state;
0736
0737     dprintk ("%s\n", __func__);
0738
0739     /* allocate memory for the internal state */
0740     state = kzalloc(sizeof(struct tda10086_state), GFP_KERNEL);
0741     if (!state)
0742         return NULL;
0743
0744     /* setup the state */
0745     state->config = config;
0746     state->i2c = i2c;
0747
0748     /* check if the demod is there */
0749     if (tda10086_read_byte(state, 0x1e) != 0xe1) {
0750         kfree(state);
0751         return NULL;
0752     }
0753
0754     /* create dvb_frontend */
0755     memcpy(&state->frontend.ops, &tda10086_ops, sizeof(struct dvb_frontend_ops));
0756     state->frontend.demodulator_priv = state;
0757     return &state->frontend;
0758 }
0759
0760 module_param(debug, int, 0644);
0761 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
0762
0763 MODULE_DESCRIPTION("Philips TDA10086 DVB-S Demodulator");
0764 MODULE_AUTHOR("Andrew de Quincey");
0765 MODULE_LICENSE("GPL");
0766
0767 EXPORT_SYMBOL(tda10086_attach);