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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003     TDA10021  - Single Chip Cable Channel Receiver driver module
0004            used on the Siemens DVB-C cards
0005 
0006     Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
0007     Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
0008            Support for TDA10021
0009 
0010 */
0011 
0012 #include <linux/delay.h>
0013 #include <linux/errno.h>
0014 #include <linux/init.h>
0015 #include <linux/kernel.h>
0016 #include <linux/module.h>
0017 #include <linux/string.h>
0018 #include <linux/slab.h>
0019 
0020 #include <media/dvb_frontend.h>
0021 #include "tda1002x.h"
0022 
0023 
0024 struct tda10021_state {
0025     struct i2c_adapter* i2c;
0026     /* configuration settings */
0027     const struct tda1002x_config* config;
0028     struct dvb_frontend frontend;
0029 
0030     u8 pwm;
0031     u8 reg0;
0032 };
0033 
0034 
0035 #if 0
0036 #define dprintk(x...) printk(x)
0037 #else
0038 #define dprintk(x...)
0039 #endif
0040 
0041 static int verbose;
0042 
0043 #define XIN 57840000UL
0044 
0045 #define FIN (XIN >> 4)
0046 
0047 static int tda10021_inittab_size = 0x40;
0048 static u8 tda10021_inittab[0x40]=
0049 {
0050     0x73, 0x6a, 0x23, 0x0a, 0x02, 0x37, 0x77, 0x1a,
0051     0x37, 0x6a, 0x17, 0x8a, 0x1e, 0x86, 0x43, 0x40,
0052     0xb8, 0x3f, 0xa1, 0x00, 0xcd, 0x01, 0x00, 0xff,
0053     0x11, 0x00, 0x7c, 0x31, 0x30, 0x20, 0x00, 0x00,
0054     0x02, 0x00, 0x00, 0x7d, 0x00, 0x00, 0x00, 0x00,
0055     0x07, 0x00, 0x33, 0x11, 0x0d, 0x95, 0x08, 0x58,
0056     0x00, 0x00, 0x80, 0x00, 0x80, 0xff, 0x00, 0x00,
0057     0x04, 0x2d, 0x2f, 0xff, 0x00, 0x00, 0x00, 0x00,
0058 };
0059 
0060 static int _tda10021_writereg (struct tda10021_state* state, u8 reg, u8 data)
0061 {
0062     u8 buf[] = { reg, data };
0063     struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
0064     int ret;
0065 
0066     ret = i2c_transfer (state->i2c, &msg, 1);
0067     if (ret != 1)
0068         printk("DVB: TDA10021(%d): %s, writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
0069             state->frontend.dvb->num, __func__, reg, data, ret);
0070 
0071     msleep(10);
0072     return (ret != 1) ? -EREMOTEIO : 0;
0073 }
0074 
0075 static u8 tda10021_readreg (struct tda10021_state* state, u8 reg)
0076 {
0077     u8 b0 [] = { reg };
0078     u8 b1 [] = { 0 };
0079     struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
0080                   { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
0081     int ret;
0082 
0083     ret = i2c_transfer (state->i2c, msg, 2);
0084     // Don't print an error message if the id is read.
0085     if (ret != 2 && reg != 0x1a)
0086         printk("DVB: TDA10021: %s: readreg error (ret == %i)\n",
0087                 __func__, ret);
0088     return b1[0];
0089 }
0090 
0091 //get access to tuner
0092 static int lock_tuner(struct tda10021_state* state)
0093 {
0094     u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] | 0x80 };
0095     struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
0096 
0097     if(i2c_transfer(state->i2c, &msg, 1) != 1)
0098     {
0099         printk("tda10021: lock tuner fails\n");
0100         return -EREMOTEIO;
0101     }
0102     return 0;
0103 }
0104 
0105 //release access from tuner
0106 static int unlock_tuner(struct tda10021_state* state)
0107 {
0108     u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] & 0x7f };
0109     struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
0110 
0111     if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
0112     {
0113         printk("tda10021: unlock tuner fails\n");
0114         return -EREMOTEIO;
0115     }
0116     return 0;
0117 }
0118 
0119 static int tda10021_setup_reg0(struct tda10021_state *state, u8 reg0,
0120                    enum fe_spectral_inversion inversion)
0121 {
0122     reg0 |= state->reg0 & 0x63;
0123 
0124     if ((INVERSION_ON == inversion) ^ (state->config->invert == 0))
0125         reg0 &= ~0x20;
0126     else
0127         reg0 |= 0x20;
0128 
0129     _tda10021_writereg (state, 0x00, reg0 & 0xfe);
0130     _tda10021_writereg (state, 0x00, reg0 | 0x01);
0131 
0132     state->reg0 = reg0;
0133     return 0;
0134 }
0135 
0136 static int tda10021_set_symbolrate (struct tda10021_state* state, u32 symbolrate)
0137 {
0138     s32 BDR;
0139     s32 BDRI;
0140     s16 SFIL = 0;
0141     u16 NDEC = 0;
0142     u32 tmp, ratio;
0143 
0144     if (symbolrate > XIN / 2)
0145         symbolrate = XIN / 2;
0146     else if (symbolrate < 500000)
0147         symbolrate = 500000;
0148 
0149     if (symbolrate < XIN / 16)
0150         NDEC = 1;
0151     if (symbolrate < XIN / 32)
0152         NDEC = 2;
0153     if (symbolrate < XIN / 64)
0154         NDEC = 3;
0155 
0156     if (symbolrate < XIN * 10 / 123)
0157         SFIL = 1;
0158     if (symbolrate < XIN * 10 / 160)
0159         SFIL = 0;
0160     if (symbolrate < XIN * 10 / 246)
0161         SFIL = 1;
0162     if (symbolrate < XIN * 10 / 320)
0163         SFIL = 0;
0164     if (symbolrate < XIN * 10 / 492)
0165         SFIL = 1;
0166     if (symbolrate < XIN * 10 / 640)
0167         SFIL = 0;
0168     if (symbolrate < XIN * 10 / 984)
0169         SFIL = 1;
0170 
0171     symbolrate <<= NDEC;
0172     ratio = (symbolrate << 4) / FIN;
0173     tmp =  ((symbolrate << 4) % FIN) << 8;
0174     ratio = (ratio << 8) + tmp / FIN;
0175     tmp = (tmp % FIN) << 8;
0176     ratio = (ratio << 8) + DIV_ROUND_CLOSEST(tmp, FIN);
0177 
0178     BDR = ratio;
0179     BDRI = (((XIN << 5) / symbolrate) + 1) / 2;
0180 
0181     if (BDRI > 0xFF)
0182         BDRI = 0xFF;
0183 
0184     SFIL = (SFIL << 4) | tda10021_inittab[0x0E];
0185 
0186     NDEC = (NDEC << 6) | tda10021_inittab[0x03];
0187 
0188     _tda10021_writereg (state, 0x03, NDEC);
0189     _tda10021_writereg (state, 0x0a, BDR&0xff);
0190     _tda10021_writereg (state, 0x0b, (BDR>> 8)&0xff);
0191     _tda10021_writereg (state, 0x0c, (BDR>>16)&0x3f);
0192 
0193     _tda10021_writereg (state, 0x0d, BDRI);
0194     _tda10021_writereg (state, 0x0e, SFIL);
0195 
0196     return 0;
0197 }
0198 
0199 static int tda10021_init (struct dvb_frontend *fe)
0200 {
0201     struct tda10021_state* state = fe->demodulator_priv;
0202     int i;
0203 
0204     dprintk("DVB: TDA10021(%d): init chip\n", fe->adapter->num);
0205 
0206     //_tda10021_writereg (fe, 0, 0);
0207 
0208     for (i=0; i<tda10021_inittab_size; i++)
0209         _tda10021_writereg (state, i, tda10021_inittab[i]);
0210 
0211     _tda10021_writereg (state, 0x34, state->pwm);
0212 
0213     //Comment by markus
0214     //0x2A[3-0] == PDIV -> P multiplaying factor (P=PDIV+1)(default 0)
0215     //0x2A[4] == BYPPLL -> Power down mode (default 1)
0216     //0x2A[5] == LCK -> PLL Lock Flag
0217     //0x2A[6] == POLAXIN -> Polarity of the input reference clock (default 0)
0218 
0219     //Activate PLL
0220     _tda10021_writereg(state, 0x2a, tda10021_inittab[0x2a] & 0xef);
0221     return 0;
0222 }
0223 
0224 struct qam_params {
0225     u8 conf, agcref, lthr, mseth, aref;
0226 };
0227 
0228 static int tda10021_set_parameters(struct dvb_frontend *fe)
0229 {
0230     struct dtv_frontend_properties *c = &fe->dtv_property_cache;
0231     u32 delsys  = c->delivery_system;
0232     unsigned qam = c->modulation;
0233     bool is_annex_c;
0234     u32 reg0x3d;
0235     struct tda10021_state* state = fe->demodulator_priv;
0236     static const struct qam_params qam_params[] = {
0237         /* Modulation  Conf  AGCref  LTHR  MSETH  AREF */
0238         [QPSK]     = { 0x14, 0x78,   0x78, 0x8c,  0x96 },
0239         [QAM_16]   = { 0x00, 0x8c,   0x87, 0xa2,  0x91 },
0240         [QAM_32]   = { 0x04, 0x8c,   0x64, 0x74,  0x96 },
0241         [QAM_64]   = { 0x08, 0x6a,   0x46, 0x43,  0x6a },
0242         [QAM_128]  = { 0x0c, 0x78,   0x36, 0x34,  0x7e },
0243         [QAM_256]  = { 0x10, 0x5c,   0x26, 0x23,  0x6b },
0244     };
0245 
0246     switch (delsys) {
0247     case SYS_DVBC_ANNEX_A:
0248         is_annex_c = false;
0249         break;
0250     case SYS_DVBC_ANNEX_C:
0251         is_annex_c = true;
0252         break;
0253     default:
0254         return -EINVAL;
0255     }
0256 
0257     /*
0258      * gcc optimizes the code below the same way as it would code:
0259      *           "if (qam > 5) return -EINVAL;"
0260      * Yet, the code is clearer, as it shows what QAM standards are
0261      * supported by the driver, and avoids the usage of magic numbers on
0262      * it.
0263      */
0264     switch (qam) {
0265     case QPSK:
0266     case QAM_16:
0267     case QAM_32:
0268     case QAM_64:
0269     case QAM_128:
0270     case QAM_256:
0271         break;
0272     default:
0273         return -EINVAL;
0274     }
0275 
0276     if (c->inversion != INVERSION_ON && c->inversion != INVERSION_OFF)
0277         return -EINVAL;
0278 
0279     /*printk("tda10021: set frequency to %d qam=%d symrate=%d\n", p->frequency,qam,p->symbol_rate);*/
0280 
0281     if (fe->ops.tuner_ops.set_params) {
0282         fe->ops.tuner_ops.set_params(fe);
0283         if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
0284     }
0285 
0286     tda10021_set_symbolrate(state, c->symbol_rate);
0287     _tda10021_writereg(state, 0x34, state->pwm);
0288 
0289     _tda10021_writereg(state, 0x01, qam_params[qam].agcref);
0290     _tda10021_writereg(state, 0x05, qam_params[qam].lthr);
0291     _tda10021_writereg(state, 0x08, qam_params[qam].mseth);
0292     _tda10021_writereg(state, 0x09, qam_params[qam].aref);
0293 
0294     /*
0295      * Bit 0 == 0 means roll-off = 0.15 (Annex A)
0296      *   == 1 means roll-off = 0.13 (Annex C)
0297      */
0298     reg0x3d = tda10021_readreg (state, 0x3d);
0299     if (is_annex_c)
0300         _tda10021_writereg (state, 0x3d, 0x01 | reg0x3d);
0301     else
0302         _tda10021_writereg (state, 0x3d, 0xfe & reg0x3d);
0303     tda10021_setup_reg0(state, qam_params[qam].conf, c->inversion);
0304 
0305     return 0;
0306 }
0307 
0308 static int tda10021_read_status(struct dvb_frontend *fe,
0309                 enum fe_status *status)
0310 {
0311     struct tda10021_state* state = fe->demodulator_priv;
0312     int sync;
0313 
0314     *status = 0;
0315     //0x11[0] == EQALGO -> Equalizer algorithms state
0316     //0x11[1] == CARLOCK -> Carrier locked
0317     //0x11[2] == FSYNC -> Frame synchronisation
0318     //0x11[3] == FEL -> Front End locked
0319     //0x11[6] == NODVB -> DVB Mode Information
0320     sync = tda10021_readreg (state, 0x11);
0321 
0322     if (sync & 2)
0323         *status |= FE_HAS_SIGNAL|FE_HAS_CARRIER;
0324 
0325     if (sync & 4)
0326         *status |= FE_HAS_SYNC|FE_HAS_VITERBI;
0327 
0328     if (sync & 8)
0329         *status |= FE_HAS_LOCK;
0330 
0331     return 0;
0332 }
0333 
0334 static int tda10021_read_ber(struct dvb_frontend* fe, u32* ber)
0335 {
0336     struct tda10021_state* state = fe->demodulator_priv;
0337 
0338     u32 _ber = tda10021_readreg(state, 0x14) |
0339         (tda10021_readreg(state, 0x15) << 8) |
0340         ((tda10021_readreg(state, 0x16) & 0x0f) << 16);
0341     _tda10021_writereg(state, 0x10, (tda10021_readreg(state, 0x10) & ~0xc0)
0342                     | (tda10021_inittab[0x10] & 0xc0));
0343     *ber = 10 * _ber;
0344 
0345     return 0;
0346 }
0347 
0348 static int tda10021_read_signal_strength(struct dvb_frontend* fe, u16* strength)
0349 {
0350     struct tda10021_state* state = fe->demodulator_priv;
0351 
0352     u8 config = tda10021_readreg(state, 0x02);
0353     u8 gain = tda10021_readreg(state, 0x17);
0354     if (config & 0x02)
0355         /* the agc value is inverted */
0356         gain = ~gain;
0357     *strength = (gain << 8) | gain;
0358 
0359     return 0;
0360 }
0361 
0362 static int tda10021_read_snr(struct dvb_frontend* fe, u16* snr)
0363 {
0364     struct tda10021_state* state = fe->demodulator_priv;
0365 
0366     u8 quality = ~tda10021_readreg(state, 0x18);
0367     *snr = (quality << 8) | quality;
0368 
0369     return 0;
0370 }
0371 
0372 static int tda10021_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
0373 {
0374     struct tda10021_state* state = fe->demodulator_priv;
0375 
0376     *ucblocks = tda10021_readreg (state, 0x13) & 0x7f;
0377     if (*ucblocks == 0x7f)
0378         *ucblocks = 0xffffffff;
0379 
0380     /* reset uncorrected block counter */
0381     _tda10021_writereg (state, 0x10, tda10021_inittab[0x10] & 0xdf);
0382     _tda10021_writereg (state, 0x10, tda10021_inittab[0x10]);
0383 
0384     return 0;
0385 }
0386 
0387 static int tda10021_get_frontend(struct dvb_frontend *fe,
0388                  struct dtv_frontend_properties *p)
0389 {
0390     struct tda10021_state* state = fe->demodulator_priv;
0391     int sync;
0392     s8 afc = 0;
0393 
0394     sync = tda10021_readreg(state, 0x11);
0395     afc = tda10021_readreg(state, 0x19);
0396     if (verbose) {
0397         /* AFC only valid when carrier has been recovered */
0398         printk(sync & 2 ? "DVB: TDA10021(%d): AFC (%d) %dHz\n" :
0399                   "DVB: TDA10021(%d): [AFC (%d) %dHz]\n",
0400             state->frontend.dvb->num, afc,
0401                -((s32)p->symbol_rate * afc) >> 10);
0402     }
0403 
0404     p->inversion = ((state->reg0 & 0x20) == 0x20) ^ (state->config->invert != 0) ? INVERSION_ON : INVERSION_OFF;
0405     p->modulation = ((state->reg0 >> 2) & 7) + QAM_16;
0406 
0407     p->fec_inner = FEC_NONE;
0408     p->frequency = ((p->frequency + 31250) / 62500) * 62500;
0409 
0410     if (sync & 2)
0411         p->frequency -= ((s32)p->symbol_rate * afc) >> 10;
0412 
0413     return 0;
0414 }
0415 
0416 static int tda10021_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
0417 {
0418     struct tda10021_state* state = fe->demodulator_priv;
0419 
0420     if (enable) {
0421         lock_tuner(state);
0422     } else {
0423         unlock_tuner(state);
0424     }
0425     return 0;
0426 }
0427 
0428 static int tda10021_sleep(struct dvb_frontend* fe)
0429 {
0430     struct tda10021_state* state = fe->demodulator_priv;
0431 
0432     _tda10021_writereg (state, 0x1b, 0x02);  /* pdown ADC */
0433     _tda10021_writereg (state, 0x00, 0x80);  /* standby */
0434 
0435     return 0;
0436 }
0437 
0438 static void tda10021_release(struct dvb_frontend* fe)
0439 {
0440     struct tda10021_state* state = fe->demodulator_priv;
0441     kfree(state);
0442 }
0443 
0444 static const struct dvb_frontend_ops tda10021_ops;
0445 
0446 struct dvb_frontend* tda10021_attach(const struct tda1002x_config* config,
0447                      struct i2c_adapter* i2c,
0448                      u8 pwm)
0449 {
0450     struct tda10021_state* state = NULL;
0451     u8 id;
0452 
0453     /* allocate memory for the internal state */
0454     state = kzalloc(sizeof(struct tda10021_state), GFP_KERNEL);
0455     if (state == NULL) goto error;
0456 
0457     /* setup the state */
0458     state->config = config;
0459     state->i2c = i2c;
0460     state->pwm = pwm;
0461     state->reg0 = tda10021_inittab[0];
0462 
0463     /* check if the demod is there */
0464     id = tda10021_readreg(state, 0x1a);
0465     if ((id & 0xf0) != 0x70) goto error;
0466 
0467     /* Don't claim TDA10023 */
0468     if (id == 0x7d)
0469         goto error;
0470 
0471     printk("TDA10021: i2c-addr = 0x%02x, id = 0x%02x\n",
0472            state->config->demod_address, id);
0473 
0474     /* create dvb_frontend */
0475     memcpy(&state->frontend.ops, &tda10021_ops, sizeof(struct dvb_frontend_ops));
0476     state->frontend.demodulator_priv = state;
0477     return &state->frontend;
0478 
0479 error:
0480     kfree(state);
0481     return NULL;
0482 }
0483 
0484 static const struct dvb_frontend_ops tda10021_ops = {
0485     .delsys = { SYS_DVBC_ANNEX_A, SYS_DVBC_ANNEX_C },
0486     .info = {
0487         .name = "Philips TDA10021 DVB-C",
0488         .frequency_min_hz =  47 * MHz,
0489         .frequency_max_hz = 862 * MHz,
0490         .frequency_stepsize_hz = 62500,
0491         .symbol_rate_min = (XIN / 2) / 64,     /* SACLK/64 == (XIN/2)/64 */
0492         .symbol_rate_max = (XIN / 2) / 4,      /* SACLK/4 */
0493     #if 0
0494         .frequency_tolerance = ???,
0495         .symbol_rate_tolerance = ???,  /* ppm */  /* == 8% (spec p. 5) */
0496     #endif
0497         .caps = 0x400 | //FE_CAN_QAM_4
0498             FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
0499             FE_CAN_QAM_128 | FE_CAN_QAM_256 |
0500             FE_CAN_FEC_AUTO
0501     },
0502 
0503     .release = tda10021_release,
0504 
0505     .init = tda10021_init,
0506     .sleep = tda10021_sleep,
0507     .i2c_gate_ctrl = tda10021_i2c_gate_ctrl,
0508 
0509     .set_frontend = tda10021_set_parameters,
0510     .get_frontend = tda10021_get_frontend,
0511 
0512     .read_status = tda10021_read_status,
0513     .read_ber = tda10021_read_ber,
0514     .read_signal_strength = tda10021_read_signal_strength,
0515     .read_snr = tda10021_read_snr,
0516     .read_ucblocks = tda10021_read_ucblocks,
0517 };
0518 
0519 module_param(verbose, int, 0644);
0520 MODULE_PARM_DESC(verbose, "print AFC offset after tuning for debugging the PWM setting");
0521 
0522 MODULE_DESCRIPTION("Philips TDA10021 DVB-C demodulator driver");
0523 MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Markus Schulz");
0524 MODULE_LICENSE("GPL");
0525 
0526 EXPORT_SYMBOL(tda10021_attach);
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