media/dvb-frontends/stv0367_priv.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * stv0367_priv.h
0004  *
0005  * Driver for ST STV0367 DVB-T & DVB-C demodulator IC.
0006  *
0007  * Copyright (C) ST Microelectronics.
0008  * Copyright (C) 2010,2011 NetUP Inc.
0009  * Copyright (C) 2010,2011 Igor M. Liplianin <liplianin@netup.ru>
0010  */
0011 /* Common driver error constants */
0012
0013 #ifndef STV0367_PRIV_H
0014 #define STV0367_PRIV_H
0015
0016 #ifndef TRUE
0017     #define TRUE (1 == 1)
0018 #endif
0019 #ifndef FALSE
0020     #define FALSE (!TRUE)
0021 #endif
0022
0023 #ifndef NULL
0024 #define NULL 0
0025 #endif
0026
0027 /* MACRO definitions */
0028 #define MAX(X, Y) ((X) >= (Y) ? (X) : (Y))
0029 #define MIN(X, Y) ((X) <= (Y) ? (X) : (Y))
0030 #define INRANGE(X, Y, Z) \
0031     ((((X) <= (Y)) && ((Y) <= (Z))) || \
0032     (((Z) <= (Y)) && ((Y) <= (X))) ? 1 : 0)
0033
0034 #ifndef MAKEWORD
0035 #define MAKEWORD(X, Y) (((X) << 8) + (Y))
0036 #endif
0037
0038 #define LSB(X) (((X) & 0xff))
0039 #define MSB(Y) (((Y) >> 8) & 0xff)
0040 #define MMSB(Y)(((Y) >> 16) & 0xff)
0041
0042 enum stv0367_ter_signal_type {
0043     FE_TER_NOAGC = 0,
0044     FE_TER_AGCOK = 5,
0045     FE_TER_NOTPS = 6,
0046     FE_TER_TPSOK = 7,
0047     FE_TER_NOSYMBOL = 8,
0048     FE_TER_BAD_CPQ = 9,
0049     FE_TER_PRFOUNDOK = 10,
0050     FE_TER_NOPRFOUND = 11,
0051     FE_TER_LOCKOK = 12,
0052     FE_TER_NOLOCK = 13,
0053     FE_TER_SYMBOLOK = 15,
0054     FE_TER_CPAMPOK = 16,
0055     FE_TER_NOCPAMP = 17,
0056     FE_TER_SWNOK = 18
0057 };
0058
0059 enum stv0367_ts_mode {
0060     STV0367_OUTPUTMODE_DEFAULT,
0061     STV0367_SERIAL_PUNCT_CLOCK,
0062     STV0367_SERIAL_CONT_CLOCK,
0063     STV0367_PARALLEL_PUNCT_CLOCK,
0064     STV0367_DVBCI_CLOCK
0065 };
0066
0067 enum stv0367_clk_pol {
0068     STV0367_CLOCKPOLARITY_DEFAULT,
0069     STV0367_RISINGEDGE_CLOCK,
0070     STV0367_FALLINGEDGE_CLOCK
0071 };
0072
0073 enum stv0367_ter_bw {
0074     FE_TER_CHAN_BW_6M = 6,
0075     FE_TER_CHAN_BW_7M = 7,
0076     FE_TER_CHAN_BW_8M = 8
0077 };
0078
0079 #if 0
0080 enum FE_TER_Rate_TPS {
0081     FE_TER_TPS_1_2 = 0,
0082     FE_TER_TPS_2_3 = 1,
0083     FE_TER_TPS_3_4 = 2,
0084     FE_TER_TPS_5_6 = 3,
0085     FE_TER_TPS_7_8 = 4
0086 };
0087 #endif
0088
0089 enum stv0367_ter_mode {
0090     FE_TER_MODE_2K,
0091     FE_TER_MODE_8K,
0092     FE_TER_MODE_4K
0093 };
0094 #if 0
0095 enum FE_TER_Hierarchy_Alpha {
0096     FE_TER_HIER_ALPHA_NONE, /* Regular modulation */
0097     FE_TER_HIER_ALPHA_1,    /* Hierarchical modulation a = 1*/
0098     FE_TER_HIER_ALPHA_2,    /* Hierarchical modulation a = 2*/
0099     FE_TER_HIER_ALPHA_4 /* Hierarchical modulation a = 4*/
0100 };
0101 #endif
0102 enum stv0367_ter_hierarchy {
0103     FE_TER_HIER_NONE,   /*Hierarchy None*/
0104     FE_TER_HIER_LOW_PRIO,   /*Hierarchy : Low Priority*/
0105     FE_TER_HIER_HIGH_PRIO,  /*Hierarchy : High Priority*/
0106     FE_TER_HIER_PRIO_ANY    /*Hierarchy  :Any*/
0107 };
0108
0109 #if 0
0110 enum fe_stv0367_ter_spec {
0111     FE_TER_INVERSION_NONE = 0,
0112     FE_TER_INVERSION = 1,
0113     FE_TER_INVERSION_AUTO = 2,
0114     FE_TER_INVERSION_UNK  = 4
0115 };
0116 #endif
0117
0118 enum stv0367_ter_if_iq_mode {
0119     FE_TER_NORMAL_IF_TUNER = 0,
0120     FE_TER_LONGPATH_IF_TUNER = 1,
0121     FE_TER_IQ_TUNER = 2
0122
0123 };
0124
0125 #if 0
0126 enum FE_TER_FECRate {
0127     FE_TER_FEC_NONE = 0x00, /* no FEC rate specified */
0128     FE_TER_FEC_ALL = 0xFF,   /* Logical OR of all FECs */
0129     FE_TER_FEC_1_2 = 1,
0130     FE_TER_FEC_2_3 = (1 << 1),
0131     FE_TER_FEC_3_4 = (1 << 2),
0132     FE_TER_FEC_4_5 = (1 << 3),
0133     FE_TER_FEC_5_6 = (1 << 4),
0134     FE_TER_FEC_6_7 = (1 << 5),
0135     FE_TER_FEC_7_8 = (1 << 6),
0136     FE_TER_FEC_8_9 = (1 << 7)
0137 };
0138
0139 enum FE_TER_Rate {
0140     FE_TER_FE_1_2 = 0,
0141     FE_TER_FE_2_3 = 1,
0142     FE_TER_FE_3_4 = 2,
0143     FE_TER_FE_5_6 = 3,
0144     FE_TER_FE_6_7 = 4,
0145     FE_TER_FE_7_8 = 5
0146 };
0147 #endif
0148
0149 enum stv0367_ter_force {
0150     FE_TER_FORCENONE = 0,
0151     FE_TER_FORCE_M_G = 1
0152 };
0153
0154 enum  stv0367cab_mod {
0155     FE_CAB_MOD_QAM4,
0156     FE_CAB_MOD_QAM16,
0157     FE_CAB_MOD_QAM32,
0158     FE_CAB_MOD_QAM64,
0159     FE_CAB_MOD_QAM128,
0160     FE_CAB_MOD_QAM256,
0161     FE_CAB_MOD_QAM512,
0162     FE_CAB_MOD_QAM1024
0163 };
0164 #if 0
0165 enum {
0166     FE_CAB_FEC_A = 1,   /* J83 Annex A */
0167     FE_CAB_FEC_B = (1 << 1),/* J83 Annex B */
0168     FE_CAB_FEC_C = (1 << 2) /* J83 Annex C */
0169 } FE_CAB_FECType_t;
0170 #endif
0171 struct stv0367_cab_signal_info {
0172     int locked;
0173     u32 frequency; /* kHz */
0174     u32 symbol_rate; /* Mbds */
0175     enum stv0367cab_mod modulation;
0176     enum fe_spectral_inversion spect_inv;
0177     s32 Power_dBmx10;   /* Power of the RF signal (dBm x 10) */
0178     u32 CN_dBx10;   /* Carrier to noise ratio (dB x 10) */
0179     u32 BER;        /* Bit error rate (x 10000000)  */
0180 };
0181
0182 enum stv0367_cab_signal_type {
0183     FE_CAB_NOTUNER,
0184     FE_CAB_NOAGC,
0185     FE_CAB_NOSIGNAL,
0186     FE_CAB_NOTIMING,
0187     FE_CAB_TIMINGOK,
0188     FE_CAB_NOCARRIER,
0189     FE_CAB_CARRIEROK,
0190     FE_CAB_NOBLIND,
0191     FE_CAB_BLINDOK,
0192     FE_CAB_NODEMOD,
0193     FE_CAB_DEMODOK,
0194     FE_CAB_DATAOK
0195 };
0196
0197 #endif