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0033 #include <linux/init.h>
0034 #include <linux/kernel.h>
0035 #include <linux/ktime.h>
0036 #include <linux/module.h>
0037 #include <linux/string.h>
0038 #include <linux/slab.h>
0039 #include <linux/jiffies.h>
0040 #include <asm/div64.h>
0041
0042 #include <media/dvb_frontend.h>
0043 #include "stv0299.h"
0044
0045 struct stv0299_state {
0046 struct i2c_adapter* i2c;
0047 const struct stv0299_config* config;
0048 struct dvb_frontend frontend;
0049
0050 u8 initialised:1;
0051 u32 tuner_frequency;
0052 u32 symbol_rate;
0053 enum fe_code_rate fec_inner;
0054 int errmode;
0055 u32 ucblocks;
0056 u8 mcr_reg;
0057 };
0058
0059 #define STATUS_BER 0
0060 #define STATUS_UCBLOCKS 1
0061
0062 static int debug;
0063 static int debug_legacy_dish_switch;
0064 #define dprintk(args...) \
0065 do { \
0066 if (debug) printk(KERN_DEBUG "stv0299: " args); \
0067 } while (0)
0068
0069
0070 static int stv0299_writeregI (struct stv0299_state* state, u8 reg, u8 data)
0071 {
0072 int ret;
0073 u8 buf [] = { reg, data };
0074 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
0075
0076 ret = i2c_transfer (state->i2c, &msg, 1);
0077
0078 if (ret != 1)
0079 dprintk("%s: writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
0080 __func__, reg, data, ret);
0081
0082 return (ret != 1) ? -EREMOTEIO : 0;
0083 }
0084
0085 static int stv0299_write(struct dvb_frontend* fe, const u8 buf[], int len)
0086 {
0087 struct stv0299_state* state = fe->demodulator_priv;
0088
0089 if (len != 2)
0090 return -EINVAL;
0091
0092 return stv0299_writeregI(state, buf[0], buf[1]);
0093 }
0094
0095 static u8 stv0299_readreg (struct stv0299_state* state, u8 reg)
0096 {
0097 int ret;
0098 u8 b0 [] = { reg };
0099 u8 b1 [] = { 0 };
0100 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
0101 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
0102
0103 ret = i2c_transfer (state->i2c, msg, 2);
0104
0105 if (ret != 2)
0106 dprintk("%s: readreg error (reg == 0x%02x, ret == %i)\n",
0107 __func__, reg, ret);
0108
0109 return b1[0];
0110 }
0111
0112 static int stv0299_readregs (struct stv0299_state* state, u8 reg1, u8 *b, u8 len)
0113 {
0114 int ret;
0115 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = ®1, .len = 1 },
0116 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b, .len = len } };
0117
0118 ret = i2c_transfer (state->i2c, msg, 2);
0119
0120 if (ret != 2)
0121 dprintk("%s: readreg error (ret == %i)\n", __func__, ret);
0122
0123 return ret == 2 ? 0 : ret;
0124 }
0125
0126 static int stv0299_set_FEC(struct stv0299_state *state, enum fe_code_rate fec)
0127 {
0128 dprintk ("%s\n", __func__);
0129
0130 switch (fec) {
0131 case FEC_AUTO:
0132 {
0133 return stv0299_writeregI (state, 0x31, 0x1f);
0134 }
0135 case FEC_1_2:
0136 {
0137 return stv0299_writeregI (state, 0x31, 0x01);
0138 }
0139 case FEC_2_3:
0140 {
0141 return stv0299_writeregI (state, 0x31, 0x02);
0142 }
0143 case FEC_3_4:
0144 {
0145 return stv0299_writeregI (state, 0x31, 0x04);
0146 }
0147 case FEC_5_6:
0148 {
0149 return stv0299_writeregI (state, 0x31, 0x08);
0150 }
0151 case FEC_7_8:
0152 {
0153 return stv0299_writeregI (state, 0x31, 0x10);
0154 }
0155 default:
0156 {
0157 return -EINVAL;
0158 }
0159 }
0160 }
0161
0162 static enum fe_code_rate stv0299_get_fec(struct stv0299_state *state)
0163 {
0164 static const enum fe_code_rate fec_tab[] = {
0165 FEC_2_3, FEC_3_4, FEC_5_6, FEC_7_8, FEC_1_2
0166 };
0167 u8 index;
0168
0169 dprintk ("%s\n", __func__);
0170
0171 index = stv0299_readreg (state, 0x1b);
0172 index &= 0x7;
0173
0174 if (index > 4)
0175 return FEC_AUTO;
0176
0177 return fec_tab [index];
0178 }
0179
0180 static int stv0299_wait_diseqc_fifo (struct stv0299_state* state, int timeout)
0181 {
0182 unsigned long start = jiffies;
0183
0184 dprintk ("%s\n", __func__);
0185
0186 while (stv0299_readreg(state, 0x0a) & 1) {
0187 if (time_is_before_jiffies(start + timeout)) {
0188 dprintk ("%s: timeout!!\n", __func__);
0189 return -ETIMEDOUT;
0190 }
0191 msleep(10);
0192 }
0193
0194 return 0;
0195 }
0196
0197 static int stv0299_wait_diseqc_idle (struct stv0299_state* state, int timeout)
0198 {
0199 unsigned long start = jiffies;
0200
0201 dprintk ("%s\n", __func__);
0202
0203 while ((stv0299_readreg(state, 0x0a) & 3) != 2 ) {
0204 if (time_is_before_jiffies(start + timeout)) {
0205 dprintk ("%s: timeout!!\n", __func__);
0206 return -ETIMEDOUT;
0207 }
0208 msleep(10);
0209 }
0210
0211 return 0;
0212 }
0213
0214 static int stv0299_set_symbolrate (struct dvb_frontend* fe, u32 srate)
0215 {
0216 struct stv0299_state* state = fe->demodulator_priv;
0217 u64 big = srate;
0218 u32 ratio;
0219
0220
0221 if ((srate < 1000000) || (srate > 45000000)) return -EINVAL;
0222
0223
0224 big = big << 20;
0225 big += (state->config->mclk-1);
0226 do_div(big, state->config->mclk);
0227 ratio = big << 4;
0228
0229 return state->config->set_symbol_rate(fe, srate, ratio);
0230 }
0231
0232 static int stv0299_get_symbolrate (struct stv0299_state* state)
0233 {
0234 u32 Mclk = state->config->mclk / 4096L;
0235 u32 srate;
0236 s32 offset;
0237 u8 sfr[3];
0238 s8 rtf;
0239
0240 dprintk ("%s\n", __func__);
0241
0242 stv0299_readregs (state, 0x1f, sfr, 3);
0243 stv0299_readregs (state, 0x1a, (u8 *)&rtf, 1);
0244
0245 srate = (sfr[0] << 8) | sfr[1];
0246 srate *= Mclk;
0247 srate /= 16;
0248 srate += (sfr[2] >> 4) * Mclk / 256;
0249 offset = (s32) rtf * (srate / 4096L);
0250 offset /= 128;
0251
0252 dprintk ("%s : srate = %i\n", __func__, srate);
0253 dprintk ("%s : ofset = %i\n", __func__, offset);
0254
0255 srate += offset;
0256
0257 srate += 1000;
0258 srate /= 2000;
0259 srate *= 2000;
0260
0261 return srate;
0262 }
0263
0264 static int stv0299_send_diseqc_msg (struct dvb_frontend* fe,
0265 struct dvb_diseqc_master_cmd *m)
0266 {
0267 struct stv0299_state* state = fe->demodulator_priv;
0268 u8 val;
0269 int i;
0270
0271 dprintk ("%s\n", __func__);
0272
0273 if (stv0299_wait_diseqc_idle (state, 100) < 0)
0274 return -ETIMEDOUT;
0275
0276 val = stv0299_readreg (state, 0x08);
0277
0278 if (stv0299_writeregI (state, 0x08, (val & ~0x7) | 0x6))
0279 return -EREMOTEIO;
0280
0281 for (i=0; i<m->msg_len; i++) {
0282 if (stv0299_wait_diseqc_fifo (state, 100) < 0)
0283 return -ETIMEDOUT;
0284
0285 if (stv0299_writeregI (state, 0x09, m->msg[i]))
0286 return -EREMOTEIO;
0287 }
0288
0289 if (stv0299_wait_diseqc_idle (state, 100) < 0)
0290 return -ETIMEDOUT;
0291
0292 return 0;
0293 }
0294
0295 static int stv0299_send_diseqc_burst(struct dvb_frontend *fe,
0296 enum fe_sec_mini_cmd burst)
0297 {
0298 struct stv0299_state* state = fe->demodulator_priv;
0299 u8 val;
0300
0301 dprintk ("%s\n", __func__);
0302
0303 if (stv0299_wait_diseqc_idle (state, 100) < 0)
0304 return -ETIMEDOUT;
0305
0306 val = stv0299_readreg (state, 0x08);
0307
0308 if (stv0299_writeregI (state, 0x08, (val & ~0x7) | 0x2))
0309 return -EREMOTEIO;
0310
0311 if (stv0299_writeregI (state, 0x09, burst == SEC_MINI_A ? 0x00 : 0xff))
0312 return -EREMOTEIO;
0313
0314 if (stv0299_wait_diseqc_idle (state, 100) < 0)
0315 return -ETIMEDOUT;
0316
0317 if (stv0299_writeregI (state, 0x08, val))
0318 return -EREMOTEIO;
0319
0320 return 0;
0321 }
0322
0323 static int stv0299_set_tone(struct dvb_frontend *fe,
0324 enum fe_sec_tone_mode tone)
0325 {
0326 struct stv0299_state* state = fe->demodulator_priv;
0327 u8 val;
0328
0329 if (stv0299_wait_diseqc_idle (state, 100) < 0)
0330 return -ETIMEDOUT;
0331
0332 val = stv0299_readreg (state, 0x08);
0333
0334 switch (tone) {
0335 case SEC_TONE_ON:
0336 return stv0299_writeregI (state, 0x08, val | 0x3);
0337
0338 case SEC_TONE_OFF:
0339 return stv0299_writeregI (state, 0x08, (val & ~0x3) | 0x02);
0340
0341 default:
0342 return -EINVAL;
0343 }
0344 }
0345
0346 static int stv0299_set_voltage(struct dvb_frontend *fe,
0347 enum fe_sec_voltage voltage)
0348 {
0349 struct stv0299_state* state = fe->demodulator_priv;
0350 u8 reg0x08;
0351 u8 reg0x0c;
0352
0353 dprintk("%s: %s\n", __func__,
0354 voltage == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" :
0355 voltage == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" : "??");
0356
0357 reg0x08 = stv0299_readreg (state, 0x08);
0358 reg0x0c = stv0299_readreg (state, 0x0c);
0359
0360
0361
0362
0363 reg0x0c &= 0x0f;
0364 reg0x08 = (reg0x08 & 0x3f) | (state->config->lock_output << 6);
0365
0366 switch (voltage) {
0367 case SEC_VOLTAGE_13:
0368 if (state->config->volt13_op0_op1 == STV0299_VOLT13_OP0)
0369 reg0x0c |= 0x10;
0370 else
0371 reg0x0c |= 0x40;
0372 break;
0373 case SEC_VOLTAGE_18:
0374 reg0x0c |= 0x50;
0375 break;
0376 case SEC_VOLTAGE_OFF:
0377
0378 reg0x08 = 0x00;
0379 reg0x0c = 0x00;
0380 break;
0381 default:
0382 return -EINVAL;
0383 }
0384
0385 if (state->config->op0_off)
0386 reg0x0c &= ~0x10;
0387
0388 stv0299_writeregI(state, 0x08, reg0x08);
0389 return stv0299_writeregI(state, 0x0c, reg0x0c);
0390 }
0391
0392 static int stv0299_send_legacy_dish_cmd (struct dvb_frontend* fe, unsigned long cmd)
0393 {
0394 struct stv0299_state* state = fe->demodulator_priv;
0395 u8 reg0x08;
0396 u8 reg0x0c;
0397 u8 lv_mask = 0x40;
0398 u8 last = 1;
0399 int i;
0400 ktime_t nexttime;
0401 ktime_t tv[10];
0402
0403 reg0x08 = stv0299_readreg (state, 0x08);
0404 reg0x0c = stv0299_readreg (state, 0x0c);
0405 reg0x0c &= 0x0f;
0406 stv0299_writeregI (state, 0x08, (reg0x08 & 0x3f) | (state->config->lock_output << 6));
0407 if (state->config->volt13_op0_op1 == STV0299_VOLT13_OP0)
0408 lv_mask = 0x10;
0409
0410 cmd = cmd << 1;
0411 if (debug_legacy_dish_switch)
0412 printk ("%s switch command: 0x%04lx\n",__func__, cmd);
0413
0414 nexttime = ktime_get_boottime();
0415 if (debug_legacy_dish_switch)
0416 tv[0] = nexttime;
0417 stv0299_writeregI (state, 0x0c, reg0x0c | 0x50);
0418
0419 dvb_frontend_sleep_until(&nexttime, 32000);
0420
0421 for (i=0; i<9; i++) {
0422 if (debug_legacy_dish_switch)
0423 tv[i+1] = ktime_get_boottime();
0424 if((cmd & 0x01) != last) {
0425
0426 stv0299_writeregI (state, 0x0c, reg0x0c | (last ? lv_mask : 0x50));
0427 last = (last) ? 0 : 1;
0428 }
0429
0430 cmd = cmd >> 1;
0431
0432 if (i != 8)
0433 dvb_frontend_sleep_until(&nexttime, 8000);
0434 }
0435 if (debug_legacy_dish_switch) {
0436 printk ("%s(%d): switch delay (should be 32k followed by all 8k\n",
0437 __func__, fe->dvb->num);
0438 for (i = 1; i < 10; i++)
0439 printk("%d: %d\n", i,
0440 (int) ktime_us_delta(tv[i], tv[i-1]));
0441 }
0442
0443 return 0;
0444 }
0445
0446 static int stv0299_init (struct dvb_frontend* fe)
0447 {
0448 struct stv0299_state* state = fe->demodulator_priv;
0449 int i;
0450 u8 reg;
0451 u8 val;
0452
0453 dprintk("stv0299: init chip\n");
0454
0455 stv0299_writeregI(state, 0x02, 0x30 | state->mcr_reg);
0456 msleep(50);
0457
0458 for (i = 0; ; i += 2) {
0459 reg = state->config->inittab[i];
0460 val = state->config->inittab[i+1];
0461 if (reg == 0xff && val == 0xff)
0462 break;
0463 if (reg == 0x0c && state->config->op0_off)
0464 val &= ~0x10;
0465 if (reg == 0x2)
0466 state->mcr_reg = val & 0xf;
0467 stv0299_writeregI(state, reg, val);
0468 }
0469
0470 return 0;
0471 }
0472
0473 static int stv0299_read_status(struct dvb_frontend *fe,
0474 enum fe_status *status)
0475 {
0476 struct stv0299_state* state = fe->demodulator_priv;
0477
0478 u8 signal = 0xff - stv0299_readreg (state, 0x18);
0479 u8 sync = stv0299_readreg (state, 0x1b);
0480
0481 dprintk ("%s : FE_READ_STATUS : VSTATUS: 0x%02x\n", __func__, sync);
0482 *status = 0;
0483
0484 if (signal > 10)
0485 *status |= FE_HAS_SIGNAL;
0486
0487 if (sync & 0x80)
0488 *status |= FE_HAS_CARRIER;
0489
0490 if (sync & 0x10)
0491 *status |= FE_HAS_VITERBI;
0492
0493 if (sync & 0x08)
0494 *status |= FE_HAS_SYNC;
0495
0496 if ((sync & 0x98) == 0x98)
0497 *status |= FE_HAS_LOCK;
0498
0499 return 0;
0500 }
0501
0502 static int stv0299_read_ber(struct dvb_frontend* fe, u32* ber)
0503 {
0504 struct stv0299_state* state = fe->demodulator_priv;
0505
0506 if (state->errmode != STATUS_BER)
0507 return -ENOSYS;
0508
0509 *ber = stv0299_readreg(state, 0x1e) | (stv0299_readreg(state, 0x1d) << 8);
0510
0511 return 0;
0512 }
0513
0514 static int stv0299_read_signal_strength(struct dvb_frontend* fe, u16* strength)
0515 {
0516 struct stv0299_state* state = fe->demodulator_priv;
0517
0518 s32 signal = 0xffff - ((stv0299_readreg (state, 0x18) << 8)
0519 | stv0299_readreg (state, 0x19));
0520
0521 dprintk ("%s : FE_READ_SIGNAL_STRENGTH : AGC2I: 0x%02x%02x, signal=0x%04x\n", __func__,
0522 stv0299_readreg (state, 0x18),
0523 stv0299_readreg (state, 0x19), (int) signal);
0524
0525 signal = signal * 5 / 4;
0526 *strength = (signal > 0xffff) ? 0xffff : (signal < 0) ? 0 : signal;
0527
0528 return 0;
0529 }
0530
0531 static int stv0299_read_snr(struct dvb_frontend* fe, u16* snr)
0532 {
0533 struct stv0299_state* state = fe->demodulator_priv;
0534
0535 s32 xsnr = 0xffff - ((stv0299_readreg (state, 0x24) << 8)
0536 | stv0299_readreg (state, 0x25));
0537 xsnr = 3 * (xsnr - 0xa100);
0538 *snr = (xsnr > 0xffff) ? 0xffff : (xsnr < 0) ? 0 : xsnr;
0539
0540 return 0;
0541 }
0542
0543 static int stv0299_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
0544 {
0545 struct stv0299_state* state = fe->demodulator_priv;
0546
0547 if (state->errmode != STATUS_UCBLOCKS)
0548 return -ENOSYS;
0549
0550 state->ucblocks += stv0299_readreg(state, 0x1e);
0551 state->ucblocks += (stv0299_readreg(state, 0x1d) << 8);
0552 *ucblocks = state->ucblocks;
0553
0554 return 0;
0555 }
0556
0557 static int stv0299_set_frontend(struct dvb_frontend *fe)
0558 {
0559 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
0560 struct stv0299_state* state = fe->demodulator_priv;
0561 int invval = 0;
0562
0563 dprintk ("%s : FE_SET_FRONTEND\n", __func__);
0564 if (state->config->set_ts_params)
0565 state->config->set_ts_params(fe, 0);
0566
0567
0568 if (p->inversion == INVERSION_OFF) invval = 0;
0569 else if (p->inversion == INVERSION_ON) invval = 1;
0570 else {
0571 printk("stv0299 does not support auto-inversion\n");
0572 return -EINVAL;
0573 }
0574 if (state->config->invert) invval = (~invval) & 1;
0575 stv0299_writeregI(state, 0x0c, (stv0299_readreg(state, 0x0c) & 0xfe) | invval);
0576
0577 if (fe->ops.tuner_ops.set_params) {
0578 fe->ops.tuner_ops.set_params(fe);
0579 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
0580 }
0581
0582 stv0299_set_FEC(state, p->fec_inner);
0583 stv0299_set_symbolrate(fe, p->symbol_rate);
0584 stv0299_writeregI(state, 0x22, 0x00);
0585 stv0299_writeregI(state, 0x23, 0x00);
0586
0587 state->tuner_frequency = p->frequency;
0588 state->fec_inner = p->fec_inner;
0589 state->symbol_rate = p->symbol_rate;
0590
0591 return 0;
0592 }
0593
0594 static int stv0299_get_frontend(struct dvb_frontend *fe,
0595 struct dtv_frontend_properties *p)
0596 {
0597 struct stv0299_state* state = fe->demodulator_priv;
0598 s32 derot_freq;
0599 int invval;
0600
0601 derot_freq = (s32)(s16) ((stv0299_readreg (state, 0x22) << 8)
0602 | stv0299_readreg (state, 0x23));
0603
0604 derot_freq *= (state->config->mclk >> 16);
0605 derot_freq += 500;
0606 derot_freq /= 1000;
0607
0608 p->frequency += derot_freq;
0609
0610 invval = stv0299_readreg (state, 0x0c) & 1;
0611 if (state->config->invert) invval = (~invval) & 1;
0612 p->inversion = invval ? INVERSION_ON : INVERSION_OFF;
0613
0614 p->fec_inner = stv0299_get_fec(state);
0615 p->symbol_rate = stv0299_get_symbolrate(state);
0616
0617 return 0;
0618 }
0619
0620 static int stv0299_sleep(struct dvb_frontend* fe)
0621 {
0622 struct stv0299_state* state = fe->demodulator_priv;
0623
0624 stv0299_writeregI(state, 0x02, 0xb0 | state->mcr_reg);
0625 state->initialised = 0;
0626
0627 return 0;
0628 }
0629
0630 static int stv0299_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
0631 {
0632 struct stv0299_state* state = fe->demodulator_priv;
0633
0634 if (enable) {
0635 stv0299_writeregI(state, 0x05, 0xb5);
0636 } else {
0637 stv0299_writeregI(state, 0x05, 0x35);
0638 }
0639 udelay(1);
0640 return 0;
0641 }
0642
0643 static int stv0299_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
0644 {
0645 struct stv0299_state* state = fe->demodulator_priv;
0646 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
0647
0648 fesettings->min_delay_ms = state->config->min_delay_ms;
0649 if (p->symbol_rate < 10000000) {
0650 fesettings->step_size = p->symbol_rate / 32000;
0651 fesettings->max_drift = 5000;
0652 } else {
0653 fesettings->step_size = p->symbol_rate / 16000;
0654 fesettings->max_drift = p->symbol_rate / 2000;
0655 }
0656 return 0;
0657 }
0658
0659 static void stv0299_release(struct dvb_frontend* fe)
0660 {
0661 struct stv0299_state* state = fe->demodulator_priv;
0662 kfree(state);
0663 }
0664
0665 static const struct dvb_frontend_ops stv0299_ops;
0666
0667 struct dvb_frontend* stv0299_attach(const struct stv0299_config* config,
0668 struct i2c_adapter* i2c)
0669 {
0670 struct stv0299_state* state = NULL;
0671 int id;
0672
0673
0674 state = kzalloc(sizeof(struct stv0299_state), GFP_KERNEL);
0675 if (state == NULL) goto error;
0676
0677
0678 state->config = config;
0679 state->i2c = i2c;
0680 state->initialised = 0;
0681 state->tuner_frequency = 0;
0682 state->symbol_rate = 0;
0683 state->fec_inner = 0;
0684 state->errmode = STATUS_BER;
0685
0686
0687 stv0299_writeregI(state, 0x02, 0x30);
0688 msleep(200);
0689 id = stv0299_readreg(state, 0x00);
0690
0691
0692
0693 if (id != 0xa1 && id != 0x80) goto error;
0694
0695
0696 memcpy(&state->frontend.ops, &stv0299_ops, sizeof(struct dvb_frontend_ops));
0697 state->frontend.demodulator_priv = state;
0698 return &state->frontend;
0699
0700 error:
0701 kfree(state);
0702 return NULL;
0703 }
0704
0705 static const struct dvb_frontend_ops stv0299_ops = {
0706 .delsys = { SYS_DVBS },
0707 .info = {
0708 .name = "ST STV0299 DVB-S",
0709 .frequency_min_hz = 950 * MHz,
0710 .frequency_max_hz = 2150 * MHz,
0711 .frequency_stepsize_hz = 125 * kHz,
0712 .symbol_rate_min = 1000000,
0713 .symbol_rate_max = 45000000,
0714 .symbol_rate_tolerance = 500,
0715 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
0716 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
0717 FE_CAN_QPSK |
0718 FE_CAN_FEC_AUTO
0719 },
0720
0721 .release = stv0299_release,
0722
0723 .init = stv0299_init,
0724 .sleep = stv0299_sleep,
0725 .write = stv0299_write,
0726 .i2c_gate_ctrl = stv0299_i2c_gate_ctrl,
0727
0728 .set_frontend = stv0299_set_frontend,
0729 .get_frontend = stv0299_get_frontend,
0730 .get_tune_settings = stv0299_get_tune_settings,
0731
0732 .read_status = stv0299_read_status,
0733 .read_ber = stv0299_read_ber,
0734 .read_signal_strength = stv0299_read_signal_strength,
0735 .read_snr = stv0299_read_snr,
0736 .read_ucblocks = stv0299_read_ucblocks,
0737
0738 .diseqc_send_master_cmd = stv0299_send_diseqc_msg,
0739 .diseqc_send_burst = stv0299_send_diseqc_burst,
0740 .set_tone = stv0299_set_tone,
0741 .set_voltage = stv0299_set_voltage,
0742 .dishnetwork_send_legacy_command = stv0299_send_legacy_dish_cmd,
0743 };
0744
0745 module_param(debug_legacy_dish_switch, int, 0444);
0746 MODULE_PARM_DESC(debug_legacy_dish_switch, "Enable timing analysis for Dish Network legacy switches");
0747
0748 module_param(debug, int, 0644);
0749 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
0750
0751 MODULE_DESCRIPTION("ST STV0299 DVB Demodulator driver");
0752 MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Peter Schildmann, Felix Domke, Andreas Oberritter, Andrew de Quincey, Kenneth Aafly");
0753 MODULE_LICENSE("GPL");
0754
0755 EXPORT_SYMBOL(stv0299_attach);